Arrangement and method for producing a semiconductor wafer with reduced autodoping and semiconductor wafer
Patent Information
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- SILTRONIC AG
- Filing Date
- 2024-12-17
- Publication Date
- 2026-08-01
AI Technical Summary
The existing epitaxial coating process for highly doped substrate wafers results in undesirable 'autodoping' and radial resistance variation (RRV) due to uncontrolled dopant diffusion, leading to defects and uneven resistivity in semiconductor wafers.
A layer deposition apparatus with a perforated base unit, preheating ring, and sealing ring unit is designed to rotate relative to each other, creating a physical barrier to reduce dopant diffusion and maintain uniform epitaxial layer deposition, eliminating the need for a doping diffusion barrier layer like LTO.
The solution achieves semiconductor wafers with reduced RRV and surface defects by minimizing autodoping, ensuring consistent epitaxial layer deposition and improved surface quality without residual LTO layer defects.
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Figure TWG2TB001903714_001 
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Abstract
Description
Technical field
[0001] The invention relates to a layer deposition arrangement for an epi-reactor for producing a semiconductor wafer having at least one epitaxial layer. The invention further relates to a method for producing a semiconductor wafer comprising depositing at least one epitaxial layer using a layer deposition device. The invention finally relates to a semiconductor wafer comprising a doped substrate wafer and at least one epitaxial layer deposited thereon. Prior technology
[0002] It is known that the epitaxial coating process for (highly) doped substrate wafers in epitaxial reactors is accompanied by the following problem: During the deposition of epitaxial layers on (highly) doped substrate wafers (e.g., boron-doped substrate wafers) to produce semiconductor wafers, the dopant from the substrate wafer is a hole susceptor deposited in a layer deposition device unit), the dopant initially enters the deposited gas (in an uncontrolled manner) from the back side of the substrate wafer (i.e., the side of the substrate wafer facing the hole-like base unit within the epitaxial reactor) via the gas phase during the epitaxial deposition mode, and then is eventually incorporated primarily into the substrate wafer edge of the substrate wafer on the front side of the substrate wafer (i.e., on which the epitaxial layer is deposited during the epitaxial deposition mode). This undesirable phenomenon is known as the term “autodoping,” which results in a radial change in resistivity (specific resistance) along the deposited epitaxial layer of a semiconductor wafer—usually designated by the characteristic variable “radial resistance variation (RRV).” In this case, according to the formula RRV[%]=(R max- R min) / (R max+ R min) (particularly according to the SEMI standard M62-0317 (Specification for Silicon Epitaxial Wafers), 2017 grid)) on the various R values measured derived from a specified number of measurement points to determine the RRV value [%].
[0003] To improve the RRV value, it is known from the prior art that an LTO (Low Thermal Oxide) layer is initially provided in a sealed manner on the back side of the semiconductor wafer (i.e., the side of the substrate wafer facing the via pedestal unit within the epitaxial reactor). The substrate wafer system including the applied LTO layer is then arranged in the epitaxial reactor within the via pedestal unit and subjected to an epitaxial deposition mode. This LTO layer system acts as a dopant diffusion barrier layer and aims to prevent dopant diffusion from the substrate wafer into (at least one) epitaxial layer as much as possible during the epitaxial coating process. By providing this oxide layer, a relatively low radial resistivity is achieved after epitaxial deposition; however, retaining this oxide layer on the semiconductor wafer produced as the final product may be disadvantageous. Even after manual and / or chemical postprocessing (e.g., by cleaning with HF components) to remove the layer—especially in cases of uneven epitaxial growth at the edges of the oxide layer during the epitaxial process—defects remain undesirably as residues on the semiconductor wafer. These defects can be detected as spot defects using inspection equipment (particularly an EBI (electron beam inspection) unit) by means of scattered light measurement (e.g., using an EBI unit from Nanophotonics AG, operating as described in paragraph 52 of document DE102009011622 A1). These defects are characteristically present as defect rings formed around the edge regions of the semiconductor wafer, exhibiting a substantial ring shape with a high defect density or number of defects.
[0004] Therefore, the objective of this invention is to produce semiconductor wafers with epitaxial layers from (highly) doped substrate wafers in a simple manner using a compact via-type substrate unit of a layer deposition apparatus in an epitaxial deposition mode, which does not have the disadvantages mentioned above or at least has these disadvantages to a lesser extent, and in particular, has a lower RRV value in combination with a relatively reduced surface defect on the free substrate wafer surface of the final semiconductor wafer. Summary of the Invention
[0005] This objective is achieved according to a first aspect of the invention by providing a layer deposition apparatus having a base unit according to the following features; further, according to a second aspect, by a method for producing a semiconductor wafer using the layer deposition apparatus (including depositing at least one epitaxial layer) according to the following features; and finally, according to a third aspect, by providing a semiconductor wafer according to the following features. Preferred embodiments are as follows.
[0006] A layer deposition arrangement (1) for an epitaxial reactor, wherein the epitaxial reactor is used to produce semiconductor wafers having at least one epitaxial layer, wherein The deposition apparatus (1) comprises a hole susceptor unit (1.1) and a preheat ring (1.2), wherein the hole susceptor unit (1.1) has an upper side (1.12) and a lower side (1.13). At least during the epitaxial deposition mode, The preheating ring (1.2) surrounds the perforated base unit (1.1) at least in sections spaced apart by gap elements (1.3), particularly in the form of air gap rings, wherein the perforated base unit (1.1) is designed to rotate about the vertical axis of the perforated base unit (1.1) relative to the preheating ring (1.2) at a predetermined rotational speed, and The layer deposition apparatus (1) also includes at least one sealing ring unit (1.4) which is arranged on the layer deposition apparatus (1) and is designed to provide a physical barrier unit on the gap unit (1.3) between the upper side (1.12) and the lower side (1.13) of the perforated base unit.
[0007] In a preferred embodiment of the present invention, the sealing ring unit (1.3) is substantially formed as an annular disk. and / or The sealing ring unit (1.4) is arranged at a point on the side of the deposition apparatus (1) facing the lower side (1.13) of the perforated base unit, particularly directly on the lower side (1.13) of the perforated base unit, or at a point on the side of the deposition apparatus (1) facing the upper side (1.12) of the perforated base unit, particularly on the upper side of the preheating ring (1.2). and / or The sealing ring unit (1.4) is arranged on the deposition apparatus (1) in such a way that when viewed in the radial direction of the perforated base unit (1.1), it at least partially overlaps the perforated base unit (1.1) and the preheating ring (1.2), and when viewed in the radial direction, it substantially extends beyond the gap unit (1.3), in particular the form of an air gap ring.
[0008] In a preferred embodiment of the invention, the sealing ring unit (1.4) is substantially formed as an annular ring and has a sealing ring width in the range of 5 mm to 50 mm, preferably in the range of 15 mm to 25 mm, when viewed in its radial direction. The gap unit (1.3) in the form of an air gap ring has a gap width in the range of 1.2 mm to 2.6 mm, preferably in the range of 1.5 mm to 2.2 mm, and more preferably substantially 1.9 mm, when viewed in the radial direction of the hole-type base unit (1.1). In particular, the gap width is substantially constant in the circumferential direction.
[0009] In a preferred embodiment of the invention, the sealing ring unit (1.4) is arranged to be detachably fastened to the deposition apparatus (1), particularly to the perforated base unit (1.1) or the preheating ring (1.2), and the sealing ring unit (1.4) is specifically made of a material including SiC, graphite, or quartz. or The sealing ring unit (1.4) is essentially a monolithic unit with the hole base unit (1.1) or the preheating ring (1.2).
[0010] In a preferred embodiment of the present invention, the hole-type base unit (1.1) includes a recess in the form of a substrate wafer receiving unit (1.15) on its upper side (1.12), which includes a substrate wafer receiving surface (1.14). in The substrate wafer receiving surface (1.14) is formed as a lateral inner surface substantially similar to a truncated cone. Starting from a ledge reference point on a reference circle on the substrate wafer receiving surface (1.14), the substrate wafer receiving surface (1.14) has an inclination in the form of a ledge angle relative to the radial direction and the horizontal plane of the hole-type base unit (1.1). This ledge angle has an angle magnitude in the range of 0.0° to 2.0°, preferably in the range of 0.1° to 1.0°, and more preferably in the range of 0.2° to 0.5°, and is substantially constant when viewed along the circumferential direction of the hole-type base unit (1.1), with a maximum variation of 1%, preferably at most 0.5%, and more preferably at most 0.25% along the circumferential direction. and / or The substrate wafer receiving surface (1.1) has a planarity dimensional tolerance in the range of 0.002 mm to 0.012 mm, preferably in the range of 0.005 mm to 0.008 mm.
[0011] In a preferred embodiment of the invention, a flushing unit having a flushing gas, particularly hydrogen, is provided on the side of the deposition apparatus (1) facing the lower side (1.13) of the perforated base unit, wherein the flushing gas flushing, particularly hydrogen flushing, below the perforated base unit (1.1) can be reduced to 3 slm (standard liters / minute).
[0012] A method for producing a semiconductor wafer, the method comprising depositing at least one epitaxial layer on a doped substrate wafer in an epitaxial reactor to produce the semiconductor wafer, the doped substrate wafer not having a doping diffusion barrier layer, particularly an LTO layer, wherein the method includes the following steps: The second wafer side of the doped substrate wafer is positioned on the hole-type substrate unit (1.1) of the layer deposition apparatus (1) as described above, particularly on the substrate wafer receiving surface (1.14). Initiate the epitaxial deposition mode of the deposition apparatus (1) for this layer. During this epitaxial deposition mode, at least one epitaxial layer is deposited on the first wafer side of the doped substrate wafer.
[0013] In a preferred embodiment of the present invention, at least during the epitaxial deposition mode, the hole-type base unit (1.1) rotates relative to the preheating ring (1.2) about the vertical central axis of the hole-type base unit (1.1) at a predetermined rotational speed. and During the epitaxial deposition mode, a flushing unit in the form of flushing gas, particularly hydrogen, is provided on the side of the deposition apparatus (1) facing the lower side (1.13) of the hole-type base unit. The form of flushing, particularly hydrogen flushing, performed by the flushing gas under the hole-type base unit (1.1) is controlled in a predetermined manner and can be varied to at least 3 slm and at most 30 slm during the epitaxial deposition mode.
[0014] In a preferred embodiment of the present invention, after the deposition of at least one epitaxial layer is completed and after the epitaxial deposition mode is ended, the semiconductor wafer system undergoes a final cleaning step, which includes chemical cleaning of the semiconductor wafer.
[0015] A semiconductor wafer comprising a substrate wafer and at least one epitaxial wafer, wherein The substrate wafer includes doping using at least one dopant. The at least one epitaxial layer is disposed on the first wafer side of the substrate wafer. The semiconductor wafer It has a radial resistance variation (RRV) in the range of 1.30% to 2.20%, and The substrate wafer has at least one defect and less than 200 defects on its second wafer side. These defects can be detected by means of scattered light measurement using a detection device as spot defects. In at least some sections, these defects are arranged on a defect ring formed as a substantial ring, which extends within the region of the substantial ring on the second wafer side, wherein the region has a radial width of 3 mm and its outer circumference substantially coincides with the edge of the semiconductor wafer.
[0016] In a preferred embodiment of the present invention, no layer in the form of a doped diffusion barrier layer, particularly in the form of a low thermal oxide (LTO) layer, is disposed on the second wafer side of the substrate wafer, especially not at any time during the production of the semiconductor wafer.
[0017] In a preferred embodiment of the present invention, no residue in the form of a low thermal oxide (LTO) layer defect is disposed on the second wafer side of the substrate wafer.
[0018] In a preferred embodiment of the present invention, the doped substrate wafer having boron dopant forms a substrate resistance of 0.005 to 0.020 ohmcm, and / or the semiconductor wafer has an RRV in the range of 1.40% to 2.10%, preferably 1.45% to 2.00%.
[0019] In a preferred embodiment of the present invention, the semiconductor wafer is formed such that, for a doped substrate wafer having a substrate resistance in the range of 0.005 to 0.008 ohms, the RRV of the semiconductor wafer is formed in the range of 1.40% to 2.10%, preferably in the range of 1.45% to 2.00%. or The semiconductor wafer is formed such that, for a substrate resistance in the range of 0.008 to 0.016 ohm cm, the doped substrate wafer is formed in the range of 1.40% to 1.80%, preferably in the range of 1.45% to 1.60%, and more preferably substantially 1.50% of the semiconductor wafer’s RRV.
[0020] In this context, the technical teaching upon which this invention is based is that if (i) the correspondingly designed aperture base units of the layer deposition apparatus for producing semiconductor wafers are designed to rotate relative to the preheat ring (and these are spaced apart from each other via correspondingly designed gap units), such that reliable rotation of the aperture base units relative to the preheat ring is ensured during epitaxial deposition mode, and thus continuous and uniform epitaxial layer deposition is achieved, and (ii) in order to combat the occurrence of "auto-doping" in the semiconductor wafer to be produced during epitaxial deposition mode, the layer deposition apparatus having its aperture base units is designed such that reliable physical barrier units against unwanted flow are ensured overall between the upper and lower sides of the layer deposition apparatus during epitaxial deposition mode, then a semiconductor wafer is obtained in a simple manner that has a relatively low RRV (i.e., low RRV value) of the deposited epitaxial layer of the semiconductor wafer and a second wafer side with relatively reduced defects in the doped substrate wafer. Simple Explanation of the Diagram
[0021] Figure 1 shows a schematic detail of a three-dimensional view of a layer deposition apparatus 1, which includes a perforated base unit 1.1, a preheating ring 1.2, a gap unit 1.3, and a sealing ring unit 1.4 (a flushing unit is not shown). Implementation
[0022] According to a first aspect, the present invention therefore relates to a layer deposition apparatus for an epitaxial reactor for producing semiconductor wafers having at least one epitaxial layer, wherein the layer deposition apparatus comprises a via pedestal unit and a preheating ring, wherein the via pedestal unit has an upper side and a lower side, and wherein at least during the epitaxial deposition mode, The preheating ring surrounds the perforated base unit at a certain distance in at least some sections via gap elements (particularly in the form of air gap rings), wherein the perforated base unit is designed to rotate at a specified rotational speed relative to the vertical axis (particularly the vertical central axis) of the preheating ring surrounding the perforated base unit, and wherein... The layer deposition apparatus also includes at least one sealing ring unit arranged on the layer deposition apparatus and designed to provide a physical barrier unit on the gap unit between the upper side and the lower side of the perforated base unit.
[0023] Within the meaning of this invention, the term "between" does not imply a directional limitation on the effect of the physical barrier (cell). Due to the design of the layer deposition apparatus according to the invention (particularly due to the selected relative arrangement of the components of the layer deposition apparatus or the arrangement of the gap cells relative to each other), and particularly due to the special design of the components of the sealing ring cell relative to the gap cell during the epitaxial deposition mode of the layer deposition apparatus, at least one of the deposition process gases and dopants is reduced, and in particular substantially avoided, through the exchange system of the gap cell between the lower side and the upper side of the aperture base cell.
[0024] However, it is particularly advantageous that the flow of deposition process gas from the upper side of the porous substrate unit to the lower side of the porous substrate unit via the gap element and the flow of dopant from the lower side of the porous substrate unit to the upper side of the porous substrate unit via the gap element can be reduced, or preferably substantially avoided.
[0025] For this purpose, the sealing ring unit can, in principle, be arranged at any point on the layer deposition apparatus, as long as the function of creating a barrier effect or physical barrier (unit) between the upper and lower sides of the layer deposition apparatus is ensured, so as to provide a contribution to reducing the "autodoping" effect or, ideally, avoiding the "autodoping" effect. In a particularly advantageous variant of the layer deposition apparatus, the sealing ring unit is arranged on the perforated substrate unit, particularly on the lower or upper side of the perforated substrate unit, and is arranged relative to the preheating ring, such that the flow of deposition process gas from the upper side of the perforated substrate unit to the lower side of the perforated substrate unit via the gap unit is reduced, preferably substantially avoided, and the flow of dopant from the lower side of the perforated substrate unit to the upper side of the perforated substrate unit via the gap unit is reduced, preferably substantially avoided. Alternatively, the sealing ring unit may be specified to be arranged on the preheating ring, particularly on the side of the layer deposition apparatus facing the lower side or the upper side of the perforated substrate unit, and arranged relative to the perforated substrate unit such that the flow of deposition process gas through the gap unit from the upper side of the perforated substrate unit into the lower side of the perforated substrate unit is substantially reduced, preferably substantially avoided, and the flow of dopants through the gap unit from the lower side of the perforated substrate unit into the upper side of the perforated substrate unit is reduced, preferably substantially avoided.
[0026] Alternatively, the sealing ring unit can be arranged at a point on the side of the layer deposition apparatus facing the lower side of the perforated base unit, particularly directly on the lower side of the perforated base unit. In an alternative variation, the sealing ring unit can be arranged at a point on the side of the layer deposition apparatus facing the upper side of the perforated base unit, particularly on the upper side of the preheating ring.
[0027] Alternatively, the sealing ring unit can be arranged on the layer deposition apparatus such that, when viewed in the radial direction of the perforated base unit, the sealing ring unit at least partially overlaps the perforated base unit and the preheating ring, and, when viewed in the radial direction, substantially extends beyond the gap unit (especially in the form of an air gap ring).
[0028] In other words, it is also conceivable that the sealing ring unit can be arranged within the gap unit on the layer deposition apparatus, as long as the sealing ring unit is ensured to function as a physical barrier unit as described above, and at the same time, regardless of the internal arrangement within the gap unit, reliable rotation relative to the perforated base unit of the preheating ring is ensured during the epitaxial deposition mode.
[0029] Although the single sealing ring unit correspondingly arranged on the layer deposition apparatus reliably takes over the function of creating the physical barrier unit, in a further preferred variation, it may be specified to arrange at least one additional sealing ring unit. In such a layer deposition apparatus, for example, according to one of the variations described herein, the first sealing ring unit may be arranged on the underside of the base unit, and according to another variation described herein, the second sealing ring unit may be arranged on the upper side of the preheating ring. In this way, it is particularly advantageous to reduce or even avoid the occurrence of "autodoping" effects during epitaxial deposition mode.
[0030] In principle, the geometry of the via base unit and the preheating ring, as well as the positioning of the gap ring and sealing ring units, can be carried out in any manner, as long as the following requirements for the layer deposition apparatus are ensured: the production of semiconductor wafers without the occurrence of "autodoping" effects, and the reliable rotation of the via base unit relative to the preheating ring and the uniform deposition of the epitaxial layer during epitaxial deposition mode. However, in a particularly advantageous variant of the invention, it is preferred that the preheating ring units, preferably starting from the circumferential edge of the via base unit, are arranged to be spaced apart radially from the via base unit via gap units (in particular in the form of air gap rings) formed in a substantially annular manner around the via base unit, and the preheating ring system surrounds the via base unit at least in some sections (preferably in all sections) at least along the circumferential direction of the via base unit. A particularly compact and reliable embodiment of the layer deposition unit is achieved in this manner.
[0031] The sealing ring unit can be geometrically designed arbitrarily, as long as it thus achieves the functions described in the above-described manner on the layer deposition apparatus. In a particularly advantageous variation, the sealing ring unit is preferably in the form of a ring disk; in this case, the sealing ring unit can be formed with a substantially plane-parallel surface in the radial section, or it can have a shape offset from that surface in the radial section, such as an L-shape or a Z-shape.
[0032] In a further advantageous variation, the sealing ring unit can be formed as a substantially annular ring, and when viewed radially, it can have a sealing ring width in the range of 5 mm to 50 mm, preferably in the range of 15 mm to 25 mm. Furthermore, the gap unit can be designed as an air gap ring, and when viewed radially from the bore base unit, it can have a gap width in the range of 1.2 mm to 2.6 mm, preferably in the range of 1.5 mm to 2.2 mm, and more preferably a substantially 1.9 mm gap width, wherein, in particular, the gap width is substantially constant along the circumferential direction.
[0033] In all these variations of the sealing ring implementation, the aforementioned functions of the sealing ring unit on the layer deposition apparatus are fully realized.
[0034] In principle, the radial direction can be understood as any direction starting from the center point (or central axis) of the particularly substantially symmetrical perforated base element, in the direction of the gap element, and along the radius of the perforated base element.
[0035] In principle, the sealing ring unit can be fastened to the layer deposition apparatus in any way, or it can be a physical part of it. In an advantageous variation, the sealing ring unit is preferably arranged to be detachably fastened to the layer deposition apparatus, for example, to the orifice base unit or the preheating ring. This design allows for very flexible replacement of components and access to more internal components (especially gap units) during repairs, maintenance, or other interventions within the layer deposition apparatus. In this case, the sealing ring unit is preferably detachably fastened to the orifice base unit or the preheating ring by a clamp connection, a plug connection, or a screw connection.
[0036] The sealing ring unit is preferably made of a material containing SiC, graphite, or quartz.
[0037] Alternatively, for these variations, the sealing ring unit can be designed substantially as a perforated base unit or an integral unit with a preheating ring. This implementation advantageously reduces the number of joints in the layer deposition apparatus compared to the detachable connection points of the sealing ring unit.
[0038] The present invention also recognizes that, in order to further reduce (or particularly substantially avoid) the phenomenon of “automatic doping” in the semiconductor wafer to be produced during epitaxial deposition mode, the layer deposition apparatus having its aperture base unit is preferably designed such that a reliable physical barrier unit is ensured between the upper and lower sides of the layer deposition apparatus and between the support surface for the semiconductor wafer on the aperture base unit and the upper side of the aperture base unit.
[0039] The receptor point for the substrate wafer on the via-type substrate unit can, in principle, be arbitrarily designed. A particularly advantageous implementation is achieved if a reliable physical barrier unit is also ensured between the support surface for the semiconductor wafer on the via-type substrate unit and the upper side of the via-type substrate unit, thus reducing or avoiding the "auto-doping" effect in the semiconductor wafer to be manufactured. This can be advantageously achieved because the support surface is preferably designed and tilted (i.e., through geometric design) so that the substrate wafer placed on it itself becomes or acts as a physical barrier unit. To achieve this advantageous effect, for this purpose, in a particularly advantageous variant, it is specified that the aperture base unit has a recess on its upper side in the form of a substrate wafer receiving unit, which in turn includes a substrate wafer receiving surface substantially formed as a transverse inner surface similar to a truncated cone or in the shape of a funnel, wherein the surface originating from a flange reference point on a reference circle on the substrate wafer receiving surface has an inclination in the form of a flange angle relative to the radial direction of the aperture base unit and the horizontal plane of the aperture base unit, wherein the flange angle has an angle magnitude in the range of 0.0° to 2.0°, preferably in the range of 0.1° to 1.0°, more preferably in the range of 0.2° to 0.5°, and is substantially constant when viewed along the circumferential direction of the aperture base unit, wherein the maximum variation along the circumferential direction is 1%, preferably at most 0.5%, more preferably at most 0.25%.
[0040] In other words, by carefully selecting the geometry of the support surface (i.e., the form of the substrate wafer receiving surface within the via pedestal unit, such as a truncated cone or funnel shape), a support surface for the substrate wafer is created, which has the substrate wafer deposited during the epitaxial deposition mode. This results in a substantially seamless and therefore “tight” (especially substantially annular) contact area (between the substrate wafer and the support surface on the via pedestal unit), thereby forming a further physical barrier against unwanted flow between the upper and lower sides of the layer deposition apparatus, and thus making a positive contribution to reducing or substantially avoiding the “autodoping” effect in the epitaxial layer.
[0041] In a particularly advantageous variant, in order to reduce (and especially avoid) the "auto-doping" effect, it is specified that the substrate wafer receiving surface itself does not have any via cells. Instead, the via cells are preferably arranged within the inner bottom surface of the substrate wafer receiving cell of the via base cell, as is also done in ordinary via base cells (not discussed in more detail here).
[0042] It is particularly advantageous if the substrate wafer receiving surface preferably has a planarity dimensional tolerance in the range of 0.002 mm to 0.012 mm, and more preferably in the range of 0.005 mm to 0.008 mm. The cells of such a substrate wafer receiving surface also contribute to a substantially seamless and therefore “tight” contact with the deposited substrate wafer, thus ensuring the required physical barrier.
[0043] The position of the reference circle specifically defines the starting region of the tilt (flange angle αL) of the substrate wafer receiving surface within the substrate wafer receiving unit. The reference circle preferably coincides with the inner circumferential edge of the phase of the substrate wafer receiving unit. In an alternative advantageous variation, the reference circle may extend from this inner circumferential edge in the direction of the vertical central axis of the hole-type base unit; thus, it can have a reference radius smaller than the (imaginary) radius of the inner circumferential edge of the substrate wafer receiving unit.
[0044] If the flushing unit with flushing gas (especially hydrogen) is preferably located on the side of the layer deposition apparatus facing the lower side of the hole-type base unit, it can further contribute to reducing or substantially avoiding "autodoping" in the epitaxial layer during epitaxial deposition. In this case, the geometric alignment of the flushing nozzles of the flushing unit and the flushing pressure of the flushing gas can be set in a predetermined manner on the flushing unit.
[0045] Because of the aforementioned physical barrier unit, the transfer of process gases from the upper side of the layer deposition apparatus to the lower side, causing coaching or deposition, can be advantageously reduced (and in particular substantially avoided). As a result, the flushing gas flushing (especially hydrogen flushing) performed by the flushing unit below the perforated base unit can be advantageously reduced to 3 slm (standard liters / minute) (compared to the higher values typically in the range of 8 slm to 30 slm).
[0046] According to a second aspect, the present invention relates to a method for producing a semiconductor wafer using a layer deposition apparatus just described according to one or a combination thereof, the method comprising depositing at least one epitaxial layer on a (highly) doped substrate wafer in an epitaxial reactor to produce a semiconductor wafer, the (highly) doped substrate wafer not having a doping diffusion barrier layer, particularly not having an LTO layer, wherein the method includes the following steps: The second wafer side of the doped substrate wafer is positioned at the hole-type substrate unit of the layer deposition apparatus according to one of the designs or variations of the above-described layer deposition apparatus (or any combination of the preferred variations), particularly at the substrate wafer receiving surface. Epitaxial deposition mode of the start-up layer deposition device During epitaxial deposition mode, at least one epitaxial layer is deposited on the first wafer side of the doped substrate wafer.
[0047] In this case, it is specified that, at least during the epitaxial deposition mode, the rotation of the hole base unit around the vertical central axis of the hole base unit relative to the preheating ring is performed at a specified rotational speed (particularly in the range of 25 rpm to 60 rpm).
[0048] Epitaxial deposition mode is better understood as the following process mode: a process mode in which at least one epitaxial layer is deposited on a substrate wafer within an epitaxial reactor (typically designed).
[0049] Preferably, in addition to the actual deposition process, the epitaxial deposition mode also includes process times before and after it, for example, during which only the hole-type substrate unit with the substrate wafer to be deposited rotates relative to the preheating ring, without simultaneous deposition.
[0050] The epitaxial deposition apparatus is preferably designed to allow different epitaxial deposition modes to be performed at temporal offsets, wherein these modes may differ, for example, in the deposition gas flow rate in the epitaxial reactor, the type of deposition medium, the specified epitaxial process temperature window, the rotational speed of the perforated substrate unit, etc.
[0051] The substrate wafer is preferably designed as a monocrystalline silicon wafer, and at least one deposited epitaxial layer is designed as a monocrystalline silicon layer.
[0052] By using the method according to the invention of the above-described layer deposition apparatus (i.e., while substantially avoiding the “autodoping” effect during epitaxial deposition mode), a semiconductor wafer can be achieved in general that has the advantageous characteristics described at the beginning regarding the RRV value of the epitaxial layer, and has a surface quality with relatively reduced defects in the final semiconductor wafer (particularly regarding the surface side of the substrate wafer, which in the prior art at least temporarily had an LTO layer).
[0053] If the method further specifies that, during the epitaxial deposition mode, a rinsing unit with a rinsing gas (especially in the form of hydrogen) is provided on the side of the layer deposition apparatus facing the lower side of the porous substrate unit, wherein the rinsing (especially in the form of hydrogen rinsing) performed below the porous substrate unit by the rinsing gas can be controlled and varied in a predetermined manner throughout the epitaxial deposition mode, particularly controlled and varied in a predetermined manner to at least 3 slm and at most 30 slm, then a further advantageous contribution can be made to reducing or substantially avoiding the phenomenon of "autodoping" in the epitaxial layer during the epitaxial deposition mode.
[0054] In a further preferred variation of the method, it is preferably specified that after the deposition of at least one epitaxial layer is completed and after the epitaxial deposition mode is ended, the produced semiconductor wafer system undergoes a final cleaning step, which includes chemical cleaning of the semiconductor wafer.
[0055] According to a third aspect, the present invention further relates to a semiconductor wafer comprising a substrate wafer and at least one epitaxial layer, wherein... The substrate wafer is doped with at least one dopant (particularly boron). At least one epitaxial layer is disposed on the first wafer side of the substrate wafer, and Semiconductor wafers: The substrate has a radial resistance variation (RRV) in the range of 1.30% to 2.20%, and at least one and fewer than 200 defects on the second wafer side of the substrate wafer. These defects can be detected as spot defects by means of scattered light measurement using a detection device. In at least some sections, these defects are arranged on a defect ring formed as a substantial ring, which extends within the region of the substantial ring on the second wafer side, wherein the region has a radial width of 3 mm and its outer circumference substantially coincides with the edge of the semiconductor wafer.
[0056] The semiconductor wafer according to the invention, having its advantageous RRV value and simultaneously reduced relative defects on the second wafer side, is a direct result of epitaxial deposition on a boron-doped substrate wafer performed on a layer deposition apparatus according to the method according to the invention (i.e., especially without any LTO layer). These few defects (at least one and less than 200 defects) on the semiconductor wafer according to the invention are, in this case, primarily caused only by scratches or friction-related deposition conditions on the semiconductor wafer edge on the substrate wafer support surface during epitaxial mode (and not, as in the prior art, by a large number of additional defects attributable to LTO layer residue in that region). Preferably, the number of these defects is in the range of one to 100 defects, more preferably in the range of six to 100 defects.
[0057] These defects (in their advantageously relatively small number) can be detected as spot defects by means of scattered light measurement using detection equipment (in particular, using an EBI unit (e.g., from Nanophotonics AG, with an operating mode as described in paragraph
[0052] of DE102009011622 A1)).
[0058] In other words, it is preferably specified that no layer in the form of a doped diffusion barrier layer (especially in the form of a low-thermal oxide (LTO) layer) is disposed on the second wafer side of the substrate wafer, wherein, particularly at any time during semiconductor wafer production, no LTO layer is disposed on the second wafer side of the substrate wafer. In other words, it is specifically specified that no residues in the form of defects in the LTO layer are disposed on the second wafer side of the substrate wafer.
[0059] In a preferred embodiment, the doped substrate wafer with boron dopant may be specified to have a substrate resistance of 0.005 to 0.020 ohmcm, and / or the semiconductor wafer may have an RRV in the range of 1.40% to 2.10%, preferably in the range of 1.45% to 2.00%.
[0060] The substrate wafer is preferably formed as a single-crystal silicon wafer, and at least one deposited epitaxial layer is a single-crystal silicon layer.
[0061] The deposited epitaxial layer preferably has an average layer thickness in the range of 1.5 micrometers to 20 micrometers. However, the invention is not limited to this range, and larger or smaller layer thicknesses of the deposited epitaxial layer are possible.
[0062] The substrate wafer preferably has an average layer thickness of substantially 775 micrometers. However, the invention is not limited to this scope, and larger or smaller layer thicknesses of the substrate wafer are possible.
[0063] This invention is particularly applicable to the production of semiconductor wafers with a target diameter in the range of 290 to 310 mm, especially semiconductor wafers with a target diameter of substantially 300 mm ("300 mm wafers"), but is not limited thereto. For example, the production of "200 mm" wafers is also conceivable (where the diameter of the recessed unit of the base unit is adjusted accordingly).
[0064] In a further preferred variation of the semiconductor wafer, the semiconductor wafer can be formed as follows: for a doped substrate wafer having a substrate resistance in the range of 0.005 to 0.008 ohms, the semiconductor wafer has an RRV in the range of 1.40% to 2.10%, preferably in the range of 1.45% to 2.00%. Alternatively, the semiconductor wafer can be formed as follows: for a doped substrate wafer having a substrate resistance in the range of greater than 0.008 to 0.016 ohms, the semiconductor wafer has an RRV in the range of 1.40% to 1.80%, preferably in the range of 1.45% to 1.60%, and more preferably substantially 1.50% of the semiconductor wafer's RRV. Specifically, the RRV value can be achieved by epitaxial deposition mode of an epitaxial process, which is performed at a temperature in the range of 1080°C to 1125°C, preferably in the range of 1100°C to 1120°C, and specifically, the substrate wafer is boron-doped.
[0065] Compared to semiconductor wafers manufactured using conventional via-type substrate units (i.e., particularly those without sealing rings and / or correspondingly shaped substrate wafer receiving surfaces within the via-type substrate units), the preferred variant of the described semiconductor wafer also exhibits the advantage of a significantly lower RRV value compared to those produced using these conventional via-type substrate units and substrate wafers without doped diffusion barrier layers. Furthermore, the RRV value of the semiconductor wafer is less sensitive to the dopant concentration in the substrate wafer (in other words, less dependent on substrate resistance). This latter effect allows for flexible use of the layer deposition apparatus in the epitaxial reactor for different epitaxial process controls, as adjustments or refitting of the epitaxial reactor for substrate wafers with different dopant concentrations can be achieved more quickly compared to known implementations of layer deposition apparatus (with conventional via-type substrates).
[0066] For example, in this advantageous variant of the semiconductor wafer, the substrate resistance of the substrate wafer of the semiconductor wafer can be in the range of 0.005 to 0.008 ohms, and the RRV of the semiconductor wafer can correspond to a percentage value in the range of 40% to 50% of the reference RRV. The reference RRV and the substrate wafer formed in the same manner form a reference substrate wafer of the reference semiconductor wafer. At least one epitaxial layer is deposited on the reference substrate wafer by means of (conventional) hole-type substrate units (i.e., particularly substrate wafer receiving surfaces without sealing ring units and / or corresponding geometric designs within the hole-type substrate units) in the same epitaxial deposition mode. Alternatively, the substrate resistance of the semiconductor wafer substrate can be in the range of greater than 0.008 to 0.012 ohms, and the RRV of the semiconductor wafer can correspond to a percentage value in the range of 40% to 65% of the reference RRV. The reference RRV and the substrate wafer formed in the same manner form a reference substrate wafer of the reference semiconductor wafer. At least one epitaxial layer is deposited on the reference substrate wafer by means of (conventional) hole-type substrate units (i.e., particularly substrate wafer receiving surfaces without sealing ring units and / or corresponding geometric designs in the hole-type substrate units) in the same epitaxial deposition mode. Alternatively, the substrate resistance of the semiconductor wafer's substrate wafer can be in the range of greater than 0.012 to 0.016 ohms, and the RRV of the semiconductor wafer can correspond to a percentage value in the range of 60% to 85% of the reference RRV. The reference RRV and the substrate wafer formed in the same manner form a reference substrate wafer for the reference semiconductor wafer. At least one epitaxial layer is deposited on the reference substrate wafer using (conventional) via-type substrate units (i.e., particularly substrate wafer receiving surfaces without sealing ring units and / or corresponding geometric designs within the via-type substrate units) in the same epitaxial deposition mode. In particular, the RRV value can be achieved using an epitaxial deposition mode of an epitaxial process performed at a temperature in the range of 1080°C to 1125°C, preferably in the range of 1100°C to 1120°C.
[0067] In particular, the substrate wafer is boron-doped. [Preferred Example Implementation]
[0068] The following describes a preferred embodiment of the layer deposition apparatus 1 according to the present invention. Furthermore, a preferred embodiment of a semiconductor wafer (comprising a boron-doped silicon substrate wafer and a deposited epitaxial single-crystal silicon layer) according to the present invention is described, the semiconductor wafer being produced by the layer deposition apparatus 1 according to the method of the present invention.
[0069] Figure 1 shows schematic details of a three-dimensional view of a layer deposition apparatus 1 having a perforated base unit 1.1 and a preheating ring 1.2. In this configuration, the preheating ring 1.2 is arranged to start from the circumferential edge 1.11 of the perforated base unit 1.1 and be spaced apart from the radial direction of the perforated base unit 1.1 by substantially annular gap ring units (gap units) 1.3 (in the form of air gap rings (gap units) 1.3) formed around the perforated base unit 1.1, and the preheating ring 1.2 here surrounds the perforated base unit 1.1 along its circumferential direction. Viewed radially from the perforated base unit 1.1, the air gap rings (gap units) 1.3 have a gap width of 1.9 mm, wherein the gap width remains substantially constant along the circumferential direction. This embodiment ensures reliable rotation of the aperture base unit 1.1 relative to the preheating ring 1.2 about the vertical central axis (at a specified rotational speed, for example, in the range of 25 rpm to 60 rpm, essentially at the level of 50 rpm here), and thus uniform deposition of the epitaxial layer on the substrate wafer deposited on the aperture base unit 1.1 (specifically on the first wafer side of the substrate wafer) during the epitaxial deposition mode.
[0070] As shown in Figure 1, the sealing ring unit 1.4 of the layer deposition apparatus 1 is designed to provide a physical barrier unit at the air gap ring (gap unit) 1.3 between the upper side 1.12 and the lower side 1.13 of the perforated base unit.
[0071] In this exemplary embodiment of the invention, the sealing ring unit 1.4 is substantially formed as an annular disk, made of SiC, and is directly disposed on the lower side 1.13 of the bore base unit. The design of the annular disk-shaped sealing ring unit has a substantially Z-shaped form in the radial section of FIG1, wherein the sealing ring unit 1.4 is secured to the bore base unit via a plurality of detachable clamps extending along the circumferential edge 1.11 on the lower side 1.13 of the bore base unit (not shown in more detail). Furthermore, the sealing ring unit 1.4 is attached to the layer deposition apparatus 1 such that, viewed in the radial direction of the bore base unit 1.1, it partially overlaps the bore base unit 1.1 and the preheating ring 1.2, and, viewed in the radial direction, it extends completely beyond the air gap ring. In an exemplary embodiment of the invention, a clearance 1.5 is maintained between the lower side of the preheating ring 1.2 and the facing side of the sealing ring leg 1.41. The measure applicable to the size of the clearance 1.5 is that it should be as large as possible to ensure a safe and reliable process for the epitaxial deposition mode, but as small as possible to still ensure the required physical barrier. In this case, the clearance 1.5 is 1.0 mm in the vertical direction. For this purpose, in an exemplary embodiment of the invention, the sealing ring unit also has a corresponding length in the radial direction, in this case 20 mm (so that the undesirable flow path between the upper side 1.12 and the lower side 1.13 of the perforated base unit is lengthened or blocked).
[0072] It is evident that in other embodiments, other sizes, geometries, and placement points of the sealing ring unit (e.g., on the upper side of the preheating ring) and a different size of gap 1.5 can also be selected, as long as the sealing ring unit 1.4 ensures the function of a physical barrier between the upper side 1.12 and the lower side 1.13 of the perforated base unit (in other words, to substantially prevent the exchange of deposition process gases and boron dopants through the gap unit 1.3).
[0073] The layer deposition apparatus 1 includes a recess in the form of a substrate wafer receiving unit 1.15 to receive the deposited substrate wafer. The recess then includes a substrate wafer receiving surface 1.14 and an inner bottom surface 1.16 (which, like a conventional via base, is provided with via units).
[0074] Specifically, the second wafer side of the deposited substrate wafer faces the substrate wafer receiving surface 1.14.
[0075] The substrate wafer receiving surface 1.14 is substantially formed as a transverse inner surface similar to a truncated cone or substantially funnel-shaped, wherein, starting from the (imaginary) flange reference point L-BP on the (imaginary) reference circle BK on the substrate wafer receiving surface 1.14, the substrate wafer receiving surface 1.14 has an inclination in the form of a flange angle αL relative to the radial direction of the aperture base unit and the horizontal plane of the aperture base unit, and in the exemplary embodiment of the invention, the flange angle αL has an angle of 0.2°, and extends substantially uniformly when viewed along the circumferential direction of the aperture base unit 1.1, wherein the maximum variation along the circumferential direction is 0.25%. This geometric design of the substrate wafer receiving surface 1.14 ensures a substantially seamless and therefore "tight" contact of the substrate wafer, and thus creates a physical barrier between the support surface for the semiconductor wafer on the aperture base unit 1.1 and the upper side 1.12 of the aperture base unit, which further reduces, in particular avoids, the "autodoping" effect.
[0076] The position of the reference circle BK defines the starting region of the inclination (flange angle αL) of the substrate wafer receiving surface 1.14 within the substrate wafer receiving unit 1.15. In an exemplary embodiment of the invention, the reference circle coincides with the inner circumferential edge of the phase of the substrate wafer receiving unit 1.15. It is evident that in other advantageous variations, the reference circle BK may extend spaced apart from this inner circumferential edge in a direction perpendicular to the central axis, thus having a smaller reference radius.
[0077] In this case, the radial direction can be understood as any direction that starts from the vertical central axis of the substantially symmetrical perforated base element 1.1 and is perpendicular to the vertical central axis in the direction of the air gap ring (gap element) 1.3 and along the radius of the perforated base element.
[0078] Furthermore, the substrate wafer receiving surface has a flatness dimensional tolerance of 0.010 mm. This geometric design of the substrate wafer receiving surface 1.14 also ensures a substantially seamless and therefore "tight" contact between the substrate wafer and the support surface for the semiconductor wafer on the via base unit 1.1, thus creating a physical barrier between the via base unit 1.1 and the upper side 1.12 of the via base unit, which further reduces, and in particular substantially avoids, the "autodoping" effect.
[0079] To reduce the "auto-doping" effect, it is specified that the substrate wafer receiving surface 1.14 itself does not contain via cells in this case. In contrast, as provided in a conventional via base cell, the via cells are arranged to be distributed within the inner bottom surface 1.16 of the substrate wafer receiving cell 1.15 of the via base cell 1.1 (not discussed in more detail here; a small number of via cells are shown as an example in the center of the via base in Figure 1).
[0080] To further advantageously reduce or substantially avoid the phenomenon of "automatic doping" in the epitaxial layer to be deposited during epitaxial deposition, in an exemplary embodiment of the present invention, it is also specified that a flushing unit having a flushing gas in the form of hydrogen is provided on the side of the layer deposition apparatus 1 facing the lower side 1.13 of the hole-type base unit. Due to the provision of a sealing ring unit 1.4 on the hole-type base unit of the layer deposition apparatus and due to the design of the support surface and additional functions (barrier unit), the flushing gas flushing below the hole-type base unit 1.1 can be reduced to 3 slm.
[0081] In particular, due to the interaction of all these structures on the layer deposition apparatus 1 (the arrangement of the sealing ring unit 1.4; the geometry of the substrate wafer receiving surface 1.14; the geometry of the gap unit 1.3) and process technology precautions (the rinsing reduction by the rinsing unit under the hole-type substrate unit 1.13), it is particularly advantageous to reduce or even completely avoid the "auto-doping" effect on the semiconductor wafer to be produced.
[0082] During epitaxial deposition, the epitaxial layer is deposited on the first wafer side of the boron-doped substrate wafer at a temperature range of 1100°C to 1120°C. After the epitaxial layer is fully deposited on the first wafer side of the boron-doped substrate wafer during epitaxial deposition and after the epitaxial deposition mode is completely completed, the produced semiconductor wafer is removed from the epitaxial reactor.
[0083] The semiconductor wafer produced by means of the layer deposition device 1 is an RRV having an amount substantially 2.10% of the epitaxial layer, the boron-doped substrate wafer of the semiconductor wafer (according to the SEMI standard MF673 “Test Method for Measuring the Resistivity of a Semiconductor Wafer or the Sheet Resistance of a Semiconductor Thin Film Using a Non-Contact Eddy Current Meter (TEST VIMEUCTY OF SEMICONDUCTORY) OR SHEET RESISTANCE OF SEMICONDUCTOR FILMS WITH A NONCONTACT EDDY-CURRENT GAUGE)” as determined by layer resistance measurement) is 0.005 ohm centimeters. The RRV values were used according to the SEMI standard M62-0317 (Silicon Epitaxel Code, 2017) (RRV[%]=(R max- R min) / (R max+R) min)) to be determined, which considers nine definite R values obtained from nine measurement points on the epitaxial layer (nine of which are arranged on a cross-shaped measurement mesh on the epitaxial layer, where the measurement mesh passes through the semiconductor wafer notch); exclusion), wherein in this case a 10 mm edge exclusion is considered to select the measurement points around the gap (i.e., arranged 10 mm apart from the edges on the measurement mesh along the radial direction) and the remaining three measurement points located in the edge region of the semiconductor wafer are considered (i.e., arranged 5 mm apart from the edges on the measurement mesh along the radial direction).
[0084] The RRV of the epitaxial layer of 2.10% amount of the semiconductor wafer fundamentally corresponds to the RRV value obtained in the semiconductor wafer after epitaxial deposition when the LTO layer is provided on the second layer side of the substrate wafer as a dopant diffusion blocking layer in conventional production on a conventional hole-type base unit, but the advantage now lies in that at epitaxial sink There is no need at all to remove the LTO layer manually and / or chemically (e.g., using the HF fraction) after product mode and thus the surface characteristics on the second wafer side of the substrate wafer are also advantageously improved in a manner that enables relative reduction of defects on the second wafer side of the doped substrate wafer compared to prior techniques using the LTO layer. Specifically, in an illustrative embodiment of the present invention, the second wafer side of the substrate wafer has six defects that are arranged at least segmentally on a defect ring formed as a substantial toroid, which extends within a substantial toroidal region on the second wafer side having a radial width of 3 mm and whose outer circumference substantially coincides with the semiconductor wafer edge.
[0085] These six defects on the semiconductor wafer (in their advantageously small number) are defects detected as spot defects by means of scattered light measurement using a detection device (defects caused by residues of the removed LTO layer (in the prior art) would also be detected as spot defects in the semiconductor wafer area in principle, and in greater numbers (together with other defects as spot defects, totaling more than 200)); in the case where there are no LTO layer residues in the semiconductor wafer according to the invention, the six spot defects detected only represent defects caused by scratches or friction points or similar conditions on the receiving surface of the substrate wafer, and these are relatively small numbers of defects).
[0086] Compared to semiconductor wafers manufactured using conventional via-mount units (i.e., particularly those without sealing rings and / or corresponding geometric designs on the substrate wafer receiving surface), this semiconductor wafer has the advantage of a significantly lower RRV value (2.10%) compared to semiconductor wafers manufactured using these conventional via-mount units with the same substrate resistance (0.005 ohms) and (also) without a doped diffusion barrier layer. In an exemplary embodiment of the invention, the RRV of the semiconductor wafer corresponds to approximately 40% of a reference RRV, which is a reference substrate wafer formed with the same substrate resistance and in the same manner as the reference semiconductor wafer. The epitaxial layer of this reference semiconductor wafer is deposited using a (conventional) via-mount unit without sealing ring units 1.4 and without a corresponding geometric design on the substrate wafer receiving surface 1.14 on a substrate wafer equivalent to this substrate wafer.
[0087] 1: Layer deposition apparatus 1.1: Hole-type base unit 1.11: Circumferential edge 1.12: Upper side of the perforated base unit 1.13: Lower side of the perforated base unit 1.14: Substrate wafer receiving surface 1.15: Substrate Wafer Receiving Unit 1.16: Inner bottom surface 1.2: Preheating ring 1.3: Gap Unit 1.4: Sealing Ring Unit 1.41: Sealing ring leg 1.5: Gap
Claims
1. A layer deposition arrangement (1) for an epitaxial reactor for producing a semiconductor wafer having at least one epitaxial layer, wherein the layer deposition arrangement (1) comprises a hole susceptor unit (1.1) and a preheat ring (1.2), wherein the hole susceptor unit (1.1) has a hole susceptor unit upper side (1.12) and a hole susceptor unit lower side (1.13), wherein at least during the epitaxial deposition mode, The preheating ring (1.2) surrounds the aperture base unit (1.1) in at least a section spaced apart by the gap unit (1.3), wherein the aperture base unit (1.1) is designed to rotate about the vertical axis of the aperture base unit (1.1) relative to the preheating ring (1.2) at a predetermined rotational speed, and the layer deposition apparatus (1) further includes at least one sealing ring unit (1.4) disposed on the layer deposition apparatus (1) and designed to provide a physical barrier unit on the gap unit (1.3) between the upper side (1.12) and the lower side (1.13) of the aperture base unit, wherein the aperture base unit (1.1) includes a recess in the form of a substrate wafer receiving unit (1.15) on the upper side (1.12) of the aperture base unit, which includes a substrate wafer receiving surface (1.14). The substrate wafer receiving surface (1.14) is formed as a lateral inner surface substantially similar to a truncated cone. Starting from a ledge reference point on a reference circle on the substrate wafer receiving surface (1.14), the substrate wafer receiving surface (1.14) has an inclination in the form of a ledge angle relative to the radial direction of the hole base unit (1.1) and the horizontal plane of the hole base unit (1.1). The ledge angle has an angle magnitude in the range of 0.0° to 2.0° and is substantially constant when viewed along the circumferential direction of the hole base unit (1.1), with a maximum variation of 1% along the circumferential direction. And / or the substrate wafer receiving surface (1.1) has a planarity dimensional tolerance in the range of 0.002 mm to 0.012 mm.
2. The layer deposition apparatus as claimed in claim 1, wherein the sealing ring unit (1.4) is substantially formed as an annular disk, and / or the sealing ring unit (1.4) is arranged at a point on the side of the layer deposition apparatus (1) facing the lower side (1.13) of the perforated base unit, or at a point on the side of the layer deposition apparatus (1) facing the upper side (1.12) of the perforated base unit, and / or the sealing ring unit (1.4) is arranged on the layer deposition apparatus (1) in such a way that, when viewed in the radial direction of the perforated base unit (1.1), it at least partially overlaps the perforated base unit (1.1) and the preheating ring (1.2), and when viewed in the radial direction, it substantially extends beyond the gap unit (1.3).
3. The layer deposition apparatus as claimed in claim 1 or 2, wherein the sealing ring unit (1.4) is substantially formed as an annular ring and has a sealing ring width in the range of 5 mm to 50 mm when viewed in its radial direction, and the gap unit (1.3) in the form of an air gap ring has a gap width in the range of 1.2 mm to 2.6 mm when viewed in the radial direction of the hole-type base unit (1.1).
4. The layer deposition apparatus as claimed in claim 1 or 2, wherein the sealing ring unit (1.4) is arranged to be removably fastened to the layer deposition apparatus (1), and the sealing ring unit (1.4) is made of a material including SiC, graphite, or quartz, or the sealing ring unit (1.4) is substantially formed as a monolithic unit with the perforated base unit (1.1) or the preheating ring (1.2).
5. The layer deposition apparatus as claimed in claim 1 or 2, wherein a flushing unit having flushing gas is disposed on the side of the layer deposition apparatus (1) facing the lower side (1.13) of the perforated base unit, wherein the flushing gas flushing below the perforated base unit (1.1) can be reduced to 3 slm (standard liters / minute).
6. A method for producing a semiconductor wafer, the method comprising depositing at least one epitaxial layer on a doped substrate wafer in an epitaxial reactor to produce the semiconductor wafer, the doped substrate wafer not having a doping diffusion barrier layer, wherein the method comprises the steps of: positioning a second wafer side of the doped substrate wafer on a via pedestal unit (1.1) of a layer deposition apparatus (1) as claimed in any one of claims 1 to 5; activating an epitaxial deposition mode of the layer deposition apparatus (1); and depositing at least one epitaxial layer on a first wafer side of the doped substrate wafer during the epitaxial deposition mode.
7. The method as claimed in claim 6, wherein at least during the epitaxial deposition mode, the aperture base unit (1.1) is rotated about the vertical central axis of the aperture base unit (1.1) relative to the preheating ring (1.2) at a predetermined rotational speed, and during the epitaxial deposition mode, a flushing unit with flushing gas is disposed on the side of the layer deposition apparatus (1) facing the lower side (1.13) of the aperture base unit, wherein the flushing below the aperture base unit (1.1) by means of the flushing gas is controlled in the epitaxial deposition mode in a predetermined manner and is variable to at least 3 slm and at most 30 slm.
8. The method as claimed in claim 6 or 7, wherein after the deposition of at least one epitaxial layer is completed and after the epitaxial deposition mode is ended, the semiconductor wafer system undergoes a final cleaning step, the final cleaning step comprising chemical cleaning of the semiconductor wafer.
9. A semiconductor wafer comprising a substrate wafer and at least one epitaxial wafer, wherein the substrate wafer is doped using at least one dopant, the at least one epitaxial layer is disposed on a first wafer side of the substrate wafer, the semiconductor wafer has a radial resistance variation (RRV) in the range of 1.30% to 2.20%, and has at least one defect and less than 200 defects on a second wafer side of the substrate wafer, the defects being detectable by means of scattered light measurement as spot defects using a detection device, and the defects being disposed in at least some sections on a defect ring formed as a substantially annular ring extending within a substantially annular region on the second wafer side, wherein the region has a radial width of 3 mm and its outer circumference substantially coincides with the edge of the semiconductor wafer.
10. The semiconductor wafer of claim 9, wherein no layer in the form of a doping diffusion barrier layer is disposed on the second wafer side of the substrate wafer.
11. The semiconductor wafer as claimed in claim 9 or 10, wherein no residue in the form of a low thermal oxide (LTO) layer defect is disposed on the second wafer side of the substrate wafer.
12. The semiconductor wafer as claimed in claim 9 or 10, wherein the doped substrate wafer having boron dopant forms a substrate resistance of 0.005 to 0.020 ohmcm, and / or the semiconductor wafer has an RRV in the range of 1.40% to 2.10%.
13. The semiconductor wafer as claimed in claim 9 or 10, wherein the semiconductor wafer is formed such that, for a doped substrate wafer having a substrate resistance in the range of 0.005 to 0.008 ohm cm, the RRV of the semiconductor wafer is formed in the range of 1.40% to 2.10%, or the semiconductor wafer is formed such that, for a doped substrate wafer having a substrate resistance in the range of 0.008 to 0.016 ohm cm, the RRV of the semiconductor wafer is formed in the range of 1.40% to 1.80%.