Semiconductor devices and manufacturing methods thereof

Abstract

According to one embodiment, a semiconductor device includes: a multilayer film alternately comprising a plurality of electrode layers and a plurality of first insulating films in a first direction; and a plate-like portion disposed within the multilayer film, having a plate-like shape extending along the first direction and a second direction intersecting the first direction, disposed between a first portion and a second portion of the multilayer film. The device further includes a first columnar portion comprising a first charge storage layer and a first semiconductor layer in the first portion, and a second columnar portion comprising a second charge storage layer and a second semiconductor layer in the second portion. The first electrode layer among the plurality of electrode layers includes a first region where the concentration of boron, carbon, or nitrogen is a first value, and a second region where the concentration of boron, carbon, or nitrogen is a second value higher than the first value, the second region being disposed near a side of the first electrode layer facing the plate-like portion.

Description

Technical Field

[0001] [Cross-reference to related applications] This application is based on and claims priority to a prior Japanese patent application No. 2024-102425, filed on June 25, 2024, the entire contents of which are incorporated herein by reference.

[0002] The embodiments disclosed herein relate to a semiconductor device and a method for manufacturing the same. Prior Technology

[0003] In the case of forming electrode layers (e.g., word lines) of a three-dimensional semiconductor memory through a replacement process, slits are formed within a multilayer film containing a sacrificial layer. The sacrificial layer is then removed from the slits to form recesses within the multilayer film, and electrode layers are formed within these recesses. In this case, there is a concern that after the electrode layers are formed, undesirable impurity atoms may diffuse from the slits into the electrode layers. Summary of the Invention

[0004] This invention provides a semiconductor device, comprising: The laminated film alternately comprises multiple electrode layers and multiple first insulating films in a first direction; A plate-shaped portion, disposed within the laminated film, having a plate-like shape extending along the first direction and a second direction intersecting the first direction, is disposed between a first portion and a second portion of the laminated film; A first columnar portion, disposed within the first part and extending along the first direction, includes a first charge storage layer and a first semiconductor layer; and A second columnar portion, disposed within the second part and extending along the first direction, includes a second charge accumulation layer and a second semiconductor layer. The first electrode layer of the plurality of electrode layers includes a first region where the concentration of boron, carbon, or nitrogen is a first value, and a second region where the concentration of boron, carbon, or nitrogen is a second value higher than the first value. The second region is located near the side of the first electrode layer facing the plate-shaped portion. This invention provides a method for manufacturing a semiconductor device, comprising: A laminated film is formed, the laminated film alternately comprising a plurality of first layers and a plurality of first insulating films in a first direction. A first columnar portion is formed, extending along the first direction within a first portion of the laminated film, and includes a first charge storage layer and a first semiconductor layer. A second columnar portion is formed, extending along the first direction within a second portion of the laminated film, and includes a second charge storage layer and a second semiconductor layer. A first recess is formed, the first recess having a plate-like shape extending within the laminated film along the first direction and a second direction intersecting the first direction, located between the first portion and the second portion. The plurality of first layers are replaced with a plurality of electrode layers from the first recess. A plate-like portion is formed, the plate-like portion having a plate-like shape extending within the first recess along the first direction and the second direction. The first electrode layer of the plurality of electrode layers is formed as a first region containing a concentration of boron, carbon, or nitrogen of a first value, and a second region containing a concentration of boron, carbon, or nitrogen of a second value higher than the first value. The second region is formed in the first electrode layer near the side facing the first recess. Simple Explanation of the Diagram

[0005] Figure 1 is a perspective view showing the structure of the semiconductor device according to the first embodiment. Figure 2 is a cross-sectional view showing the structure of the semiconductor device according to the first embodiment. Figures 3 to 10 are cross-sectional views showing a method for manufacturing a semiconductor device according to the first embodiment. Figure 11 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a comparative example of the first embodiment. Figures 12 and 13 are cross-sectional views showing a first example of a method for manufacturing a semiconductor device according to the first embodiment. Figures 14 and 15 are cross-sectional views illustrating a second example of a method for manufacturing a semiconductor device according to the first embodiment. Figures 16 and 17 are cross-sectional views illustrating a third example of a method for manufacturing a semiconductor device according to the first embodiment. Figures 18 and 19 are cross-sectional views illustrating a fourth example of a method for manufacturing a semiconductor device according to the first embodiment. Figure 20 is an enlarged cross-sectional view showing the structure of the semiconductor device according to the first embodiment. Figure 21 is a cross-sectional view showing the structure of the semiconductor device according to the second embodiment. Figure 22 is an enlarged cross-sectional view showing the structure of the semiconductor device according to the second embodiment. Implementation

[0006] The embodiments will now be explained with reference to the accompanying drawings. In Figures 1 to 22, the same symbols are used to label the same structures, and repeated descriptions are omitted.

[0007] According to one embodiment, a semiconductor device includes: a multilayer film that alternately includes a plurality of electrode layers and a plurality of first insulating films in a first direction; and a plate-like portion disposed within the multilayer film, having a plate-like shape extending along the first direction and a second direction intersecting the first direction, disposed between a first portion and a second portion of the multilayer film. The device further includes: a first columnar portion disposed within the first portion, extending along the first direction, including a first charge storage layer and a first semiconductor layer; and a second columnar portion disposed within the second portion, extending along the first direction, including a second charge storage layer and a second semiconductor layer. The first electrode layer among the plurality of electrode layers includes a first region where the concentration of boron, carbon, or nitrogen is a first value, and a second region where the concentration of boron, carbon, or nitrogen is a second value higher than the first value, the second region being disposed near a side of the first electrode layer facing the plate-like portion.

[0008] (First Implementation) Figure 1 is a perspective view showing the structure of the semiconductor device according to the first embodiment. The semiconductor device in this embodiment is, for example, a three-dimensional semiconductor memory.

[0009] In Figure 1, the semiconductor device of this embodiment includes a core insulating film 1, a channel semiconductor layer 2, a tunnel insulating film 3, a charge storage layer 4, a bulk insulating film 5, and an electrode layer 6. The bulk insulating film 5 includes an insulating film 5a and an insulating film 5b. The electrode layer 6 includes a barrier metal layer 6a and an electrode material layer 6b.

[0010] In Figure 1, multiple electrode layers and multiple insulating films are alternately deposited on a substrate, and memory holes (MH) are formed within these electrode layers and insulating films. Figure 1 shows one of these electrode layers, 6. These electrode layers function, for example, as word lines or select lines of a three-dimensional semiconductor memory. Figure 1 shows the X and Y directions, which are parallel to and perpendicular to the surface of the substrate, and the Z direction, which is perpendicular to the surface of the substrate. The X, Y, and Z directions intersect each other. In this specification, the +Z direction is treated as the upward direction, and the -Z direction is treated as the downward direction. The -Z direction may or may not be aligned with the direction of gravity. The Z direction is an example of the first direction, and the Y direction is an example of the second direction.

[0011] A core insulating film 1, a channel semiconductor layer 2, a tunnel insulating film 3, a charge accumulation layer 4, and an insulating film 5a are sequentially formed within a memory aperture MH, constituting multiple memory cells of a three-dimensional semiconductor memory. The insulating film 5a is formed on the side of the electrode layer and the insulating film within the memory aperture MH, and the charge accumulation layer 4 is formed on the side of the insulating film 5a. The charge accumulation layer 4 can accumulate the signal charge of the three-dimensional semiconductor memory. The tunnel insulating film 3 is formed on the side of the charge accumulation layer 4, and the channel semiconductor layer 2 is formed on the side of the tunnel insulating film 3. The channel semiconductor layer 2 functions as a channel for the three-dimensional semiconductor memory. The core insulating film 1 is formed on the side of the channel semiconductor layer 2.

[0012] The insulating film 5a is, for example, a SiO2 film (silicon oxide film). The charge storage layer 4 is, for example, a SiN film (silicon nitride film). The tunnel insulating film 3 is, for example, a SiO2 film. The channel semiconductor layer 2 is, for example, a polycrystalline silicon layer. The core insulating film 1 is, for example, a SiO2 film.

[0013] The memory hole MH has a columnar shape extending along the Z direction and a circular shape when viewed from above. Therefore, the core insulating film 1, the channel semiconductor layer 2, the tunnel insulating film 3, the charge storage layer 4, and the insulating film 5a within the memory hole MH form a columnar portion with a columnar shape extending along the Z direction.

[0014] An insulating film 5b, a barrier metal layer 6a, and an electrode material layer 6b are formed between two of the plurality of insulating films, sequentially formed on the lower surface of the upper insulating film, the upper surface of the lower insulating film, and the side surface of the insulating film 5a. The insulating film 5b is, for example, an Al₂O₃ film (alumina film). The barrier metal layer 6a is, for example, a TiN film (titanium nitride film). The electrode material layer 6b is, for example, a W (tungsten) layer.

[0015] Figure 2 is a cross-sectional view showing the structure of the semiconductor device according to the first embodiment.

[0016] In FIG2, the semiconductor device of this embodiment includes a substrate 11, a multilayer film 12, a plurality of columnar portions 13 and a plate-shaped portion 14.

[0017] Substrate 11 corresponds to the "substrate" mentioned in the description of FIG1. ​​Substrate 11 is, for example, a semiconductor substrate such as a Si (silicon) substrate. Furthermore, when the semiconductor device of this embodiment is manufactured by bonding substrate 11 to another substrate, substrate 11 may be removed before the semiconductor device of this embodiment is completed. In this case, the semiconductor device of this embodiment may not include substrate 11.

[0018] A multilayer film 12 is formed above the substrate 11, and alternately includes multiple electrode layers 6 and multiple insulating films 7 in the Z direction. These electrode layers 6 and insulating films 7 correspond to the "multiple electrode layers and multiple insulating films" mentioned in the description of FIG1. ​​Therefore, each electrode layer 6 shown in FIG2 includes a barrier metal layer 6a and an electrode material layer 6b, just like the electrode layer 6 shown in FIG1. ​​Each electrode layer 6 shown in FIG2 is an example of a first electrode layer. On the other hand, each insulating film 7 is, for example, a SiO2 film. Each insulating film 7 is an example of a first insulating film. The multilayer film 12 further includes multiple insulating films 5b. The upper surface, lower surface, and side surface of each electrode material layer 6b are sequentially covered by a barrier metal layer 6a and an insulating film 5b.

[0019] The laminated film 12 shown in Figure 2 includes portions P1 and P2 that are adjacent to each other in the X direction. Portion P1 is an example of the first portion, and portion P2 is an example of the second portion. Further details about portions P1 and P2 will be described below.

[0020] Each columnar portion 13 includes an insulating film 5a, a charge storage layer 4, a tunnel insulating film 3, a channel semiconductor layer 2, and a core insulating film 1, which are sequentially formed within the stacked film 12. In FIG. 2, the insulating film 5a, the charge storage layer 4, the tunnel insulating film 3, the channel semiconductor layer 2, and the core insulating film 1 are sequentially formed on the side surface of the stacked film 12. Each columnar portion 13 is formed within a memory hole MH formed within the stacked film 12. Each columnar portion 13 has a columnar shape extending along the Z direction and has a circular shape when viewed from above. In this embodiment, each columnar portion 13 is formed to penetrate the stacked film 12 along the Z direction.

[0021] The semiconductor device of this embodiment includes a plurality of columnar portions 13 disposed in portion P1 and a plurality of columnar portions 13 disposed in portion P2. The columnar portions 13 of the former are examples of first columnar portions, and the columnar portions 13 of the latter are examples of second columnar portions. Furthermore, the charge storage layer 4 and channel semiconductor layer 2 within each columnar portion 13 of the former are examples of a first charge storage layer and a first semiconductor layer, and the charge storage layer 4 and channel semiconductor layer 2 within each columnar portion 13 of the latter are examples of a second charge storage layer and a second semiconductor layer. In FIG. 2, these columnar portions 13 are disposed within the multilayer film 12 in a manner that they do not contact each other. One of these columnar portions 13 corresponds to the "columnar portion" mentioned in the description of FIG. 1.

[0022] The plate-shaped portion 14 includes an insulating film 14a and a wiring layer 14b sequentially formed within the laminated film 12. In FIG. 2, the insulating film 14a is formed on the side of the laminated film 12, and the wiring layer 14b is formed on the side of the insulating film 14a. The insulating film 14a is, for example, a SiO2 film. The insulating film 14a is an example of a second insulating film. The wiring layer 14b is, for example, a polycrystalline silicon layer or a metal layer. In this embodiment, the wiring layer 14b is electrically insulated from each electrode layer 6. The plate-shaped portion 14 is formed within the slit ST formed within the laminated film 12. The plate-shaped portion 14 has a plate-like shape extending along the Z and Y directions, and has a straight shape when viewed from above. This is also true for the slit ST. Furthermore, the insulating film 14a can be used to replace the wiring layer 14b and be completely embedded within the slit ST. Alternatively, an insulating film different from the insulating film 14a can be used to replace the wiring layer 14b. In this case, the insulating film different from the insulating film 14a can be an insulating film with a composition different from that of the insulating film 14a, for example, it can be an oxide insulating film or a nitride insulating film.

[0023] A plate-shaped portion 14 is disposed between portions P1 and P2. In this embodiment, portions P1 and P2 are separated from each other by the plate-shaped portion 14. In this embodiment, a slit ST is formed in such a way that the multilayer film 12 is divided into portions P1 and P2, and the plate-shaped portion 14 is formed within this slit ST. The semiconductor device of this embodiment includes a plurality of plate-shaped portions within the multilayer film 12, and FIG2 shows one of these plate-shaped portions, plate-shaped portion 14. Furthermore, the plate-shaped portion 14 may include an insulating film 14a and a wiring layer 14b, or it may only include an insulating film 14a.

[0024] Next, further details about each electrode layer 6 will be provided.

[0025] As described above, each electrode layer 6 includes a barrier metal layer 6a and an electrode material layer 6b. The electrode material layer 6b is, for example, a metal layer containing a specified metal element. This metal element is, for example, a transition metal element such as a group IV element, group V element, or group VI element. Examples of this metal element are Ti (titanium), Zr (zirconium), Hf (hafnium), V (vanadium), Nb (niobium), Ta (tantalum), Cr (chromium), Mo (molybdenum), and W (tungsten). In this embodiment, the electrode material layer 6b is, for example, a W layer containing W, which is the specified metal element. On the other hand, the barrier metal layer 6a in this embodiment is, for example, a TiN film. Furthermore, each electrode layer 6 may also include only the electrode material layer 6b instead of both the barrier metal layer 6a and the electrode material layer 6b.

[0026] The electrode layer 6b in this embodiment further comprises B (boron), C (carbon), or N (nitrogen). In the following description, the electrode layer 6b is assumed to contain W and B elements. In this embodiment, as described later, the atomic concentration (B concentration) of B element within the electrode layer 6b varies depending on the region within the electrode layer 6b. The term "B element" as used in the following description can be replaced with C or N elements.

[0027] In this embodiment, each electrode layer 6b within the electrode layer 6 includes a region Ra and a region Rb. In FIG2, the side surface of the electrode layer 6b in the +X direction in part P1 and the side surface of the electrode layer 6b in the -X direction in part P2 face the plate-shaped portion 14 (slit ST). Region Ra is disposed within the electrode layer 6b near these side surfaces, and region Rb is disposed within the electrode layer 6b away from these side surfaces. In other words, region Ra is located near the plate-shaped portion 14, and region Rb is located away from the plate-shaped portion 14. Region Rb is an example of a first region, and region Ra is an example of a second region.

[0028] Furthermore, as described above, the semiconductor device of this embodiment includes multiple plate-shaped portions within the multilayer film 12. A portion P1 is disposed between the plate-shaped portion 14 shown in FIG. 2 (hereinafter referred to as the "first plate-shaped portion") and another plate-shaped portion (hereinafter referred to as the "second plate-shaped portion"). Region Ra within portion P1 is located near the first plate-shaped portion or the second plate-shaped portion, and region Rb within portion P1 is located away from the first plate-shaped portion and the second plate-shaped portion. The same applies to regions Ra and Rb within portion P2. Hereinafter, the details of these regions Ra and Rb will be explained using regions Ra and Rb shown in FIG. 2 as examples.

[0029] In this embodiment, both regions Ra and Rb contain W and B elements. Specifically, in this embodiment, the B concentration in region Ra is higher than the B concentration in region Rb. In this embodiment, as described later, B element is introduced from the slit ST into the electrode material layer 6b, thereby increasing the B concentration in region Ra near the slit ST and decreasing the B concentration in region Rb farther from the slit ST. The B concentration value in region Rb is an example of a first value, and the B concentration value in region Ra is an example of a second value.

[0030] In this embodiment, region Ra is, for example, a WB film (tungsten boride film). On the other hand, region Rb in this embodiment can be a WB film, or it can be a W layer containing boron (B) as an impurity element. Alternatively, region Rb in this embodiment can also be a W layer without boron as an impurity element. In this case, the boron concentration in region Rb is zero. When electrode layer 6b contains carbon (C), region Ra is, for example, a WC film (tungsten carbide film). When electrode layer 6b contains nitrogen (N), region Ra is, for example, a WN film (tungsten nitride film).

[0031] Furthermore, each electrode material layer 6b within the electrode layer 6 may also contain a nucleation layer (seed layer) near the barrier metal layer 6a for forming the electrode material layer 6b. In this case, the seed layer may also contain element B before introducing element B from the slit ST into the electrode material layer 6b. In this case, the relationship that "the B concentration in region Ra is higher than the B concentration in region Rb" in this embodiment holds true in the portion outside the seed layer within the electrode material layer 6b. An example of a seed layer will be described below with reference to FIG20.

[0032] In this embodiment, when element B is introduced from the slit ST into the electrode material layer 6b, element B can also be introduced into the insulating film 7, the barrier metal layer 6a, the insulating film 5b, etc. This element B will be described below with reference to FIG20.

[0033] In this embodiment, there is a concern that undesirable impurity atoms may diffuse from the slit ST into the electrode material layer 6b before the plate-shaped portion 14 is formed within the slit ST. An example of such impurity atoms is H (hydrogen) atoms. In this case, there is a concern that the unit reliability may deteriorate due to the diffusion of impurity atoms.

[0034] Therefore, in this embodiment, the B concentration in region Ra is set to be high. Experiments show that region Ra with a high B concentration acts as a barrier to suppress the diffusion of impurity atoms, and the barrier's effectiveness is increased when region Ra is a WB film. According to this embodiment, by forming such region Ra, the diffusion of impurity atoms from the slit ST into the electrode layer 6b can be suppressed. Furthermore, as long as region Ra can sufficiently suppress the diffusion of impurity atoms, it can also be a W layer containing B, an impurity element, instead of a WB film.

[0035] Figures 3 to 10 are cross-sectional views showing a method for manufacturing a semiconductor device according to the first embodiment.

[0036] First, a multilayer film 12 (FIG. 3) is formed over the substrate 11. The multilayer film 12 shown in FIG. 3 alternately comprises multiple sacrificial layers 8 and multiple insulating films 7 in the Z direction. The multilayer film 12 is formed by alternately depositing multiple sacrificial layers 8 and multiple insulating films 7 over the substrate 11. Each sacrificial layer 8 is, for example, a SiN film. Each sacrificial layer 8 is an example of the first layer. FIG. 3 shows portions P1 and P2 of the multilayer film 12.

[0037] Next, multiple memory holes MH are formed in the stacked film 12 by photolithography and reactive ion etching (RIE) (Figure 4). Figure 4 shows the multiple memory holes MH formed in part P1 and the multiple memory holes MH formed in part P2.

[0038] Next, a core insulating film 1, a channel semiconductor layer 2, a tunnel insulating film 3, a charge storage layer 4, and an insulating film 5a are sequentially formed within each memory hole MH (Figure 5). As a result, columnar portions 13 are formed within each memory hole MH.

[0039] Next, a slit ST is formed within the laminated film 12 using lithography and RIE (Fig. 6). The slit ST is formed between portion P1 and portion P2 of the laminated film 12. As a result, portion P1 and portion P2 are separated from each other by the slit ST. The slit ST is an example of the first recess.

[0040] Next, each sacrificial layer 8 is removed from the stacked film 12 by etching from the slit ST (Fig. 7). As a result, a plurality of cavities C are formed within the stacked film 12. Each cavity C is formed between two insulating films 7 adjacent to each other in the Z direction. Each cavity C is an example of a second recess. The etching in Fig. 7 is, for example, wet etching. However, the etching in Fig. 7 can also be dry etching.

[0041] Next, starting from the slit ST, an insulating film 5b, a barrier metal layer 6a, and an electrode material layer 6b are sequentially formed in each cavity C (Fig. 8). The insulating film 5b, barrier metal layer 6a, and electrode material layer 6b are also sequentially formed on the side of the laminated film 12 within the slit ST. Thus, multiple electrode layers 6 are formed within the multiple cavities C. Examples of the materials used for the barrier metal layer 6a and electrode material layer 6b are shown. In Fig. 8, the barrier metal layer 6a and electrode material layer 6b are, for example, a TiN film and a W layer, respectively.

[0042] Next, using lithography and RIE, the electrode material layer 6b, barrier metal layer 6a, and insulating film 5b are removed from the slit ST (Fig. 9). As a result, the plurality of electrode layers 6 are separated from each other. Thus, the plurality of sacrificial layers 8 are replaced by the plurality of electrode layers 6. In Fig. 9, a portion of the electrode material layer 6b, barrier metal layer 6a, and insulating film 5b within each cavity C are also removed.

[0043] In the steps shown in Figure 9, regions Ra with high B concentration and Rb with low B concentration are formed within the electrode material layer 6b of each electrode layer 6. Regions Ra and Rb are formed, for example, by introducing B element from the slit ST into the electrode material layer 6b of each electrode layer 6. This results in a higher B concentration in region Ra near the slit ST and a lower B concentration in region Rb farther from the slit ST. Regions Ra and Rb can be, for example, formed as WB films or as W layers containing B element as an impurity element. In Figure 9, regions Ra and Rb are formed within portions P1 and P2.

[0044] Furthermore, regions Ra and Rb can be formed after the plurality of electrode layers 6 are separated from each other, or they can be formed before the plurality of electrode layers 6 are separated from each other. Details regarding this will be described below.

[0045] Next, an insulating film 14a and a wiring layer 14b are sequentially formed within the slit ST (Fig. 10). As a result, a plate-like portion 14 is formed within the slit ST.

[0046] In this way, the semiconductor device shown in Figure 2 can be manufactured.

[0047] Figure 11 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a comparative example of the first embodiment.

[0048] The cross-sectional view in Figure 11 corresponds to the cross-sectional view in Figure 9. In Figure 9, each electrode layer 6 does not include regions Ra and Rb within the electrode material layer 6b.

[0049] In this comparative example, there is a concern that undesirable impurity atoms may diffuse from the slit ST into the electrode material layer 6b before the plate-like portion 14 is formed within the slit ST. An example of such impurity atoms is H atoms. In this case, there is a concern that the unit reliability may deteriorate due to the diffusion of impurity atoms.

[0050] Figure 11 schematically illustrates the entry of H atoms into the stacked film 12 through the slit ST. The H atoms enter the stacked film 12, for example, in the form of H radicals. The H atoms may originate from process gases or impurities generated during the formation of the insulating film 14a (SiO2 film) within the slit ST. Impurity atoms other than H atoms may be, for example, O atoms (O radicals).

[0051] Therefore, in this embodiment, regions Ra and Rb are formed within the electrode material layer 6b of each electrode layer 6, and the B concentration in region Ra is set to be high. This allows the diffusion of impurity atoms from the slit ST into the electrode material layer 6b to be suppressed using region Ra.

[0052] Next, referring to Figures 12 to 19, four examples of the processing for forming regions Ra and Rb will be explained.

[0053] Figures 12 and 13 are cross-sectional views showing a first example of a method for manufacturing a semiconductor device according to the first embodiment.

[0054] The cross-sectional view in Figure 12 corresponds to the cross-sectional view in Figure 9. Figure 12 shows the state after the plurality of electrode layers 6 are divided into each other and before regions Ra and Rb are formed in the electrode material layer 6b of each electrode layer 6.

[0055] In the first example, a process gas containing element B is supplied into the slit ST (Fig. 12). This process gas is, for example, B₂H₆ gas. As a result, element B from the B₂H₆ gas mainly enters the electrode material layer 6b near the slit ST. This forms regions Ra and Rb within the electrode material layer 6b (Fig. 13). Then, the steps shown in Fig. 10 are performed.

[0056] Figures 14 and 15 are cross-sectional views illustrating a second example of a method for manufacturing a semiconductor device according to the first embodiment.

[0057] The cross-sectional view in Figure 14 corresponds to the cross-sectional view in Figure 9. Figure 14 shows the state after the plurality of electrode layers 6 are divided into each other and before regions Ra and Rb are formed in the electrode material layer 6b of each electrode layer 6.

[0058] In the second example, a sacrificial layer 21 containing element B is formed on the side of the laminated film 12 within the slit ST (Fig. 14). As a result, the side of the electrode material layer 6b is covered by the sacrificial layer 21. The sacrificial layer 21 is, for example, a borosilicate glass (BSG) layer. The sacrificial layer 21 is an example of the second layer. Subsequently, the element B contained in the sacrificial layer 21 diffuses from the sacrificial layer 21 into the laminated film 12. Thereby, regions Ra and Rb are formed within the electrode material layer 6b (Fig. 15). The diffusion of element B is, for example, caused by the annealing of the sacrificial layer 21. Afterward, after removing the sacrificial layer 21, the steps shown in Fig. 10 are performed.

[0059] According to the first example, regions Ra and Rb can be formed, for example, by a simple process of supplying B₂H₆ gas. On the other hand, according to the second example, regions Ra and Rb can be formed, for example, even when such gas supply is not possible.

[0060] Figures 16 and 17 are cross-sectional views illustrating a third example of a method for manufacturing a semiconductor device according to the first embodiment.

[0061] The cross-sectional view in Figure 16 corresponds to the cross-sectional view in Figure 8. Therefore, Figure 16 shows the state before the plurality of electrode layers 6 are separated from each other, and before regions Ra and Rb are formed in the electrode material layer 6b of each electrode layer 6.

[0062] In the third example, a process gas containing element B is supplied into the slit ST (Fig. 16). This process gas is, for example, B₂H₆ gas. As a result, element B from the B₂H₆ gas mainly enters the electrode material layer 6b inside or near the slit ST. This forms regions Ra and Rb within the electrode material layer 6b (Fig. 17). Afterwards, the plurality of electrode layers 6 are separated from each other (Fig. 9), and the steps shown in Fig. 10 are performed.

[0063] Figures 18 and 19 are cross-sectional views illustrating a fourth example of a method for manufacturing a semiconductor device according to the first embodiment.

[0064] The cross-sectional view in Figure 18 corresponds to the cross-sectional view in Figure 8. Therefore, Figure 18 shows the state before the plurality of electrode layers 6 are separated from each other, and before regions Ra and Rb are formed in the electrode material layer 6b of each electrode layer 6.

[0065] In the fourth example, a sacrificial layer 21 containing element B is formed on the side of the electrode material layer 6b within the slit ST (Fig. 18). As a result, the side of the electrode material layer 6b is covered by the sacrificial layer 21. The sacrificial layer 21 in the fourth example is, for example, a BSG layer, similar to the sacrificial layer 21 in the second example. Then, the element B contained in the sacrificial layer 21 is diffused from the sacrificial layer 21 into the electrode material layer 6b. Thereby, regions Ra and Rb are formed within the electrode material layer 6b (Fig. 19). The diffusion of element B is caused, for example, by annealing the sacrificial layer 21. Afterward, after removing the sacrificial layer 21 and separating the plurality of electrode layers 6 from each other (Fig. 9), the steps shown in Fig. 10 are performed.

[0066] According to the third example, regions Ra and Rb can be formed, for example, by a simple process of supplying B₂H₆ gas. On the other hand, according to the fourth example, regions Ra and Rb can be formed, for example, even when such gas supply is not possible.

[0067] Furthermore, in the third or fourth example, in the steps shown in Figure 17 or Figure 19, regions Ra and Rb are formed in such a way that region Ra also remains after the segmentation of electrode layer 6. Therefore, in Figure 17 or Figure 19, region Ra is formed not only in electrode material layer 6b located within slit ST, but also in electrode material layer 6b located within each cavity C.

[0068] Figure 20 is an enlarged cross-sectional view showing the structure of the semiconductor device according to the first embodiment.

[0069] In Figure 20, the electrode material layer 6b, the barrier metal layer 6a, the insulating film 5a, and the insulating film 7 include regions Ra' and Rb'. Region Ra' is located near the plate-shaped portion 14, and region Rb' is located away from the plate-shaped portion 14. Region Ra' within the electrode material layer 6b corresponds to region Ra, and region Rb' within the electrode material layer 6b corresponds to region Rb. Region Ra' is an example of a third region, and region Rb' is an example of a fourth region.

[0070] In this embodiment, boron (B) is introduced into the electrode layer 6b from the slit ST, thereby increasing the B concentration in region Ra near the slit ST and decreasing the B concentration in region Rb away from the slit ST. This phenomenon also occurs in regions Ra' and Rb'. Therefore, the B concentration in region Ra' near the slit ST is higher, and the B concentration in region Rb' away from the slit ST is lower. For example, in each insulating film 7, the B concentration in region Ra' is higher than the B concentration in region Rb'. An example of a third-value B concentration in region Rb' and an example of a fourth-value B concentration in region Ra' are shown.

[0071] Additionally, in Figure 20, electrode layer 6b includes electrode layer 31 formed on the surface of barrier metal layer 6a and electrode layer 32 formed on the surface of electrode layer 31. Electrode layer 32 is formed on the surface of barrier metal layer 6a across electrode layer 31 and is located within electrode layer 31. Electrode layer 31 is, for example, a seed layer used to form the nucleus of electrode layer 6b. Electrode layer 32 is, for example, a bulk layer formed using the seed layer. Electrode layer 31 is an example of a first film, and electrode layer 32 is an example of a second film.

[0072] Electrode layer 31 may also contain element B before introducing element B from slit ST into electrode layer 6b. For example, when electrode layer 31 is a seed layer, electrode layer 31 is often formed to contain element B. In this case, the relationship that "the B concentration in region Ra is higher than the B concentration in region Rb" in this embodiment holds true for electrode layer 32. That is, the B concentration in region Ra provided in electrode layer 32 is higher than the B concentration in region Rb provided in electrode layer 32.

[0073] Before introducing element B into electrode layer 6b from slit ST, electrode layer 32 is, for example, a W layer. On the other hand, after introducing element B into electrode layer 6b from slit ST, electrode layer 32 in region Ra becomes, for example, a WB film, and electrode layer 32 in region Rb becomes, for example, a W layer containing element B as an impurity element.

[0074] As described above, each electrode layer 6b in this embodiment includes a region Ra and a region Rb, with a higher B concentration in region Ra than in region Rb. Therefore, according to this embodiment, a better electrode layer 6 can be achieved. For example, the diffusion of impurity atoms from the slit ST into the electrode layer 6b can be suppressed using region Ra, thereby suppressing the deterioration of cell reliability.

[0075] (Second Implementation) Figure 21 is a cross-sectional view showing the structure of the semiconductor device according to the second embodiment.

[0076] The semiconductor device of this embodiment shown in FIG21 has the same structure as the semiconductor device of the first embodiment shown in FIG2. In this embodiment, the insulating film 5b is formed not only between adjacent electrode layers 6 and insulating film 5a, or between adjacent electrode layers 6 and insulating film 7, but also between insulating film 14a and each insulating film 7.

[0077] In this embodiment, when manufacturing a semiconductor device using the steps shown in Figures 3 to 10, the steps shown in Figure 9 can be performed using isotropic etching instead of lithography and RIE. This allows the barrier metal layer 6a and electrode material layer 6b to be removed from the slit ST while the insulating film 5b remains within the slit ST. Examples of isotropic etching include wet etching and chemical dry etching (CDE).

[0078] Figure 22 is an enlarged cross-sectional view showing the structure of the semiconductor device according to the second embodiment.

[0079] FIG22 of this embodiment is a cross-sectional view corresponding to FIG20 of the first embodiment. In FIG22, an insulating film 5b is also formed between the insulating film 14a and each of the insulating films 7. The insulating film 5b formed between the insulating film 14a and each of the insulating films 7 becomes part of region Ra'.

[0080] According to this embodiment, a better electrode layer 6 can be achieved in the same manner as in the first embodiment. Furthermore, according to this embodiment, the diffusion of impurity atoms from the slit ST into the electrode material layer 6b can also be suppressed using the insulating film 5b.

[0081] While certain embodiments have been described, these embodiments are presented by way of example only and are not intended to limit the scope of the invention. In fact, the novel apparatus and methods described herein can be implemented in various other forms; furthermore, various omissions, substitutions, and changes can be made to the form of the apparatus and methods described herein without departing from the spirit of the invention. The appended claims and their equivalents are intended to cover such forms or modifications falling within the scope and spirit of the invention.

[0082] 1: Core insulating film 2: Channel semiconductor layer 3: Tunnel insulation film 4: Charge accumulation layer 5: Insulating film 5a, 5b, 7, 14a: Insulating film 6: Electrode layer 6a: Barrier metal layer 6b, 31, 32: Electrode material layer 8.21: Sacrificial Layer 11:Substrate 12: Stacked membranes 13: Columnar part 14: plate-shaped part 14b: Wiring layer C: Cavity MH: Memory Hole P1, P2: Partial Ra, Ra', Rb, Rb': Regions ST: Slit X, Y, Z: Direction

Claims

1. A semiconductor device, comprising: The laminated film alternately comprises multiple electrode layers and multiple first insulating films in a first direction; A plate-shaped portion, disposed within the laminated film, has a plate-like shape extending along the first direction and a second direction intersecting the first direction, and is disposed between a first portion and a second portion of the laminated film; a first columnar portion, disposed within the first portion, extending along the first direction, includes a first charge storage layer and a first semiconductor layer; and a second columnar portion, disposed within the second portion, extending along the first direction, includes a second charge storage layer and a second semiconductor layer, wherein the first electrode layer among the plurality of electrode layers includes a first region where the concentration of boron, carbon, or nitrogen is a first value, and a second region where the concentration of boron, carbon, or nitrogen is a second value higher than the first value, and the second region is disposed near the side of the first electrode layer facing the plate-shaped portion.

2. The semiconductor device as claimed in claim 1, wherein, The second region contains metallic elements and boron, carbon, or nitrogen.

3. The semiconductor device as claimed in claim 2, wherein, The second region is formed by a metal boride film, a metal carbide film, or a metal nitride film.

4. The semiconductor device as claimed in claim 2, wherein, The metal element is a transition metal element.

5. The semiconductor device as claimed in claim 2, wherein, The metallic element is a group 4 element, a group 5 element, or a group 6 element.

6. The semiconductor device as claimed in claim 2, wherein, The metallic element is Ti (titanium), Zr (zirconium), Hf (hafnium), V (vanadium), Nb (niobium), Ta (tantalum), Cr (chromium), Mo (molybdenum), or W (tungsten).

7. The semiconductor device as claimed in claim 1, wherein, The second region is disposed within the first electrode layer located within the first portion and within the first electrode layer located within the second portion.

8. The semiconductor device as claimed in claim 1, wherein, The plate-shaped portion includes a second insulating film disposed on the side of the laminated film and a wiring layer disposed on the side of the second insulating film.

9. The semiconductor device as claimed in claim 1, wherein, The first electrode layer includes a first film and a second film disposed within the first film. The first electrode layer includes a first region and a second region within the second film.

10. The semiconductor device as claimed in claim 1, wherein, At least one of the plurality of first insulating films includes a third region having a boron, carbon, or nitrogen concentration of a third value, and a fourth region having a boron, carbon, or nitrogen concentration of a fourth value higher than the third value, the fourth region being disposed near the side of the at least one first insulating film facing the plate-like portion.

11. A method for manufacturing a semiconductor device, comprising: A multilayer film is formed, the multilayer film alternately comprising a plurality of first layers and a plurality of first insulating films in a first direction; a first columnar portion is formed, the first columnar portion extending in the first direction within a first portion of the multilayer film, comprising a first charge storage layer and a first semiconductor layer; a second columnar portion is formed, the second columnar portion extending in the first direction within a second portion of the multilayer film, comprising a second charge storage layer and a second semiconductor layer; a first recess is formed, the first recess having a plate-like shape extending in the multilayer film in the first direction and in a second direction intersecting the first direction, located between the first portion and the second portion; the plurality of first layers are replaced by a plurality of electrode layers from the first recess; a plate-like portion is formed, the plate-like portion having a plate-like shape extending in the first recess in the first direction and in the second direction; a first electrode layer among the plurality of electrode layers is formed as a first region comprising a concentration of boron, carbon, or nitrogen of a first value, and a second region comprising a concentration of boron, carbon, or nitrogen of a second value higher than the first value, the second region being formed near the side of the first electrode layer facing the first recess.

12. A method for manufacturing a semiconductor device as claimed in claim 11, wherein, The second region is formed within the first electrode layer by supplying a gas containing boron, carbon, or nitrogen into the first recess.

13. A method for manufacturing a semiconductor device as claimed in claim 11, wherein, The second region is formed by forming a second layer containing boron, carbon, or nitrogen on the side of the first electrode layer, allowing the boron, carbon, or nitrogen to diffuse from the second layer into the first electrode layer.

14. A method for manufacturing a semiconductor device as claimed in claim 11, wherein, The replacement is performed by removing the plurality of first layers from the laminated film to form a plurality of second recesses within the laminated film, forming the material of the plurality of electrode layers within the plurality of second recesses and the first recesses, and removing the material from the first recesses to separate the plurality of electrode layers from each other.

15. A method for manufacturing a semiconductor device as claimed in claim 14, wherein, The second region is formed after the plurality of electrode layers are divided into each other.

16. A method for manufacturing a semiconductor device as claimed in claim 14, wherein, The second region is formed before the plurality of electrode layers are separated from each other.

17. A method for manufacturing a semiconductor device as claimed in claim 11, wherein, The second region is formed to contain metallic elements and boron, carbon, or nitrogen.

18. A method for manufacturing a semiconductor device as claimed in claim 11, wherein, The second region is formed within the first electrode layer located within the first portion and within the first electrode layer located within the second portion.

19. A method for manufacturing a semiconductor device as claimed in claim 11, wherein, The plate-shaped portion is formed after the second region is formed within the first electrode layer.

20. A method for manufacturing a semiconductor device as claimed in claim 11, wherein, The plate-shaped portion is formed by sequentially forming a second insulating film and a wiring layer within the first recess.

Images