Display driver integrated circuit structure

Abstract

A display driver integrated circuit structure includes a first chip and a second chip. The first chip includes a plurality of first semiconductor elements. The plurality of first semiconductor elements includes a scan driver, a data driver, a gamma regulator, a power supply circuit, a one-time programmable memory, a multiple-time programmable memory, a digital input / output circuit, an analog input / output circuit, and a power input / output circuit. The second chip is bonded to the first chip. The second chip includes a plurality of second semiconductor elements.

Claims

1. A display driver integrated circuit structure, comprising: A first chip includes a plurality of first semiconductor elements, wherein the plurality of first semiconductor elements include a scan driver, a data driver, a gamma regulator, a power supply circuit, a single-programmable memory (SPMC), a multiple-programmable memory (MPCM), a digital input / output circuit, an analog input / output circuit, and a power input / output circuit; and a second chip, coupled to the first chip, includes a plurality of second semiconductor elements, wherein the plurality of second semiconductor elements include a panel display controller, a power controller, a high-speed interface controller, a high-speed interface receiver, a high-speed interface command decoder, a low-speed interface controller, a low-speed interface receiver, a low-speed interface command decoder, a register read controller, a register write controller, a static random access memory (SRAM) controller, a SRAM bit cell, a single-programmable memory controller, a multiple-programmable memory controller, a single-programmable memory bit cell, a multiple-programmable memory bit cell, a shift register of the scan driver, a shift register of the data driver, a latch of the scan driver, and a latch of the data driver, and the minimum spacing between the plurality of first semiconductor elements is greater than the minimum spacing between the plurality of second semiconductor elements.

2. The display driver integrated circuit structure as claimed in claim 1, wherein the plurality of the first semiconductor elements further include a sensor.

3. The display driver integrated circuit structure as claimed in claim 1, wherein the plurality of second semiconductor elements further includes at least one of a static random access memory read assist, a static random access memory write assist, and a sensor controller.

4. The display driver integrated circuit structure as claimed in claim 1, wherein the plurality of first semiconductor elements include high-voltage elements, medium-voltage elements, or combinations thereof.

5. The display driver integrated circuit structure as claimed in claim 4, wherein the plurality of second semiconductor elements include a plurality of low-voltage elements.

6. The display driver integrated circuit structure as claimed in claim 1, wherein the breakdown voltage of the plurality of first semiconductor elements is higher than the breakdown voltage of the plurality of second semiconductor elements.

7. The display driver integrated circuit structure as claimed in claim 1, wherein the second wafer is co-bonded to the first wafer.

8. The display driver integrated circuit structure as claimed in claim 1, wherein the second wafer is fused to the first wafer.

9. The display driver integrated circuit structure as claimed in claim 1, wherein the first wafer and the second wafer are stacked face-to-back.

10. The display driver integrated circuit structure as claimed in claim 1, wherein the first wafer and the second wafer are stacked face-to-face.

11. The display driver integrated circuit structure as claimed in claim 1, wherein the first wafer and the second wafer are stacked back to back.

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