Display device for examining the status of a gate line and integrated circuit thereof

Abstract

A display device and its integrated circuit for detecting the status of gate lines. The integrated circuit includes an analog front-end circuit and a first switch. The analog front-end circuit detects whether any of the gate lines of the display panel is open-circuited or whether any of the gate lines being detected is short-circuited with an undetected gate line. Each analog front-end circuit includes a non-inverting input and an inverting input. Each first switch includes a first terminal and a second terminal, wherein the first terminal is coupled to the inverting input of a corresponding analog front-end circuit, and the second terminal is coupled to the display panel.

Description

[Technical Field]

[0001] This invention relates to a display technology, and more particularly to a display device and its integrated circuit for detecting the short circuit or open circuit state of the gate line of a display panel. [Previous Technology]

[0002] In traditional display panel testing technology, display function testing is mainly carried out in two stages: the single-panel (cell) testing stage and the integrated circuit (IC) bonding stage. In the single-panel testing stage, the display panel is tested before the integrated circuit (IC) bonding process.

[0003] In the single-panel testing stage, drive signals are applied to the source and gate lines through test pads on the glass substrate of the display panel, and the display panel is activated in conjunction with an external backlight module. Then, automated optical inspection (AOI) is performed to identify and remove defective panels by displaying simple test patterns before the IC bonding process. The IC bonding process includes thin film on glass (FOG) / wafer on glass (COG) processes and module assembly processes. After the IC bonding process of bonding the display driver IC, additional display tests are also performed. The display driver IC is driven to display complex images, and the current output of the display panel is tested through test pads to detect display anomalies. These inspection methods rely on external test instruments or manual verification (e.g., optical inspection, visual inspection, and current measurement). However, when the display module is integrated into a system, such as an automotive display and touch integration system, a mobile phone, or a tablet computer, any subsequent display faults cannot be directly detected by the display driver IC. Currently, in automotive displays, human-machine interfaces (HMIs) such as instrument panels, infotainment systems, and warning lights are integrated into a single display module. If this display module malfunctions, drivers and passengers may not be able to access critical information in a timely manner, potentially posing a safety risk. [Summary of the Invention]

[0004] The present invention provides a display device and its integrated circuit for detecting the short circuit or open circuit state of the gate line of the display panel, which determines whether the display panel is abnormal and alerts the user to reduce emergencies and improve safety.

[0005] In one embodiment of the present invention, a display device is provided, comprising a display panel and an integrated circuit. The display panel includes a plurality of gate lines, a plurality of gate driving units, and a plurality of first switches. Each gate line includes a first end and a second end, wherein the second end is opposite to the first end. Each gate driving unit is coupled to the first end of one of the plurality of gate lines, and the plurality of gate driving units are used to output gate driving signals to the plurality of gate lines. The plurality of first switches correspond to the plurality of gate lines, and each first switch includes a first end, a second end, and a control end, wherein the control end of the first switch is coupled to the second end of one of the plurality of gate lines. The integrated circuit is used to drive the display panel to display an image. The integrated circuit includes a plurality of analog front-end circuits and a plurality of second switches. Each analog front-end circuit includes a non-inverting input and an inverting input. Each second switch includes a first terminal and a second terminal. The first terminal of each second switch is coupled to the inverting input terminal of a corresponding analog front-end circuit of a plurality of analog front-end circuits. The second terminal of each second switch is used to couple to one of the plurality of first switches of the display panel.

[0006] In one embodiment of the present invention, an integrated circuit for detecting a display panel is provided, comprising a plurality of analog front-end circuits and a plurality of first switches. The analog front-end circuits are used to detect whether any of the gate lines of the display panel is open-circuited or whether any of the gate lines being detected is short-circuited with an undetected gate line. Each analog front-end circuit includes a non-inverting input terminal and an inverting input terminal. Each first switch includes a first terminal and a second terminal. The first terminal of each first switch is coupled to the inverting input terminal of a corresponding analog front-end circuit of the plurality of analog front-end circuits, and the second terminal of each second switch is coupled to the display panel.

[0007] Based on the above, the display device and integrated circuit adopt an analog front-end circuit to determine whether the display panel is abnormal and to warn the user, so as to reduce emergencies and improve safety.

[0008] To enable your review committee to have a better understanding of the structural features and effects achieved by the present invention, the following preferred embodiment diagrams and detailed descriptions are provided:

Implementation Method

[0010] Embodiments of the present invention will be further explained below with reference to the accompanying drawings. Wherever possible, the same reference numerals in the drawings and description represent the same or similar components. In the drawings, shapes and thicknesses may be exaggerated for simplification and convenience. It is understood that elements not specifically shown in the drawings or described in the description are forms known to those skilled in the art. Those skilled in the art can make various changes and modifications based on the content of this invention.

[0011] Unless otherwise specified, certain conditional clauses or words, such as "can," "could," "might," or "may," are generally intended to express features, elements, or steps that are present in the embodiments of this invention, but may also be interpreted as features, elements, or steps that may not be necessary. In other embodiments, these features, elements, or steps may be unnecessary.

[0012] The description of “one embodiment” or “an embodiment” in the following text refers to a specific element, structure, or feature associated with at least one embodiment. Therefore, the multiple descriptions of “one embodiment” or “an embodiment” appearing in various places below do not refer to the same embodiment. Furthermore, specific components, structures, and features in one or more embodiments may be combined in a suitable manner. It is worth noting that the following drawings are not drawn to scale, and these drawings are for illustrative purposes only.

[0013] Certain terms are used in the specification and claims to refer to specific elements. However, those skilled in the art will understand that the same element may be referred to by different names. The specification and claims do not distinguish elements by differences in name, but by differences in function. The term "comprising" as used in the specification and claims is an open-ended term and should be interpreted as "comprising but not limited to". In addition, "coupled" here includes any direct and indirect means of connection. Therefore, if the text describes a first element coupled to a second element, it means that the first element can be directly connected to the second element by electrical connection or signal connection such as wireless transmission or optical transmission, or indirectly electrically or signal connected to the second element by other elements or connection means.

[0014] The disclosure is specifically described by the following examples, which are merely illustrative. Various modifications and refinements can be made by those skilled in the art without departing from the spirit and scope of this disclosure. Therefore, the scope of protection of this disclosure shall be determined by the appended claims. Throughout the specification and claims, unless explicitly stated otherwise, the words “a” and “the” include statements containing “a or at least one” of the element or component. Furthermore, as used in this disclosure, the singular article also includes statements of a plurality of elements or components unless clearly excluded from the specific context. Moreover, when applied in this description and throughout the claims below, unless explicitly stated otherwise, “in which” may include both “in which” and “on which”. The terms used throughout the specification and claims, unless otherwise specified, generally have their ordinary meaning in the art, in the content of this disclosure, and in the specific context. Certain terms used to describe this disclosure will be discussed below or elsewhere in this specification to provide additional guidance to practitioners in describing this disclosure. Examples throughout this specification, including examples of any terms discussed herein, are for illustrative purposes only and do not limit the scope or meaning of this disclosure or any illustrative terms. Similarly, this disclosure is not limited to the various embodiments set forth in this specification.

[0015] The following description describes a display device and its integrated circuit for detecting the state of the gate line of a display panel. The integrated circuit uses analog front-end circuitry to determine whether the display panel is abnormal (e.g., short circuit or open circuit) and alerts the user to reduce emergencies and improve safety. The integrated circuit described below can also be applied to other circuit architectures.

[0016] Figure 1 is a schematic diagram of a display device according to a first embodiment of the present invention. Referring to Figure 1, the first embodiment of the display device 1 is described below. The display device 1 includes a display panel 10, an integrated circuit 11, and a timing control circuit 12, wherein the integrated circuit 11 is used to drive the display panel 10 to display images. The integrated circuit 11 is used to detect the display panel 10. The display panel 10 includes a plurality of gate lines, a plurality of gate driving units 100, and two switching circuits 102 and 102'. The present invention is not limited to 16 gate lines. Some of the gate lines, such as gate lines G1 to G16, are shown in the figure. Gate lines G1 to G16 are disposed in the active area 101 of the display panel 10. Each of the gate lines G1 to G16 includes a first end and a second end, wherein the second end is opposite to the first end. Each gate driving unit 100 is coupled to the timing control circuit 12 and the first end of one of the gate lines G1 to G16. Each gate drive unit 100 generates a gate drive signal and outputs it to drive the corresponding gate line. The integrated circuit 11 includes multiple analog front-end circuits AFE1 to AFE4. The present invention is not limited to four analog front-end circuits. The integrated circuit 11 is a display driver integrated circuit, and the timing control circuit 12 may be integrated into the integrated circuit 11 or may be a single chip separate from the integrated circuit 11.

[0017] Figure 2 is a waveform diagram of the gate control clock and gate drive signal according to an embodiment of the present invention. Referring to Figures 1 and 2, the timing control circuit 12 outputs gate control clocks C1 to C4 to the gate drive unit 100. In response to the gate control clocks C1 to C4, the gate drive unit 100 outputs gate drive signals g1 to g16 to the gate lines G1 to G16. The gate control clocks C1 to C4 are periodic signals with the same period and sequentially transition from inactive levels (e.g., low voltage levels) to active levels (e.g., high voltage levels). For example, gate control clock C1 has a high voltage level in period P1, gate control clock C2 has a high voltage level in period P2, gate control clock C3 has a high voltage level in period P3, and gate control clock C4 has a high voltage level in period P4. Gate drive signals g1, g5, g9, and g13 are generated in response to gate control clock C1; gate drive signals g2, g6, g10, and g14 are generated in response to gate control clock C2; gate drive signals g3, g7, g11, and g15 are generated in response to gate control clock C3; and gate drive signals g4, g8, g12, and g16 are generated in response to gate control clock C4. Gate lines G1 to G16 are enabled sequentially. During the period when integrated circuit 11 does not output data voltage to display panel 10, analog front-end circuits AFE1 to AFE4 check whether any of the detected gate lines G1, ..., or G16 is open-circuited or short-circuited with an undetected gate line. Therefore, analog front-end circuits AFE1~AFE4 can determine whether the display panel 10 is abnormal (i.e., whether there is a short circuit or open circuit in the gate line), and the display device 1 can alert the user to reduce emergencies and improve safety. For example, the porch interval of the image frame period can be the period during which the integrated circuit 11 does not output data voltage to the display panel 10.

[0018] Figure 3 is a schematic diagram of a display device according to a second embodiment of the present invention. Referring to Figure 3, the display panel 10 includes eight gate lines G1 to G8, the gate driving unit 100 generates eight gate driving signals g1 to g8, and switching circuits 102 and 102' are disposed on the pixel substrate of the display panel 10. The switching circuits 102 and 102' include a plurality of switches T1 to T8, such as thin-film transistors. The number of switches in the switching circuit 102 is equal to the number of switches in the switching circuit 102'. Switches T1 to T8 correspond to gate lines G1 to G8. Each of the switches T1 to T8 includes a first terminal, a second terminal, and a control terminal. The control terminal of each of the switches T1 to T8 is coupled to the second terminal of one of the gate lines G1 to G8. The integrated circuit 11 includes a plurality of analog front-end circuits AFE1 to AFE4 and a plurality of switches S1 to S4. Each of the analog front-end circuits AFE1 to AFE4 may be, but is not limited to, an operational amplifier. Each of the analog front-end circuits AFE1 to AFE4 includes a non-inverting input and an inverting input. The inverting input and output of each of the analog front-end circuits AFE1 to AFE4 are coupled to each other. Each of the switches S1 to S4 includes a first terminal and a second terminal. The first terminal of each of the switches S1 to S4 is coupled to the inverting input of a corresponding analog front-end circuit in AFE1 to AFE4, and the second terminal of each of the switches S1 to S4 is used to couple to the second terminals of multiple individual switches T1 to T8 in the display panel 10.

[0019] Figure 4 is a schematic diagram of a display device according to a third embodiment of the present invention. Referring to Figures 4 and 2, assuming that the analog front-end circuit AFE1 is a first analog front-end circuit, and only the gate line G1 is detected, the corresponding switch T1 is turned on to detect whether the detected gate line G1 is open-circuited or short-circuited with another gate line. At the same time, the other switches T2 to T8 are turned off. In other words, during the detection period of the gate line G1, the gate drive signals g2 to g8 are at a low voltage level, and the gate drive signal g1 is at a high voltage level. During the period when the first analog front-end circuit detects whether the gate line G1 being tested is open-circuited or short-circuited with another gate line, the gate drive unit 100 outputs gate drive signals g1~g8 to the gate lines G1~G8. Voltage V2 is provided to the first terminal of the switch T1 corresponding to the gate line G1 being tested. Voltage V1 with a level different from voltage V2 is provided to the non-inverting input terminal of the first analog front-end circuit, and the switch S1 corresponding to the analog front-end circuit AFE1 is turned on. The detection result is that, because a closed loop is formed under normal conditions, only the first analog front-end circuit corresponding to the gate line G1 among the analog front-end circuits AFE1~AFE4 detects current I and outputs the corresponding voltage. This also indicates that the gate line G1 being tested is neither open-circuited nor short-circuited.

[0020] Figure 5 is a schematic diagram of a display device according to a fourth embodiment of the present invention. Referring to Figures 5 and 2, assume that the analog front-end circuit AFE1 is a first analog front-end circuit, and only the gate line G1 is detected and enabled, while the gate drive signals g2~g8 are at a low voltage level that prevents switches T2~T8 from conducting. When the detected gate line G1 is open-circuited, the gate drive signal g1 cannot reach the control terminal of switch T1, so switch T1 is turned off. Therefore, a closed loop cannot be formed between voltage V2 and the inverting input terminal of the first analog front-end circuit AFE1, and the first analog front-end circuit AFE1 corresponding to the detected gate line G1 detects no current.

[0021] Figure 6 is a schematic diagram of a display device according to a fifth embodiment of the present invention. Referring to Figures 6 and 2, it is assumed that the analog front-end circuit AFE1 is a first analog front-end circuit, and only the gate line G1 is detected and enabled, while the gate drive signals g2~g8 output by the gate drive unit 100 are at a low voltage level that prevents switches T2~T8 from being turned on. When the detected gate line G1 is short-circuited with another gate line, for example, with the adjacent gate line G2, the gate drive signal g1 reaches the control terminal of switch T1, and also reaches the control terminal of switch T2 through the gate line G2, and switch T2 can be turned on unexpectedly. Therefore, a closed loop is formed between voltage V2 and the inverting input terminal of the first analog front-end circuit AFE1, and another closed loop is formed between voltage V2 and the inverting input terminal of analog front-end circuit AFE2. Therefore, not only does the first analog front-end circuit corresponding to the gate line G1 being detected detect the current I, but the analog front-end circuit AFE2 (corresponding to the undetected gate line G2) also detects the current I.

[0022] According to the embodiments provided above, the display device and integrated circuit adopt analog front-end circuit to determine whether the display panel is abnormal (e.g., short circuit or open circuit gate line) and warn the user to reduce emergency situations and improve safety.

[0023] The above description is only a preferred embodiment of the present invention and is not intended to limit the scope of the present invention. Therefore, all equivalent changes and modifications made in accordance with the shape, structure, features and spirit described in the claims of the present invention should be included in the scope of the claims of the present invention. [Simplified Explanation of the Diagram]

[0009] Figure 1 is a schematic diagram of a display device according to a first embodiment of the present invention. Figure 2 is a waveform diagram of a gate control clock and a gate drive signal according to a first embodiment of the present invention. Figure 3 is a schematic diagram of a display device according to a second embodiment of the present invention. Figure 4 is a schematic diagram of a display device according to a third embodiment of the present invention. Figure 5 is a schematic diagram of a display device according to a fourth embodiment of the present invention. Figure 6 is a schematic diagram of a display device according to a fifth embodiment of the present invention.

Claims

1. A display device, comprising: A display panel includes: a plurality of gate lines, each gate line including a first end and a second end, wherein the second end is relative to the first end; a plurality of gate driving units, each gate driving unit coupled to the first end of one of the plurality of gate lines, the plurality of gate driving units being used to output gate driving signals to the plurality of gate lines; and a plurality of first switches corresponding to the plurality of gate lines, each first switch including a first end, a second end and a control end, wherein the control end of the first switch is coupled to the second end of one of the plurality of gate lines; and integrated circuitry for driving the display panel to display images, the integrated circuitry including: The display panel includes a plurality of analog front-end circuits, each of which includes a non-inverting input and an inverting input; and a plurality of second switches, each of which includes a first terminal and a second terminal, the first terminal of which is coupled to the inverting input of a corresponding analog front-end circuit of the plurality of analog front-end circuits, and the second terminal of which is coupled to one of the plurality of first switches of the display panel.

2. The display device as claimed in claim 1, wherein the plurality of analog front-end circuits are used to check whether any of the plurality of gate lines being tested is open-circuited or short-circuited with any untested gate line.

3. The display device as claimed in claim 2, wherein during the period when the integrated circuit does not output data voltage to the display panel, the plurality of analog front-end circuits check whether the detected gate line of the plurality of gate lines is open-circuited or whether the detected gate line is short-circuited with the undetected gate line.

4. The display device as claimed in claim 2, wherein when the first analog front-end circuit corresponding to the gate line to be detected checks whether the gate line to be detected is open-circuited or whether the gate line to be detected is short-circuited with an undetected gate line of the plurality of gate lines, the plurality of gate drive units output the gate drive signal to the plurality of gate lines, a first voltage is provided to the first terminal of the first switch corresponding to the gate line to be detected among the plurality of first switches, a second voltage having a level different from the first voltage is provided to the non-inverting input terminal of the first analog front-end circuit, and all of the plurality of second switches are turned on.

5. The display device as claimed in claim 2, wherein when the gate line being detected is neither open-circuited nor short-circuited, only the first analog front-end circuit corresponding to the gate line being detected among the plurality of analog front-end circuits detects current.

6. The display device as claimed in claim 2, wherein when the detected gate line is open-circuited, the first switch corresponding to the detected gate line is turned off, and the first analog front-end circuit of the plurality of analog front-end circuits corresponding to the detected gate line detects no current.

7. The display device as claimed in claim 2, wherein when the detected gate line is short-circuited with the undetected gate line, not only is one of the first switches corresponding to the detected gate line turned on, but another of the plurality of first switches is also turned on, and not only is one of the first analog front-end circuits corresponding to the detected gate line detected, but another of the plurality of analog front-end circuits is also detected.

8. The display device as claimed in claim 1 further includes a timing control circuit for outputting a plurality of gate control clocks to the plurality of gate drive units.

9. An integrated circuit for detecting a display panel, comprising: Multiple analog front-end circuits are used to check whether any of the gate lines of the display panel are open-circuited or short-circuited with any gate line. Each analog front-end circuit includes a non-inverting input terminal and an inverting input terminal. A plurality of first switches are also included, each first switch including a first terminal and a second terminal. The first terminal of each first switch is coupled to the inverting input terminal of a corresponding analog front-end circuit of the plurality of analog front-end circuits, and the second terminal of each first switch is coupled to the display panel.

10. The integrated circuit for detecting a display panel as described in claim 9, wherein during the period when the integrated circuit does not output a data voltage to the display panel, the plurality of analog front-end circuits check whether any of the plurality of gate lines being tested is open-circuited or whether any of the gate lines being tested is short-circuited to an untested gate line.

11. The integrated circuit for detecting a display panel as described in claim 9, wherein when the first analog front-end circuit corresponding to the gate line to be detected in the plurality of analog front-end circuits checks whether the gate line to be detected is open-circuited or whether the gate line to be detected is short-circuited with the gate line not detected among the plurality of gate lines, a first voltage is provided to the non-inverting input terminal of the first analog front-end circuit, and all of the plurality of first switches are turned on.

12. The integrated circuit for detecting a display panel as described in claim 11, wherein the second terminal of the first switch corresponding to the gate line to be detected of the plurality of first switches is coupled to a second voltage level different from the first voltage level through a second switch on the display panel.

13. The integrated circuit for detecting a display panel as described in claim 9, wherein when the gate line being detected is neither open-circuited nor short-circuited, only the first analog front-end circuit corresponding to the gate line being detected among the plurality of analog front-end circuits detects current.

14. The integrated circuit for detecting a display panel as described in claim 9, wherein when the gate line being detected is open-circuited, the first analog front-end circuit of the plurality of analog front-end circuits corresponding to the gate line being detected detects no current.

15. The integrated circuit for detecting a display panel as described in claim 9, wherein when the detected gate line is short-circuited with the undetected gate line, not only does one of the first analog front-end circuits corresponding to the detected gate line detect current, but another analog front-end circuit among the plurality of analog front-end circuits also detects current.

16. The integrated circuit for detecting the display panel as described in claim 9 further includes a timing control circuit for outputting a plurality of gate control clocks to a plurality of gate drive units, each of the gate drive units being coupled to one of the plurality of gate lines, the plurality of gate drive units being used to output gate drive signals to the plurality of gate lines.

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