Electronic device and method with built-in self-repair through-silicon vias

TWI934589BActive Publication Date: 2026-08-01NATIONAL TSING HUA UNIVERSITY
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Patent Information

Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
NATIONAL TSING HUA UNIVERSITY
Filing Date
2025-05-02
Publication Date
2026-08-01

Smart Images

  • Figure TWG2TB001903934_001
    Figure TWG2TB001903934_001
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    Figure TWG2TB001903934_002
  • Figure TWG2TB001903934_003
    Figure TWG2TB001903934_003
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Abstract

The electronic device includes multiple through-silicon vias (TSVs) and multiple bare die layers. Each TSV includes multiple spare TSVs. The bare die layers are electrically connected in series with each other through the TSVs. Each bare die layer includes a base layer and multiple memory layers. The base layer includes a driver package circuit and a master controller. The driver package circuit transmits a pulse signal to the TSVs and selects one of the spare TSVs based on a test result of the pulse signal for transmitting the pulse signal in the next test. The master controller outputs a double-pulse signal, judges the test result, and broadcasts the test result. Each memory layer includes a receiver package circuit and a slave controller. The receiver package circuit receives the pulse signal and selects the spare TSV based on the test result. The slave controller receives the test result and transmits the test result to the receiver package circuit. In the next test, the pulse width of the pulse signal is shortened.
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Claims

1. An electronic device comprising: Multiple through-silicon vias (TSVs), including multiple spare TSVs; A plurality of bare die layers, electrically interconnected through the TSVs, include a base layer and a plurality of memory layers; wherein the base layer includes: a driver packaging circuit that transmits a pulse signal to the TSVs and selects one of the spare TSVs based on a test result of the pulse signal for transmitting the pulse signal in the next test; a master controller that outputs the pulse signal, determines the test result, and broadcasts the test result; wherein each of the memory layers includes: a receiver packaging circuit that selects one of the spare TSVs based on the test result for receiving the pulse signal; a secondary controller that receives the test result and transmits the test result to the receiver packaging circuit; wherein, in the next test, the pulse width of the pulse signal is shortened; wherein the driver packaging circuit generates the pulse signal based on a double pulse signal; the master controller shortens the time interval between the two rising edges of the double pulse signal, causing the driver packaging circuit to shorten the pulse width of the pulse signal; The basic layer further includes a repeater to compensate for the attenuation of the dual-pulse signal in the propagation path; wherein the pulse width of the pulse signal is between 300 picoseconds and 625 picoseconds.

2. The electronic device as described in claim 1, wherein, The drive packaging circuit includes a plurality of drive units; each drive unit is electrically connected to at least two of the TSVs.

3. The electronic device as described in claim 2, wherein, Each drive unit includes: a transmitting unit that receives the dual-pulse signal and generates the pulse signal based on the dual-pulse signal; a selector that receives the test result of the pulse signal and outputs a maintenance control signal based on the test result; and a switching circuit that transmits the pulse signal to one of the backup TSVs based on the maintenance control signal from the selector.

4. The electronic device as described in claim 3, wherein, The selector includes: a multiplexer, including a first input, a second input, an output, and a control terminal; the second input receives the test result from the main controller, and the control terminal receives a scan shift signal; a state flip-flop, storing the test result, including an input and an output, the input being electrically connected to the output of the multiplexer, and the output being electrically connected to the first input of the multiplexer; and an instantaneous maintenance logic circuit, receiving a maintenance signal and outputting a maintenance control signal to the switching circuit according to the maintenance signal and the test result stored in the state flip-flop.

5. The electronic device as described in claim 4, wherein, The multiplexer outputs the test result stored in the state flip-flop or the test result broadcast by the main controller according to the scan shift signal.

6. The electronic device as claimed in claim 1, wherein, The main controller performs a pulse disappearance test; the main controller determines the test result by comparing the signal amplitude of the pulse signal generated by the drive packaging circuit and the pulse signal obtained after passing through the TSV.

7. The electronic device as claimed in claim 1, wherein, The receiving packaging circuit includes a plurality of receiving units; each receiving unit is electrically connected to at least two of the TSVs.

8. The electronic device as described in claim 7, wherein, Each receiving unit includes: a capture unit that receives the pulse signal obtained after passing through the TSVs and generates the test result based on the pulse signal obtained after passing through the TSVs; a selector that receives the test result of the pulse signal and outputs a maintenance control signal based on the test result; and a switching circuit that receives the pulse signal through one of the backup TSVs based on the maintenance control signal from the selector.

9. The electronic device as described in claim 8, wherein, The selector includes: a multiplexer, including a first input, a second input, an output, and a control terminal; the second input receives the test result from the sub-controller, and the control terminal receives a scan shift signal; a state flip-flop, storing the test result, including an input and an output, the input of which is electrically connected to the output of the multiplexer; and an instantaneous maintenance logic circuit, electrically connected to the state flip-flop, receiving a maintenance signal, and outputting a maintenance control signal to the switching circuit according to the maintenance signal and the test result stored in the state flip-flop.

10. The electronic device as claimed in claim 9, wherein, The multiplexer outputs the test result generated by the capture unit or the test result transmitted by the sub-controller according to the scan shift signal.

11. The electronic device as claimed in claim 1, wherein, The main controller includes: a digitally controlled oscillator that outputs a first clock signal, a second clock signal, a third clock signal, a fourth clock signal, or a fifth clock signal based on the test result; a control unit electrically connected to the digitally controlled oscillator that determines whether the test result is successful or unsuccessful and outputs a selection signal and a double-pulse enable signal accordingly; a multiplexer that outputs the first clock signal, the second clock signal, the third clock signal, the fourth clock signal, or the fifth clock signal based on the selection signal; and a double-pulse generator that converts the first clock signal, the second clock signal, the third clock signal, the fourth clock signal, or the fifth clock signal into the double-pulse signal based on the double-pulse enable signal.

12. The electronic device as claimed in claim 11, wherein, The period of the first clock signal is greater than the period of the second clock signal; the period of the second clock signal is greater than the period of the third clock signal; the period of the third clock signal is greater than the period of the fourth clock signal; and the period of the fourth clock signal is greater than the period of the fifth clock signal.

13. The electronic device as described in claim 1, further comprising: Multiple communication TSVs are electrically connected to the base layer and the memory layers; wherein the master controller broadcasts the test results to the slave controller of each memory layer via the communication TSVs.

14. A method for self-healing built-in through-silicon vias (TSVs), applicable to electronic devices having multiple TSVs and multiple bare die layers, comprising: Perform a pulse disappearance test; wherein the pulse disappearance test includes: transmitting a pulse signal to the TSVs, and comparing the signal amplitude of the pulse signal and the pulse signal obtained after passing through the TSVs to determine the test result; broadcasting the test result; checking whether there are any faulty TSVs among the TSVs based on the test result; checking whether there are enough multiple spare TSVs among the TSVs to respond to the faulty TSV; and performing a maintenance step in response to having enough spare TSVs; wherein the maintenance step includes selecting one of the spare TSVs to replace the faulty TSV; wherein the pulse disappearance test further includes: generating the pulse signal based on a double pulse signal; reducing the time interval between the two rising edges of the double pulse signal to shorten the pulse width of the pulse signal; compensating for the attenuation of the double pulse signal in the propagation path; wherein the pulse width of the pulse signal is between 300 picoseconds and 625 picoseconds.

15. The built-in TSV self-healing method as described in claim 14 further includes: In the next test, the pulse width of the pulse signal will be shortened.

16. The built-in TSV self-healing method as described in claim 15, wherein, The steps for shortening the pulse width of the pulse signal in the next test include: checking whether the pulse width of the pulse signal has reached a minimum level in response to a TSV without any faults; reducing the pulse width of the pulse signal by one level in response to the pulse width of the pulse signal not reaching the minimum level; and performing the pulse disappearance test again.