Semiconductor device and method for fabricating the same

Abstract

This invention discloses a method for fabricating a semiconductor device, which mainly involves first providing a substrate including a first transistor region and a second transistor region, then forming a shallow trench isolation around the first transistor region and the second transistor region, forming a gate structure extending from the first transistor region to the second transistor region, forming a first epitaxial layer next to the gate structure of the first transistor region and a second epitaxial layer next to the gate structure of the second transistor region, and finally forming a trench within the shallow trench isolation between the first epitaxial layer and the second epitaxial layer.

Claims

1. A method of fabricating a semiconductor device, characterized in that it comprises: providing a substrate including a first transistor region and a second transistor region; forming a shallow trench isolation surrounding the first transistor region and the second transistor region; forming a gate structure extending from the first transistor region to the second transistor region; forming a first epitaxial layer next to the gate structure of the first transistor region and a second epitaxial layer next to the gate structure of the second transistor region; and forming a trench within the shallow trench isolation between the first epitaxial layer and the second epitaxial layer, wherein the depth of the trench is less than the height of the first epitaxial layer.

2. The method as described in claim 1 further comprises: forming a first groove next to the gate structure in the first transistor region and a second groove next to the gate structure in the second transistor region; forming a first epitaxial layer in the first groove and a second epitaxial layer in the second groove; forming an inter-dielectric layer surrounding the gate structure; and performing a metal gate replacement process to convert the gate structure into a metal gate.

3. The method as described in claim 2 further comprises: forming a first contact plug on one side of the gate structure of the first transistor region; forming a second contact plug on one side of the gate structure of the second transistor region; and forming a third contact plug on the other side of the gate structure and extending from the first transistor region to the second transistor region.

4. The method as described in claim 3, wherein the bottom surface of the third contact plug includes a protrusion located directly above the trench.

5. The method as described in claim 3, wherein the length of the first contact plug is less than the length of the third contact plug.

6. A semiconductor device, characterized in that it comprises: a substrate including a first transistor region and a second transistor region; a shallow trench surrounding the first transistor region and the second transistor region; a gate structure extending from the first transistor region to the second transistor region; a first epitaxial layer disposed beside the gate structure of the first transistor region; a second epitaxial layer disposed beside the gate structure of the second transistor region; and a trench disposed within the shallow trench between the first epitaxial layer and the second epitaxial layer, wherein the depth of the trench is less than the height of the first epitaxial layer.

7. The semiconductor device as described in claim 6 further comprises: a first contact plug disposed on one side of the gate structure of the first transistor region; a second contact plug disposed on one side of the gate structure of the second transistor region; and a third contact plug disposed on the other side of the gate structure and extending from the first transistor region to the second transistor region.

8. The semiconductor element as described in claim 7, wherein the bottom surface of the third contact plug includes a protrusion located directly above the trench.

9. The semiconductor element as described in claim 7, wherein the length of the first contact plug is less than the length of the third contact plug.

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