Integrated circuit device and method of manufacturing the same

Abstract

Some embodiments relate to a method of manufacturing an integrated circuit device, including forming a second dielectric layer on a first substrate of a first integrated circuit die, the first integrated circuit die having one or more first dielectric layers disposed on a first side of the first substrate, the second dielectric layer being formed on a second side of the first substrate, wherein one or more first conductive structures are disposed in one or more first dielectric layers; performing a high-density plasma chemical vapor deposition operation using a combination of silane gas and oxygen to form a third dielectric layer on the second dielectric layer; forming a second conductive structure extending from one side of the first integrated circuit die and through the first substrate; and bonding the first integrated circuit die to the second integrated circuit die to electrically couple one or more third conductive structures of the second integrated circuit die to the second conductive structure.

Claims

1. A method for manufacturing an integrated circuit device, comprising: On a first substrate having one or more first dielectric layers disposed on a first side of a first substrate, a second dielectric layer is formed on a second side of the first substrate opposite to the first side of the first substrate, wherein one or more first conductive structures are disposed in the one or more first dielectric layers, and the one or more first dielectric layers encompass the first side of the first integrated circuit die; a high-density plasma chemical vapor deposition (PDCVD) operation is performed to form a third dielectric layer on the second dielectric layer, the PDCVD operation employing a combination of silane gas and oxygen; at least one fourth dielectric layer is formed on the third dielectric layer, the at least one fourth dielectric layer encompassing the second side of the first integrated circuit die opposite to the first side of the first integrated circuit die; a second conductive structure is formed in each of the at least one fourth dielectric layer, the third dielectric layer, the second dielectric layer, the first substrate, and at least one of the one or more first dielectric layers, the second conductive structure extending from the second side of the first integrated circuit die to at least one of the one or more first conductive structures; On a first side of the second substrate of the second integrated circuit die, one or more third conductive structures are formed in one or more fifth dielectric layers disposed on the second substrate; and the first integrated circuit die is bonded to the second integrated circuit die to electrically couple the one or more third conductive structures to the second conductive structure.

2. The method of claim 1, wherein the second conductive structure comprises: a conductive through-substrate via structure extending through the first substrate to at least one of the one or more first conductive structures; and a first conductive bonding structure disposed on the conductive through-substrate via structure and extending to the second side of the first integrated circuit die.

3. A method of manufacturing an integrated circuit device, comprising: forming one or more first dielectric layers and one or more first conductive structures disposed in the one or more first dielectric layers on a first side of a first substrate to form a first portion of a first integrated circuit die opposite to the first side of the first substrate; reversing the first portion of the first integrated circuit die; forming a second dielectric layer on a second side of the first substrate; performing a high-density plasma chemical vapor deposition (PDCVD) operation to form a third dielectric layer on the second dielectric layer, the PDCVD operation employing a combination of silane gas and oxygen at a temperature of about 300 degrees Celsius; forming at least one fourth dielectric layer on the third dielectric layer, the at least one fourth dielectric layer including a second side of the first integrated circuit die; forming a second conductive structure in each of the at least one fourth dielectric layer, the third dielectric layer, the second dielectric layer, the first substrate, and at least one of the one or more first dielectric layers, the second conductive structure extending from the second side of the first integrated circuit die to at least one of the one or more first conductive structures; and reversing the first integrated circuit die. On a first side of a second substrate of a second integrated circuit die, one or more third conductive structures are formed in one or more fifth dielectric layers disposed on the second substrate, at least one of the one or more third conductive structures extending to the first side of the second integrated circuit die opposite to the second substrate; the second side of the first integrated circuit die is joined to the first side of the second integrated circuit die to electrically couple the one or more third conductive structures to the second conductive structure; on a first side of a third substrate of a third integrated circuit die, one or more fourth conductive structures are formed in one or more sixth dielectric layers disposed on the third substrate, at least one of the one or more fourth conductive structures extending to the first side of the third integrated circuit die opposite to the third substrate; the third integrated circuit die is reversed; and the first side of the third integrated circuit die is joined to the first side of the first integrated circuit die to electrically couple at least one of the one or more fourth conductive structures to at least one of the one or more first conductive structures.

4. The method as described in claim 3, further comprising: A photosensitive area is formed in the third substrate; A gate structure is formed on the first side of the third substrate near the photosensitive area, wherein at least one of the one or more fourth conductive structures is formed to be electrically connected to the gate structure.

5. The method as described in claim 3, further comprising: An optical filter layer is formed on the first side of the third substrate; And a lens structure is formed on the optical filter layer.

6. The method as described in claim 3 further includes: A portion of the third substrate is removed through a second side of the third substrate to form a trench extending into one of the one or more fourth conductive structures; And an upper bonding structure that is electrically coupled to one of the one or more fourth conductive structures is formed in the trench.

7. An integrated circuit device, comprising: A first integrated circuit die includes: a first substrate; one or more first dielectric layers disposed on an upper side of the first substrate; one or more first conductive structures disposed in the one or more first dielectric layers; a second dielectric layer disposed on a lower side of the first substrate; a third dielectric layer disposed on a lower side of the second dielectric layer, the third dielectric layer having a nitrogen concentration less than five percent of the nitrogen concentration of at least one of the one or more first dielectric layers; at least one fourth dielectric layer disposed on a lower side of the third dielectric layer, the at least one fourth dielectric layer including a lower side of the first integrated circuit die; and a second conductive structure extending upward from the lower side of the first integrated circuit die through the first substrate to at least one of the one or more first conductive structures; and a second integrated circuit die includes: a second substrate; one or more fifth dielectric layers disposed on an upper side of the second substrate; and one or more third conductive structures disposed in the one or more fifth dielectric layers, wherein at least one of the one or more third conductive structures is electrically coupled to the second conductive structure on an upper side of the second integrated circuit die.

8. The integrated circuit arrangement as claimed in claim 7, wherein the second conductive structure comprises: The conductive through-substrate via structure extends upward through the first substrate to at least one of the one or more first conductive structures; The first conductive bonding structure is disposed at the lower end of the conductive through-substrate via structure and extends downward to the lower side of the first integrated circuit die.

9. The integrated circuit device as claimed in claim 7, further comprising a third integrated circuit die, including: Third base; One or more sixth dielectric layers are disposed on the underside of the third substrate; And one or more fourth conductive structures are disposed in one or more sixth dielectric layers, wherein at least one of the one or more fourth conductive structures is electrically coupled to at least one of the one or more first conductive structures.

10. The integrated circuit arrangement as claimed in claim 9, wherein: The third substrate includes a photosensitive region; and at least one of the one or more fourth conductive structures is electrically coupled to a gate structure disposed on the third substrate near the photosensitive region.

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