Semiconductor device and fabrication method thereof

Abstract

A semiconductor device includes: a substrate having a logic region and a liquid crystal array region thereon; a dielectric layer disposed on the substrate and covering the logic region and the liquid crystal array region; an etch stop layer disposed on the dielectric layer; a liquid crystal layer disposed on the etch stop layer; a via disposed in the etch stop layer and the dielectric layer within the logic region; a metal contact disposed in the liquid crystal layer within the logic region and located on the via; and a plurality of metal structures disposed in the liquid crystal layer within the liquid crystal array region and extending into the etch stop layer, wherein the top critical dimension of each of the plurality of metal structures is equal to the bottom critical dimension of each of the plurality of metal structures.

Claims

1. A semiconductor device comprising: a substrate having a logic region and a liquid crystal array region thereon; a dielectric layer disposed on the substrate and covering the logic region and the liquid crystal array region; an etch stop layer disposed on the dielectric layer; a liquid crystal layer disposed on the etch stop layer; a via disposed in the etch stop layer and the dielectric layer within the logic region; at least one metal contact disposed in the liquid crystal layer within the logic region and located on the via; and at least one metal structure disposed in the liquid crystal layer within the liquid crystal array region and extending into the etch stop layer, wherein... The top critical dimension of the at least one metal structure is equal to the bottom critical dimension of the at least one metal structure, wherein the at least one metal structure includes a sidewall with a scalloped profile.

2. The semiconductor device as described in claim 1, wherein, The liquid crystal layer includes a top surface that is coplanar with the top surface of the at least one metal structure and the top surface in contact with the at least one metal.

3. The semiconductor device as described in claim 2, wherein, It also includes: a dielectric sealing layer conformally deposited on the sidewalls and top surface of the at least one metal structure.

4. The semiconductor device as described in claim 3, wherein, The dielectric sealing layer isolates the at least one metal structure from the liquid crystal layer so that they do not come into contact.

5. The semiconductor device as described in claim 3, wherein, The dielectric sealing layer contains a silicon nitride layer.

6. The semiconductor device as claimed in claim 1, wherein, The aspect ratio of at least one of the metal structures is greater than or equal to 4.

7. The semiconductor device as claimed in claim 1, wherein, The bottom surface of the at least one metal structure is lower than the bottom surface of the at least one metal contact.

8. The semiconductor device as claimed in claim 1, wherein, The etch stop layer contains a nitrogen-doped carbide layer.

9. The semiconductor device as claimed in claim 1, wherein, The at least one metal structure and the at least one metal contact comprise copper.

10. A method of forming a semiconductor device, comprising: providing a substrate having a logic region and a liquid crystal array region thereon; forming a dielectric layer on the substrate, covering the logic region and the liquid crystal array region; forming an etch stop layer on the dielectric layer; forming a liquid crystal layer on the etch stop layer; forming a via in the etch stop layer and the dielectric layer within the logic region; forming at least one metal contact in the liquid crystal layer within the logic region, such that the at least one metal contact is located on the via; and forming at least one metal structure in the liquid crystal layer within the liquid crystal array region, such that the at least one metal structure extends into the etch stop layer, wherein... The top critical dimension of the at least one metal structure is equal to the bottom critical dimension of the at least one metal structure, wherein the at least one metal structure includes a sidewall with a scalloped profile.

11. The method as described in claim 10, wherein, The liquid crystal layer includes a top surface that is coplanar with the top surface of the at least one metal structure and the top surface in contact with the at least one metal.

12. The method as described in claim 11, wherein, It also includes: conformally depositing a dielectric sealing layer on the sidewalls and top surface of the at least one metal structure.

13. The method as described in claim 12, wherein, The dielectric sealing layer isolates the at least one metal structure from the liquid crystal layer so that they do not come into contact.

14. The method as described in claim 12, wherein, The dielectric sealing layer contains a silicon nitride layer.

15. The method as described in claim 10, wherein, The aspect ratio of at least one of the metal structures is greater than or equal to 4.

16. The method as described in claim 10, wherein, The bottom surface of the at least one metal structure is lower than the bottom surface of the at least one metal contact.

17. The method as described in claim 10, wherein, The etch stop layer contains a nitrogen-doped carbide layer.

18. The method as described in claim 10, wherein, The at least one metal structure and the at least one metal contact comprise copper.

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