Source driver circuit and signal detecting and compensating method

Abstract

A source drive circuit includes multiple data line drive units, a group delay circuit, and a detection circuit. The group delay circuit provides multiple delayed signals to the data line drive units, wherein the delayed signals include a first delayed signal and a second delayed signal. The detection circuit detects the time difference between the first delayed signal and the second delayed signal, and adjusts the time difference between the first delayed signal and the second delayed signal to a preset value based on the detection result.

Claims

1. A source drive circuit, comprising: Multiple data line drive units are coupled to the corresponding multiple data lines; A grouping delay circuit is coupled to the plurality of data line driving units and is used to provide a plurality of delay signals to the plurality of data line driving units, wherein the plurality of delay signals include a first delay signal and a second delay signal; and a detection circuit is coupled to the grouping delay circuit and the plurality of data line driving units, wherein the detection circuit is used to detect the time difference between the first delay signal and the second delay signal, and adjust the time difference between the first delay signal and the second delay signal to a preset value according to the detection result.

2. The source drive circuit as claimed in claim 1, wherein the detection circuit receives the first delay signal and the second delay signal from the plurality of data line drive units to detect the time difference between the first delay signal and the second delay signal.

3. The source drive circuit as claimed in claim 1, wherein the detection circuit adjusts the time difference between the first delayed signal and the second delayed signal output by the group delay circuit to the preset value based on the detection result.

4. The source drive circuit as claimed in claim 1, wherein, in timing, the first delayed signal is the first delayed signal and the second delayed signal is the last delayed signal among the plurality of delayed signals.

5. The source drive circuit as claimed in claim 1, wherein when the Nth gate line is turned on, the detection circuit detects the time difference between the first delayed signal and the second delayed signal; and when the (N+1)th gate line is turned on, the detection circuit adjusts the time difference between the first delayed signal and the second delayed signal to the preset value according to the detection result, wherein N is an integer greater than or equal to 1.

6. The source drive circuit as claimed in claim 1, wherein the detection circuit comprises: A pulse generation circuit is coupled to the plurality of data line driving units and is used to detect the time difference between the first delayed signal and the second delayed signal, and output a detection pulse.

7. The source drive circuit as claimed in claim 6, wherein the detection circuit further comprises: A comparator circuit is coupled to the pulse generation circuit and is used to receive the detection pulse and the reference pulse, compare the difference between the detection pulse and the reference pulse, and output the comparison result as the detection result, wherein the comparison result includes information on the compensation value of the second delay signal.

8. The source drive circuit as claimed in claim 7, wherein the detection circuit further comprises: A reference pulse generation circuit is coupled to the comparator circuit and is used to output the reference pulse to the comparator circuit, wherein the reference pulse includes information about the preset value.

9. The source drive circuit as claimed in claim 7, wherein the detection circuit further comprises: A controller circuit is coupled to the comparator circuit and is used to receive the comparison result output by the comparator circuit, and adjust the delay time of the second delay signal according to the comparison result so that the time difference between the first delay signal and the second delay signal conforms to the preset value.

10. The source drive circuit as claimed in claim 9, wherein the controller circuit comprises: Voltage generation circuit, used to provide multiple control voltages; And a selector circuit, coupled to the comparator circuit and the voltage generation circuit, for selecting one control voltage output from the plurality of control voltages according to the comparison result, so as to adjust the delay time of the second delay signal.

11. A signal detection and compensation method for detecting and compensating multiple delayed signals in a source drive circuit, wherein the source drive circuit includes multiple data line drive units and a grouping delay circuit, and the signal detection and compensation method includes: Enter the detection and compensation mode, and receive the first delay signal and the second delay signal from the plurality of data line drive units; The time difference between the first delayed signal and the second delayed signal is detected and the detection result is output; and the time difference between the first delayed signal and the second delayed signal output by the group delay circuit is adjusted to a preset value based on the detection result.

12. The signal detection and compensation method as claimed in claim 11, wherein, in the plurality of delayed signals, the first delayed signal is the first delayed signal in timing, and the second delayed signal is the last delayed signal.

13. The signal detection and compensation method as described in claim 11, wherein the step of detecting the time difference between the first delayed signal and the second delayed signal and outputting the detection result includes: When the Nth gate line is turned on, the time difference between the first delayed signal and the second delayed signal is detected, where N is an integer greater than or equal to 1.

14. The signal detection and compensation method as described in claim 13, wherein the step of adjusting the time difference between the first delayed signal and the second delayed signal output by the grouping delay circuit to the preset value based on the detection result includes: When the N+1th gate line is turned on, the time difference between the first delayed signal and the second delayed signal is adjusted to the preset value according to the detection result.

15. The signal detection and compensation method as described in claim 11, wherein, The step of detecting the time difference between the first delayed signal and the second delayed signal and outputting the detection result includes: detecting the time difference between the first delayed signal and the second delayed signal and outputting a detection pulse; receiving the detection pulse and a reference pulse, wherein the reference pulse includes information about the preset value; and comparing the difference between the detection pulse and the reference pulse and outputting a comparison result as the detection result, wherein the comparison result includes information about the compensation value of the second delayed signal.

16. The signal detection and compensation method as described in claim 15, wherein the step of adjusting the time difference between the first delayed signal and the second delayed signal output by the grouping delay circuit to the preset value based on the detection result includes: Provides multiple control voltages; And based on the comparison result, select one control voltage output from the plurality of control voltages to adjust the delay time of the second delay signal.

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