High electron mobility transistor device

TWI934709BActive Publication Date: 2026-08-01HIPER SEMICONDUCTOR INC
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Patent Information

Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
HIPER SEMICONDUCTOR INC
Filing Date
2025-07-09
Publication Date
2026-08-01

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    Figure TWG2TB001904054_003
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Abstract

A high electron mobility transistor device includes an active region, two gate buses, a source bus, a first source field plate, a plurality of source contacts, a second source field plate, a top metal layer, and second source field plate contacts. The two gate buses are located in the active region and extend along a first direction. The source bus is located in the active region and disposed between the two gate buses. The first source field plate is located in the active region and at least partially overlaps the two gate buses. The second source field plate is located in the active region and is disposed above the first source field plate. The top metal layer is located above the second source field plate. The plurality of source contacts are disposed on the source bus and electrically connected to the top metal layer. The second source field plate contacts are located in the active region and electrically connect the second source field plate to the top metal layer, such that the second source field plate is electrically connected to the source bus.
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Claims

1. A high electron mobility transistor device, comprising: One active zone; Two gate busbars are located in the active region and extend along a first direction; A source bus located in the active region and disposed between the two gate buses; a first source field plate located in the active region and at least partially overlapping the two gate buses; a second source field plate located in the active region and disposed above the first source field plate; a top metal layer located above the second source field plate; a plurality of source contacts disposed in the source bus and electrically connected to the top metal layer; and a second source field plate contact located in the active region and electrically connected to the second source field plate and the top metal layer, such that the second source field plate is electrically connected to the source bus.

2. The high electron mobility transistor device as described in claim 1 further includes a first source field plate contact portion located in the active region and electrically connected to the first source field plate and the top surface metal layer.

3. The high electron mobility transistor device as described in claim 2, wherein the source bus further includes a first sub-source bus and a second sub-source bus, wherein a gap exists between the first sub-source bus and the second sub-source bus, and the first source field plate contact portion is located above the gap.

4. The high electron mobility transistor device as claimed in claim 2, wherein the first source field plate contact portion does not penetrate the first source field plate.

5. The high electron mobility transistor device as claimed in claim 3, wherein the first source field plate includes a first field plate bus, a second field plate bus and a first connection portion, wherein the two gate buses of the first field plate bus and the second field plate bus respectively overlap, the two ends of the first connection portion are respectively connected to the first field plate bus and the second field plate bus, and the first connection portion is located above the gap, wherein the first source field plate contact portion contacts but does not pass through the first connection portion.

6. The high electron mobility transistor device as claimed in claim 1, wherein the first source field plate includes a first field plate bus and a second field plate bus, wherein the first field plate bus and the second field plate bus respectively overlap the two gate buses.

7. The high electron mobility transistor device as claimed in claim 6, wherein the high electron mobility transistor device has an epitaxial layer and a source electrode, the source electrode being located in the active region and disposed on the epitaxial layer, the second source electrode field plate including a third field plate bus, a fourth field plate bus and a second connection portion, the third field plate bus at least partially overlapping the first field plate bus, the fourth field plate bus at least partially overlapping the second field plate bus, the second connection portion overlapping the source electrode bus, the two ends of the second connection portion being connected to the third field plate bus and the fourth field plate bus respectively, and the second source electrode field plate contact portion contacting the second connection portion.

8. The high electron mobility transistor device as claimed in claim 1, wherein the device has an epitaxial layer and a source electrode located in the active region and disposed on the epitaxial layer, wherein the second source field plate contact portion passes through the second source field plate and contacts the source electrode.

9. The high electron mobility transistor device as claimed in claim 1, wherein the second source field plate contact portion contacts but does not penetrate the second source field plate.

10. A high electron mobility transistor device, comprising: One active zone; Two gate busbars are located in the active region and extend along a first direction; A source bus is located in the active region and extends along the first direction, and is disposed between the two gate buses; a first source field plate is located in the active region, wherein the first source field plate includes a first field plate bus, a second field plate bus, and a first connecting portion, the first field plate bus and the second field plate bus partially overlap the two gate buses, and the first connecting portion connects the first field plate bus and the second field plate bus; a first source field plate contact portion is disposed in the first connecting portion; a second source field plate is located in the active region, wherein the second source field plate includes a third field plate bus, a fourth field plate bus, and a second connecting portion, the third field plate bus at least partially overlaps the first field plate bus, the fourth field plate bus at least partially overlaps the second field plate bus, and the second connecting portion connects the third field plate bus and the fourth field plate bus; A top metal layer is located above the second source field plate; a plurality of source contacts are disposed on the source bus and electrically connected to the top metal layer; and a second source field plate contact is in contact with the second connection portion, wherein the first source field plate is electrically connected to the top metal layer through the first source field plate contact, and the second source field plate is electrically connected to the top metal layer through the second source field plate contact.

11. The high electron mobility transistor device as claimed in claim 10 further includes a second source bus located in the active region and extending along the first direction, and disposed between the two gate buses, wherein there is a gap between the source bus and the second source bus, and the first connection portion is located above the gap.

12. The high electron mobility transistor device as claimed in claim 10, wherein the second connection portion partially overlaps the source bus.

13. The high electron mobility transistor device as claimed in claim 10, wherein the first source field plate further includes a third connection portion located in the active region and at the extended endpoint of the first field plate bus and the second field plate bus, and the third connection portion connects the first field plate bus and the second field plate bus.

14. The high electron mobility transistor device as claimed in claim 10, wherein the second source field plate further includes a fourth connection located in the active region and at the extended endpoints of the third field plate bus and the fourth field plate bus, and the fourth connection connects the third field plate bus and the fourth field plate bus.

15. The high electron mobility transistor device as claimed in claim 10, wherein the first source field plate contact and the second source field plate contact are respectively located between any two of the plurality of source contacts.