Display apparatus

Abstract

A display device includes: a substrate comprising a plurality of sub-pixel regions; a driving voltage line; a data line; a cover layer disposed on the substrate and having uneven portions, the uneven portions being disposed in each of the plurality of sub-pixel regions; and a retaining layer disposed on the cover layer, wherein the cover layer has a pair of first flat regions, wherein at least one of the plurality of sub-pixel regions includes a first light-emitting region defined by the retaining layer, wherein the driving voltage line and the data line are disposed in a non-light-emitting region, and wherein at least one of the pair of first flat regions disposed in the first light-emitting region does not overlap with the driving voltage line and the data line.

Description

[Technical Field]

[0001] The present invention relates to a display device, and more specifically, to a display device comprising a microlens array. [Previous Technology]

[0002] As society enters the mature information age, various display devices for processing and displaying large amounts of information have been developed. There are various types of display devices that display images, such as liquid crystal displays (LCDs), organic light-emitting diode displays (OLEDs), and quantum dot displays (QDs).

[0003] Recently, organic light-emitting display devices that have attracted attention as display devices include self-emissive organic light-emitting diodes (OLEDs). Therefore, these devices have the characteristics of fast response speed, high contrast, high luminous efficiency and wide viewing angle.

[0004] When light emitted from the organic light-emitting layer of an organic light-emitting display device passes through each component of the organic light-emitting display device and is emitted to the outside, most of it may be lost. Therefore, only about 20% of the light emitted from the organic light-emitting layer is emitted to the outside from the organic light-emitting display device.

[0005] Therefore, recently, in order to improve the light extraction efficiency of organic light-emitting display devices, a scheme to form a microlens array inside the display panel of an organic light-emitting display device has been proposed. [Summary of the Invention]

[0006] In the manufacturing process of the organic light-emitting display device, the size of each opening in the embankment layer is controlled within a predetermined range. Since the openings in the embankment layer define each light-emitting area, the size of each opening in the embankment layer must be controlled within a predetermined target range so that the light-emitting characteristics of the organic light-emitting display devices manufactured on the production line are consistent.

[0007] In particular, in an organic light-emitting display device in which a microlens array is formed inside the display panel, the size of each opening in the embankment layer is smaller than a predetermined target range, and the number of microlenses helps to reduce light extraction, thus reducing the light extraction efficiency.

[0008] In order to measure the opening size of the embankment layer, an optical image of the embankment layer is captured after the embankment layer has been patterned. The grayscale of each of the two opposite sidewalls of the opening of the embankment layer is extracted from the captured optical image, and the size of the opening is measured based on the grayscale and a predetermined critical value.

[0009] When a microlens array is formed inside the display panel of an organic light-emitting display device, specifically on the cover layer provided below the embankment layer, the grayscale of each of the two opposite sidewalls of the opening extracted from the captured optical image is distorted, so it may be impossible to measure the size of the opening in the embankment layer.

[0010] Therefore, the inventors of the present invention have invented a display device in which the size of each opening in the embankment layer can be accurately measured while forming a microlens array on a cover layer inside the display panel.

[0011] The purpose of embodiments of the present invention is to provide a display device in which the size of an opening in a dike layer or the distance between openings can be measured, thereby preventing a reduction in light extraction efficiency.

[0012] The purpose of this invention is not limited to the above-described purpose. Other purposes and advantages of this invention not mentioned will be understood from the following description and will become clearer in conjunction with embodiments of the invention.

[0013] A display device includes: a substrate comprising a plurality of sub-pixel regions; a cover layer disposed on the substrate and having a plurality of recesses respectively disposed in each of the plurality of sub-pixel regions; and a retaining layer disposed on the cover layer and having an opening defined therein to define a light-emitting region in each of the plurality of sub-pixel regions. In this regard, the plurality of sub-pixel regions include a first sub-pixel region having a first light-emitting region, wherein the cover layer has a pair of first flat regions in the first light-emitting region, wherein each of the first flat regions has no recess.

[0014] Details of other embodiments are included in the detailed description and drawings.

[0015] According to an embodiment of the present invention, flat regions that do not form recesses constituting the microlens array are respectively provided at the cover layer to overlap with the sidewalls of the openings of the embankment layer. Therefore, the grayscale of each sidewall of the opening of the embankment layer in the captured optical image is not distorted. Therefore, the size of the opening of the embankment layer or the distance between the openings can be measured without error.

[0016] In one embodiment of the present invention, a plurality of sub-pixel regions include a second sub-pixel region, which is spaced apart from the first sub-pixel region and has a second light-emitting region, wherein the cover layer has a second flat region in the second light-emitting region, wherein there is no recess in the second flat region.

[0017] According to an embodiment of the present invention, a first flat region and a second flat region without recesses can be provided at the cover layer, such that the size of the openings in the embankment layer or the distance between the openings can be measured. Therefore, the size of the openings in the embankment layer or the distance between the openings can be managed within a predetermined target range. This prevents a decrease in the light extraction efficiency of the display device.

[0018] The effects of the present invention are not limited to those described above. Those skilled in the art will clearly understand from the following description other effects not mentioned. [Simplified Explanation of Illustrations]

[0019] FIG1 is a plan view showing a pixel region of an organic light-emitting display device according to an embodiment of the present invention. FIG2 is a cross-sectional view showing a cross-section of the organic light-emitting display device cut along the I-I' cutting line in FIG1. ​​FIG3 is a plan view showing two sub-pixel regions of an organic light-emitting display device according to an embodiment of the present invention. FIG4 shows the form of a first flat region and a second flat region according to an embodiment of the present invention.

Implementation Method

[0020] The advantages and features of the present invention, as well as the methods for achieving these advantages and features, will become clear with reference to the embodiments described in detail below in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in every different form. Therefore, these embodiments are presented merely to complete the invention and to fully inform those skilled in the art to which this invention pertains of its scope.

[0021] The shapes, dimensions, proportions, angles, and quantities disclosed in the figures to illustrate embodiments of the invention are merely examples, and therefore, the invention is not limited to the details of the figures. The same reference numerals denote the same elements herein. Furthermore, for the sake of simplicity, descriptions and details of well-known steps and elements have been omitted. Moreover, numerous specific details are set forth in the following detailed description of the invention to provide a thorough understanding of the invention. However, it should be understood that the invention can be practiced without these specific details. In other instances, well-known methods, processes, components, and circuits have not been described in detail so as not to unnecessarily obscure the nature of the invention.

[0022] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. The singular forms "a," "an," and "the" as used herein may also include plural forms unless the context clearly indicates otherwise. It should also be understood that, when used in this specification, the terms "comprising" and "including" specify the presence of the stated features, integrals, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, operations, elements, components, and / or portions thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed elements. Expressions such as "at least one" preceding the list of elements may modify the list of elements as a whole and may not modify a single element in the list. Errors or tolerances may occur in the interpretation of numerical values, even if not explicitly stated otherwise.

[0023] Furthermore, it can be understood that when a first element or layer is said to exist on a second element or layer, the first element may be directly disposed on the second element or indirectly disposed on the second element, and a third element or layer may be disposed between the first element and the second element or between layers. It should be understood that when an element or layer is said to be "connected to" or "coupled to" another element or layer, it may be directly on, connected to, or coupled to another element or layer, or one or more intermediate elements or layers may exist. Furthermore, it should be understood that when an element or layer is said to be "between" two elements or layers, it may be the only element or layer between the two elements or layers, or one or more intermediate elements or layers may also exist.

[0024] Furthermore, as used herein, when a layer, film, block, plate, etc., can be disposed "above" or "on top of" another layer, film, block, plate, etc., the former can directly contact the latter, or another layer, film, block, plate, etc., can be disposed between the former and the latter. As used herein, when a layer, film, block, plate, etc., is directly disposed "above" or "on top of" another layer, film, block, plate, etc., the former directly contacts the latter, and no other layer, film, block, plate, etc. is disposed between the former and the latter. Furthermore, as used herein, when a layer, film, block, plate, etc., can be disposed "below" or "under" another layer, film, block, plate, etc., the former can directly contact the latter, or another layer, film, block, plate, etc., can be disposed between the former and the latter. As used in this article, when a layer, membrane, block, plate, etc. is directly placed "below" or "under" another layer, membrane, block, plate, etc., the former directly contacts the latter and the other layer, membrane, block, plate, etc. is not placed between the former and the latter.

[0025] It should be understood that although the terms "first," "second," "third," etc., may be used herein to describe each element, component, block, layer, and / or portion, these elements, components, blocks, layers, and / or portions should not be limited by these terms. These terms are used to distinguish one element, component, block, layer, or portion from another element, component, block, layer, or portion. Therefore, without departing from the spirit and scope of the invention, the first element, component, block, layer, or portion described below may be referred to as the second element, component, block, layer, or portion.

[0026] When interpreting numerical values, the value is interpreted to include the range of error unless otherwise explicitly described.

[0027] The features of each embodiment of the present invention can be combined with each other in part or in whole, and can be technically related to or operable on each other. Each embodiment can be implemented independently or in an associated relationship.

[0028] In the description of time relationships, such as the temporal sequence between two events, such as "after", "next", "before", etc., another event may occur in between, unless it is specified that "immediately after", "immediately after", or "immediately before".

[0029] Unless otherwise defined, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which the inventive concept pertains. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having meanings consistent with their meanings in the relevant technical context and should not be interpreted as having idealized or overly formal meanings unless expressly defined herein.

[0030] Hereinafter, a display device according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

[0031] FIG1 is a plan view showing a pixel region of an organic light-emitting display device according to an embodiment of the present invention. FIG2 is a cross-sectional view showing a cross-section of the organic light-emitting display device cut along the I-I' cutting line in FIG1. ​​FIG3 is a plan view showing two sub-pixel regions of an organic light-emitting display device according to an embodiment of the present invention.

[0032] Referring to Figures 1 and 3, signal lines including a gate line GL, a data line DL, a reference line REF, and a drive voltage line VDD are disposed on the substrate 110. The gate line GL is arranged to intersect with the data line DL, the reference line REF, and the drive voltage line VDD.

[0033] According to this embodiment, on the substrate 110, the red sub-pixel region SP_R, the blue sub-pixel region SP_B, the white sub-pixel region SP_W, and the green sub-pixel region SP_G can be defined by the above-mentioned signal lines.

[0034] For example, each of the red sub-pixel region SP_R and the green sub-pixel region SP_G can be defined by two gate lines GL extending parallel to each other in the horizontal or X direction, and a drive voltage line VDD and a data line DL intersecting the gate lines and extending in the vertical or Y direction. Furthermore, each of the white sub-pixel region SP_W and the blue sub-pixel region SP_B can be defined by two gate lines GL extending parallel to each other, and a data line DL intersecting the gate lines and a reference line REF. Each of the red sub-pixel region SP_R and the white sub-pixel region SP_W can have an area size larger than that of each of the blue sub-pixel region SP_B and the green sub-pixel region SP_G. The arrangement order of the sub-pixel regions, and the type and number of signal lines extending between the sub-pixel regions, can be modified as needed. The size of each sub-pixel region can also be changed.

[0035] The red sub-pixel region SP_R, blue sub-pixel region SP_B, white sub-pixel region SP_W, and green sub-pixel region SP_G defined on the substrate 110 may respectively include the red light-emitting region EA_R, the blue light-emitting region EA_R, the white light-emitting region EA_W, and the green light-emitting region EA_G. Regions other than the red light-emitting region EA_R, the blue light-emitting region EA_B, the white light-emitting region EA_W, and the green light-emitting region EA_G may belong to the non-light-emitting region NA. Thus, the red light-emitting region EA_R, the blue light-emitting region EA_B, the white light-emitting region EA_W, and the green light-emitting region EA_G may not be covered by the retaining layer 190. That is, the remaining regions other than the red light-emitting region EA_R, the blue light-emitting region EA_B, the white light-emitting region EA_W, and the green light-emitting region EA_G, i.e., the non-light-emitting region NA, may be covered by the retaining layer 190. Each of the red light-emitting region EA_R and the white light-emitting region EA_W may have a larger area than each of the blue light-emitting region EA_B and the green light-emitting region EA_G.

[0036] A plurality of recesses RR can be provided in each of the sub-pixel regions SP_R, SP_B, SP_W, and SP_G. The plurality of recesses RR can be regularly arranged to form a microlens array MLA. The recesses RR can be microlenses. The plurality of recesses RR can, for example, be configured in a honeycomb pattern to form a microlens array MLA. The plurality of recesses RR can be arranged in each of a plurality of adjacent columns. The plurality of recesses RR can also be provided in each of the light-emitting regions EA_R, EA_B, EA_W, and EA_G and in each of the adjacent non-light-emitting regions NA. In the recesses of two adjacent columns, a portion of at least one of the outermost recesses may not be covered by the embankment layer 190.

[0037] The number of recessed RRs in each of the sub-pixel regions SP_R, SP_B, SP_W, and SP_G is not limited to the number shown in Figures 1 and 3. The number of recessed RRs can be more than the number shown in the figures. Furthermore, the number of recessed RRs provided in the non-light-emitting region NA is not limited to the number shown in Figures 1 and 3. The number of recessed RRs provided in the non-light-emitting region NA can be more than the number shown in the figures.

[0038] A pair of first flat regions NP1 can be set in the red sub-pixel region SP_R, and a second flat region NP2 can be set in the white sub-pixel region SP_W. Each of the first flat regions NP1 and the second flat region NP2 can refer to the region in which no concave portion RR is formed.

[0039] The first flat region NP1 can be set in the red emitting region EA_R and can extend beyond the red emitting region EA_R, that is, extend into the non-emitting region NA. The second flat region NP2 can be set in the white emitting region EA_W and can extend beyond the white emitting region EA_W, that is, extend into the non-emitting region NA. In other words, the first flat region NP1 is set across the red emitting region EA_R and the non-emitting region NA, while the second flat region NP2 is set across the white emitting region EA_W and the non-emitting region NA.

[0040] The reason why a pair of first flat regions NP1 are arranged in the red emitting region EA_R and a second flat region NP2 are arranged in the white emitting region EA_W is that the size of each of the red emitting region EA_R and the white emitting region EA_W is larger than the size of each of the blue emitting region EA_B and the green emitting region EA_G. Therefore, compared with each of the blue emitting region EA_B and the green emitting region EA_G, the reduction in light extraction efficiency of each of the red emitting region EA_R and the white emitting region EA_W is relatively small due to the formation of flat regions NP1 and NP2 without forming recesses RR. As described later, the regular arrangement of a plurality of recesses RR to form a microlens array MLA helps to improve the light extraction efficiency of each sub-pixel region. The number of recesses that help improve light extraction efficiency can be reduced proportionally to the area size of the flat regions NP1 and NP2.

[0041] The pair of first flat regions NP1 can be located on the same line. The pair of first flat regions NP1 can be located on a straight line L1 extending in a first direction (X-axis direction) of the gate line GL. The pair of first flat regions NP1 and second flat regions NP2 can be located on the same line. The pair of first flat regions NP1 and second flat regions NP2 can be located on a single straight line L1 extending in the first direction (X-axis direction).

[0042] Referring to Figure 2, on the substrate 110, a data line DL, a reference line REF, a driving voltage line VDD, a buffer layer 140, a passivation layer 150, color filters CF_R, CF_G and CF_B, a cover layer 160, a dam layer 190, a first electrode 170, an organic light-emitting layer 175 and a second electrode 180 can be provided.

[0043] Data lines DL, REF, and VDD are located on substrate 110. Furthermore, a buffer layer 140 covers the data lines DL, REF, and VDD. The buffer layer 140 can be formed, for example, by stacking a plurality of inorganic layers. For example, the buffer layer 140 can be implemented as a multilayer, wherein two or more inorganic layers made of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON) are stacked. The buffer layer 140 can be formed on the entire top surface of substrate 110 to prevent moisture from penetrating the organic light-emitting element through substrate 110. A driving thin-film transistor can be disposed on the buffer layer 140.

[0044] A passivation layer 150 is disposed on the buffer layer 140, and the passivation layer 150 protects the data line DL, the reference line REF, the drive voltage line VDD, and the drive thin-film transistor. The passivation layer 150 can be made of inorganic insulating materials such as silicon oxide and silicon nitride, or organic insulating materials such as photoacryl and phenylcyclobutene.

[0045] Color filters CF_R, CF_B, and CF_G are disposed on the passivation layer 150. The red color filter CF_R is located in the red emitting region EA_R, the blue color filter CF_B is located in the blue emitting region EA_B, and the green color filter CF_G is located in the green emitting region EA_G. No color filters are located in the white emitting region EA_W. In the white emitting region EA_W, white light emitted from the organic light-emitting layer 175 is emitted to the outside through the substrate 110 while maintaining its wavelength.

[0046] A cover layer 160 covering color filters CF_R, CF_B, and CF_G is located on the passivation layer 150. The cover layer 160 can planarize the irregularities caused by the color filters CF_R, CF_B, CF_G, etc. The cover layer 160 can be made of an organic-based insulating material such as photopropylene or phenylcyclobutene. On the top surface of the cover layer 160, a plurality of recesses RR are formed in each of the sub-pixel regions. The plurality of recesses RR can be regularly arranged to form a microlens array MLA. Therefore, the light extraction efficiency of each sub-pixel region can be improved. Furthermore, a portion of the cover layer 160 in each of the red emitting region EA_R and the white emitting region EA_W can include a first flat region NP1 and a second flat region NP2 without recesses RR.

[0047] The first electrode 170 may be disposed on the capping layer 160 in each of the sub-pixel regions. The first electrode 170 covers a plurality of recesses RR in each of the sub-pixel regions. A portion of the first electrode 170 disposed in the red sub-pixel region SP_R may include a first flat electrode region corresponding to the first flat region NP1, while a portion of the first electrode 170 disposed in the white sub-pixel region SP_W may include a second flat electrode region corresponding to the second flat region NP2. The first electrode 170 may be electrically connected to the source electrode or drain electrode of the driving thin-film transistor in each of the sub-pixel regions.

[0048] The embankment layer 190 covers the edges of each of the first electrodes 170 to define each of the light-emitting regions of the sub-pixel region. The embankment layer 190 covers the recesses RR disposed in the non-light-emitting region NA. Therefore, the embankment layer 190 covers the edges of the first flat region NP1 of the red sub-pixel region SP_R and the second flat region NP2 of the white sub-pixel region SP_W, and / or the edges of the recesses RR of the blue sub-pixel region SP_B and the green sub-pixel region SP_G.

[0049] An organic light-emitting layer 175 and a second electrode 180 are sequentially stacked on the embankment layer 190 and the first electrode 170. The organic light-emitting layer 175 can emit white light. The first electrode 170, the organic light-emitting layer 175, and the second electrode 180 constitute an organic light-emitting element.

[0050] The pair of first flat regions NP1 are respectively disposed in the two opposite side edges of the opening of the embankment layer 190 defining the red emitting region EA_R. The first flat region NP1 may be partially disposed in the red emitting region EA_R and then extend beyond the red emitting region EA_R, that is, below the embankment layer of the non-emitting region NA. The pair of first flat regions NP1 overlap with the two opposite sidewalls of the opening of the embankment layer 190 defining the red emitting region EA_R. The second flat region NP2 is disposed on one side of the opening of the embankment layer 190 defining the white emitting region EA_W. The second flat region NP2 may be partially disposed in the white emitting region EA_W and then extend beyond the white emitting region EA_W, that is, below the embankment layer of the non-emitting region NA. The second flat region NP2 overlaps with one sidewall of the opening of the embankment layer 190 defining the white emitting region EA_W.

[0051] Therefore, according to an embodiment of the present invention, the first flat region and the second flat region without the formed recess can be included in the outer coating to overlap with the sidewalls of the openings of the embankment layer, respectively. Therefore, the grayscale at each location of the sidewalls of the openings of the embankment layer in the captured optical image is not distorted. Therefore, the size of the openings in the embankment layer or the distance between the openings can be measured without error.

[0052] Furthermore, the first and second flat regions, in which no recesses are formed, can be included in the cover layer, allowing the size of the openings in the embankment layer or the distance between the openings to be measured. Therefore, the size of the openings in the embankment layer or the distance between the openings can be managed within a predetermined target range. This prevents a decrease in the light extraction efficiency of the display device.

[0053] As described above, the first flat region NP1 is set in the red sub-pixel region SP_R and the second flat region NP2 is set in the white sub-pixel region SP_W. However, the present invention is not limited thereto. The positions of the first flat region NP1 and the second flat region NP2 can be changed based on the size of the sub-pixel region.

[0054] FIG4 illustrates the form of the first flat region and the second flat region according to an embodiment of the present invention. FIG4 only shows the first flat region and the second flat region, as well as some recesses around the first flat region and the second flat region.

[0055] Referring to Figure 4, each of the first flat region NP1 and the second flat region NP2 may correspond to two or three columns R2, R3 and R4 of a plurality of concave portions RR.

[0056] Each of the first flat region NP1 and the second flat region NP2 may have an area size equal to or greater than four times the area size of a recess RR. In one example, the area size of each of the first flat region NP1 and the second flat region NP2 may be greater than or equal to the sum of the areas of four recesses, and may be less than or equal to the sum of the areas of nine recesses. The first flat region NP1 and the second flat region NP2 may have the same shape and area size as each other. However, the invention is not limited thereto.

[0057] Figure 4 illustrates the shape and area dimensions of the first flat region NP1 and the second flat region NP2. However, the invention is not limited thereto.

[0058] The above description describes a display device in which one pixel region comprises four sub-pixel regions, namely, a red sub-pixel region SP_R, a green sub-pixel region SP_G, a white sub-pixel region SP_W, and a blue sub-pixel region SP_B. However, the present invention is not limited thereto. For example, the present invention can be applied to a display device in which one pixel region comprises three sub-pixel regions, namely, a red sub-pixel region, a green sub-pixel region, and a blue sub-pixel region.

[0059] The display device according to an embodiment of the present invention can be described as follows.

[0060] A display device includes: a substrate having a plurality of sub-pixel regions; a cover layer disposed on the substrate and having a plurality of recesses respectively disposed in each of the plurality of sub-pixel regions; and a retaining layer disposed on the cover layer and having an opening defined therein to define a light-emitting region in each of the plurality of sub-pixel regions, wherein the plurality of sub-pixel regions include a first sub-pixel region having a first light-emitting region, wherein the cover layer has a pair of first flat regions in the first light-emitting region, wherein there is no recess in each of the first flat regions.

[0061] In one embodiment, the first flat regions are spaced apart from each other in a first direction in which the gate line extends, and are respectively disposed on opposite sides of the first light-emitting region.

[0062] In one embodiment, the edge of the embankment layer that defines the first luminescent region and extends in a second direction intersecting the first direction overlaps with one of the first flat regions and the recess.

[0063] In one embodiment, each of the first flat regions extends out a first luminescent region to overlap with a portion of the embankment layer.

[0064] In one embodiment, the area of ​​each of the first flat regions is equal to or greater than four times the area of ​​a recess.

[0065] In one embodiment, the plurality of sub-pixel regions include a second sub-pixel region that is spaced apart from the first sub-pixel region and has a second light-emitting region, wherein the cover layer has a second flat region in the second light-emitting region, wherein there is no recess in the second flat region.

[0066] In one embodiment, the second flat region extends into the second luminescent region to overlap with a portion of the embankment layer.

[0067] In one embodiment, the area of ​​each of the second flat regions is equal to or greater than four times the area of ​​a recess.

[0068] In one embodiment, the first flat region and the second flat region are located on the same line extending in a first direction of the gate line.

[0069] In one embodiment, the plurality of sub-pixel regions include: a third sub-pixel region located between the first sub-pixel region and the second sub-pixel region, wherein the third sub-pixel region does not have any flat region in the third light-emitting region, and the third light-emitting region of the third sub-pixel region is completely covered by the plurality of recesses.

[0070] Although embodiments of the invention have been described in more detail with reference to the accompanying drawings, the invention is not necessarily limited to these embodiments. The invention can be practiced in every possible modification without departing from the spirit and concept of the invention. Therefore, the embodiments disclosed herein are not intended to limit the spirit and concept of the invention, but rather to describe the invention. The scope of the technical concept of the invention is not limited thereto. Therefore, it should be understood that the above embodiments are exemplary and not restrictive in all respects. The scope of protection of the invention should be determined by the claims, and all technical ideas falling within the scope of the invention should be interpreted as being included within the scope of the invention.

Claims

1. A display device, comprising: A substrate comprising a plurality of sub-pixel regions; a driving voltage line; One data line; A cover layer is disposed on the substrate and has uneven portions, the uneven portions being disposed in each of the plurality of sub-pixel regions; A dam layer is disposed on the cover layer, wherein the cover layer has a pair of first flat regions, wherein at least one of the plurality of sub-pixel regions includes a first light-emitting region defined by the dam layer, wherein the driving voltage line and the data line are disposed in a non-light-emitting region, wherein at least one of the pair of first flat regions disposed in the first light-emitting region does not overlap with the driving voltage line and the data line, and at least one of the pair of first flat regions disposed in the non-light-emitting region overlaps with the driving voltage line and the data line, wherein at least one of the pair of first flat regions overlaps with the dam layer, and wherein the first flat regions are spaced apart from each other in a first direction extending from a gate line, and the first flat regions are respectively disposed on two opposite sides of the first light-emitting region.

2. The display device as described in claim 1, wherein, The first luminescent region defining at least one of the plurality of sub-pixel regions, and an edge of the embankment layer extending in a second direction intersecting the first direction, overlaps with a portion of one of the first flat regions and a portion of the uneven regions.

3. The display device as described in claim 1, wherein, The area of ​​each of these first flat regions is equal to or greater than four times the area of ​​a non-flat region.

4. The display device as described in claim 1, wherein, The at least one of the plurality of sub-pixel regions in which the pair of first flat regions are disposed is a first sub-pixel region, wherein the plurality of sub-pixel regions includes a second sub-pixel region spaced apart from the first sub-pixel region and has a second light-emitting region, and wherein the cover layer has a second flat region in the second light-emitting region.

5. The display device as described in claim 4, wherein, The second flat region extends from the second luminescent region to overlap with a portion of the embankment layer.

6. The display device as described in claim 4, wherein, The area of ​​the second flat region is equal to or greater than four times the area of ​​a non-flat region.

7. The display device as described in claim 4, wherein, The first flat region and the second flat region are located on the same line extending in a first direction along a gate line.

8. The display device as described in claim 4, wherein, The plurality of sub-pixel regions includes a third sub-pixel region located between the first sub-pixel region and the second sub-pixel region, wherein the third sub-pixel region does not have any flat areas in a third luminous region, and the third luminous region of the third sub-pixel region is completely covered by the uneven portions.

9. The display device as claimed in claim 1, wherein, These uneven portions contain a plurality of recesses, arranged to form a microlens array.

10. The display device as claimed in claim 9, wherein, The plurality of recesses are disposed in the first luminescent region and below the embankment layer.

11. The display device of claim 10 further includes a first electrode disposed on the cover layer, wherein, The first electrode covers the plurality of recesses.

12. The display device as claimed in claim 11, wherein, The first electrode includes a flat outermost portion disposed below the embankment layer and outside the plurality of recesses.

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