Display apparatus

Abstract

According to one embodiment of this disclosure, a display device includes a substrate, the substrate including a display area for displaying an image. This display device includes a first thin-film transistor disposed on the substrate. The first thin-film transistor includes a first semiconductor layer. This display device includes signal lines disposed on the substrate. The display area includes a first region and a second region outside the first region, the first region including a first transmissive region. The signal lines include a first signal line disposed within the first region and a second signal line disposed within the second region. A portion of the first signal line is disposed on the same layer as the first semiconductor layer, and the first signal line includes an oxide semiconductor material.

Description

[Technical Field]

[0001] The embodiments disclosed herein relate to a display device. [Previous Technology]

[0002] With the advancement of technology, in addition to image display functions, display devices can also provide photographic functions and various detection functions. For this purpose, the display device should include an optical device (or light receiving device or sensor), such as a camera and a detection sensor.

[0003] Since the optical device should receive light on the front surface of the display device, it can be placed in a position where it can receive light. Therefore, in conventional display devices, the camera (or camera lens) and the detection sensor must be exposed on the front surface. As a result, the bezel size of the display device may increase, or the design of the display device may be greatly limited. [Summary of the Invention]

[0004] The various embodiments disclosed herein are intended to provide a display device having a light-transmitting structure, wherein the optical devices can normally receive light (e.g., visible light, infrared light or ultraviolet light) without exposing the optical devices to the front surface.

[0005] The various embodiments disclosed herein are intended to provide a display device that can reduce interconnection deviations between light-transmitting and light-intransmitting areas.

[0006] The various embodiments disclosed herein are intended to provide a display device having a structure with high transmittance in areas where light can be transmitted.

[0007] The various embodiments disclosed herein are intended to provide a display device whose structure optimizes the interconnection process between light-transmitting and light-intransmitting areas.

[0008] A display device according to an embodiment of the present disclosure may include: a substrate, a display area including a display image; a first thin-film transistor disposed on the substrate and including a first semiconductor layer; and signal lines disposed on the substrate.

[0009] The display area may include a first area, which includes a first transmission area and a second area outside the first area.

[0010] A display device according to an embodiment of the present disclosure may include: a substrate; a display area including a displayed image; a first thin-film transistor disposed on the substrate and including a first semiconductor layer; and signal lines disposed on the substrate, wherein the display area includes a first region and a second region outside the first region, the first region including a first transmissive region, wherein the signal lines include a first signal line disposed in the first region and a second signal line disposed in the second region, wherein a portion of the first signal line is disposed on the same layer as the first semiconductor layer, and the first signal line includes an oxide semiconductor material. The oxide semiconductor material may include a transparent oxide semiconductor material.

[0011] According to the embodiments disclosed herein, a display device having a light transmission structure can be provided, wherein the optical device can typically receive light (e.g., visible light, infrared light or ultraviolet light) without exposing the optical device to the front surface.

[0012] According to embodiments of this disclosure, a display device can be provided that reduces interconnection misalignment between light-transmitting and light-blocking areas. Therefore, display driving can be implemented, improving the image quality of the display panel. Furthermore, since a driving method for reducing interconnection misalignment is not required, efficient driving can be achieved, thereby enabling low-power design.

[0013] According to embodiments of this disclosure, a display device may be provided that has better transmittance in areas where light can be transmitted. Therefore, the operational performance (e.g., camera performance or detection performance) of the optical device can be improved because the light transmission characteristics become more uniform.

[0014] According to the embodiments disclosed herein, an efficient process can be achieved by providing a structure in which the interconnection process of a region that can transmit light and a region that cannot transmit light is optimized.

[0015] It should be noted that the effects of this disclosure are not limited to the foregoing content. Those skilled in the art will clearly see other effects of this disclosure from the following description.

Implementation Method

[0031] In the following description of examples or embodiments of the present disclosure with reference to the accompanying drawings, specific examples or embodiments that may be implemented are illustrated by way of illustration. In the drawings, even if the same or similar elements are shown in different drawings, the same reference numerals and symbols may be used to represent them. Furthermore, in the description of examples or embodiments of the present disclosure, detailed descriptions of well-known functions and components incorporated herein will be omitted when it is determined that such descriptions may make the subject matter of certain embodiments of the present disclosure unclear. Terms such as "comprising," "having," "including," "consisting of," "composed of," and "formed from" are used herein generally to allow for the inclusion of other elements, unless these terms are used with "only." Unless otherwise expressly stated, singular references may also include plural forms.

[0032] The shapes, sizes, dimensions (such as length, width, height, thickness, radius, diameter, area, etc.), ratios, angles, number of elements, etc. used in the drawings to describe the embodiments of this disclosure are merely examples, but do not constitute a limitation on this disclosure.

[0033] For ease of description, the dimensions of each component, including size and thickness, are shown in the figures. This disclosure is not limited to the size and thickness of the components described, but it should be noted that the relative dimensions (including relative size, position and thickness) of the components shown in the various figures are also part of this disclosure.

[0034] The terms “first,” “second,” “A,” “B,” “(A),” and “(B)” may be used herein to describe the elements disclosed. Each of these terms is not used to define the nature, order, sequence, number, etc., of the elements, but only to distinguish the corresponding element from other elements.

[0035] When referring to the first element and the second element as "connected or coupled," "in contact or overlapping," etc., it should be interpreted as meaning that the first element can not only be "directly connected or coupled" or "directly contact or overlap" with the second element, but also that a third element can be "inserted" between the first element and the second element, or that the first element and the second element can be "connected or coupled," "in contact or overlapping," etc., through a fourth element. Here, the second element can be included in at least one of two or more elements that are "connected or coupled," "in contact or overlapping," etc.

[0036] When time-related terms such as “after,” “following,” “next,” “before” are used to describe a process or operation of an element or configuration or flow or step in a work, processing, or manufacturing method, these terms may be used to describe a non-continuous or non-sequential process or operation unless the terms “direct” or “immediate” are used at the same time.

[0037] When referring to the value of a component or its corresponding information (e.g., level), even without a separate explicit statement, the value or its corresponding information may be interpreted as including the range of errors that may be caused by various factors (e.g., process variables, internal or external shocks, noise, etc.).

[0038] The various embodiments disclosed herein will now be described in detail with reference to the accompanying drawings.

[0039] Figure 1 is a schematic diagram illustrating a display device according to an embodiment of the present disclosure.

[0040] Figure 2 is a schematic diagram illustrating a display device according to another embodiment of the present disclosure.

[0041] Figure 3 is a schematic diagram showing a display device according to yet another embodiment of the present disclosure.

[0042] Please refer to Figures 1, 2 and 3. The display device 100 according to the present disclosure embodiment may include: a display panel 110 for displaying images and one or more optical devices 11 and 12.

[0043] The display panel 110 may include a display area DA for displaying images and a non-display area NDA for not displaying images.

[0044] In the display area DA, sub-pixels can be set, and various signal lines used to drive the sub-pixels can be set.

[0045] The non-display area NDA can be the area outside the display area DA. Various interconnecting devices can be installed in the non-display area NDA, and various driving circuits can be connected. The non-display area NDA can be bent to be invisible from the front, or it can be covered by a casing. The non-display area NDA can be a bezel or a bezel area.

[0046] In the display device 100 according to the present disclosure embodiment, one or more optical devices 11 and 12 may be electronic components provided and installed separately from the display panel 110, and one or more optical devices 11 and 12 may be located below the display panel 110 (on the surface opposite to the visible surface of the display panel 110).

[0047] In the display device 100 designed according to the embodiments of the present disclosure, one or more optical devices 11 and 12 may be devices that perform operations using received light.

[0048] One or more optical devices 11 and 12 may be means of receiving light transmitted through the display panel 110 in order to perform a selected operation based on the received light. For example, one or more optical devices 11 and 12 may include one or more imaging devices, such as a camera (or image sensor), and detection sensors, such as a proximity sensor and an illumination sensor. For example, the detection sensor may be an infrared sensor.

[0049] The light required for the operation of one or more optical devices 11 and 12 may enter the front surface (or visible surface) of the display panel 110, pass through the display panel 110, and be transmitted to one or more optical devices 11 and 12 located below the display panel 110 (or on the surface opposite the visible surface of the display panel 110). For example, the light required for the operation of one or more optical devices 11 and 12 and transmitted through the display panel 110 may include at least one of visible light, infrared light, and ultraviolet light.

[0050] Referring to Figures 1, 2, and 3, in the display panel 110 according to an embodiment of the present disclosure, the display area DA may include a first area 300 and a second area 400. The first area 300 may be an optical area, etc., and the second area 400 may be a normal area, etc., but the present disclosure is not limited thereto. The optical area may include the first area 300 or a third area 500. The third area 500 may be an optical area, etc., but the present disclosure is not limited thereto. The first area 300 and the third area 500 may be one or more optical areas 300 and 500, and one or more optical areas 300 and 500 may be areas overlapping with one or more optical devices 11 and 12.

[0051] Referring to FIG1, the display area DA may include a first area 300 and a second area 400. At least a portion of the first area 300 may overlap with the first optical device 11.

[0052] Referring to FIG2, the display area DA may include a first area 300, a second area 400, and a third area 500. The second area 400 may exist between the first area 300 and the third area 500. At least a portion of the first area 300 may overlap with the first optical device 11, and at least a portion of the third area 500 may overlap with the second optical device 12.

[0053] Referring to FIG3, the display area DA may include a first area 300, a second area 400, and a third area 500. The second area 400 may not exist between the first area 300 and the third area 500. For example, the first area 300 and the third area 500 may be in contact with each other. At least a portion of the first area 300 may overlap with the first optical device 11, and at least a portion of the third area 500 may overlap with the second optical device 12.

[0054] Each of the one or more optical regions 300 and 500 may simultaneously form an image display structure and a light transmission structure. For example, since the one or more optical regions 300 and 500 are part of a display area DA, the one or more optical regions 300 and 500 may include light-emitting regions, which are provided with sub-pixels for displaying images. A light transmission structure may be formed in each of the one or more optical regions 300 and 500 to transmit light to each of the one or more optical devices 11 and 12.

[0055] One or more optical devices 11 and 12 may be located behind the display panel 110 (or above or below the surface opposite to the visible surface of the display panel 110) to receive light transmitted through the display panel 110.

[0056] One or more optical devices 11 and 12 may not be exposed on the front surface (or visible surface) of the display panel 110. When a user observes the front surface of the display device 100, the optical devices 11 and 12 are not visible to the user.

[0057] For example, the first optical device 11 may be a camera that receives light in the visible light band (e.g., visible light), and the second optical device 12 may be a detection sensor, such as a proximity sensor and an illumination sensor. For example, the detection sensor may be an infrared sensor used to detect light in the infrared band (or infrared light). Alternatively, the first optical device 11 may be a detection sensor, and the second optical device 12 may be a camera.

[0058] In the following text, for ease of explanation, the first optical device 11 will be used as a camera and the second optical device 12 will be used as an infrared detection sensor as an example. The camera can be a camera lens or an image sensor.

[0059] When the first optical device 11 is a camera, the camera can be a front-facing camera located on the back (bottom) of the display panel 110, but shooting from the front of the display panel 110. Therefore, when viewing the visible surface of the display panel 110, the user can take a picture (or a selfie) through a camera that is not visible on the visible surface.

[0060] The first region 300, the second region 400, and the third region 500 included in the display area DA may be regions capable of displaying images. The second region 400 may be a region without a light transmission structure, while each of the first region 300 and the third region 500 may be a region with a light transmission structure.

[0061] The first region 300 or the third region 500 shall have a transmittance equal to or higher than the selected level, while the second region 400 may have no transmittance or a transmittance lower than the selected level.

[0062] The first region 300, the second region 400 and the third region 500 may differ from each other in terms of resolution, sub-pixel setting structure, number of sub-pixels per unit area, electrode structure, line structure, electrode setting structure and line setting structure.

[0063] The number of subpixels per unit area in the first region 300 or the third region 500 may be less than the number of subpixels per unit area in the second region 400. The resolution of the first region 300 or the third region 500 may be lower than the resolution of the second region 400. For example, the number of subpixels per unit area may be the same as the resolution, pixel density, or pixel integration. For example, the unit of the number of subpixels per unit area may be pixels per inch (PPI), that is, the number of subpixels per inch.

[0064] The number of sub-pixels per unit area in the first region 300 may be less than the number of sub-pixels per unit area in the second region 400. The number of sub-pixels per unit area in the third region 500 may be equal to or greater than the number of sub-pixels per unit area in the first region 300, or may be less than the number of sub-pixels per unit area in the second region 400.

[0065] As a method to improve the transmittance of at least one of the first region 300 and the third region 500, the differential pixel density design method as described above can be used. According to this differential pixel density design method, the display panel 110 can be configured such that the number of sub-pixels per unit area in at least one of the first region 300 and the third region 500 is less than the number of sub-pixels per unit area in the second region 400.

[0066] For example, as another method to improve the transmittance of at least one of the first region 300 and the third region 500, a differential pixel size design method can be used. According to this differential pixel size design method, the display panel 110 can be designed such that the number of sub-pixels per unit area in at least one of the first region 300 and the third region 500 is the same as or similar to the number of sub-pixels per unit area in the second region 400, and the size of each sub-pixel (e.g., the size of the light-emitting area) in at least one of the first region 300 and the third region 500 is smaller than the size of each sub-pixel (e.g., the size of the light-emitting area) in the second region 400.

[0067] In the following description, for ease of interpretation, it will be assumed that the differential pixel density design method is applied between two methods (e.g., differential pixel density design method and differential pixel size design method) for increasing the transmittance of at least one of the first region 300 and the third region 500. Therefore, in the following description, a small number of subpixels per unit area means a small size of each subpixel, while a large number of subpixels per unit area means a large size of each subpixel.

[0068] The first region 300 can have various shapes, such as circles, ovals, squares, hexagons, and octagons. The third region 500 can have various shapes, such as circles, ovals, squares, hexagons, and octagons. The shapes of the first region 300 and the third region 500 can be the same or different.

[0069] Referring to Figure 3, when the first region 300 and the third region 500 are in contact with each other, the entire optical region including the first region 300 and the third region 500 can have various shapes, such as circular, elliptical, square, hexagonal, and octagonal. In the following description, for ease of understanding, it will be illustrated by the example that each of the first region 300 and the third region 500 is circular. The shapes of the first region 300 and the third region 500 are not limited to those disclosed herein.

[0070] In the display device 100 according to the embodiments of the present disclosure, when the first optical device 11, which is not exposed to the outside and is hidden under the display panel 110, is a camera, the display device 100 may be an under-display camera (UDC), but the present disclosure is not limited thereto.

[0071] In the case of the display device 100 according to the present disclosure embodiment, since it is not necessary to form a notch or camera hole in the display panel 110 for exposing the camera, the area of ​​the display area DA is not reduced. Therefore, since it is not necessary to form a notch or camera hole in the display panel 110 for exposing the camera, the size of the bezel area can be reduced, and the design freedom can be increased. A portion of the optical devices 11 and 12 may be formed in the display panel 110 to overlap with the notch or hole for exposing the optical devices 11 and 12. Therefore, the display device 100 may include the notch or hole and one or more optical areas 300 and 500.

[0072] In the display device 100 designed according to the embodiments of the present disclosure, even if one or more optical devices 11 and 12 are hidden behind the display panel 110, they should be able to perform the required functions normally by receiving light normally.

[0073] Furthermore, in the display device 100 designed according to the present disclosure embodiment, even if one or more optical devices 11 and 12 are hidden behind the display panel 110 and overlap with the display area DA, images can still be displayed normally in one or more optical areas 300 and 500 that overlap with one or more optical devices 11 and 12 in the display area DA.

[0074] Since the first region 300 is a region that can transmit light, the display characteristics of the first region 300 may be different from the display characteristics of the second region 400.

[0075] When the first region 300 is designed to improve display characteristics, the transmittance of the first region 300 will be reduced.

[0076] Therefore, the present disclosure embodiment can provide a structure for a first region 300 that can improve the transmittance of the first region 300 without causing a deviation in image quality between the first region 300 and the second region 400.

[0077] Even for the third region 500 other than the first region 300, the embodiments disclosed herein can provide a structure for the third region 500 that can improve the transmittance of the third region 500 and improve the image quality of the third region 500.

[0078] Therefore, in the display device 100 according to the present disclosure embodiment, although the structure of the first region 300 is substantially similar to or the same as the structure of the third region 500, the structure of the first region 300 and the structure of the third region 500 may be different from each other in terms of resolution, sub-pixel arrangement structure, number of sub-pixels per unit area, electrode structure, line structure, and electrode arrangement structure.

[0079] Figure 4 is a schematic diagram of the system configuration of a display device according to an embodiment of the present disclosure.

[0080] Referring to FIG4, the display device may include a display panel 110 as a component for displaying images and a display driving circuit. The display driving circuit may be a circuit for driving the display panel 110. The display driving circuit may include a data driving circuit 220, a gate driving circuit 230 and a display controller 240, but the embodiments disclosed herein are not limited thereto.

[0081] The display panel 110 may include a display area DA for displaying images and a non-display area NDA for not displaying images. The non-display area NDA may be an area outside the display area DA, and may also be referred to as a border area. All or part of the non-display area NDA may be an area visible from the front of the display device, or it may be a curved area that is not visible from the front of the display device.

[0082] The display panel 110 may include a substrate SUB and sub-pixels SP disposed on the substrate SUB. In order to drive the sub-pixels SP, the display panel 110 may further include various types of signal lines.

[0083] The display device according to the embodiments of this disclosure may be a liquid crystal display device or a similar device, or it may be a self-emissive display device in which the display panel 110 emits light itself. When the display device according to the embodiments of this disclosure is a self-emissive display device, each sub-pixel SP may include a light-emitting element. For example, the display device according to the embodiments of this disclosure may be an organic light-emitting display device, in which an organic light-emitting diode (OLED) is used to implement the light-emitting element. As another example, the display device according to the embodiments of this disclosure may be an inorganic light-emitting display device, in which an inorganic light-emitting diode is used to implement the light-emitting element. As yet another example, the display device according to the embodiments of this disclosure may be a quantum dot display device, in which quantum dots are used as self-emissive semiconductor crystals to implement the light-emitting element.

[0084] The structure of each sub-pixel SP may vary depending on the type of display device. For example, if the display device is a self-emissive display device, in which each sub-pixel SP is self-emissive, then each sub-pixel SP may include a self-emissive element, at least one transistor, and at least one capacitor.

[0085] For example, various signal lines may include data lines 20 that transmit data signals (or data voltage or image signals) and gate lines 30 that transmit gate signals (or scan signals).

[0086] The data line 20 and the gate line 30 may intersect each other. Each data line 20 may be configured to extend along a first direction. Each gate line 30 may be configured to extend along a second direction. The first direction may be a row direction, and the second direction may be a column direction. Alternatively, the first direction may be a column direction, and the second direction may be a row direction. In the following description, for ease of explanation, an example will be given where the data line 20 is configured along the row direction and the gate line 30 is configured along the column direction. The embodiments disclosed herein are not limited thereto.

[0087] The data drive circuit 220 can be a circuit used to drive the data line 20. The data drive circuit 220 can output a data signal to the data line 20. The gate drive circuit 230 can be a circuit used to drive the gate line 30. The gate drive circuit 230 can output a gate signal to the gate line 30.

[0088] The display controller 240 can control the data drive circuit 220 and the gate drive circuit 230. The display controller 240 can control the driving timing of the data line 20 and the driving timing of the gate line 30.

[0089] The display controller 240 can provide a data drive control signal DCS to the data drive circuit 220 to control the data drive circuit 220, and can also provide a gate drive control signal GCS to the gate drive circuit 230 to control the gate drive circuit 230.

[0090] The display controller 240 can receive input image data from the host system 250 and provide image data to the data driving circuit 220 according to the input image data.

[0091] The data driving circuit 220 can receive digital image data Data from the display controller 240, convert the received image data Data into an analog data signal, and output the data signal to the data line 20.

[0092] The gate drive circuit 230 can be provided with a first gate voltage corresponding to the on level voltage and a second gate voltage corresponding to the off level voltage, as well as various gate drive control signals GCS, and can generate gate signals and provide the generated gate signals to the gate line 30.

[0093] For example, the data driving circuit 220 can be connected to the display panel 110 via tape automated bonding (TAB), to the bonding pads of the display panel 110 via chip on glass (COG) or chip on panel (COP), or to the display panel 110 via chip on film (COF).

[0094] The gate drive circuit 230 can be connected to the display panel 110 via tape automated bonding (TAB), to the bonding pads of the display panel 110 via chip-on-glass (COG) or chip-on-panel (COP) methods, or to the display panel 110 via chip-on-film (COF) methods. Alternatively, the gate drive circuit 230 can be formed in the non-display area NDA of the display panel 110 via a gate-in-panel (GIP) configuration. The gate drive circuit 230 can be disposed on the substrate SUB or connected to the substrate SUB. For example, in the case of the GIP type, the gate drive circuit 230 can be disposed in the non-display area NDA of the substrate SUB. In the case of the chip-on-glass (COG) or chip-on-panel (COP) type, the gate drive circuit 230 can be connected to the substrate SUB.

[0095] At least one driving circuit of the data driving circuit 220 and the gate driving circuit 230 may be disposed in the display area DA of the display panel 110. For example, at least one driving circuit of the data driving circuit 220 and the gate driving circuit 230 may be configured not to overlap with the sub-pixel SP, or may be configured to partially or completely overlap with the sub-pixel SP.

[0096] The data driving circuit 220 can be connected to one side of the display panel 110 (e.g., the top or the bottom). Depending on the driving method, panel design method, etc., the data driving circuit 220 can be connected to both sides of the display panel 110 (e.g., the top and the bottom), or it can be connected to at least two of the four sides of the display panel 110.

[0097] The gate drive circuit 230 can be connected to one side (e.g., the left or right side) of the display panel 110. Depending on the driving method, panel design method, etc., the gate drive circuit 230 can be connected to both sides (e.g., the left and right sides) of the display panel 110, or it can be connected to at least two of the four sides of the display panel 110.

[0098] The display controller 240 can be implemented as a component independent of the data driving circuit 220. Alternatively, the display controller 240 can be implemented as an integrated circuit that integrates the data driving circuit 220.

[0099] The display controller 240 may be a timing controller used in display technology, a control device that includes a timing controller and can further perform other control functions, a control device different from a timing controller, or a circuit in a control device. The display controller 240 may be implemented as various circuits or electronic components, such as integrated circuits (ICs), field programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), and processors.

[0100] The display controller 240 can be mounted on a printed circuit board or a flexible printed circuit. The display controller 240 can be electrically connected to the data drive circuit 220 and the gate drive circuit 230 through the printed circuit board or the flexible printed circuit.

[0101] The display controller 240 can transmit signals to and receive signals from the data drive circuit 220 according to at least one predetermined interface. For example, such an interface may include a low voltage differential signaling (LVDS) interface, an embedded clock point-point interface (EPI), a serial peripheral interface (SPI), etc.

[0102] In order to further provide touch sensing function and image display function, according to the embodiments disclosed herein, the display device may include: a touch sensor and a touch sensing circuit, wherein the touch sensing circuit detects whether a touch event has occurred or the touch position is detected by sensing the touch sensor, such as a finger or pen.

[0103] The touch sensing circuit may include a touch driving circuit 260 that generates and outputs touch sensing data by driving and sensing a touch sensor, and a touch controller 270 that can detect the occurrence of a touch event or detect the touch position using the touch sensing data.

[0104] The touch sensor may include a plurality of touch electrodes. The touch sensor may further include a plurality of touch lines for electrically connecting the plurality of touch electrodes to the touch driving circuit 260.

[0105] The touch sensor can be disposed outside the display panel 110 in the form of a touch panel, or it can be disposed inside the display panel 110. When the touch sensor is disposed outside the display panel 110 in the form of a touch panel, the touch sensor can be called an external touch sensor. When the touch sensor is an external touch sensor, the touch panel and the display panel 110 can be manufactured separately and coupled in the assembly process. The external touch panel may include a touch panel substrate and a plurality of touch electrodes on the touch panel substrate.

[0106] When a touch sensor is present inside the display panel 110, during the manufacturing process of the display panel 110, the touch sensor can be formed on the substrate SUB together with the signal lines and electrodes related to the display driving.

[0107] The touch driving circuit 260 can provide a touch driving signal to at least one of the plurality of touch electrodes and can generate touch sensing data by sensing at least one of the plurality of touch electrodes.

[0108] The touch sensing circuit can perform touch sensing in a self-capacitance sensing method or a mutual capacitance sensing method, but the embodiments disclosed herein are not limited thereto.

[0109] When the touch sensing circuit performs touch sensing using a self-capacitance sensing method, the touch sensing circuit can perform touch sensing based on the capacitance between each touch electrode and the touch object (e.g., a finger, a pen, etc.). According to the self-capacitance sensing method, each of the multiple touch electrodes can simultaneously serve as a driving touch electrode and a sensing touch electrode. The touch driving circuit 260 can drive all or some of the multiple touch electrodes and can sense all or some of the multiple touch electrodes.

[0110] When the touch sensing circuit performs touch sensing using a mutual capacitance sensing method, the touch sensing circuit can perform touch sensing based on the capacitance between the touch electrodes. According to the mutual capacitance sensing method, the multiple touch electrodes are divided into driving touch electrodes and sensing touch electrodes. The touch driving circuit 260 can drive the driving touch electrodes and sense the sensing touch electrodes.

[0111] The touch driving circuit 260 and touch controller 270 included in the touch sensing circuit can be implemented in a separate device or in a single device. Furthermore, the touch driving circuit 260 and data driving circuit 220 can be implemented in a separate device or in a single device.

[0112] The display device may further include a power supply circuit that provides various powers to the display driving circuit and / or touch sensing circuit.

[0113] According to the embodiments disclosed herein, the display device may be a mobile terminal such as a smartphone and a tablet computer, or a monitor or television (TV) of various sizes. However, the display device according to the embodiments disclosed herein is not limited to these, and the aforementioned display device may be a display of various types and sizes capable of displaying information or images.

[0114] In the display panel 110, the display area DA may include a first area 300, a second area 400, and a third area 500. The first area 300, the second area 400, and the third area 500 may be areas capable of displaying images. The second area 400 may be an area without a light-transmitting structure, while each of the first area 300 and the third area 500 may be an area with a light-transmitting structure.

[0115] In the display panel 110, the display area DA may include a first area 300, a third area 500 and a second area 400. For ease of explanation, it will be assumed that the display area DA includes the first area 300 and the third area 500 (see Figures 2 and 3).

[0116] Figure 5 is a schematic diagram showing signal lines disposed in a display panel according to an embodiment of the present disclosure.

[0117] Referring to FIG5, the display panel 110 according to the present disclosure embodiment may include a display area DA for displaying images and a non-display area NDA for not displaying images. The display area DA may include a first area 300, a second area 400 and a third area 500.

[0118] For example, each of the first region 300, the second region 400 and the third region 500 may contain a plurality of light-emitting regions.

[0119] The first region 300 and the third region 500 can be regions that can transmit light, while the second region 400 can be a region that cannot transmit light or where light transmission is not obvious. The second region 400 can be a region other than the first region 300 and the third region 500 that cannot transmit light. Light transmission can refer to light passing through the front and rear surfaces of the display panel 110.

[0120] The display panel 110 may include sub-pixels and signal lines 10 for driving the sub-pixels.

[0121] Signal line 10 can provide various driving signals required to drive the sub-pixel.

[0122] For example, the various drive signals may include data signals for driving data lines 20 and scan signals for driving gate lines 30. The various drive signals may also include drive voltages for driving drive voltage lines and base voltages for driving base voltage lines connected to the common electrode.

[0123] Therefore, signal line 10 may include data line 20 for providing data signals and gate line 30 for providing gate signals such as scan signals. Signal line 10 may also include drive voltage line for providing drive voltage and reference voltage line for providing reference voltage.

[0124] Signal line 10 can be configured to overlap with the first region 300, the second region 400 and the third region 500.

[0125] The data line 20 may extend along a first direction. The gate line 30 may be configured to extend along a second direction different from the first direction.

[0126] Signal line 10 may include a first signal line overlapping with the first region 300 or the third region 500 and a second signal line overlapping with the second region 400.

[0127] Figure 6 is a plan view of region A shown in Figure 2 in a display panel according to an embodiment of the present disclosure.

[0128] Referring to FIG6, the first region 300 may include a first light-emitting region 310, a first non-transmissive region 320 and a first transmissive region 330.

[0129] Each first transmission region 330 contained in the first region 300 can have various shapes such as circles, ellipses, polygons and irregular shapes.

[0130] The first transmission regions 330 may have the same shape, or some of the first transmission regions 330 may have a different shape than the other first transmission regions.

[0131] The first non-transmissive region 320 included in the first region 300 may be a region that is completely opaque, or it may be a region with a transmittance lower than that of the first transmissive region 330.

[0132] The first transmission region 330 may correspond to the location where a plurality of holes are formed in the common electrode. The location where a plurality of holes are formed may be the first region 300.

[0133] For example, when the first color light is red, the second color light is green, and the third color light is blue, the luminous region of the first color light can be called the first red luminous region 310R, the luminous region of the second color light can be called the first green luminous region 310G, and the luminous region of the third color light can be called the first blue luminous region 310B.

[0134] The first red emitting region 310R, the first green emitting region 310G, and the first blue emitting region 310B may have the same size (emitting region size). Alternatively, at least one of the first red emitting region 310R, the first green emitting region 310G, and the first blue emitting region 310B may have a different size (emitting region size) than the other regions.

[0135] When the first color is red, the second color is green, and the third color is blue, among the dimensions of the first red light-emitting area 310R (light-emitting area size), the first green light-emitting area 310G (light-emitting area size), and the first blue light-emitting area 310B (light-emitting area size), the size of the first blue light-emitting area 310B (light-emitting area size) can be the largest.

[0136] The light-emitting element disposed in the first red light-emitting region 310R may include a light-emitting layer that emits red light. The light-emitting element disposed in the first green light-emitting region 310G may include a light-emitting layer that emits green light. The light-emitting element disposed in the first blue light-emitting region 310B may include a light-emitting layer that emits blue light.

[0137] Among the red-emitting, green-emitting, and blue-emitting light-emitting layers, the organic material in the blue-emitting layer is most prone to degradation. Therefore, by maximizing the size of the first blue-emitting region 310B, the current density supplied to the light-emitting element disposed in the first blue-emitting region 310B can be minimized. Therefore, the degree of degradation of the light-emitting element disposed in the first blue-emitting region 310B can be similar to the degree of degradation of the light-emitting element disposed in the first red-emitting region 310R and the degree of degradation of the light-emitting element disposed in the first green-emitting region 310G.

[0138] Therefore, as the attenuation deviation between the light-emitting elements disposed in the first red light-emitting area 310R, the first green light-emitting area 310G and the first blue light-emitting area 310B is eliminated or weakened, the image quality of the display panel 110 can be improved.

[0139] The first light-emitting region 310 in the first region 300 may include a first red light-emitting region 310R, a first green light-emitting region 310G and a first blue light-emitting region 310B.

[0140] FIG7 is a plan view of region B shown in FIG2 within a display panel according to an embodiment of the present disclosure.

[0141] Referring to FIG7, the second region 400 may include a second light-emitting region 410 and a second non-transmissive region 420.

[0142] The second light-emitting region 410 may include light-emitting regions that emit at least three colors of light. For example, the second light-emitting region 410 may include a first-color light-emitting region that emits a first color of light, a second-color light-emitting region that emits a second color of light, and a third-color light-emitting region that emits a third color of light.

[0143] The second red emitting region 410R, the second green emitting region 410G, and the second blue emitting region 410B may have the same size (emitting region size). For example, at least one of the second red emitting region 410R, the second green emitting region 410G, and the second blue emitting region 410B may have a different size (emitting region size) than the other regions.

[0144] The first color, the second color, and the third color can be different colors and can be various colors. For example, the first color, the second color, and the third color can respectively include red, green, and blue. Here, for ease of explanation, an example will be given where the first color is red, the second color is green, and the third color is blue. However, the embodiments disclosed herein are not limited to this.

[0145] The entire second region 400 may correspond to a non-transmissive region. For example, the second region 400 may include a second non-transmissive region 420, which contains a second luminescent region 410. The entire second region 400 may be the second non-transmissive region 420, and the second region 400 may not contain a transmissive region.

[0146] FIG8 is a plan view of region C shown in FIG2 within a display panel according to an embodiment of the present disclosure.

[0147] Referring to Figure 8, the third region 500 may include a third light-emitting region 510, a third non-transmissive region 520 and a second transmissive region 530.

[0148] Each of the second transmission regions 530 contained in the third region 500 can have various shapes such as circles, ellipses, polygons and irregular shapes.

[0149] The second transmission region 530 may have the same shape. Alternatively, some of the first transmission regions 330 may have a different shape than the other first transmission regions.

[0150] The third non-transmissive region 520 included in the third region 500 may be a completely opaque region or a transmissive region with a transmittance lower than that of the second transmissive region 530.

[0151] The second transmission region 530 may correspond to the location where a plurality of holes are formed in the common electrode. The location where a plurality of holes are formed may be the third region 500.

[0152] The third light-emitting region 510 in the third region 500 may include a third red light-emitting region 510R, a third green light-emitting region 510G and a third blue light-emitting region 510B.

[0153] The third light-emitting region 510 may have a different sub-pixel structure than the first light-emitting region 310 shown in FIG6, but the present disclosed embodiment is not limited thereto.

[0154] The sub-pixel structures shown in Figures 7 and 8 can be configured in various ways to minimize the resolution difference between the second region 400 and the first region 300 and the third region 500 caused by the presence of the first transmission region 330 in the first region 300 and the second transmission region 530 in the third region 500, and to maximize the performance of the first optical device 11 and the second optical device 12 that are set to overlap with the first region 300 and the third region 500.

[0155] Figure 9 is a cross-sectional schematic diagram of a display panel according to an embodiment of the present disclosure.

[0156] Referring to FIG9, the display panel may include a first region 300 and a second region 400. In FIG9, the optical region is illustrated as the first region 300, but the embodiments disclosed herein are not limited thereto. For example, the first region 300 may be the third region 500 shown in FIG2 and FIG3.

[0157] Various optical devices, such as cameras and infrared sensors, may be positioned at locations overlapping with the first region 300.

[0158] The second region 400 may include a first thin-film transistor 630 and a second thin-film transistor 640.

[0159] The first thin-film transistor 630 may include a first barrier layer 631, a first semiconductor layer 633, a first gate electrode 635, a first source electrode 636 and a first drain electrode 637.

[0160] The second thin-film transistor 640 may include a second barrier layer 641, a second semiconductor layer 643, a second gate electrode 645, a second source electrode 646, and a second drain electrode 647.

[0161] The first thin-film transistor 630 can be used as a switching transistor, and the second thin-film transistor 640 can be used as a driving transistor, but the embodiments disclosed herein are not limited thereto.

[0162] Referring to Figures 2 and 9, the display panel may include a substrate SUB. The substrate SUB may include a display area DA and a non-display area NDA surrounding the display area DA. The substrate SUB may support and protect components of a display device disposed on the substrate SUB. The substrate SUB may be made of glass or a flexible material, such as polyimide, but the embodiments disclosed herein are not limited thereto. A plurality of substrate SUBs may exist. An insulating layer may be formed between these substrate SUBs.

[0163] A first insulating layer 611 may be formed on the substrate SUB to protect various components of the display device from moisture and hydrogen that seep in from the outside of the substrate SUB. The first insulating layer 611 can improve the adhesion between the first insulating layer 611 and the multiple layers formed on the substrate SUB, and can prevent various impurities such as alkaline components from leaking from the substrate SUB. The first insulating layer 611 can prevent or delay the diffusion of moisture or oxygen that seeps into the substrate SUB. The first insulating layer 611 may be a buffer layer, etc., but the embodiments disclosed herein are not limited to this.

[0164] The first insulating layer 611 may be formed of silicon oxide (SiOx), silicon nitride (SiNx) or silicon oxynitride (SiNxOx), but the embodiments disclosed herein are not limited thereto.

[0165] The second barrier layer 641 may be formed on the first insulating layer 611. The second barrier layer 641 can block light, thereby preventing damage to the semiconductor layer of the second thin-film transistor 640. In addition, the second barrier layer 641 can also minimize damage to the thin-film transistor during the formation of holes in the display device.

[0166] The second barrier layer 641 may be formed as a single layer or multiple layers of any one or alloy of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni) and tungsten (W), but the embodiments disclosed herein are not limited thereto.

[0167] A second insulating layer 613 may be formed on the second barrier layer 641. The second insulating layer 613 may be made of the same material as the first insulating layer 611, but the embodiments disclosed herein are not limited thereto. The second insulating layer 613 may be formed over the first region 300 and the second region 400.

[0168] The second semiconductor layer 643 may be formed on the second insulating layer 613. The second semiconductor layer 643 may be made of amorphous silicon, or of polycrystalline silicon, such as zinc oxide (ZnO), indium-gallium-zinc oxide (IGZO), and indium-tin oxide (ITO), which have superior mobility compared to amorphous silicon to achieve low power consumption, or of oxide semiconductors such as ZnO, IGZO, and ITO, but the embodiments disclosed herein are not limited thereto. When the second semiconductor layer 643 is made of oxide semiconductor, it is highly effective at blocking leakage current of thin-film transistors, thus minimizing the variation in sub-pixel brightness during low-speed driving.

[0169] The third insulating layer 615 may be formed on the second semiconductor layer 643. The third insulating layer 615 may be made of the same material as the first insulating layer 611 and / or the second insulating layer 613, but the embodiments disclosed herein are not limited thereto. The third insulating layer 615 may be a gate insulating layer, but the embodiments disclosed herein are not limited thereto.

[0170] The second gate electrode 645 may be formed on the third insulating layer 615. The second gate electrode 645 may be formed of the same material as the second barrier layer 641, but the embodiments disclosed herein are not limited thereto.

[0171] The first thin-film transistor 630 may be disposed on the substrate SUB. The first thin-film transistor 630 may be configured to be spaced apart from the second thin-film transistor 640.

[0172] The first thin-film transistor 630 may include a first barrier layer 631. The first barrier layer 631 may be formed on the same layer as the second gate electrode 645. The first barrier layer 631 may have the same effect as the second barrier layer 641 and be made of the same material, but the embodiments disclosed herein are not limited thereto.

[0173] The fourth insulating layer 617 may be formed on the first barrier layer 631.

[0174] The fourth insulating layer 617 may be made of the same material as at least one of the first insulating layer 611, the second insulating layer 613 and the third insulating layer 615, but is not limited thereto.

[0175] The first semiconductor layer 633 may be formed on the fourth insulating layer 617.

[0176] The first semiconductor layer 633 may be formed of an oxide semiconductor such as ZnO, IGZO and ITO, but the embodiments disclosed herein are not limited thereto. The first semiconductor layer 633 may be formed as a single layer of oxide semiconductor or multiple layers of oxide semiconductor, but is not limited thereto.

[0177] The fifth insulating layer 619 may be formed on the first semiconductor layer 633. The fifth insulating layer 619 may be made of the same material as at least one of the first insulating layer 611, the second insulating layer 613, the third insulating layer 615, and the fourth insulating layer 617, but is not limited thereto. The fifth insulating layer 619 may be a gate insulating layer, but the embodiments disclosed herein are not limited thereto.

[0178] The first gate electrode 635 may be formed on the fifth insulating layer 619.

[0179] The first gate electrode 635 may be made of the same material as at least one of the first barrier layer 631, the second barrier layer 641 and the second gate electrode 645, but the embodiments disclosed herein are not limited thereto.

[0180] The sixth insulating layer 621 may be formed on the first gate electrode 635.

[0181] The sixth insulating layer 621 may be made of the same material as at least one of the first insulating layer 611, the second insulating layer 613, the third insulating layer 615, the fourth insulating layer 617 and the fifth insulating layer 619, but the embodiments disclosed herein are not limited thereto.

[0182] On the sixth insulating layer 621, a first source electrode 636 and a first drain electrode 637 contained in the first thin-film transistor 630, and a second source electrode 646 and a second drain electrode 647 contained in the second thin-film transistor 640 can be formed. For example, the first source electrode 636 and the first drain electrode 637 can be formed on the same layer as the second source electrode 646 and the second drain electrode 647.

[0183] The first source electrode 636, the first drain electrode 637, the second source electrode 646, and the second drain electrode 647 can be made of any one or an alloy of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), in a single layer or multiple layers, but this disclosure is not limited thereto. For example, the first source electrode 636 and the first drain electrode 637 can be formed as a titanium / aluminum / titanium trilayer, but the embodiments disclosed herein are not limited thereto.

[0184] The first source electrode 636 and the first drain electrode 637 can be electrically connected to the first semiconductor layer 633 through the first contact hole CH1 formed in the fifth insulating layer 619 and the sixth insulating layer 621.

[0185] The first protective layer 650 may be formed on the first source electrode 636, the first drain electrode 637, the second source electrode 646 and the second drain electrode 647.

[0186] The first protective layer 650 may be formed of at least one of organic insulating materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin and polyimide resin, but the embodiments disclosed herein are not limited thereto.

[0187] For example, the first protective layer 650 may be a first planarization layer, but the embodiments disclosed herein are not limited thereto.

[0188] The second protective layer 660 may be formed on the first protective layer 650. The second protective layer 660 may be made of the same material as the first protective layer 650, but the embodiments disclosed herein are not limited thereto.

[0189] For example, the second protective layer 660 may be a second planarization layer, but the embodiments disclosed herein are not limited thereto.

[0190] The first connecting electrode 670 may be formed between the first protective layer 650 and the second protective layer 660.

[0191] The second connecting electrode 671 can be electrically connected to the second thin-film transistor 640 and the light-emitting component 680. The second connecting electrode 671 can be electrically connected to the second thin-film transistor 640 through the third contact hole CH3 formed in the first protective layer 650. The second connecting electrode 671 can be electrically connected to the light-emitting component 680 through the fourth contact hole CH4 formed in the second protective layer 660.

[0192] The second connecting electrode 671 may be formed between the first protective layer 650 and the second protective layer 660.

[0193] The first connecting electrode 670 can be electrically connected to the first thin-film transistor 630 through the second contact hole CH2 formed in the first protective layer 650.

[0194] The first connecting electrode 670 and the second connecting electrode 671 may be formed of the same material as the first source electrode 636, the first drain electrode 637, the second source electrode 646 and the second drain electrode 647, but the embodiments disclosed herein are not limited thereto.

[0195] The first connecting electrode 670 and the second connecting electrode 671 can be connecting electrodes.

[0196] A light-emitting component 680, which includes a first electrode 681, a light-emitting layer 682 and a second electrode 683, may be formed on the second protective layer 660.

[0197] The first electrode 681 can be electrically connected to the second thin-film transistor 640 through the fourth contact hole CH4 formed in the second protective layer 660.

[0198] The first electrode 681 can provide holes to the light-emitting layer 682 and can be made of a conductive material with a high work function.

[0199] The first electrode 681 may be formed of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), their alloys and oxides such as ITO (indium tin oxide), but the embodiments disclosed herein are not limited thereto.

[0200] The first electrode 681 may be an anode electrode, but the embodiments disclosed herein are not limited thereto.

[0201] A light-emitting layer 682 may be formed on the first electrode 681. The light-emitting layer 682 may be made of an organic material and is used to emit light of a specific color. The light-emitting layer 682 may be configured as at least one of a red light-emitting layer, a green light-emitting layer, a blue light-emitting layer, and / or a white light-emitting layer.

[0202] The second electrode 683 may be formed on the light-emitting layer 682. The second electrode 683 may be made of at least one of oxides such as ITO (indium tin oxide) and IZO (indium zinc oxide), silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr) and their alloys, but the embodiments disclosed herein are not limited thereto.

[0203] The second electrode 683 may be a cathode electrode, but the embodiments disclosed herein are not limited thereto.

[0204] A dam 690 may be formed on the second protective layer 660. The dam 690 may be formed in areas other than the light-emitting area. The dam 690 may be made of inorganic insulating materials such as silicon nitride (SiNx) and silicon oxide (SiOx) or may be made of organic insulating materials similar to the first protective layer 650 and the second protective layer 660, but the embodiments disclosed herein are not limited thereto.

[0205] The first region 300 may include a first light-emitting region 310 and a first transmission region 330.

[0206] The first light-emitting region 310 may include a light-emitting component 680. Since the first light-emitting region 310 includes a light-emitting component 680, the first region 300 can emit light like the second region 400.

[0207] The first luminescent region 310 and the first transmissive region 330 can be formed through the area surrounded by the embankment 690. For example, the first luminescent region 310 and the first transmissive region 330 can be formed through a hole.

[0208] The area enclosed by the embankment 690 may be circular or elliptical, but the present disclosed embodiment is not limited to this.

[0209] The first region 300 may include a first signal line 700. The first signal line 700 may be made of the same material as the first semiconductor layer 633.

[0210] For example, the first signal line 700 may contain ITO (indium tin oxide) or IGZO (indium gallium zinc oxide) of the same material as the first semiconductor layer 633, but the embodiments disclosed herein are not limited thereto.

[0211] Since the first signal line 700 contains an oxide with high transmittance, such as ITO (indium tin oxide) or IGZO (indium gallium zinc oxide), the first region 300 can have higher transmittance.

[0212] The first signal line 700 may be formed in the same layer as the first semiconductor layer 633.

[0213] Since the first signal line 700 and the first semiconductor layer 633 are formed from the same material and are the same layer, the display device formed through the embodiments disclosed herein can be formed through an efficient process.

[0214] The first signal line 700 may include a first layer line 710 disposed in the first layer and a second layer line 720 disposed in the second layer. For example, the first signal line 700 may be formed as multiple layers (e.g., double layers), but the embodiments disclosed herein are not limited thereto. The first signal line 700 may be formed as a single layer or may be formed as multiple layers.

[0215] The first line 730 can be formed on the first signal line 700.

[0216] The first line 730 can be electrically connected to the first signal line 700 through the fifth contact hole CH5 formed in the fifth insulating layer 619, the sixth insulating layer 621, and the first protective layer 650. The first signal line 730 can be electrically connected to the signal line 10 shown in FIG. 5. The second signal line can be disposed in the second region 400. For example, the first line 730 can be electrically connected to the first signal line 700 in the first region 300 and the second signal line in the second region 400.

[0217] Figure 10 is an enlarged schematic diagram of region D shown in Figure 9 in a display panel according to an embodiment of the present disclosure.

[0218] Referring to Figures 9 and 10, a first signal line 700 may be formed in a first region 300. In the following text, components substantially the same as those in Figure 9 will be given the same reference numerals, repeated descriptions will be omitted, and components different from those in Figure 9 will be described.

[0219] The first signal line 700 may be formed on the same layer as the first semiconductor layer 633 contained in the first thin-film transistor 630.

[0220] The first signal line 700 may include a first layer line 710 and a second layer line 720 on the first layer line 710. The first layer line 710 may be configured to overlap with the second layer line 720.

[0221] The first layer line 710 may include a first side surface 710s and a third side surface 703s opposite to and facing the first side surface 710s. The second layer line 720 may include a second side surface 720s. The second surface 705 is located between the first side surface 710s and the third side surface 703s. The second side surface 720s of the second layer line 720 may cover the first side surface 710s of the first layer line 710. For example, the first signal line 700 may have a clad structure. For example, the second layer line 720 may cover the first layer line 710. For example, the second layer line 720 may completely cover the first side surface 710s, the second surface 705, and the third side surface 703s of the first layer line 710.

[0222] The stacking direction (e.g., horizontal direction) of the first side surface 710s of the first layer line 710 and the second side surface 720s of the second layer line 720 may be perpendicular to the stacking direction (e.g., vertical direction) of the first layer line 710 disposed in the first layer and the second layer line 720 disposed in the second layer.

[0223] For example, the second layer line 720 may include an extension that extends in a direction opposite to the stacking direction of the first layer line 710 and the second layer line 720. This extension may overlap with the first side surface 710s.

[0224] The first signal line 700 may contain an oxide semiconductor.

[0225] The first signal line 700 may comprise a transparent conductive oxide. For example, the transparent conductive oxide may comprise indium-tin oxide (ITO), indium-gallium-zinc oxide (IGZO), indium-zinc oxide (IZO), zinc oxide (ZnO), aluminum-doped zinc oxide (AZO), or gallium-doped zinc oxide (GZO), but the embodiments disclosed herein are not limited thereto. The transparent conductive oxide may be an oxide semiconductor material. The oxide semiconductor material may comprise a transparent oxide semiconductor material.

[0226] Each of the first layer line 710 and the second layer line 720 contained in the first signal line 700 may contain a transparent conductive oxide.

[0227] The transparent conductive oxides of the first layer line 710 and the second layer line 720 contained in the first signal line 700 can be the same.

[0228] For example, the transparent conductive oxides of the first layer line 710 and the second layer line 720 can be different from each other. For example, the first layer line 710 can contain a first transparent conductive oxide, and the second layer line 720 can contain a second transparent conductive oxide that is different from the first transparent conductive oxide. For example, the first transparent conductive oxide can contain indium-tin oxide (ITO). The second transparent conductive oxide can contain indium-zinc oxide (IZO) or indium-gallium-zinc oxide (IGZO).

[0229] For example, the first layer line 710 and the second layer line 720 in the first signal line 700 may be made of different materials.

[0230] The first side surface 710s may be made of the same material as the first layer line 710, and the second side surface 720s may be made of the same material as the second layer line 720.

[0231] Since the first signal line 700 is formed of oxide semiconductor in the first region 300, the transmittance of the first region 300 can be improved.

[0232] For example, indium-tin oxide (ITO) may have higher transmittance characteristics than indium-gallium-zinc oxide (IGZO), while indium-gallium-zinc oxide (IGZO) may have lower resistivity characteristics compared to indium-tin oxide (ITO).

[0233] The first line 730 may be formed on the first signal line 700. The first signal line 700 may be electrically connected to the first signal line 730 through the fifth contact hole CH5.

[0234] The first line 730 can be electrically connected to the second layer line 720 of the first signal line 700, the second layer line 720 containing IGZO. Since the first line 730 is electrically connected to the second layer line 720 which has lower resistance characteristics, this display device can effectively transmit electrical signals.

[0235] Referring to Figures 9 and 10, since the first region 300 includes a first signal line 700, and this first signal line 700 has a first layer line 710 comprising a first transparent conductive oxide such as ITO and a second layer line 720 comprising a second transparent conductive oxide such as IGZO, the first region 300 can simultaneously have high transmittance characteristics and low resistance characteristics. However, the embodiments disclosed herein are not limited thereto.

[0236] For example, the first signal line 700 can be configured as a single layer.

[0237] When the first signal line 700 is configured as a single layer, the first signal line 700 may contain a transparent conductive oxide. For example, the transparent conductive oxide may contain ITO, IZO, IGZO, AZO or GZO, but the embodiments disclosed herein are not limited thereto.

[0238] FIG11 is a plan view of a display panel according to an embodiment of the present disclosure.

[0239] Referring to Figures 9 and 11, the display device may include a first region 300 and a second region 400. The first region 300 may include a first red light-emitting region 310R, a first green light-emitting region 310G, and a first blue light-emitting region 310B. At least one of the first red light-emitting region 310R, the first green light-emitting region 310G, and the first blue light-emitting region 310B may be formed to overlap with the first signal line 700.

[0240] The first red emitting region 310R, the first green emitting region 310G, and the first blue emitting region 310B may each have different shapes, but the embodiments disclosed herein are not limited thereto. In the embodiments disclosed herein, the first red emitting region 310R, the first green emitting region 310G, and the first blue emitting region 310B are formed in a 1:2:1 ratio, but the embodiments disclosed herein are not limited thereto. The pixel structure in the first region 300, the shape of the first transmission region 330, etc., may be changed according to one or more optical devices 11 and 12 or design features shown in Figures 1 to 3.

[0241] The first signal line 700 may be configured as a dual interconnect, but the embodiments disclosed herein are not limited thereto.

[0242] The boundary portion of the first region 300 may include a first portion 730j. The first portion 730j may be a portion electrically connected to the first signal line 700 and at least one signal line 10 shown in FIG5.

[0243] For example, the first part 730j may be a part that electrically connects the data line 20 and the first signal line 700 shown in FIG5.

[0244] Figure 12 is a cross-sectional schematic diagram of a display panel manufactured according to another embodiment of the present disclosure.

[0245] Hereinafter, in Figures 12 to 15, components that are substantially the same as those in Figures 9 to 11 will be given the same reference symbols, and their repeated descriptions will be omitted, so that the different components will be described in the main way.

[0246] Referring to Figure 12, the first region 300 may include the first signal line 700.

[0247] The second signal line 740 may be formed on the first signal line 700. The second line 740 may be electrically connected to the first signal line 700 through the sixth contact hole CH6.

[0248] The second line 740 may be made of the same material as the first source electrode 636, the first drain electrode 637, the second source electrode 646 and the second drain electrode 647 of the second line 740 and formed in the same layer.

[0249] Figure 13 is a plan view of a display panel according to another embodiment of the present disclosure.

[0250] Referring to Figures 12 and 13, the boundary portion of the first region 300 may include a second portion 740j. The second portion 740j may be a portion electrically connected to the first signal line 700 and at least one of the signal lines 10 shown in Figure 5.

[0251] For example, the second part 740j may be the part that electrically connects the gate line 30 and the first signal line 700 shown in FIG5.

[0252] Figure 14 is a cross-sectional schematic diagram of a display panel according to another embodiment of the present disclosure.

[0253] Referring to Figure 14, the first region 300 may include the third line 750 and the fourth line 760.

[0254] The third line 750 can be electrically connected to the first signal line 700 and signal line 10 shown in FIG5 through the seventh contact hole CH7. The third line 750 can be made of the same material and formed in the same layer as the first source electrode 636, the first drain electrode 637, the second source electrode 646 and the second drain electrode 647.

[0255] The fourth line 760 can be electrically connected to the first signal line 700 and the signal line 10 shown in Figure 5 through the eighth contact hole CH8. The fourth line 760 can be made of the same material and formed in the same layer as the first connecting electrode 670 or the second connecting electrode 671 shown in Figures 9 and 14.

[0256] The third connecting electrode 770 may be formed above the second thin-film transistor 640.

[0257] The third connecting electrode 770 can be electrically connected to the first signal line 700 and the second thin-film transistor 640.

[0258] The third connection electrode 770 can be connected to the first electrode 681. Therefore, the first signal line 700 can be connected to the first electrode 681.

[0259] The third connecting electrode 770 may be made of the same material as the first connecting electrode 670 and formed in the same layer. The third connecting electrode 770 may be formed on the first region 300 and the second region 400.

[0260] Referring to Figure 14, the first signal line 700 may include a third line 750 and a fourth line 760. The third line 750 and the fourth line 760 may be formed on different layers.

[0261] Figure 15 is a plan view of a display panel according to another embodiment of the present disclosure.

[0262] Referring to Figures 14 and 15, the first region 300 may include a first signal line 700, a first red emitting region 310R, a first green emitting region 310G, and a first blue emitting region 310B. The first signal line 700 may form a single interconnect. The first signal line 700 may overlap with at least one of the first red emitting region 310R, the first green emitting region 310G, and the first blue emitting region 310B.

[0263] The first signal line 700 may include a first extension line 700e. The first signal line 700 may extend along a third direction. The first extension line 700e may extend from the first signal line 700 and may be formed in a fourth direction different from the third direction. The first extension line 700e may be formed to overlap with at least one of the first red emitting region 310R, the first green emitting region 310G, and the first blue emitting region 310B. The first extension line 700e shown in FIG15 overlaps with the first green emitting region 310G, but the embodiments disclosed herein are not limited thereto.

[0264] For example, at least one of the first signal lines 700 may be connected to a plurality of sub-pixels contained in the first light-emitting region 310.

[0265] The first signal line 700 may contain ITO (indium tin oxide), but the embodiments disclosed herein are not limited thereto.

[0266] The embodiments disclosed above are briefly described below.

[0267] A display device according to an embodiment of the present disclosure may include: a substrate, a display area including a display image; a first thin-film transistor disposed on the substrate and including a first semiconductor layer; and signal lines disposed on the substrate, wherein the display area includes a first region including a first transmissive region and a second region outside the first region, wherein the signal lines include a first signal line disposed in the first region and a second signal line disposed in the second region, wherein a portion of the first signal line is disposed in the same layer as the first semiconductor layer, and wherein the first signal line includes an oxide semiconductor material.

[0268] According to at least one embodiment of the present disclosure, the first signal line may include a first layer of lines and a second layer of lines. The first layer of lines and the second layer of lines may be electrically connected to each other. The first layer of lines and the second layer of lines may contain different materials.

[0269] According to at least one embodiment of the present disclosure, the second layer line can completely cover the first layer line. The second layer line can be placed on top of and to the side of the first layer line.

[0270] According to at least one embodiment of the present disclosure, the first layer line may include a first side surface, and the second layer line may include a second side surface. The second side surface of the second layer line may cover the first side surface of the first layer line.

[0271] According to at least one embodiment of the present disclosure, the first layer of lines may comprise a first transparent conductive oxide. The second layer of lines may comprise a second transparent conductive oxide, which is different from the first transparent conductive oxide.

[0272] According to at least one embodiment of the present disclosure, the first signal line may be configured as a single layer.

[0273] According to at least one embodiment of the present disclosure, the first signal line may comprise a transparent conductive oxide.

[0274] According to at least one embodiment of the present disclosure, the display device may further include a first protective layer covering a first thin-film transistor; a second protective layer located on the first protective layer; and a connection electrode located between the first protective layer and the second protective layer. The display device may further include a first line located on the same layer as the connection electrode and disposed in a first region, and the first signal line may be connected to the first line through a contact hole.

[0275] According to at least one embodiment of the present disclosure, the first line may be electrically connected to the data line.

[0276] According to at least one embodiment of the present disclosure, the first thin-film transistor may further include a first source electrode and a first drain electrode located on a first semiconductor layer, and the display device may further include a second line located on the same layer as the first source electrode and the first drain electrode and disposed in a first region. The first signal line may be connected to the second line through a contact hole.

[0277] According to at least one embodiment of the present disclosure, the second line may be electrically connected to the gate line.

[0278] According to at least one embodiment of the present disclosure, the display device may further include a second thin-film transistor disposed spaced apart from the first thin-film transistor, and include a second semiconductor layer. The first semiconductor layer and the second semiconductor layer may be made of different materials.

[0279] According to at least one embodiment of the present disclosure, the display device may further include a first electrode above a signal line; a light-emitting layer on the first electrode; and a second electrode on the light-emitting layer. The second electrode may include a hole in the first transmission region.

[0280] According to at least one embodiment of the present disclosure, the first region may include a first light-emitting region, and the second region may include a second light-emitting region. The first light-emitting region and the second light-emitting region may have different pixel structures.

[0281] According to at least one embodiment of the present disclosure, the display device may further include a third region outside the first region. The third region may include a third light-emitting region, and the second light-emitting region and the third light-emitting region may have different pixel structures.

[0282] According to at least one embodiment of the present disclosure, the first signal line may be connected to the first electrode.

[0283] According to at least one embodiment of the present disclosure, the display device may further include a plurality of sub-pixels in a first region, and at least one of the first signal lines may be connected to these sub-pixels.

[0284] According to at least one embodiment of the present disclosure, the display device may further include an optical device located below the substrate and overlapping at least a portion of the first region. The optical device may perform a selected operation based on the received light transmitted through the first region.

[0285] For example, the light received through the first region for the optical device to perform the selected operation can be visible light, infrared light, or ultraviolet light. For example, the light can be an electromagnetic wave with a wavelength band different from visible light, infrared light, and ultraviolet light. For example, the optical device can include at least one of an image sensor (e.g., a camera), a proximity sensor, and an illumination sensor, wherein the image sensor can perform image sensing processing based on the light received through the first region, the proximity sensor is used to detect surrounding objects or human bodies, and the illumination sensor is used to estimate ambient brightness (e.g., illuminance).

[0286] According to at least one embodiment of the present disclosure, the first signal line may contain a transparent conductive oxide. The second signal line may not contain a transparent conductive oxide.

[0287] According to at least one embodiment of the present disclosure, the first signal line can be configured as multiple layers. The second signal line can be configured as a single layer.

[0288] The foregoing description is intended to enable those skilled in the art to make and use the technical concepts disclosed herein, and is provided in the context of a particular application and its requirements. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of this disclosure. The foregoing description and figures provide examples of the technical concepts disclosed herein and are for reference only. That is, the disclosed embodiments are intended to illustrate the scope of the technical concepts disclosed herein.

[0289] The foregoing embodiments can be combined to provide more embodiments. All U.S. patents, U.S. patent applications, U.S. patent applications, foreign patents, foreign patent applications and non-patent publications mentioned in this specification and / or the filing forms are incorporated herein by reference in their entirety. Modifications may be made to various aspects of the embodiments of the invention as necessary to incorporate concepts from various patents, applications and publications to provide more embodiments.

[0290] Based on the detailed description above, the above and other modifications can be made to the embodiments. Generally, the terminology used in the following claims should not be construed as limiting the claims to the specific embodiments disclosed in the specification and the claims, but should be construed as encompassing all possible embodiments and the full scope of equivalents enjoyed by these claims. Therefore, the claims are not limited to the disclosures. [Simplified Explanation of the Diagram]

[0016] FIG1 is a schematic diagram illustrating a display device according to an embodiment of the present disclosure.

[0017] Figure 2 is a schematic diagram illustrating a display device according to another embodiment of the present disclosure.

[0018] Figure 3 is a schematic diagram illustrating a display device according to yet another embodiment of the present disclosure.

[0019] Figure 4 is a schematic diagram of the system configuration of a display device according to an embodiment of the present disclosure.

[0020] Figure 5 is a schematic diagram showing signal lines disposed in a display panel according to an embodiment of the present disclosure.

[0021] Figure 6 is a plan view of region A shown in Figure 2 in a display panel according to an embodiment of the present disclosure.

[0022] FIG7 is a plan view of region B shown in FIG2 within a display panel according to an embodiment of the present disclosure.

[0023] FIG8 is a plan view of region C shown in FIG2 within a display panel according to an embodiment of the present disclosure.

[0024] Figure 9 is a cross-sectional schematic diagram of a display panel according to an embodiment of the present disclosure.

[0025] Figure 10 is an enlarged schematic diagram of region D shown in Figure 9 in a display panel according to an embodiment of the present disclosure.

[0026] FIG11 is a plan view of a display panel according to an embodiment of the present disclosure.

[0027] Figure 12 is a cross-sectional schematic diagram of a display panel according to an embodiment of the present disclosure.

[0028] Figure 13 is a plan view of a display panel according to an embodiment of the present disclosure.

[0029] Figure 14 is a cross-sectional schematic diagram of a display panel according to another embodiment of the present disclosure.

[0030] Figure 15 is a plan view of a display panel according to another embodiment of the present disclosure.

Claims

1. A display device comprising: a substrate including a display area for displaying an image, the display area including a first area and a second area outside the first area, the first area including a first transmissive area; a first thin-film transistor disposed on the substrate, the first thin-film transistor including a first semiconductor layer; and a transparent signal line disposed on the substrate, the transparent signal line overlapping the first transmissive area and electrically connected to the first semiconductor layer, wherein the transparent signal line includes a first layer line disposed in a first layer and a second layer line disposed in a second layer, the first layer line and the second layer line are electrically connected to each other, and comprise different materials.

2. The display device as claimed in claim 1, wherein the first region further comprises a plurality of light-emitting regions, at least two of which share the transparent signal line.

3. The display device as claimed in claim 2, wherein the transparent signal line comprises a main line and an extension line, wherein the main line and the extension line are formed to extend in different directions.

4. The display device as claimed in claim 2, wherein at least two of the light-emitting areas are green light-emitting areas.

5. The display device as claimed in claim 1 further includes two insulating layers disposed on the substrate; wherein the first semiconductor layer is disposed on one of the two insulating layers, the first thin-film transistor further includes a first connecting electrode that contacts the first semiconductor layer and extends through the two insulating layers, and the transparent signal line is disposed between the two insulating layers.

6. The display device as claimed in claim 1 further includes a second thin-film transistor, wherein the first thin-film transistor further includes a first gate electrode and the second thin-film transistor includes a second gate electrode, and the transparent signal line is disposed between the layer on which the first gate electrode is disposed and the layer on which the second gate electrode is disposed.

7. The display device as claimed in claim 1, wherein the first transmissive region has a variety of shapes.

8. The display device as claimed in claim 1 further includes a shoreline disposed on the substrate; wherein the first transmissive region is formed through a region surrounded by the shoreline.

9. The display device as claimed in claim 8 further includes a common electrode disposed on the substrate, wherein the first transmissive region corresponds to a location of a plurality of holes formed in the common electrode.

10. The display device as claimed in claim 1, wherein the first layer line includes a first side surface, a third side surface opposite to the first side surface, and a second surface located between the first side surface and the third side surface, and wherein the second layer line completely covers the first side surface, the second surface and the third side surface of the first layer line.

11. The display device as claimed in claim 1, wherein the first layer line includes a first side surface, the second layer line includes a second side surface, and the second side surface of the second layer line covers the first side surface of the first layer line.

12. The display device as claimed in claim 1, wherein the first layer line comprises a first transparent conductive oxide, and the second layer line comprises a second transparent conductive oxide different from the first transparent conductive oxide.

13. The display device as described in claim 1, wherein the transparent signal line is configured as a single layer.

14. The display device as claimed in claim 13, wherein the transparent signal line comprises a transparent conductive oxide.

15. The display device as claimed in claim 1, further comprising: a first protective layer on the first thin-film transistor; a second protective layer on the first protective layer; a connecting electrode between the first protective layer and the second protective layer; and a first line configured to be located on the same layer as the connecting electrode and disposed in the first region, wherein the transparent signal line is electrically connected to the first line through a contact hole.

16. The display device as claimed in claim 15 further includes: a data line electrically connected to the first line.

17. The display device as claimed in claim 1, wherein the first thin-film transistor further includes a first source electrode and a first drain electrode located on the first semiconductor layer, the display device further includes a second line disposed on the same layer as the first source electrode and the first drain electrode and disposed in the first region, and the transparent signal line is electrically connected to the second line through a contact hole.

18. The display device as claimed in claim 1, wherein the first region includes a first light-emitting region, the second region includes a second light-emitting region, and the first light-emitting region and the second light-emitting region have different pixel structures.

19. The display device as claimed in claim 18 further comprises: a third region located outside the first region, wherein the third region includes a third light-emitting region, and wherein the first light-emitting region and the third light-emitting region have different pixel structures.

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