Piezoelectric elements, and sensors and actuators using them

TWI935006BActive Publication Date: 2026-08-11NITTO DENKO CORP
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Patent Information

Application Number
TW111103849
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2022-01-24
Filing Date
2022-01-28
Publication Date
2026-08-11
Estimated Expiration
2042-01-27

AI Technical Summary

Technical Problem

Piezoelectric elements suffer from leakage currents, which degrade their piezoelectric characteristics, particularly in applications requiring high sensitivity and miniaturization, such as touch screens and BAW filters.

Method used

Incorporating a leakage current suppression layer between the piezoelectric layer and electrodes, with a specific capacitance ratio to the piezoelectric layer, to suppress leakage currents and enhance piezoelectric performance.

Benefits of technology

The solution effectively minimizes leakage currents, improving piezoelectric characteristics and maintaining high sensitivity and miniaturization in piezoelectric elements.

✦ Generated by Eureka AI based on patent content.

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    Figure TWG2TB001904941_003
Patent Text Reader

Abstract

A piezoelectric element is provided that can suppress leakage current and improve piezoelectric characteristics. In the piezoelectric element, a piezoelectric body layer and a first electrode are sequentially stacked on a substrate, and a leakage current suppression layer is disposed between the first electrode and the piezoelectric body layer, or between the substrate and the piezoelectric body layer. The ratio of the capacitance per unit area of ​​the leakage current suppression layer to the capacitance per unit area of ​​the piezoelectric body layer is 1.20 or more and less than 60.00.
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Description

[Technical Field]

[0001] This invention relates to a piezoelectric element and a sensor and actuator using the same. [Previous Technology]

[0002] Piezoelectric elements, which utilize the piezoelectric effect of materials, have always been widely used. The piezoelectric effect refers to the phenomenon that a material undergoes polarization proportional to the pressure applied. Utilizing the piezoelectric effect, various sensors have been created, such as stress sensors, acceleration sensors, and AE (Acoustic Emission) sensors for detecting elastic waves.

[0003] In recent years, piezoelectric elements have been used in touchscreens of electronic devices such as smartphones, and as bulk acoustic wave (BAW) filters as high-frequency bandpass filters. When applied to pressure sensors such as touchscreens, high pressure responsiveness is required in order to detect finger operations with high sensitivity. When applied to BAW filters, good piezoelectric characteristics in the thickness direction are required in order to operate based on the vibration of the piezoelectric film along its thickness. Regardless of the application, miniaturization and low power consumption of the components are required.

[0004] A proposed structure exists in which a current-blocking layer is inserted between the upper and lower electrodes of a perovskite-type piezoelectric thin-film element to maintain the inter-electrode resistance at a predetermined value (for example, see Patent Document 1). <Prior Art Documents> <Patent Documents>

[0005] Patent Document 1: Japanese Patent Application Publication No. 2009-130182 [Summary of the Invention]

[0006] <The Problem the Invention Intends to Solve>

[0007] As a piezoelectric material used in sensors and actuators utilizing the piezoelectric effect, wurtzite-type crystals with a crystal orientation along the c-axis are used. Wurtzite-type crystals have a hexagonal crystal structure and include ZnO, AlN, and GaN. Among these, ZnO, a group II-VI compound, readily becomes an n-type semiconductor, easily generating small leakage currents. GaN or AlN, group III-V compounds, also exhibit semiconductor tendencies, thus raising concerns about the generation of small leakage currents. Small leakage currents can lead to a decrease in piezoelectric properties.

[0008] One aspect of the object of the present invention is to provide a piezoelectric element that can suppress leakage current and improve piezoelectric characteristics. <Means for solving the problem>

[0009] According to one aspect of the present invention, a piezoelectric layer and a first electrode are sequentially stacked on a substrate of a piezoelectric element, and a leakage current suppression layer is disposed between the first electrode and the piezoelectric layer, or between the substrate and the piezoelectric layer.

[0010] The ratio of the capacitance per unit area of ​​the leakage current suppression layer to the capacitance per unit area of ​​the piezoelectric layer is 1.20 or more and less than 60.00. <Effects of the Invention>

[0011] A piezoelectric element that can suppress leakage current and improve piezoelectric characteristics.

Implementation Method

[0013] In this embodiment, a leakage current suppression layer that satisfies a specified capacitance relationship is provided between the piezoelectric layer disposed on the substrate and the first electrode, or between the substrate and the piezoelectric layer, to suppress leakage current and improve piezoelectric characteristics. When piezoelectric characteristics are mentioned in this specification, they include both the voltage generated per unit applied stress (direct piezoelectric effect) and the mechanical displacement ratio per unit applied electric field (inverse piezoelectric effect). <Component Structure>

[0014] FIG1A is a schematic diagram of a piezoelectric element 10A as a first structural example of the embodiment. The piezoelectric element 10A has an electrode 12, a piezoelectric layer 13, and an electrode 16 sequentially stacked on its substrate 11, and a leakage current suppression layer 15 is provided between the piezoelectric layer 13 and the electrode 16. For simplicity, the electrode 16 can be referred to as the "first electrode" or the upper electrode, and the electrode 12 can be referred to as the "second electrode" or the lower electrode. As described later, the electrode 12 may also be omitted depending on the electrical characteristics of the substrate 11.

[0015] The substrate 11 is only required to stably support the stack of electrode 12, piezoelectric layer 13, leakage current suppression layer 15, and electrode 16, and its type is not limited. Plastic substrates, glass substrates, ceramic substrates, etc., can be used as the substrate 11. As a structural example, the substrate 11 can be a flexible substrate that imparts bendability to the piezoelectric element 10A. The thickness of the substrate 11 is 1 μm to 150 μm, preferably 10 to 100 μm, and more preferably 20 to 80 μm. If it is less than 1 μm, it is difficult to stably support the stack including electrode 12, piezoelectric layer 13, leakage current suppression layer 15, and electrode 16. Furthermore, the substrate 11 becomes prone to warping, and warping of the substrate 11 will affect the piezoelectric characteristics. When the thickness of the substrate 11 exceeds 150 μm, it is difficult to ensure that the piezoelectric element 10A as a whole has ideal bendability.

[0016] As a flexible substrate, materials such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polycarbonate (PC), acrylic resins, cyclic olefin polymers, polyimide (PI), and thin-film glass can be used. Among these materials, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polycarbonate (PC), acrylic resins, cyclic olefin polymers, and thin-film glass are colorless and transparent, and are particularly suitable for using piezoelectric element 10A in transmissive components such as touch screens. For cases where the piezoelectric element 10A does not require light transmittance, such as in health products like pulse meters and heart rate monitors, or in automotive pressure monitoring pads, translucent or non-transparent plastic materials can be used.

[0017] One or both of electrodes 12 and 16 can be transparent electrodes formed of a conductive material that is transparent to visible light. Depending on the application of the piezoelectric element 10A, the transparency of electrodes 12 and 16 is not essential, but when the piezoelectric element 10A is used in displays such as touch screens, it is required to be transparent to visible light. As a conductive material that is transparent to visible light, ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), IZTO (Indium Zinc Tin Oxide), IGZO (Indium Gallium Zinc Oxide), etc., can be used.

[0018] When light transmittance is not required, a metal electrode can be formed. When forming a metal electrode, a hexagonal metal material having the same crystal structure as wurtzite can be used. As a hexagonal metal, titanium (Ti), zirconium (Zr), hafnium (Hf), ruthenium (Ru), zinc (Zn), yttrium (Y), scandium (Sc), and combinations thereof can be used.

[0019] As the piezoelectric layer 13, wurtzite-type crystals, perovskite-type crystals, etc., can be used. In this embodiment, wurtzite-type crystals, which have a simpler crystal structure than perovskite-type crystals, are used as the main component of the piezoelectric layer 13. A predetermined amount of impurity elements may also be added as a secondary component to the piezoelectric layer 13.

[0020] As a wurtzite-type piezoelectric material, materials crystallized through a low-temperature process below 200°C are preferred. For example, zinc oxide (ZnO), zinc sulfide (ZnS), zinc selenide (ZnSe), zinc telluride (ZnTe), aluminum nitride (AlN), gallium nitride (GaN), cadmium selenide (CdSe), cadmium telluride (CdTe), and silicon carbide (SiC) can be used. Two or more of the above materials can also be used in combination. When two or more materials are combined, the compounds can be stacked, or multiple targets can be used to form a single layer.

[0021] When adding secondary components to piezoelectric materials, it is preferable to use elements that do not exhibit conductivity when added to the main component and do not impair piezoelectric properties. As an example, magnesium (Mg), silicon (Si), calcium (Ca), vanadium (V), titanium (Ti), zirconium (Zr), strontium (Sr), lithium (Li), or mixtures thereof can be used.

[0022] The thickness of the piezoelectric layer 13 is 50 nm to 5000 nm (5 μm), preferably 50 nm to 3000 nm (3 μm), more preferably 50 nm to 2000 nm (2 μm), more preferably 100 nm to 1000 nm (1 μm), and even more preferably 150 nm to 500 nm. When the thickness of the piezoelectric layer 14 exceeds 5000 nm, cracking is likely to occur. Cracking can create leakage paths between electrodes. When the thickness of the piezoelectric layer 14 is less than 50 nm, it is difficult to exert sufficient piezoelectric properties in the film thickness direction.

[0023] The wurtzite-type crystalline piezoelectric layer 13 exhibits good crystal orientation along the c-axis, meaning it has good piezoelectric properties in the thickness direction. The crystal orientation along the c-axis can be evaluated by measuring the full width at half maximum (FWHM) of the peak value obtained from the rocking curve obtained by X-ray diffraction of a specified crystal lattice plane. The FWHM of the piezoelectric layer 14 is preferably 5° or less, and when used in sensors and actuators, it is preferably 4° or less.

[0024] The leakage current suppression layer 15 is an inorganic insulating layer, preferably a non-crystalline inorganic insulating layer. As the inorganic insulating layer, Al2O3, SiO2, Si3N4, ZrO2, TiO2, AlN, Ta2O5, or a combination of two or more of the above materials can be used. The above film can be formed by dry methods such as sputtering and chemical vapor deposition (CVD), or by wet methods such as sol-gel methods.

[0025] The leakage current suppression layer 15 is an amorphous inorganic insulating layer, but this does not mean that the inorganic insulating layer as a whole is completely amorphous. The proportion of amorphous (non-crystalline) components in the leakage current suppression layer 15 is preferably 90% or more, and more preferably 95% or more.

[0026] The material and / or film thickness of the leakage current suppression layer 15 are selected such that the ratio (CLS / CPIEZ) of the capacitance CLS per unit area of ​​the leakage current suppression layer 15 to the capacitance CPIEZ per unit area of ​​the piezoelectric layer 13 is 1.20 or more and less than 60.00. As described later, when the condition of 1.20 ≤ CLS / CPIEZ < 60.00 is met, the piezoelectric characteristics of the piezoelectric element 10A can be improved.

[0027] The capacitance CLS of the leakage current suppression layer 15 can be expressed as follows. CLS=(εrLS×ε0×S) / dLS(1) Here, ε0 is the vacuum dielectric constant, which is a constant that does not depend on the material. S is the area of ​​the leakage current suppression layer 15, and dLS is the film thickness of the leakage current suppression layer 15.

[0028] The capacitance CPIEZ of the piezoelectric layer 13 can be expressed as follows. CPIEZ=(εrPIEZ×ε0×S) / dPIEZ(2) Here, S is the area of ​​the piezoelectric layer 13, which is the same as the area S of the leakage current suppression layer 15 according to the structure of the piezoelectric element 10A. dPIEZ is the film thickness of the piezoelectric layer 13.

[0029] According to equations (1) and (2), the ratio of the capacitance CLS per unit area of ​​the leakage current suppression layer 15 to the capacitance CPIEZ per unit area of ​​the piezoelectric layer 13, CLS / CPIEZ, can be expressed as follows: CLS / CPIEZ=(εrLS×dPIEZ) / (εrPIEZ×dLS) (3) According to equation (3), the material and thickness of the piezoelectric layer 13 and the material and thickness of the leakage current suppression layer 15 are designed to meet the condition 1.20≦CLS / CPIEZ<60.00. Thus, small leakage currents can be suppressed and piezoelectric characteristics can be improved.

[0030] FIG1B is a schematic diagram of the piezoelectric element 10B according to the second structural example of the embodiment. In the piezoelectric element 10B, an electrode 12, a piezoelectric layer 13 and an electrode 16 are sequentially stacked on a substrate 11. A leakage current suppression layer 15 is provided between the substrate 11 and the piezoelectric layer 13, and more specifically between the electrode 12 and the piezoelectric layer 13.

[0031] In the piezoelectric element 10B, when the leakage current suppression layer 15 located below the piezoelectric layer 13 along the stacking direction is an amorphous insulating layer, the leakage current suppression layer 15 can function as a substrate alignment film for the piezoelectric layer 13. By distributing an amorphous insulating layer between the electrode 12 and the piezoelectric layer 13, the piezoelectric layer 13 can grow with good orientation, as it is almost unaffected by the crystallization state of the electrode 12.

[0032] In the configuration structure of Figure 1B, the capacitance relationship between the leakage current suppression layer 15 and the piezoelectric layer 13 is designed such that the ratio of the capacitance CLS per unit area of ​​the leakage current suppression layer 15 to the capacitance CPIEZ per unit area of ​​the piezoelectric layer 13, CLS / CPIEZ, is a value of 1.20 or higher and less than 60.00. This allows for the suppression of minute leakage currents in the piezoelectric element 10B, improving its piezoelectric characteristics.

[0033] FIG1C is a schematic diagram of a piezoelectric element 10C as a third structural example of the embodiment. In the piezoelectric element 10C, an electrode 12, a piezoelectric body layer 13 and an electrode 16 are sequentially stacked on a substrate 11. A leakage current suppression layer 15-1 is provided between the electrode 12 and the piezoelectric body layer 13, and a leakage current suppression layer 15-2 is provided between the electrode 16 and the piezoelectric body layer 13.

[0034] In the configuration structure of Figure 1C, the capacitance relationship between the leakage current suppression layers 15-1 and 15-2 and the piezoelectric layer 13 is also designed to satisfy 1.20 ≤ CLS / CPIEZ < 60.00. With leakage current suppression layers 15-1 and 15-2 provided, the capacitance CLS per unit area of ​​the two leakage current suppression layers can be expressed as follows: CLS = CLS1 × CLS2 / (CLS1 + CLS2)

[0035] Here, CLS1 is the capacitance per unit area of ​​one leakage current suppression layer 15-1, and CLS2 is the capacitance per unit area of ​​the other leakage current suppression layer 15-2.

[0036] When the leakage current suppression layer 15-1 is formed as an amorphous insulating layer, it can also function as a substrate alignment film for the piezoelectric layer 13. When the leakage current suppression layer 15-2 is formed as an amorphous insulating layer, it can also function as a substrate alignment film for the electrode 16. By providing the leakage current suppression layer 15-1 between the electrode 12 and the piezoelectric layer 13, and providing the leakage current suppression layer 15-2 between the electrode 16 and the piezoelectric layer 13 in the stacking direction, the formation of leakage paths can be suppressed on both the electrode 12 side of the lower layer and the electrode 16 side of the upper layer of the piezoelectric layer 13. Furthermore, the crystallinity of the piezoelectric layer 13 and the electrode 16 can be improved, further enhancing the piezoelectric characteristics.

[0037] FIG1D is a schematic diagram of the piezoelectric element 10D as the fourth structural example of the embodiment. The piezoelectric element 10D uses a conductive substrate 21. A piezoelectric layer 13 and an electrode 16 are sequentially stacked on the substrate 21, and a leakage current suppression layer 15 is provided between the electrode 16 and the piezoelectric layer 13. In this structure, the substrate 21 can function as a lower electrode. The substrate 21 can be a metal substrate, or a conductive transparent substrate such as ITO, IZO, IZTO, or IGZO. When a metal substrate 21 is used, metal films such as Al foil, Cu foil, Al-Ti alloy foil, Cu-Ti alloy foil, or stainless steel foil can be used. When the thickness of the metal film is relatively thin, the substrate 21 becomes a flexible substrate. A metal close-fitting film such as Ti or Ni can be inserted between the substrate 21 and the piezoelectric layer 13.

[0038] Similar to Figure 1A, by designing the material and thickness of the piezoelectric layer 13 and the leakage current suppression layer 15, the ratio of the capacitance CLS per unit area of ​​the leakage current suppression layer 15 to CLS / CPIEZ is made to be greater than 1.20 and less than 60.00. This suppresses minute leakage currents and improves piezoelectric characteristics.

[0039] FIG1E is a schematic diagram of the piezoelectric element 10E as the fifth structural example of the embodiment. The piezoelectric element 10E also uses a conductive substrate 21. A piezoelectric layer 13 and an electrode 16 are sequentially stacked on the substrate 21. A leakage current suppression layer 15 is provided between the substrate 21 and the piezoelectric layer 13.

[0040] Similar to FIG. 1D, the substrate 21 can be a metal substrate or a conductive transparent substrate such as ITO, IZO, IZTO, or IGZO. When a metal substrate 21 is used, metal films such as Al foil, Cu foil, Al-Ti alloy foil, Cu-Ti alloy foil, or stainless steel foil can be used. When the metal film is relatively thin, the substrate 21 becomes a flexible substrate. A metal bonding film such as Ti or Ni can be inserted between the substrate 21 and the leakage current suppression layer 15.

[0041] When the leakage current suppression layer 15 is formed as an amorphous insulating layer, the leakage current suppression layer 5 can function as a substrate alignment film for the piezoelectric layer 13. By disposing of an amorphous insulating layer between the substrate 21 and the piezoelectric layer 13, the piezoelectric layer 13 can grow with good orientation, almost unaffected by the crystallization state of the substrate 21.

[0042] By designing the material and thickness of the piezoelectric layer 13 and the leakage current suppression layer 15, the ratio of the capacitance CLS per unit area of ​​the leakage current suppression layer 15 to the capacitance CPIEZ per unit area of ​​the piezoelectric layer 13, CLS / CPIEZ, is made to be 1.20 or more and less than 60.00. This suppresses minute leakage currents and improves piezoelectric characteristics.

[0043] In the structure of Figure 1E, leakage paths can be suppressed between the substrate 21 and the electrode 16, and minute leakage currents can be suppressed. It can also improve the crystallinity of the piezoelectric layer 13, thereby improving the piezoelectric properties.

[0044] FIG1F is a schematic diagram of the piezoelectric element 10F as the sixth structural example of the embodiment. The piezoelectric element 10F also uses a conductive substrate 21. A piezoelectric layer 13 and an electrode 16 are sequentially stacked on the substrate 21. A leakage current suppression layer 15-1 is provided between the substrate 21 and the piezoelectric layer 13, and a leakage current suppression layer 15-2 is provided between the piezoelectric layer 13 and the electrode 16.

[0045] Similar to FIG. 1D, the substrate 21 can be a metal substrate or a conductive transparent substrate such as ITO, IZO, IZTO, or IGZO. When a metal substrate 21 is used, metal films such as Al foil, Cu foil, Al-Ti alloy foil, Cu-Ti alloy foil, and stainless steel foil can be used. When the thickness of the metal film is relatively thin, the substrate 21 becomes a flexible substrate. A metal close-fitting film such as Ti or Ni can be inserted between the substrate 21 and the leakage current suppression layer 15.

[0046] When the leakage current suppression layer 15-1 is formed as an amorphous insulating layer, it can function as a substrate alignment film for the piezoelectric layer 13. By disposing of an amorphous insulating layer between the substrate 21 and the piezoelectric layer 13, the piezoelectric layer 13 can be grown with good orientation, almost unaffected by the crystallization state of the substrate 21. When the leakage current suppression layer 15-2 is formed as an amorphous insulating layer, it can function as a substrate alignment film for the electrode 16.

[0047] The capacitance per unit area (CLS) of the two layers 15-1 and 5-12 in the structure of Figure 1F, as described above with reference to Figure 1C, is designed to be greater than 1.20 and less than 60.00. By providing the leakage current suppression layer 15-1 between the substrate 21 and the piezoelectric layer 13, and providing the leakage current suppression layer 15-2 between the piezoelectric layer 13 and the electrode 16, leakage paths can be suppressed on both sides of the piezoelectric layer 13, on the substrate 21 side and the electrode 16 side. Furthermore, the crystallinity of the piezoelectric layer 13 and the electrode 16 can be improved, thereby enhancing the piezoelectric characteristics. <Characteristic Evaluation>

[0048] As described above, the piezoelectric element 10 of the embodiment is designed such that the capacitance relationship between its leakage current suppression layer 15 and piezoelectric layer 13 satisfies a specified relationship. Hereinafter, the basis of the above-mentioned simplified capacitance system will be explained based on the results of measurement and evaluation of a plurality of actually manufactured samples.

[0049] Figure 2 shows the elements of the example samples and comparative sample samples. Except for Comparative Example 1, all samples have a leakage current suppression layer formed. The sample structure adopts the structure of Figure 1A, except for Comparative Example 1, a leakage current suppression layer 15 is provided between electrode 16 (first electrode) and piezoelectric layer 13. As described below, the characteristics of each sample are evaluated based on the piezoelectric characteristics of Comparative Example 1 without leakage current suppression layer 15. The common fixed conditions in all samples are as follows.

[0050] A PET film with a thickness of 50 μm is used as the substrate 11. An IZO film with a thickness of 100 nm is formed on the PET film as the second electrode 12 using a batch sputtering device. The film is formed in a mixed gas atmosphere of argon (Ar) and 1% oxygen (O2) with a film-forming power of DC 400 W and a film-forming pressure of 0.4 Pa.

[0051] A piezoelectric layer 13 of MgZnO was formed on the second electrode 12 using the same film-forming apparatus. Film formation was carried out in a mixed gas atmosphere of Ar gas and 13% O2, with a film-forming power of RF 500W, a film-forming pressure of 0.2Pa, and a film-forming atmosphere of 13% O2. The composition of Mg in the piezoelectric layer 13 was 12 wt.%. The relative permittivity εrPIEZ of the piezoelectric layer 13 was 9, and the FWHM obtained by X-ray diffraction rocking curve method on the MgZnO(002) surface was 4.6°. The above were the common conditions for the entire sample.

[0052] Next, by varying the presence, type, film thickness of the leakage current suppression layer 15 and the thickness of the piezoelectric layer 13, multiple samples were fabricated, and the ratio of the capacitance per unit area of ​​the leakage current suppression layer 15 to the capacitance per unit area of ​​the piezoelectric layer 13 (CLS / CPIEZ) was calculated. Furthermore, as a piezoelectric characteristic, the piezoelectric constant d33 [pC / N] of each sample was measured. d33 represents the value of the stretching mode in the polarization direction, which indicates the amount of polarization charge per unit pressure applied along the polarization direction. In the structure of the embodiment, the stretching mode is indicated in the film thickness direction, i.e., the c-axis direction.

[0053] The piezoelectric constant d33 is evaluated according to the following procedure. With the second electrode 12-bit on the bottom, the sample is placed on the stage, and a specified pressure is applied to the sample using an indenter. The charge generated by the polarization in the c-axis (film thickness) direction is measured. The value of d33 is obtained by dividing 1 N (the load difference) by the amount of charge generated when the applied load changes from 5 N to 6 N.

[0054] In Examples 1-4, 6, 9, and 10, Al2O3 was formed as the leakage current suppression layer 15. The Al2O3 film was formed using a batch solder sputtering apparatus under conditions of 300W power RF and 0.3Pa pressure in a mixed gas atmosphere of Ar gas and 11.5% O2. The relative permittivity of Al2O3 was 9. First, Examples 1-4, 6, 9, and 10, in which an Al2O3 film was provided as the leakage current suppression layer 15, will be described.

[0055] The thickness of the piezoelectric layer 13 in Example 1 is 200 nm, and the thickness of the leakage current suppression layer 15 is 25 nm. The piezoelectric constant d33 of this sample is 19.8 pC / N, and the capacitance ratio CLS / CPIEZ is 8.000.

[0056] The thickness of the piezoelectric layer 13 in Example 2 is 200 nm, and the thickness of the leakage current suppression layer 15 is 50 nm. The piezoelectric constant d33 of this sample is 14.7 pC / N, and the capacitance ratio CLS / CPIEZ is 4.000.

[0057] The thickness of the piezoelectric layer 13 in Example 3 is 200 nm, and the thickness of the leakage current suppression layer 15 is 75 nm. The piezoelectric constant d33 of this sample is 13.4 pC / N, and the capacitance ratio CLS / CPIEZ is 2.667.

[0058] In Example 4, the thickness of the piezoelectric layer 13 is 200 nm, and the thickness of the leakage current suppression layer 15 is 125 nm. The piezoelectric constant d33 of this sample is 12.1 pC / N, and the capacitance ratio CLS / CPIEZ is 1.600. In Examples 1-4, the ratio of the thickness of the leakage current suppression layer 15 to the thickness of the piezoelectric layer 13 is reflected in the capacitance ratio CLS / CPIEZ. When the film thickness ratio is relatively small, there is a tendency for the capacitance ratio and the piezoelectric constant d33 to increase.

[0059] The thickness of the piezoelectric layer 13 in Example 6 is 500 nm, and the thickness of the leakage current suppression layer 15 is 100 nm. The piezoelectric constant d33 of this sample is 15.1 pC / N, and the capacitance ratio CLS / CPIEZ is 5.000.

[0060] The thickness of the piezoelectric layer 13 in Example 9 is 300 nm, and the thickness of the leakage current suppression layer 15 is 10 nm. The piezoelectric constant d33 of this sample is 20.9 pC / N, and the capacitance ratio CLS / CPIEZ is 30.000.

[0061] The thickness of the piezoelectric layer 13 in Example 10 is 500 nm, and the thickness of the leakage current suppression layer 15 is 10 nm. The piezoelectric constant d33 of this sample is 25.0 pC / N, and the capacitance ratio CLS / CPIEZ is 50.000.

[0062] Compared to Examples 1-4, Examples 9 and 10 show an increase in piezoelectric constant d33 by increasing the thickness of the piezoelectric layer 13. On the other hand, in Example 6, the thickness of the piezoelectric layer 13 is the same as in Example 10, while the thickness of the leakage current suppression layer 15 is 10 times thicker than that in Example 10. Due to the different film thickness ratio of the leakage current suppression layer 15 to the piezoelectric layer 13, the piezoelectric characteristics differ, but Examples 6, 9, and 10 all show good piezoelectric constant d33 values.

[0063] Next, the characteristics of the SiO2 film used as the leakage current suppression layer 15 will be explained. SiO2 films were used in Examples 5 and 8. In Example 5, a piezoelectric layer 13 with a thickness of 200 nm was formed, and a SiO2 film with a thickness of 15 nm was formed as the leakage current suppression layer 15. Using the same batch solder sputtering apparatus as used for Al2O3 film formation, the SiO2 film was formed in a mixed gas atmosphere of Ar gas and 5.4% O2 under conditions of RF 300 W power and 0.3 Pa pressure. The relative permittivity of SiO2 was 4. The piezoelectric constant d33 of the sample in Example 5 was 15.3 pC / N, and the capacitance ratio CLS / CPIEZ was 5.926.

[0064] In Example 8, a piezoelectric layer 13 with a thickness of 500 nm was formed as a leakage current suppression layer 15, and a SiO2 film with a thickness of 50 nm was formed. Using the same batch solder sputtering apparatus as used for Al2O3 film formation, the SiO2 film was formed in a mixed gas atmosphere of Ar gas and 5.4% O2 under conditions of RF 300 W power and 0.3 Pa pressure. The relative permittivity of SiO2 was 4. The piezoelectric constant d33 of the sample in Example 8 was 14.8 pC / N, and the capacitance ratio CLS / CPIEZ was 4.444. The measurement results of Example 5 and Example 8 showed only a slight difference, which can be presumably due to a slight difference in the film thickness ratio between the piezoelectric layer 13 and the leakage current suppression layer 15. However, both Examples 5 and 8 had good piezoelectric constant d33 values, indicating that the SiO2 film effectively functioned as a leakage current suppression layer.

[0065] Next, the characteristics of the Si3N4 film used as the leakage current suppression layer 15 will be explained. A Si3N4 film was used in Example 7. In Example 7, a piezoelectric layer 13 with a thickness of 500 nm was formed, and a Si3N4 film with a thickness of 50 nm was formed as the leakage current suppression layer 15. The Si3N4 film was formed using the same batch of solder sputtering equipment used for Al2O3 film formation, under conditions of RF 300 W power and 0.3 Pa pressure, in a mixed gas atmosphere of Ar gas and 20% N2 gas. The relative permittivity of Si3N4 is 8. The piezoelectric constant d33 of the sample in Example 7 was 18.5 pC / N, and the capacitance ratio CLS / CPIEZ was 8.889. A good piezoelectric constant d33 value was also obtained in Example 7, indicating that the Si3N4 film effectively functions as a leakage current suppression layer.

[0066] The following describes a comparative example. In Comparative Example 1, a piezoelectric layer 13 with a thickness of 200 nm was provided, but the leakage current suppression layer 15 was not used. The piezoelectric constant d33 of this sample was 10.2 pC / N. The piezoelectric characteristics of Comparative Example 1 were used as the evaluation criterion.

[0067] In Comparative Example 2, a piezoelectric layer 13 with a thickness of 200 nm was provided, and an Al2O3 film with a thickness of 225 nm was formed as a leakage current suppression layer 15. The piezoelectric constant d33 of this sample was 8.3 pC / N, and the capacitance ratio CLS / CPIEZ was 0.889. Compared with Examples 1-4, the thickness of the leakage current suppression layer 15 was increased, and the capacitance ratio was correspondingly decreased, resulting in a reduction in piezoelectric characteristics.

[0068] In Comparative Example 3, a piezoelectric layer 13 with a thickness of 200 nm was provided as a leakage current suppression layer 15, forming an Al2O3 film with a thickness of 300 nm. The piezoelectric constant d33 of this sample was 7.5 pC / N, and the capacitance ratio CLS / CPIEZ was 0.667. Compared with Comparative Example 2, the thickness of the leakage current suppression layer 15 was further increased, the capacitance ratio was reduced, and the piezoelectric characteristics were decreased.

[0069] In Comparative Example 4, a piezoelectric layer 13 with a thickness of 200 nm was provided as a leakage current suppression layer 15, forming a SiO2 film with a thickness of 80 nm. The piezoelectric constant d33 of this sample was 9.0 pC / N, and the capacitance ratio CLS / CPIEZ was 1.111. The same SiO2 film as in Example 5 was used as the leakage current suppression layer 15, but the thickness of the leakage current suppression layer 15 was increased compared to Example 5, resulting in a smaller capacitance and reduced piezoelectric characteristics.

[0070] In Comparative Example 5, a piezoelectric layer 13 with a thickness of 300 nm was provided as a leakage current suppression layer 15, forming an Al2O3 film with a thickness of 5 nm. The piezoelectric constant d33 of this sample was 9.5 pC / N, and the capacitance ratio CLS / CPIEZ was 60.000. The same Al2O3 film as in Examples 1-4, 6, 9, and 10 was used as the leakage current suppression layer 15, but the thickness of the leakage current suppression layer 15 was thinner at 5 nm, resulting in a higher capacitance ratio, while the piezoelectric characteristics were lower than those of Comparative Example 1, which served as the baseline. It can be seen that when the thickness of the leakage current suppression layer 15 is too thin, the leakage current suppression effect cannot be obtained.

[0071] Figure 3 is a graph showing the relationship between the film thickness of the leakage current suppression layer 15 and the piezoelectric constant d33, based on the evaluation results of Figure 2. Comparative Example 1, which did not have the leakage current suppression layer 15, was used as a baseline (initial characteristics). Samples from Examples 1 to 10, whose piezoelectric characteristics were improved compared to the initial stage, were considered valid samples. In Figure 3, the white triangle on the vertical axis represents the piezoelectric characteristics of Comparative Example 1. The dashed line horizontal to the horizontal axis is the baseline. The piezoelectric characteristics of Comparative Examples 2 to 5 are lower than the baseline. Specifically, in Comparative Examples 2, 3, and 4, the film thickness ratio of the leakage current suppression layer 15 to the piezoelectric layer 13 is too large, resulting in a reduced capacitance ratio and insufficient piezoelectric characteristics. In contrast, in Comparative Example 5, the film thickness ratio of the leakage current suppression layer 15 to the piezoelectric layer 13 is too small, resulting in an increased capacitance ratio, but the leakage current suppression layer 15 cannot effectively suppress leakage current, leading to a decrease in piezoelectric characteristics.

[0072] Figures 4A and 4B are graphs of the piezoelectric constant d33 as a function of the capacitance ratio CLS / CPIEZ. Figure 5 is an enlarged view of the threshold area of ​​Figures 4A and 4B. Figure 4A shows the distribution of piezoelectric constant d33 for capacitance ratio CLS / CPIEZ in the range of 0 to 10, and Figure 4B shows the distribution of piezoelectric constant d33 for capacitance ratio CLS / CPIEZ in the range of 0 to 70. Looking at Figure 4A alone, it can be seen that increasing the capacitance ratio can improve the piezoelectric characteristics. Referring to Figure 4B, it can be seen that if the capacitance ratio is too large, i.e., the leakage current suppression layer 15 is too thin, sufficient piezoelectric control cannot be obtained. According to Figure 4B, the capacitance ratio is preferably less than 60.00.

[0073] In Figure 5, to determine the lower limit threshold of the capacitance ratio CLS / CPIEZ, data points near the horizontal baseline (dashed line) were used for fitting. The fitted curve obtained based on the data points near the baseline is represented as y = 4.4272In(x) + 9.0353. The coefficient of determination R² of this fitted curve is 0.9479, indicating a very strong correlation.

[0074] Taking the piezoelectric characteristics of Comparative Example 1 without the leakage current suppression layer 15 as a benchmark, when the capacitance ratio CLS / CPIEZ is 1.20 or higher and less than 6.00, preferably 1.25 or higher and less than 60.00, and even more preferably 1.29 or higher and less than 60.00, the piezoelectric characteristics are equivalent to or improved from the initial characteristics. The d33 value when the capacitance ratio CLS / CPIEZ is 1.20 is within ±3% of the initial characteristics, and the d33 value when the capacitance ratio CLS / CPIEZ is 1.25 is within ±2% of the initial characteristics, which can be considered to fall within the error range. Therefore, the capacitance relationship between the leakage current suppression layer 15 and the piezoelectric layer 13 of the piezoelectric element 10 can be derived as follows: 1.20 ≤ CLS / CPIEZ < 6.00

[0075] Figure 6 is a schematic diagram of a sensor 100 employing the piezoelectric element 10 according to the embodiment. The sensor 100 includes a piezoelectric element 10, a charge amplifier 24, and a display device 25. When a mechanical force is applied to the piezoelectric element 10, a charge proportional to the applied force is generated by the piezoelectric effect. The generated charge is amplified by the charge amplifier 24 and output to the display device 25, which can be used as a pressure sensor.

[0076] In addition to the structure that directly measures the amount of charge generated, the resistance change caused by distortion can also be measured. In this case, the first electrode 16 and the second electrode 12 (or the first electrode 16 and the substrate 21 in the case of using a conductive substrate 21) can be connected to a bridge circuit to convert the resistance change into a voltage change, amplify it, perform analog-to-digital conversion, etc., and then output it.

[0077] When utilizing the inverse piezoelectric effect of the piezoelectric element 10, the electric field applied to the piezoelectric element 10 can be controlled by an electric field application method to use it as an actuator. Due to the inverse piezoelectric effect, distortion corresponding to the applied electric field will occur. In the piezoelectric element, the d33 characteristic representing the stretching mode in the polarization direction is good by means of the leakage current suppression layer 15, thereby realizing an actuator with good driving efficiency.

[0078] Whether using the piezoelectric effect or the inverse piezoelectric effect, the small leakage current in the piezoelectric layer 13 of the piezoelectric element 10 can be suppressed, thereby exhibiting good piezoelectric characteristics in the device using the piezoelectric element 10.

[0079] The present invention has been described above based on specific embodiments, but the present invention is not limited to the above-described structural examples. For example, the piezoelectric layer 13 may be formed as a stack of two or more piezoelectric films. The main components of each piezoelectric film may be the same material or different materials. From the viewpoint of the integration of lattice constants, the main components may be the same material. Secondary components may be added to at least a portion of the piezoelectric films. The secondary components added to each layer may be the same or different. In any case, the overall thickness of the piezoelectric layer molding is 5 μm or less, preferably 3 μm or less, more preferably 2 μm or less, more preferably 1 μm or less, and even more preferably 500 nm or less. The material and thickness of the leakage current suppression layer are determined to satisfy 1.20 ≤ CLS / CPIEZ < 60.00, based on the relationship between the overall relative permittivity of the piezoelectric layer and the film thickness. Within the range that satisfies the capacitance ratio requirement, in addition to Al2O3, SiO2, and Si3N4, the leakage current suppression layer can also use ZrO2, TiO2, AlN, Ta2O5, or a combination of two or more of these materials. If the dielectric constant of the leakage current suppression layer is too high, high-frequency signals will have difficulty passing through, and sometimes the signal waveform will exhibit waveform rounding. When piezoelectric elements are used in high-frequency devices, Al2O3, SiO2, and Si3N4 are particularly suitable for leakage current suppression layers.

[0080] This application claims priority based on Japanese Patent Application No. 2021-014369 filed on February 1, 2021, and Japanese Patent Application No. 2022-008468 filed on January 24, 2022, and incorporates the entire contents of the aforementioned Japanese patent applications. [Simplified Explanation of the Diagram]

[0012] Figure 1A shows a first structural example of the piezoelectric element according to the embodiment. Figure 1B shows a second structural example of the piezoelectric element according to the embodiment. Figure 1C shows a third structural example of the piezoelectric element according to the embodiment. Figure 1D shows a fourth structural example of the piezoelectric element according to the embodiment. Figure 1E shows a fifth structural example of the piezoelectric element according to the embodiment. Figure 1F shows a sixth structural example of the piezoelectric element according to the embodiment. Figure 2 is a graph showing the measurement results of the example and the comparative example. Figure 3 is a graph showing the relationship between the film thickness of the leakage current suppression layer and the piezoelectric constant d33. Figure 4A is a graph showing the relationship between the capacitance ratio and the piezoelectric constant d33. Figure 4B is a graph showing the relationship between the capacitance ratio and the piezoelectric constant d33 after expanding the capacitance ratio range. Figure 5 is an enlarged view of the threshold area in Figures 4A and 4B. Figure 6 is a schematic diagram showing an example of a sensor using the piezoelectric element of the embodiment.

Claims

1. A piezoelectric element, wherein, A piezoelectric layer and a first electrode are sequentially stacked on a substrate. A leakage current suppression layer is disposed between the first electrode and the piezoelectric layer. The ratio of the capacitance per unit area of ​​the leakage current suppression layer to the capacitance per unit area of ​​the piezoelectric layer is 1.20 or more and less than 60.

00. The piezoelectric material of the piezoelectric layer includes: ZnO with a wurtzite-type crystalline structure or ZnO with a wurtzite-type crystalline structure containing secondary components. The leakage current suppression layer is an amorphous layer composed of Al2O3, SiO2, Si3N4, or a combination of two or more of them.

2. As in claim 1, the piezoelectric element, wherein, The ratio of the capacitance per unit area of ​​the leakage current suppression layer to the capacitance per unit area of ​​the piezoelectric layer is greater than 1.29 and less than 60.

00.

3. The piezoelectric element as requested in item 1 or 2, wherein, This substrate is a flexible substrate.

4. The piezoelectric element as requested in item 1 or 2, wherein, The substrate is a conductive substrate.

5. The piezoelectric element as requested in item 1 or 2, wherein, The substrate is an insulating substrate, and a second electrode is disposed between the substrate and the piezoelectric layer.

6. The piezoelectric element as requested in item 1 or 2, wherein, The full-amplitude value of the piezoelectric layer obtained by the X-ray rocking curve method is less than 5°.

7. A sensor employing a piezoelectric element as claimed in any one of claims 1 to 6.

8. An actuator comprising: Such as the piezoelectric element of any of the requests 1 to 6; And the means of applying an electric field to the piezoelectric element to apply a specified electric field.

Citation Information

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