Method and integrated system for forming barrier layer on substrate

TWI935067BActive Publication Date: 2026-08-11APPLIED MATERIALS INC
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Patent Information

Application Number
TW111117463
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2022-04-29
Filing Date
2022-05-10
Publication Date
2026-08-11
Estimated Expiration
2042-05-09

AI Technical Summary

Technical Problem

The challenge in semiconductor manufacturing is the production of high-quality barrier films with low resistivity and high density for small device nodes (3 nm and below), as existing ALD chambers produce films with high resistivity and low density, while PVD chambers produce non-conformal films with good barrier properties.

Method used

A method involving pulsing bias power during atomic layer deposition and subsequent plasma treatment with inert gases to densify the films, using an integrated system that combines ALD and PVD processes to achieve high-density, low-resistivity barrier layers.

Benefits of technology

The method results in high-quality barrier films with improved conformality and reduced resistivity, addressing the challenges of RC reduction and device reliability at small node sizes.

✦ Generated by Eureka AI based on patent content.

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Abstract

This document provides methods and apparatus for forming a barrier layer. In some embodiments, a method for forming a barrier layer on a substrate includes: processing the exposed layer by pulsed bias power applied to a substrate support supporting the substrate while exposing a layer deposited on and within features of the substrate to plasma. The exposed layer may be deposited by an atomic layer deposition process and may be, for example, a tantalum nitride layer. The bias power may be up to 500 watts of RF power at a pulse frequency of about 1 Hz to about 10 kHz. The bias power may be pulsed uniformly or pulsed at multiple different levels.
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Description

[Technical Field]

[0001] The embodiments of this invention generally relate to methods for processing and / or doping barrier layers. More specifically, some embodiments of this invention are methods for processing and doping titanium nitride thin films with cobalt. [Previous Technology]

[0002] Substrates are used to construct structures or devices in the semiconductor industry. These devices are constructed using thin-film deposition to deposit material layers to form conductors, vias, semiconductors, and other structures / devices within the substrate. With the shrinking size of these devices due to the demand for smaller and faster electronic components, greater control over the thin-film deposition process is required to ensure proper device functionality. The smaller device size has led to a shift from using physical vapor deposition (PVD) chambers to atomic layer deposition (ALD) chambers. ALD chambers allow for surface control methods to produce highly uniform thin films over the entire device structure. However, when ALD chambers are used to produce barrier films, the barrier films have high resistivity and low density, resulting in poor-quality barrier films. PVD chambers produce good barrier properties with higher density and lower resistivity, but the films are non-conformal, often leading to incorrect device structures on the substrate.

[0003] For nodes of 3 nm and below, the thickness of the barrier layer and pads for copper interconnects becomes more challenging in terms of RC reduction and device reliability. The inventors have observed that the thickness of the barrier film and pads at smaller device nodes (such as at 3 nm or below) can lead to device problems. For example, a larger thickness provides less space for copper gap filling and increases resistivity. However, reducing the total thickness of the barrier layer and pads in device structures at smaller node sizes is challenging.

[0004] Therefore, the inventors have provided improved methods and apparatus for improving barrier films. [Summary of the Invention]

[0005] This document provides methods and apparatus for forming a barrier layer. In some embodiments, a method of forming a barrier layer on a substrate includes: treating the exposed layer by pulsed bias power applied to a substrate support supporting the substrate while exposing a layer deposited on and within features of the substrate to plasma. The exposed layer may be deposited by an atomic layer deposition process and may be, for example, a titanium nitride layer. The plasma may contain a source gas, including one or more of an inert gas, nitrogen (N2), oxygen (O2), or water vapor (H2O). The bias power may be a radio frequency power of up to 500 watts at a pulse frequency of about 1 Hz to about 10 kHz. The bias power may have a frequency of about 0.1 to about 99 MHz. In some embodiments, the bias power may include a first quasi-pulsation of radio frequency power having a first amount of pulse power having a pulse frequency of about 1 to about 10 kHz, followed by a second quasi-pulsation of radio frequency power having a second amount of pulse power having a pulse frequency of about 1 Hz to about 10 kHz, wherein the second amount is greater than the first amount. In some embodiments, the first amount is about 10 to about 150 watts, and the second amount is about 100 to about 500 watts. For example, in some embodiments, pulsed bias power may include providing about 10 to about 150 watts of radio frequency power at a pulse frequency of about 1 Hz to about 10 kHz for a total duration of about 10 seconds, and then increasing the bias power at a pulse frequency of about 1 Hz to about 100 to about 500 watts of radio frequency power for a total duration of about 10 seconds.

[0006] In some embodiments, a method of forming a barrier layer on a substrate includes: depositing a layer on the substrate and within features of the substrate; and densifying the layer by pulsed bias power applied to a substrate support supporting the substrate while exposing the layer to plasma formed of an inert gas. Processing the layer by pulsed bias power may be performed as described in any of the embodiments disclosed herein.

[0007] In some embodiments, an integrated system for forming a barrier layer on a substrate is provided. In some embodiments, an integrated system for forming a barrier layer on a substrate includes: a deposition chamber configured to deposit a layer in a feature of the substrate by atomic layer deposition; and a plasma processing chamber configured to process the deposited layer with inert pulsed plasma. The plasma processing chamber includes: a biasable substrate support having a radio frequency bias electrode disposed in the biasable substrate support; and a pulse controller configured to pulse an input radio frequency signal provided to the radio frequency bias electrode. In some embodiments, the deposition chamber and the plasma processing chamber are separate chambers coupled to a central vacuum transfer chamber configured to move the substrate from the deposition chamber to the plasma processing chamber. Alternatively, in some embodiments, the deposition chamber and the plasma processing chamber are the same chamber. The integrated system may further include an RF power supply coupled to an RF bias electrode to provide an input RF signal to the RF bias electrode, wherein the RF power supply is configured to provide RF power at frequencies from about 0.1 to about 99 MHz. A pulse controller may be configured to pulse the input RF signal at pulse frequencies from about 1 Hz to about 10 kHz. The integrated system may further include a gas source coupled to a plasma processing chamber and configured to provide one or more of an inert gas, nitrogen (N2), oxygen (O2), or water vapor (H2O).

[0008] Other and further embodiments of this case are described below.

Implementation Method

[0015] As used herein, "substrate" refers to any substrate on which a thin film processing is performed during the manufacturing process, or a material surface formed on a substrate. For example, depending on the application, substrate surfaces on which processing can be performed include materials such as silicon, silicon oxide, strained silicon, silicon on insulator (SOI), carbon-doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials. Substrates may include, but are not limited to, semiconductor wafers. Furthermore, where a thin film / layer or a portion of a thin film / layer has already been deposited onto the substrate surface, the exposed surface of the most recently deposited thin film / layer becomes the substrate surface. What a given substrate surface may contain will depend on the thin film to be deposited and the specific chemicals used.

[0016] As used herein, the terms "reactive gas," "precursor," "reactant," and similar terms are used interchangeably to mean a gas that includes species that react with the substrate surface. For example, a first "reactive gas" may simply be adsorbed onto the surface of the substrate and may be used for further chemical reactions with a second reactive gas.

[0017] As used herein, the term “about” means approximately or close to, and in the context of the numerical value or range stated, means a change of + / -15% or less in the numerical value. For example, values ​​differing by + / -14%, + / -10%, + / -5%, + / -2%, or + / -1% would satisfy the definition of about.

[0018] For 3 nm nodes or smaller substrate devices, PVD barrier films and copper (Cu) interconnects become more challenging in terms of reducing resistance / capacitance (RC) (interconnect time delay). To reduce resistance (R), thinner barrier layers are required. Improving reflow or electro-copper plating (ECP) performance also needs to be considered by adjusting the barrier process. Effective copper barriers require a continuous barrier. Overcoming these problems is very challenging for PVD processes when ramp damage, drooping, via resistance, and conformability issues combine. ALD processes typically produce good conformal coverage. However, ALD films may have lower density (due to metal scarcity) and higher resistivity. Therefore, ALD films (during deposition) are often not effective barriers, and ALD films can also lead to higher via resistance (due to the uniform film deposition filling the bottom of the via). Plasma-enhanced atomic layer deposition (PEALD) processes can increase film density, but they often damage materials with low dielectric constants (e.g., time-dependent dielectric breakdown (TDDB)).

[0019] Embodiments of this invention provide methods and apparatus for forming a barrier layer and / or pad that advantageously has a smaller thickness to provide more space for gap filling in features containing copper, cobalt, or other metals (e.g., Mo, W, Ir, Ru). Increased gap filling reduces resistivity and RC delay. Furthermore, embodiments of this invention provide methods and apparatus for forming a barrier layer and / or pad that advantageously prevents copper diffusion into the substrate, or promotes selective deposition of other metals, or improves the adhesion of other metals.

[0020] The techniques described herein provide solutions for processing thin films (e.g., TaN-like ALD films) using PVD methods, which improve such films for barrier applications (e.g., Cu barrier applications) with structures of 3 nm and below, although these techniques are also suitable for larger structures. The methods can also be used to enhance or process (e.g., increase density) other thin films (i.e., ALD or CVD) for other applications. Typical films that can be processed may include tantalum nitride (TaN) and other materials. The disclosed methods are applicable to materials and films other than TaN (such as other nitrides (e.g., niobium nitride, titanium nitride)) and films containing other nonmetallic elements (e.g., fluorides, chlorides, carbides). However, for simplicity, many of the embodiments described will use TaN as an example.

[0021] The ALD process can be combined with the PVD process to produce high-quality barrier films. The initial barrier film is deposited on the substrate using the ALD process, and then the initial barrier film is moved to the PVD chamber for processing to increase the density and purity of the barrier film, thereby reducing the resistivity of the barrier film. These processes can be performed with or without vacuum disruption between processes.

[0022] Typically, a thin film (e.g., TaN) on a substrate is placed in a PVD chamber with dual frequencies (first and second frequencies). This chamber can be used to selectively remove non-metallic elements (e.g., nitrogen) from the film and densify the film to achieve a PVD-like film for barrier applications. The PVD chamber has dual material sources (target and coil) (first and second sources). In some embodiments, the dual material sources can also provide a cobalt source for doping the film and depositing a nucleation layer for subsequent bulk deposition.

[0023] In some embodiments, the process includes the deposition and treatment of an initial film. For these embodiments, the process can be performed in an integrated processing system (e.g., a cluster tool) or using a single, separate chamber. When using an integrated processing system, the film is deposited on a substrate, and the substrate is subsequently transferred to a PVD chamber for processing without vacuum disruption. The absence of vacuum disruption reduces the overall processing time.

[0024] In some embodiments, the integrated processing system may include a single chamber configured for ALD deposition of an initial film layer, and a biasable substrate support and an RF pulse controller configured to operate in more detail below.

[0025] However, this process can also be performed using a separate chamber. In these embodiments, the film is deposited on the substrate in one chamber and then processed in a separate PVD chamber. In some embodiments, the substrate is subjected to vacuum destruction and is degassed and pre-cleaned before being inserted into the PVD chamber for processing. In other embodiments, after film deposition, the substrate is stored under an inert gas and transferred to the PVD chamber for processing without vacuum destruction.

[0026] Figure 1 illustrates a schematic cross-sectional view of an illustrative process chamber (e.g., a PVD chamber) according to some embodiments of the present invention. Examples of suitable PVD chambers include PVD processing chambers available from Applied Materials, Inc., Santa Clara, California. However, the disclosed methods can also be used in other processing chambers as described herein or in other processing chambers available from other manufacturers. In one embodiment, process chamber 100 is capable of depositing, for example, metals, metal nitrides, metal fluorides, metal carbides, etc., on substrate 118.

[0027] The process chamber 100 has a chamber body 105, which includes a sidewall 102, a bottom 103, and a cover assembly 104, all of which enclose an internal volume 106. A substrate support 108 is disposed in the lower part of the internal volume 106 of the process chamber 100, opposite to the target 114. A substrate transfer port 109 is formed in the sidewall 102 for transferring the substrate in and out of the internal volume 106.

[0028] A gas source 110 is coupled to a process chamber 100 to supply process gases to the internal volume 106. In one embodiment, the process gas may include inert gases, non-reactive gases, and reactive gases. Examples of process gases that can be supplied by the gas source 110 include, but are not limited to, argon (Ar), helium (He), krypton (Kr), neon (Ne), nitrogen (N2), oxygen (O2), hydrogen (H2), and water vapor (H2O).

[0029] Pump 112 is coupled to process chamber 100, which communicates with internal volume 106, to control the pressure in internal volume 106. In one embodiment, the pressure in process chamber 100 may be maintained at a pressure greater than zero to about 10 mTorr or less. In another embodiment, the pressure within process chamber 100 may be maintained at about 3 mTorr.

[0030] The backplate 113 can support the target 114 in the upper part of the internal volume 106. The backplate 113 can be electrically isolated from the sidewall 102 by means of an insulator 115. The target 114 typically provides a source of material to be deposited on the substrate 118. The target 114 can be made of a material containing titanium (Ti), tantalum (Ta), niobium (Nb), tungsten (W), cobalt (Co), nickel (Ni), copper (Cu), aluminum (Al), manganese (Mn), alloys of the above metals, combinations of the above metals, etc. In the exemplary embodiments described herein, the target 114 can be made of cobalt (Co).

[0031] The target 114 may be coupled to a source assembly 116 including a power supply 117 for the target 114. In some embodiments, the power supply 117 may be a radio frequency (RF) generator. In some embodiments, the power supply 117 may alternatively be a direct current (DC) source power supply. In some embodiments, the power supply 117 may include both DC and RF power supplies.

[0032] An additional RF power supply 180 may also be coupled to the process chamber 100 via the substrate support 108 to provide bias power between the target 114 and the substrate support 108. In some embodiments, the RF power supply 180 may provide up to approximately 500 watts, such as approximately 10 to approximately 500 watts of RF energy to the substrate support 108 at a frequency between approximately 1 MHz and approximately 100 MHz, such as approximately 13.56 MHz, to bias the substrate 118. In some embodiments, the RF power supply 180 operates at an RF power frequency greater than the operating RF power frequency of the power supply 150 to bias the substrate 218.

[0033] The RF power supply 180 includes or is coupled to a pulse controller (schematically illustrated as pulse controller 178) configured to pulse the RF energy supplied by the RF power supply 180 at a pulse frequency of approximately 1 Hz to approximately 10 kHz. The pulse controller 178 may be part of the RF power supply 180, part of the controller 198 (described below), or a separate component. The pulse controller 178 is operatively coupled to and controlled by the controller 198. The pulse controller 178 can pulse the RF energy supplied by the RF power supply 180 with a duty cycle greater than zero and less than 100.

[0034] The substrate support 108 is movable between a raised position and a lowered position, as indicated by arrow 182. In the lowered position, the support surface 111 of the substrate support 108 may be aligned with or just below the substrate transfer port 109 to facilitate the entry and removal of the substrate 118 into and from the process chamber 100. The support surface 111 may have an edge deposition ring 136 sized to receive the substrate 118 thereon while protecting the substrate support 108 from plasma and deposition material. The substrate support 108 may be moved to a raised position closer to the target 114 to process the substrate 118 in the process chamber 100. When the substrate support 108 is in the raised position, a cap ring 126 may engage the edge deposition ring 136. The cap ring 126 prevents deposition material from bridging between the substrate 118 and the substrate support 108. When the substrate support 108 is in the lowered position, the cover ring 126 is suspended above the substrate support 108 and the substrate 118 is positioned thereon to allow the substrate to be moved.

[0035] During the transfer of a substrate to or from the process chamber 100, a robot blade (not shown) having a substrate 118 thereon extends through a substrate transfer port 109. A lifting pin (not shown) extends through a support surface 111 of a substrate support 108 to lift the substrate 118 from the support surface 111 of the substrate support 108, thereby allowing the robot blade to pass through the space between the substrate 118 and the substrate support 108. The robot can then transport the substrate 118 into or out of the process chamber 100 via the substrate transfer port 109. The raising and lowering of the substrate support 108 and / or the lifting pin can be controlled by a controller 198 (described below).

[0036] During sputtering deposition, the temperature of the substrate 118 can be controlled by a thermal controller 138 disposed in the substrate support 108. The substrate 118 may be heated to a desired processing temperature as appropriate. In some embodiments, optional heating may be used to bring the substrate and / or film temperature to a temperature of about 200 to about 400 degrees Celsius. In other embodiments, the substrate may be processed at room temperature (about 15 to about 30 degrees Celsius). In other embodiments, the temperature is in the range of about 15 degrees Celsius to about 400 degrees Celsius. After processing, the substrate 118 can be rapidly cooled using the thermal controller 138 disposed in the substrate support 108. The thermal controller 138 controls the temperature of the substrate 118 and can be used to change the temperature of the substrate 118 from a first temperature to a second temperature within a few seconds to about one minute.

[0037] The inner shield 120 may be positioned within the internal volume 106 between the target 114 and the substrate support 108. The inner shield 120 may be formed of aluminum or stainless steel, or other materials. In one embodiment, the inner shield 120 is formed of stainless steel. The outer shield 122 may be formed between the inner shield 120 and the sidewall 102. The outer shield 122 may be formed of aluminum or stainless steel, or other materials. The outer shield 122 may extend beyond the inner shield 120 and is configured to support the cover ring 126 when the substrate support 108 is in a lowered position.

[0038] In one embodiment, the inner shield 120 includes a radial flange 123 with an inner diameter greater than the outer diameter of the inner shield 120. The radial flange 123 extends from the inner shield 120 at an angle greater than about 90 degrees relative to the inner diameter surface of the inner shield 120. The radial flange 123 may be a circular ridge extending from the surface of the inner shield 120 and is generally adapted to mate with a recess formed in a cover ring 126 on the substrate support 108. The recess may be a circular groove formed in the cover ring 126, which centers the cover ring 126 relative to the longitudinal axis of the substrate support 108.

[0039] In some embodiments, the process chamber 100 may include an induction coil 142. The induction coil 142 of the process chamber 100 may have one or more turns. The induction coil 142 may be located just inside the inner shield 120 and positioned above the substrate support 108. The induction coil 142 may be positioned closer to the substrate support 108 than the target 114. The induction coil 142 may be formed of a material with a composition similar to or the same as the target 114, such as, for example, cobalt, to serve as a secondary sputtering target. The induction coil 142 is supported from the inner shield 120 by a plurality of coil spacers 140. The coil spacers 140 electrically isolate the induction coil 142 from the inner shield 120 and other chamber components and prevent sputtering to avoid short circuits or the generation of undesired plasma excitation sources. Dual sources help provide a stable plasma and sufficient energy to selectively etch non-metallic elements (e.g., nitrogen from a nitride film) while keeping the metal film intact or at least minimally etched.

[0040] The induction coil 142 may be coupled to a power supply 150. The power supply 150 may have electrical leads penetrating the sidewall 102, outer shield 122, inner shield 120, and coil spacer 140 of the process chamber 100. The electrical leads are connected to an electrical hub 144 on the induction coil 142 for supplying power to the induction coil 142. The electrical hub 144 may have a plurality of insulated electrical connections for supplying power to the induction coil 142. Additionally, the electrical hub 144 may be configured to interface with and support the induction coil 142 at the coil spacer 140. In some embodiments, the power supply 150 applies current to the induction coil 142 to induce a radio frequency field within the process chamber 100 and couples power to plasma to increase plasma density, i.e., the concentration of reactive ions. In some embodiments, the induction coil 142 operates at an RF power frequency lower than the RF power frequency of the RF power supply 180. In some embodiments, the RF power frequency supplied to the induction coil 142 is approximately 2 Hz. In some embodiments, the RF power frequency may operate in the range of about 1.8 MHz to about 2.2 MHz. In some embodiments, the RF power frequency range may be from about 0.1 MHz to 99 MHz. In some embodiments, the induction coil 142 is made of a material that can be sputtered onto a substrate, such as a metallic material. The power supply 150 may then also apply DC power to the induction coil 142 to enable sputtering of the induction coil 142 while simultaneously coupling the RF power to the plasma.

[0041] Controller 198 is coupled to process chamber 100. Controller 198 includes a central processing unit (CPU) 160, memory 158, and support circuitry 162. Controller 198 is used to control program sequences, regulate airflow from gas source 110 into process chamber 100, control ion bombardment of target 114 and induction coil 142, control bias power applied to substrate support 108, etc. More generally, controller 198 is used to perform the methods disclosed herein.

[0042] CPU 160 can be any form of general-purpose computer processor that can be used in an industrial environment. Software routines can be stored in memory 158, such as random access memory, read-only memory, floppy disk or hard disk drives, or other forms of digital storage. Support circuitry 162 is conventionally coupled to CPU 160 and may include cache memory, clock circuitry, input / output subsystems, power supply, etc. When executed by CPU 160, the software routines transform CPU 160 into a dedicated computer (controller) 198 controlling process chamber 100 to enable the execution of processes according to this invention. Software routines can also be stored and / or executed by a second controller (not shown) located at a remote end of process chamber 100.

[0043] In some applications, such as when depositing barrier layers in features on a substrate, the inventors have observed that although PVD chambers produce films with good barrier properties (e.g., high density and low resistivity), these films are typically non-conformal, often leading to improper device fabrication on the substrate. Furthermore, while ALD chambers produce highly uniform films throughout the device structure, ALD barrier films tend to have high resistivity and low density, resulting in poor-quality barrier films. For example, the inventors have observed that the low density of ALD TaN and plasma treatments (such as Ar plasma treatments) that densify the film can damage the underlying low-dielectric-constant material layer.

[0044] However, the processing of such films according to this invention advantageously increases film density while reducing or eliminating damage to the film and / or the underlying dielectric layer. For example, in some embodiments, the method according to this invention can be used to process films to increase film density, such as films used as barrier layers (e.g., barrier layers for interconnects such as copper interconnects), such as tantalum nitride films, such as films deposited by an ALD process, such as tantalum nitride films deposited via ALD. Pulsed plasma processing advantageously maintains the same ion energy as continuous wave mode but reduces the total processing dose (ion energy x time), thereby reducing the damage level to a low dielectric constant while maintaining the same processing efficiency. Pulsed RF plasma processing also provides a power level control knob for further process adjustment. For example, due to machine and material limitations, continuous wave mode (continuous RF bias application during plasma processing) can typically only last 1 to 2 seconds. However, pulsed bias allows for extended process time, thereby providing better process control. Furthermore, the pulsed bias mode enables multi-stage processing, such as a low-power to high-power mode, where a low power is initially provided to initially soft-process the surface and prepare the surface to receive a high-power mode to allow more ions to enter the structure (e.g., the opening of a feature) to aid in sidewall processing of the barrier layer material deposited on the sidewalls of the feature. Therefore, the thin film processing according to this invention can advantageously provide one or more improved non-uniformities (e.g., more uniform process results) by using a high transient RF bias, extending the process window to reduce damage to the material layer and / or underlying material layers, and reducing the amount of material etched during the processing for finer process control.

[0045] For example, Figure 2 illustrates a flowchart of a method 200 for processing a substrate according to at least some embodiments of the present invention. Method 200 generally begins at block 202, wherein an exposed layer deposited on and within features of the substrate is processed by applying a bias power to a substrate support supporting the substrate via pulsed voltage, while simultaneously exposing the layer to plasma.

[0046] The inventors have discovered that, compared to continuously applying a bias voltage to the RF substrate, processing the exposed layer with pulsed RF power reduces the ion density / number while maintaining the same ion energy. Therefore, the pulsed processing process advantageously provides an extended process time window while avoiding over-processing of the exposed layer and reducing damage to that layer or other material layers on the substrate (e.g., the underlying dielectric layer).

[0047] The bias power can have a frequency of about 0.1 to about 99 MHz. The bias power can have a value of up to about 500 watts. The bias power can be pulsed at a pulse frequency of about 1 Hz to about 10 kHz. The bias power supply can be pulsed with a duty cycle greater than zero and less than 100.

[0048] For example, Figure 3 illustrates a schematic diagram of pulsed parameters used in a method of processing a substrate according to at least some embodiments of the present invention. As shown in Figure 3, the pulse waveform is illustrated on axis 306 corresponding to the magnitude of the applied RF power and axis 308 corresponding to time. The diagram in Figure 3 illustrates a first pulse waveform 302 having a duration t1 and a first magnitude 312. The first pulse waveform 302 comprises a plurality of individual pulses repeating over time. Each pulse is defined by an initial low magnitude, a rapid increase to a high magnitude, and then a return to the initial low magnitude. The initial low magnitude may be zero or some other magnitude below the high magnitude. The total time between pulses is indicated at 310. The percentage of RF power at 310 during the first magnitude 312 is the duty cycle. A duty cycle of 100 means that the RF power is maintained at a certain magnitude (e.g., continuous wave mode), and a duty cycle of zero corresponds to no RF power being applied. In some embodiments, the processing may include single-stage pulsed pulses, such as those corresponding to the first pulse waveform 302. In some embodiments, the first pulse waveform 302 may be followed by a second quasi-pulse, such as as shown in Figure 3 by a second pulse waveform 304, which has a duration t2 and a second magnitude 314. The second magnitude is greater than the first magnitude.

[0049] In some embodiments, the processing has a single level—meaning that the RF power is pulsed between a substantially uniform power level and a lower level (such as zero or an off state). In some embodiments, the processing has multiple levels, such as two or more levels. For example, the RF power may be pulsed for a first duration between a substantially uniform first power level (e.g., a value) and a lower level (such as zero or an off state), and then the RF power may be pulsed for a second duration between a substantially uniform second power level (e.g., a value) greater than the first power level and a lower level (such as zero or an off state), and may continue as appropriate by pulsed RF power at different power levels, which may be greater than or less than the previous power level. In some embodiments, the processing includes only two levels: a first low-level processing and a subsequent second high-level (relative to the low-level) processing.

[0050] In some embodiments, bias power pulsed includes providing up to 500 watts of RF power at a pulse frequency of about 1 Hz to about 10 kHz. In some embodiments, bias power pulsed includes providing up to 500 watts of RF power at a pulse frequency of about 1 Hz to about 10 kHz for a total duration of up to about 10 seconds.

[0051] In some embodiments, bias power pulsedness includes providing a first amount of RF power at a pulse frequency of about 1 Hz to about 10 kHz, followed by providing a second amount of RF power at a pulse frequency of about 1 Hz to about 10 kHz, wherein the second amount is greater than the first amount. In some embodiments, the first amount is about 10 to about 150 watts, and the second amount is about 100 to about 500 watts. In some embodiments, bias power pulsedness includes providing about 10 to about 150 watts of RF power at a pulse frequency of about 1 Hz to about 10 kHz for a total duration of about 10 seconds, and then increasing the bias power at a pulse frequency of about 1 Hz to about 100 to about 500 watts of RF power for a total duration of about 10 seconds.

[0052] In some embodiments, the plasma includes a source gas, which includes one or more of an inert gas, nitrogen (N2), oxygen (O2), or water vapor (H2O). For example, in some embodiments, gas source 110 supplies gas to internal volume 106. In some embodiments, gas 208 includes an inert gas, such as, for example, argon (Ar), helium (He), xenon (Xe), neon (Ne), or krypton (Kr); or a reactive gas, such as, for example, nitrogen-based gas (N2), oxygen (O2), or water vapor (H2O). In some embodiments, the gas may also be a combination of one or more inert gases and one or more reactive gases. The gas is introduced into the plasma formed above substrate 118. The plasma can be formed by simultaneously supplying the source gas to internal volume 106 with RF power from one or both of power source 117 or power source 150.

[0053] In some embodiments, for example, pump 112 may maintain the internal volume 106 at a pressure less than or equal to about 10 mTorr. In some embodiments, for example, thermal controller 138 may maintain substrate 118 at about 200 to about 400 degrees Celsius or room temperature (about 15 to about 30 degrees Celsius), or any temperature in between (e.g., about 15 degrees Celsius to about 400 degrees Celsius). In some embodiments, a magnetic field is used to control ion distribution. In some embodiments, the magnetic field may be dynamically controlled by electromagnet 125 to influence the distribution location of ions on substrate 118.

[0054] In some embodiments, the exposed layer is deposited using an atomic layer deposition (ALD) process. The exposed layer can be deposited using a conventional ALD deposition process and is typically a conformal layer deposited on top of a substrate and within substrate features, such as trenches, vias, dual damascene structures, etc. In some embodiments, the exposed layer is a tantalum nitride layer, although other material layers may also be used. For example, in some embodiments, the material layer deposited and processed as described herein can be any material layer used as a barrier layer and / or padding layer for features formed in the dielectric layer prior to providing conductive fill. In some embodiments, such features have dimensions corresponding to a 3 nm node or smaller. In some embodiments, the exposed layer is deposited prior to the start of method 200. Alternatively, and as appropriate, in some embodiments, the exposed layer is deposited as part of method 200, as shown at block 204 in Figure 2.

[0055] The exposed layer can be of any suitable thickness. In some embodiments, the thickness of each layer or film is minimized. Not bound by theory, the inventors believe that smaller barrier layers and liner layers provide lower resistivity and reduce RC delay. In some embodiments, the layer has a thickness of less than or equal to about 20 angstroms, less than or equal to about 18 angstroms, less than or equal to about 15 angstroms, less than or equal to about 14 angstroms, less than or equal to about 13 angstroms, less than or equal to about 12 angstroms, less than or equal to about 11 angstroms, or less than or equal to about 10 angstroms.

[0056] In some embodiments, the ALD process includes sequentially exposing a substrate to a metal precursor and a reactant. Those skilled in the art will recognize suitable metal precursors and reactants for producing films having a predetermined composition. In some embodiments, the TaN film is deposited by exposing a substrate to a tantalum precursor and a nitrogen reactant. In some embodiments, the tantalum precursor comprises pentapenta(dimethylamino)tantalum. In some embodiments, the nitrogen reactant comprises one or more of nitrogen gas (N2), ammonia, nitrous oxide, or nitrogen dioxide.

[0057] In some embodiments, the membrane comprises tantalum carbide, tantalum nitride, tantalum fluoride, niobium carbide, niobium nitride, niobium fluoride, titanium carbide, titanium nitride, titanium fluoride, or a combination thereof. In some embodiments, the membrane comprises more than one metal species (e.g., TiTaN). In some embodiments, the membrane comprises more than one non-metallic element (e.g., TaCN).

[0058] In some embodiments, the film / substrate temperature may be at room temperature during processing. In some embodiments, the film / substrate may be heated as appropriate to about 200 degrees Celsius to about 400 degrees Celsius, as shown at 304. In other embodiments, the film / substrate may be heated as appropriate from about 15 degrees Celsius to about 400 degrees Celsius. The PVD chamber environment may be maintained at room temperature or at moderate temperatures (e.g., 200 degrees Celsius) to high temperatures (e.g., 400 degrees Celsius) and very low pressure (e.g., <10 mTorr) during film processing. In some embodiments, the temperature of the substrate and / or film is maintained at about 325 degrees Celsius. The thin film on the substrate may be made of any type of material or combination of materials. For simplicity, the examples of the embodiments use TaN as the film to be processed. In some embodiments, the film system is deposited by ALD and has typical characteristics associated with ALD before being processed in the PVD chamber, i.e., if used as a barrier film, the film is conformal but has low density and high resistivity, making the ALD film a poor barrier film.

[0059] As described above, the layer is etched to increase density and remove non-metallic elements from the film. For example, a PVD chamber environment, such as internal volume 106, may be filled with at least one gas (such as the gas discussed above), and the pressure is greater than zero and less than or equal to about 10 mTorr. This gas is used to provide etching of the substrate (such as substrate 118) to release non-metallic elements (e.g., nitrogen from the nitride film) from the film. Without being bound by theory, the inventors believe that if the pressure is not kept very low, some materials (such as tantalum) have a high affinity for oxygen, and higher pressures may produce nitrogen oxides, resulting in inefficient nitrogen removal.

[0060] After being processed in the PVD chamber, the film exhibits typical characteristics associated with the PVD process, but also possesses the conformal properties of an ALD film. The dynamic processing can form a long-lasting, high-quality barrier film with high density and low resistivity.

[0061] In some embodiments, the method continues by depositing a copper film on the layer as appropriate. Those skilled in the art will recognize suitable processes for depositing the copper film, including but not limited to CVD, ALD, and PVD processes. In some embodiments, the treated layer effectively prevents copper from diffusing from the copper film into the substrate. In some embodiments, the treated layer promotes adhesion of other metal deposits or promotes selective metal deposition.

[0062] The methods described herein can be performed in separate process chambers, which can be configured independently or provided as part of a cluster of tools. For example, in some embodiments, an integrated system for forming a barrier layer on a substrate includes: a deposition chamber configured for depositing a layer in a feature of the substrate via atomic layer deposition; and a plasma processing chamber configured to process the deposited layer with inert pulsed plasma, the plasma processing chamber including: a biasable substrate support in which an RF bias electrode is disposed; and a pulse controller configured to pulse an input RF signal provided to the RF bias electrode.

[0063] In some embodiments, the integrated system is configured such that the deposition chamber and the plasma processing chamber are separate chambers coupled to a central vacuum transfer chamber, which is configured to move the substrate from the deposition chamber to the plasma processing chamber; or the deposition chamber and the plasma processing chamber are the same chamber.

[0064] In some embodiments, the integrated system further includes an RF power supply coupled to an RF bias electrode to provide an input RF signal to the RF bias electrode, wherein the RF power supply is configured to provide RF power at a frequency of about 0.1 to about 99 MHz, and wherein a pulse controller is configured to pulse the input RF signal at a pulse frequency of about 1 Hz to about 10 kHz.

[0065] In some embodiments, the integrated system as claimed in claim 19 further includes a gas source coupled to the plasma processing chamber and configured to provide one or more of an inert gas, nitrogen (N2), oxygen (O2), or water vapor (H2O).

[0066] For example, the integration tool 400 (i.e., clustering tool) is described below with respect to Figure 4. The advantage of using the integration tool 400 is the absence of vacuum disruption and the elimination of the need for substrate degassing and pre-cleaning prior to processing in the PVD chamber. Examples of integration tools 400 include the CENTURA® and ENDURA® series of integration tools available from Applied Materials, Inc., Santa Clara, California. However, the methods described herein can be implemented using other clustering tools with suitable process chambers or in other suitable process chambers. For example, in some embodiments, the methods of the invention discussed above can be advantageously performed in an integration tool such that there is limited or no vacuum disruption between processes. For example, reduced vacuum disruption can limit or prevent substrate contamination.

[0067] The integrated tool 400 includes a vacuum sealing processing platform 401, a factory interface 404, and a system controller 402. The processing platform 401 includes multiple processing chambers such as processing chambers 414A, 414B, 414C, 414D, 414E, and 414F, which are operatively coupled to vacuum substrate transfer chambers (transfer chambers 403A and 403B). The factory interface 404 is operatively coupled to transfer chamber 403A via one or more loading gate chambers (two loading gate chambers, such as 406A and 406B shown in Figure 4).

[0068] In some embodiments, the fab interface 404 includes at least one docking station 407 and at least one fab interface robot 438 to facilitate the transfer of semiconductor substrates. The docking station 407 is configured to accept one or more front-opening unified pods (FOUPs). An embodiment of Figure 4 shows four FOUPs, such as FOUP 405A, FOUP 405B, FOUP 405C, and FOUP 405D. The fab interface robot 438 is configured to transfer substrates from the fab interface 404 to the processing platform 401 via loading gate chambers (such as 406A and 406B). Each of the loading gate chambers 406A and 406B has a first port coupled to the fab interface 404 and a second port coupled to the transfer chamber 403A. Loading gate chambers 406A and 406B are coupled to a pressure control system (not shown) that evacuates and exhausts the loading gate chambers 406A and 406B to facilitate the passage of the substrate between the vacuum environment of transfer chamber 403A and the generally surrounding (e.g., atmospheric) environment of the plant interface 404. Transfer chambers 403A and 403B have vacuum robots 442A and 442B disposed within each transfer chamber. Vacuum robot 442A is capable of transferring substrate 421 between loading gate chambers 406A and 406B, processing chambers 414A and 414F, and cooling station 440 or pre-cleaning station 442. Vacuum robot 442B is capable of transferring substrate 421 between cooling station 440 or pre-cleaning station 442 and processing chambers 414B, 414C, 414D, and 414E.

[0069] In some embodiments, processing chambers 414A, 414B, 414C, 414D, 414E, and 414F are coupled to transfer chambers 403A and 403B. Processing chambers 414A, 414B, 414C, 414D, 414E, and 414F comprise at least an atomic layer deposition (ALD) processing chamber and a physical vapor deposition (PVD) processing chamber. Additional chambers, such as CVD chambers, annealing chambers, additional ALD chambers, additional PVD chambers, etc., may also be provided. The ALD and PVD chambers may include any chambers suitable for performing all or part of the methods described herein, as described above.

[0070] In some embodiments, one or more optional maintenance chambers (illustrated as 416A and 4168) may be coupled to transfer chamber 403A. Maintenance chambers 416A and 416B may be configured to perform other substrate processes, such as degassing, orientation, substrate metering, cooling, etc.

[0071] The system controller 402 controls the operation of the tool 400 by directly controlling the process chambers 414A, 414B, 414C, 414D, 414E, and 414F, or by controlling a computer (or controller) associated with the process chambers 414A, 414B, 414C, 414D, 414E, and 414F and the tool 400. In operation, the system controller 402 collects and provides feedback on data from the various chambers and systems to optimize the performance of the tool 400. The system controller 402 typically includes a central processing unit (CPU) 430, memory 434, and support circuitry 432. The CPU 430 can be any type of general-purpose computer processor that can be used in an industrial environment. The support circuitry 432 is conventionally coupled to the CPU 430 and may include cache memory, clock circuitry, input / output subsystems, power supply, etc. Software routines (such as those described above) may be stored in memory 434, and when such software routines are executed by CPU 430, CPU 430 is converted into a dedicated computer (system controller 402). Software routines may also be stored and / or executed by a second controller (not shown) located at a remote end of tool 400.

[0072] Although the disclosure herein has been described with reference to specific embodiments, these embodiments are merely illustrative of the principles and applications of this invention. Therefore, those skilled in the art will understand that various modifications and variations can be made to the methods and apparatus of this invention without departing from the spirit and scope of this invention. Thus, this invention includes modifications and variations within the scope of the appended claims and their equivalents. [Simplified Explanation of the Diagram]

[0009] The embodiments of the present invention, which are briefly summarized above and discussed in more detail below, can be understood by referring to the illustrative embodiments of the present invention illustrated in the accompanying drawings. However, the drawings illustrate only typical embodiments of the present invention and are therefore not to be considered as limiting the scope, as other equally effective embodiments are permissible.

[0010] Figure 1 illustrates a cross-sectional view of a PVD process chamber according to at least some embodiments of the present invention.

[0011] Figure 2 illustrates a flowchart of a method for processing a substrate according to at least some embodiments of the present invention.

[0012] Figure 3 illustrates a schematic diagram of pulsed parameters used in a method of processing a substrate according to at least some embodiments of the present invention.

[0013] Figure 4 illustrates a cluster tool suitable for performing a method for processing a substrate according to at least some embodiments of the present invention.

[0014] To facilitate understanding, the same element symbols have been used where possible to indicate the same elements common to all figures. The figures are not drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be advantageously incorporated into other embodiments without further description. [Biomaterial Storage]

[0074] Domestic storage information (please note in order of storage institution, date, and number): None. International storage information (please note in order of storage country, institution, date, and number): None.

Claims

1. A method of forming a barrier layer on a substrate, comprising the steps of: applying a bias power to a substrate support supporting the substrate by pulsed voltage, while exposing an exposed barrier layer deposited on a dielectric layer on the substrate and within a feature of the substrate to a plasma to treat the exposed barrier layer to form a treated exposed barrier layer, wherein pulsed voltage includes a first pulse waveform from an initial low value to a higher first value, providing up to about 500 watts of RF power at a pulse frequency of about 1 Hz to about 10 kHz, followed by a second pulse waveform different from the first pulse waveform from the initial low value to a higher second value, providing up to about 500 watts of RF power at a pulse frequency of about 1 Hz to about 10 kHz, wherein the second RF power is greater than the first RF power, wherein the barrier layer includes a metal nitride, and wherein the treated exposed barrier layer has a higher density and a lower resistivity compared to the exposed barrier layer before treatment.

2. The method as described in claim 1, wherein the exposed barrier layer is deposited by an atomic layer deposition process.

3. The method as described in claim 2, wherein the exposed barrier layer is a tantalum nitride layer.

4. The method as described in claim 1 further comprises the step of: depositing the exposed barrier layer on the substrate and within the feature using an atomic layer deposition process.

5. The method as described in claim 4, wherein the exposed barrier layer is a tantalum nitride layer.

6. The method as described in claim 1, wherein the first amount of RF power is about 10 to about 150 watts, and the second amount of RF power is about 100 to about 500 watts.

7. The method as described in any one of claims 1 to 5, wherein the first amount of RF power is provided for a total duration of about 10 seconds, and the second amount of RF power is provided for a total duration of about 10 seconds.

8. The method as described in any one of claims 1 to 5, wherein the step of pulsed bias power comprises the following steps: providing RF power of about 10 to about 150 watts at a pulse frequency of about 1 Hz to about 10 kHz for a total duration of about 10 seconds, and then increasing the bias power at a pulse frequency of about 1 Hz to about 100 to about 500 watts of RF power for a total duration of about 10 seconds.

9. The method of any one of claims 1 to 5, wherein the plasma comprises a source gas, the source gas comprising one or more of an inert gas, nitrogen (N2), oxygen (O2), or water vapor (H2O).

10. The method as described in any one of claims 1 to 5, wherein the bias power has a frequency of about 0.1 to about 99 MHz.

11. A method of forming a barrier layer on a substrate, comprising the steps of: depositing a barrier layer on a dielectric layer on a substrate and within a feature of the substrate using an atomic layer deposition process; and densifying the barrier layer by pulsed bias power applied to a substrate support supporting the substrate while exposing the barrier layer to a plasma formed of an inert gas, wherein pulsed bias power applied to the substrate support supporting the substrate while exposing the exposed barrier layer on the dielectric layer on the substrate and within the feature of the substrate to a plasma to densify the exposed barrier layer to form a treated exposed barrier layer, wherein pulsed bias power comprises a first pulse waveform from an initial low value to a higher first value, providing up to about 500 watts of RF power at a pulse frequency of about 1 Hz to about 10 kHz, followed by a second pulse waveform different from the first pulse waveform from the initial low value to a higher second value, at about 1 Hz. A pulse frequency of approximately 10 kHz provides a second amount of RF power of up to approximately 500 watts, wherein the second amount of RF power is greater than the first amount of RF power.

12. The method as described in claim 11, wherein the barrier layer is a tantalum nitride layer.

13. The method as described in claim 11, wherein the first amount of RF power is about 10 to about 150 watts, and the second amount of RF power is about 100 to about 500 watts.

14. An integrated system for forming a barrier layer on a substrate, comprising: a deposition chamber configured to deposit a barrier layer on a dielectric layer in a feature of the substrate by atomic layer deposition; and a plasma processing chamber configured to process the deposited barrier layer with an inert pulsed plasma, the plasma processing chamber comprising: a biasable substrate support in which an RF bias electrode is disposed; and a pulse controller configured to pulse an input RF signal provided to the RF bias electrode, configured to apply a bias power to the substrate support supporting the substrate by pulsed ... A pulse frequency of kHz provides a first amount of RF power of up to about 500 watts, followed by a second pulse waveform of different from the first pulse waveform, ranging from the initial low value to a higher second value, providing a second amount of RF power of up to about 500 watts at a pulse frequency of about 1 Hz to about 10 kHz, wherein the second amount of RF power is greater than the first amount of RF power, and wherein the treated exposed barrier layer has a higher density and a lower resistivity compared to the exposed barrier layer before treatment.

15. The integrated system as claimed in claim 14, wherein the deposition chamber and the plasma processing chamber are separate chambers coupled to a central vacuum transfer chamber configured to move a substrate from the deposition chamber to the plasma processing chamber, or wherein the deposition chamber and the plasma processing chamber are the same chamber.

16. The integrated system as described in any one of claims 14 to 15, further comprising an RF power supply coupled to the RF bias electrode to provide the input RF signal to the RF bias electrode, wherein the RF power supply is configured to provide RF power at a frequency of about 0.1 to about 99 MHz, and wherein the pulse controller is configured to pulse the input RF signal at a pulse frequency of about 1 Hz to about 10 kHz.

17. The integrated system as claimed in claim 16 further includes a gas source coupled to the plasma processing chamber and configured to provide one or more of an inert gas, nitrogen (N2), oxygen (O2), or water vapor (H2O).

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