Substrate processing method
Patent Information
- Application Number
- TW111136004
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-09-28
- Filing Date
- 2022-09-23
- Publication Date
- 2026-08-11
- Estimated Expiration
- 2042-09-22
AI Technical Summary
The increasing aspect ratio of pattern structures in semiconductor devices leads to challenges in filling interstitial silicon structures without gaps or voids, which can degrade insulation performance and cause metal routing issues during metallization.
A substrate processing method that involves forming layers with controlled profile changes, including increasing the width of recesses in the upper regions and reducing them in lower regions to prevent void formation and position voids at lower levels within the gap structure.
This method effectively prevents void exposure during subsequent processes, maintaining insulation integrity and preventing metal penetration by positioning voids at lower levels within the gap structure.
Smart Images

Figure TWG2TB001905133_001 
Figure TWG2TB001905133_002 
Figure TWG2TB001905133_003
Abstract
Description
[Technical Field]
[0001] One or more embodiments relate to a substrate processing method, particularly a method for filling gap structures. [Previous Technology]
[0002] As the integration of semiconductor devices increases, the aspect ratio (A / R) of patterned structures also increases. For example, as the depth-to-width ratio of the entrance to a gap structure increases, the technical difficulty of filling the inter-silicon structure without gaps or voids also increases. Atomic layer deposition (ALD) has the advantage of depositing films of uniform thickness onto the walls and bottom surfaces of patterned structures. However, in the case of layer-by-layer deposition where thin films are stacked sequentially, when films stacked face-to-face in a patterned structure have gaps in contact with each other, a boundary surface is formed, and voids remain at this boundary surface. When these voids are exposed to the outside in subsequent processes, the performance of the semiconductor device deteriorates. For example, insulation performance may deteriorate due to penetration of metal wiring or interconnect materials during metallization processes. [Summary of the Invention]
[0003] One or more embodiments include a substrate processing method that can prevent the problem of voids being exposed in subsequent processes by allowing voids to be formed at the lower portion of the voids in a void filling process of a void filling structure.
[0004] Additional features will be set forth in part in the following description and in part will be apparent from the description or may be learned by practicing the embodiments presented in this disclosure.
[0005] According to one or more embodiments, a substrate processing method includes: providing a patterned structure having a first protrusion and a second protrusion, wherein the upper surfaces of the first protrusion and the second protrusion each have a flat portion and an edge portion surrounding the flat portion; forming a first layer having a first thickness on the patterned structure, wherein a first recess having a first width is formed between the first protrusion and the second protrusion by forming the first layer; and changing the contour of the first layer, wherein the contour of the first layer is changed such that the width of the first recess in a first upper region adjacent to the edge portion of the first protrusion and the second protrusion increases, and the width of the first recess in a first lower region below the first upper region decreases.
[0006] According to an example of a substrate processing method, the process of forming a first layer and changing the contour of the first layer is repeated multiple times to achieve gap filling in the space between the first protrusion and the second protrusion.
[0007] According to another example of the substrate processing method, this cycle includes: forming a second layer on a first layer, wherein a second recess is formed between a first protrusion and a second protrusion by forming the second layer; and changing the contour of the second layer. During the change of the contour of the second layer, the width of the second recess in the second upper region may be increased, and the width of the second recess in the second lower region below the second upper region may be decreased.
[0008] According to another example of the substrate processing method, the second lower region may be below the first lower region.
[0009] According to another example of the substrate processing method, since the width of the second recess in the second lower region is reduced, the first part on the side surface of the first protrusion of the second layer and the second part on the side surface of the second protrusion of the second layer can contact each other to form a gap.
[0010] According to another example of the substrate processing method, the void may be included in the second lower region.
[0011] According to another example of the substrate processing method, the formation of the first layer may include applying a first plasma, and the change of the contour of the first layer may include applying a second plasma.
[0012] According to another example of the substrate processing method, the power level of the second plasma may be greater than the power level of the first plasma.
[0013] According to another example of the substrate processing method, the frequency of the second plasma may be lower than the frequency of the first plasma.
[0014] According to another example of the substrate processing method, the frequency of the first plasma may be a first frequency range, and the frequency of the second plasma may include the first frequency range and a second frequency range lower than the first range.
[0015] According to another example of the substrate processing method, the substrate processing apparatus configured to perform the substrate processing method may include a matching network, wherein the matching network may be configured to perform a first matching operation for a first frequency range and a second matching operation for a second frequency range.
[0016] According to another example of the substrate processing method, the application of the first plasma can be performed for a first time period and the application of the second plasma can be performed for a second time period. By adjusting the ratio between the first time period and the second time period, the position of the remaining gap after the gap filling of the pattern structure can be changed.
[0017] According to another example of the substrate processing method, a first sub-cycle may be performed multiple times, including applying a first plasma during the formation of a first layer, and a second sub-cycle may be performed multiple times, including applying a second plasma during the change of the contour of the first layer. By adjusting the ratio between the number of repetitions of the second sub-cycle and the number of repetitions of the first sub-cycle, the position of the remaining gaps after the gap filling of the pattern structure can be changed.
[0018] According to another example of the substrate processing method, the formation of the first layer may include supplying a source gas, supplying a reactant gas, and applying a first plasma, and the change of the profile of the first layer may include supplying the reactant gas and applying a second plasma different from the first plasma.
[0019] According to another example of the substrate processing method, the supply of source gas, the supply of reactant gas and the application of the first plasma are performed for the same duration.
[0020] According to another example of the substrate processing method, the supply of source gas and the supply of reactant gas can be supplied in advance before the same time period.
[0021] According to another example of the substrate processing method, the formation of the first layer may further include supplying a purge gas between the supply of the source gas and the supply of the reactant gas, and supplying at least one of the purge gas after the supply of the reactant gas.
[0022] According to another example of the substrate processing method, the reactant gas can be used as a purge gas.
[0023] According to one or more embodiments, a substrate processing method for filling a recess between a first protrusion and a second protrusion of a patterned structure, the method comprising: changing the profile of a layer formed on the patterned structure, wherein the change of the profile of the layer comprises: increasing the width of the recess in an upper region to suppress the formation of voids in the upper region; and reducing the width of the recess in a lower region to contact the layer, thereby inducing the formation of voids below the lower region.
[0024] According to one or more embodiments, the substrate processing method performs a plurality of cycles including a first sub-cycle and a second sub-cycle, wherein the first sub-cycle includes: supplying radio frequency (RF) power under a first condition to weaken the bonding forces within the molecules of the source gas and decompose the source gas; and purging residues, and the second sub-cycle includes: supplying reactant gas and RF power under a second condition to destroy the bonding structure of the layer formed by the first sub-cycle; and purging residues.
Implementation Method
[0026] Reference will now be made in detail to several embodiments, examples of which are illustrated in the accompanying drawings, wherein similar element symbols throughout refer to similar elements. In this respect, the embodiments herein may take different forms and should not be construed as limited to the description set forth herein. Accordingly, the embodiments are described below only by reference to the drawings to explain the various forms of this specification. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. When a statement such as "at least one of..." follows a list of elements, it modifies the entire list of elements rather than individual elements in the list.
[0027] Hereinafter, several embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
[0028] In this respect, the embodiments described herein may take different forms and should not be construed as limited to the descriptions set forth herein. Rather, such embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art.
[0029] The terminology used herein is for the purpose of describing particular embodiments and is not intended to limit the disclosure. Unless the context clearly indicates otherwise, the singular forms "a / an" and "the" as used herein are intended to include the plural forms as well. It should be further understood that the terms "includes / including" and / or "comprises / comprising" as used herein indicate the presence of groups of stated features, integers, steps, processes, components, ingredients, and / or the like, but do not exclude the presence or addition of one or more other groups of features, integers, steps, processes, components, ingredients, and / or the like. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0030] It should be understood that although the terms first, second, etc., may be used herein to describe various components, elements, areas, layers, and / or sections, such components, elements, areas, layers, and / or sections should not be limited to these terms. These terms do not represent any order, quantity, or importance, but are merely used to distinguish one component, area, layer, and / or section from another. Therefore, without departing from the teachings of the embodiments, the first component, element, area, layer, or section discussed below may be referred to as a second component, element, area, layer, or section.
[0031] Embodiments of the present disclosure will now be described with reference to illustrations, which schematically depict embodiments of the present disclosure. In the illustrations, the shapes depicted may be expected to vary due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of the present disclosure should not be construed as limited to the specific regional shapes depicted herein, but may include, for example, shape deviations caused by manufacturing processes.
[0032] Figure 1 is a flowchart of a substrate processing method according to several embodiments. Figures 2 to 7 are cross-sectional views of the substrate processed by the substrate processing method in each stage shown in Figure 1.
[0033] Referring to Figures 1 and 2, firstly, in operation S100, a pattern structure is provided, which has a first protrusion P1 and a second protrusion P2. Each of the upper surfaces of the first protrusion P1 and the second protrusion P2 may have a flat portion F and an edge portion E surrounding this flat portion F. Furthermore, the edge portion E of the first protrusion P1 and the second protrusion P2 may have a specific curvature.
[0034] The pattern structure is a non-planar structure and may include an upper surface, a lower surface, and a side surface connecting the upper surface to the lower surface. This pattern structure can be used to form an active area or a gate pattern. For example, when this pattern structure is used to implement a flash memory, each of the first protrusion P1 and the second protrusion P2 may include a gate electrode and a tunneling insulating layer. As another example, when this pattern structure is used to implement a metal contact, each of the first protrusion P1 and the second protrusion P2 may include an interlayer insulating layer.
[0035] This pattern structure may be formed on a substrate, and the substrate may be, for example, a semiconductor substrate or a display substrate. The substrate may include, for example, any one of silicon, silicon-on-insulator, silicon-on-sapphire, germanium, silicon-germanium, and gallium arsenide.
[0036] Referring to Figures 1 and 3, operation S110 is performed to form a first layer 10 on the patterned structure. In order to form the first layer 10, supplying a source gas, supplying a reactant gas, and applying a first plasma can be performed.
[0037] Since this first layer 10 is formed on the patterned structure, the first layer 10 can define a first recess R1. Specifically, by forming the first layer 10 on the side surface of the first protrusion P1, the lower surface of the patterned structure between the first protrusion P1 and the second protrusion P2, and the side surface of the second protrusion P2, the first recess R1 surrounded by the first layer 10 can be formed. The first recess R1 may have a first width D1. The width of the recess may, for example, be defined as the distance between the side surfaces of the first layer 10 measured at a certain height from the lower surface of the patterned structure (or the average of the distances measured at multiple heights).
[0038] The operation S110 of forming the first layer 10 may include the application of a first plasma. For example, the first layer 10 may be formed by supplying a source gas and a reactant gas in a plasma atmosphere under first conditions. In some embodiments, a first sub-cycle including the application of the first plasma may be repeated to form the first layer 10.
[0039] In some embodiments, the source gas and reactant gas can be supplied simultaneously. In this case, the supply of the source gas, the supply of the reactant gas, and the application of the first plasma are performed for the same duration. In another embodiment, the supply of the source gas and the supply of the reactant gas can be supplied in advance before this same duration. In other words, the source gas and the reactant gas can be supplied, and then the supply of the source gas, the supply of the reactant gas, and the application of the first plasma can be performed simultaneously.
[0040] In some embodiments, the source gas and reactant gas may be supplied sequentially. In an alternative embodiment, a purging operation (i.e., the supply of purging gas) may be performed between the supply of the source gas and the supply of the reactant gas. In another embodiment, a purging operation of residues may be performed after the supply of reactant gas. In an alternative further embodiment, the purging gas may continue to be supplied during the formation of the first layer. In yet another embodiment, the reactant gas may be used as the purging gas. In other words, the purging gas may be a reactive purging gas that acts as a reactant gas when plasma is applied.
[0041] For example, the first sub-cycle may include applying the first plasma, supplying the source gas, and / or supplying the reactant gas (and further operations according to the above modifications). In other words, to form the first layer 10, the first sub-cycle including at least one of the above operations may be repeated.
[0042] In some embodiments, the supply of the first plasma can be performed during the supply of the source gas. Therefore, when a silicon precursor is used as the source gas, the bonding force in the molecules of the silicon precursor can be weakened by plasma application. For this purpose, during the application of the first plasma, power (e.g., radio frequency power) under a first condition can be applied to weaken the bonding force in the molecules of the source gas.
[0043] Referring to Figures 1 and 4, after the first layer 10 is formed, an operation S120 is performed to change the outline of the first layer 10. The operation S120 to change the outline of the first layer 10 may include an operation S123 to increase the width of the first recess R1 in the first upper region UP1 near the edge E of the first protrusion P1 and the second protrusion P2, and an operation S125 to decrease the width of the first recess R1 in the first lower region DN1 below the first upper region UP1.
[0044] It should be noted that the upper and lower regions described herein are distinguished based on whether the thickness of the layer increases during the change of the layer's contour. For example, the region where the thickness of the first layer 10 decreases during the operation S120 of changing the contour of the first layer 10 can be classified as the first upper region UP1, while the region where the thickness of the first layer 10 increases can be classified as the first lower region DN1. Furthermore, the first boundary line BD1 can be defined as the boundary line dividing the first upper region UP1 and the first lower region DN1.
[0045] For example, during the operation S123 of increasing the width of the first recess R1, the width of the first recess R1 in the first upper region UP1 can be increased from D1U to D1U'. During the operation S125 of decreasing the width of the first recess R1, the width of the first recess R1 in the first lower region DN1 can be decreased from D1L to D1L'. Therefore, based on the first boundary line BD1 between the first upper region UP1 and the first lower region DN1, the width of the first layer 10 can be decreased (above the boundary line) or increased (below the boundary line).
[0046] In some embodiments, an operation S123 can be performed to increase the width of the first upper region UP1 to suppress the formation of voids in the first upper region UP1. Since the gap between the layers formed on both sides of the protrusion narrows, causing voids to form when the layers come into contact with each other, the formation of voids can be suppressed when the width of the recess is increased. On the other hand, an operation S125 can be performed to reduce the width of the first lower region DN1 to induce the formation of voids. That is, by reducing the width of the recess, the layers formed on both sides of the protrusion can come into contact with each other, and therefore, the formation of voids can be induced.
[0047] In some embodiments, the operation S120 of changing the contour of the first layer 10 may include applying a second plasma. The application of the second plasma may be performed when the operations S123 and S125 described above are executed. In another embodiment, the operation S120 of changing the contour of the first layer 10 may further include supplying a reactant gas. In some embodiments, in order to change the contour of the first layer 10, a second sub-cycle including the application of the second plasma and / or the supply of the reactant gas may be repeated.
[0048] In some embodiments, the application of the second plasma and the supply of the reactant gas can be performed simultaneously. In another embodiment, the application of the second plasma and the supply of the reactant gas can be performed sequentially. In another embodiment, a purge of residues can be performed after the supply of the reactant gas. In an optional further embodiment, the supply of the purge gas can continue during the alteration of the profile of the first layer 10. In yet another embodiment, the purge gas can be a reactive purge gas that acts as a reactant gas when the plasma is applied.
[0049] For example, the second sub-cycle may include the application of the second plasma and / or the supply of reactant gas (and further operations according to the above modifications). In other words, if the outline of the first layer 10 is to be changed, the second sub-cycle including at least one of the above operations may be repeated.
[0050] In some embodiments, the second plasma may be different from the first plasma. More specifically, the process parameters of the first and second plasmas may be different. For example, the power (e.g., radio frequency power) of the second plasma may be greater than the power of the first plasma. In another example, the frequency of the second plasma may be lower than the frequency of the first plasma.
[0051] In another example, the frequency of the second plasma may include two frequency ranges. For example, when the frequency of the first plasma is in a first frequency range (e.g., a radio frequency band), the frequency of the second plasma may include the first frequency range and a second frequency range smaller than the first range (e.g., a frequency in the kilohertz band).
[0052] A substrate processing apparatus for implementing a second plasma having a dual-band frequency may include a matching network (see 55 in Figure 23) configured to perform a matching operation relative to the dual-band frequency. For example, a matching network connected between an electrode (e.g., a spray head and / or base) of the substrate processing apparatus and a generator may be configured to perform a first matching operation for a first frequency range and a second matching operation for a second frequency range.
[0053] In another embodiment, the second plasma may be oriented. For example, a bias voltage may be applied so that the ions generated by the plasma face the upper surface of the substrate (i.e., the first layer 10). The second plasma under the second condition (i.e., a high and / or low frequency) may be used to disrupt the bonding structure of the first layer 10.
[0054] In other words, since the second plasma is applied under the second conditions, the bonding structure of the first layer 10 can be broken, and therefore, the profile of the first layer 10 can be changed. The change in the profile of the first layer 10 can include the depression of the first layer 10 (i.e., the destruction of the bonding structure and the resulting collapse) caused by the application of the second plasma and the redeposition of the sputtered components of the first layer 10 during the destruction of the first layer 10 by the second plasma. The depression of the first layer 10 can increase the width of the first recess R1 formed by the first layer 10 in the first upper region UP1, and the redeposition of the first layer 10 can decrease the width of the first recess R1 formed by the first layer 10 in the first lower region DN1.
[0055] Referring back to Figures 1 and 5, after operation S120, which alters the outline of the first layer 10, operation S210, which forms the second layer 20, can be performed. Operation S210, which forms the second layer, can be performed in the same manner as forming the first layer. That is, in order to form the second layer 20, the supply of source gas, the supply of reactant gas, and the application of the first plasma can be performed. Furthermore, many modifications described in operation S110, which forms the first layer, can also be applied to operation S210, which forms the second layer.
[0056] Subsequently, as shown in Figure 6, a gap-filling operation is performed by forming subsequent layers (i.e., the third layer 30 and the fourth layer 40). The operation of forming subsequent layers S310 can be performed in the same manner as the operation of forming the first layer S110. In some embodiments, the formation of subsequent layers can be performed in a manner different from the operation of forming the first layer S110 and / or the operation of forming the second layer S210.
[0057] For example, in some embodiments, the operation S110 of forming the first layer and the operation S310 of forming the third layer can be implemented in a manner that the source gas, reactant gas and plasma are applied simultaneously to improve the film growth rate. On the other hand, the operation S210 of forming the second layer can be performed by sequentially supplying the source gas and reactant gas (for example, performing an atomic layer deposition (ALD) process). In this example, in the second layer 20, unit layers (e.g., atomic layers) can be sequentially stacked such that the side surfaces of the unit layers can contact each other, and boundary surfaces and voids on the boundary surfaces can be formed at the contact points of the unit layers.
[0058] Subsequently, referring to Figures 1 and 7, the planarization operation S410 is performed. For example, the planarization operation S410 can be performed to expose the upper surface of the pattern structure.
[0059] As described above, according to this disclosure, by performing a contour change operation to increase the width of the upper region of the recess while reducing the width of the lower region of the recess, an accompanying void can be formed at the lower part of the gap during the gap filling process, and thus the problem of the void being exposed in subsequent operations (i.e., planarization operation S410) can be prevented.
[0060] Figure 8 is a flowchart of a substrate processing method according to several embodiments. Figures 9 to 11 are cross-sectional views of the substrate in some stages of the substrate processing method shown in Figure 8.
[0061] The substrate processing method according to the embodiment can be a variation of the substrate processing method according to the above embodiment. More specifically, the patterning structure preparation S100, the first layer formation operation S110, and the first layer contour change operation S120 shown in Figure 8 can be the same as the operations S100, S110, and S120 shown in Figure 1. Redundant descriptions will not be provided below.
[0062] In order to achieve gap filling in the space between the first protrusion P1 and the second protrusion P2, a cycle including forming a layer and changing the contour of the formed layer can be repeated multiple times. Specifically, as shown in Figure 8, this cycle may include a first cycle C1, which includes an operation S110 for forming a first layer and an operation S120 for changing the contour of the first layer, and a second cycle C2, which includes an operation S210 for forming a second layer and an operation S220 for changing the contour of the second layer.
[0063] The appearance of the substrate after the second cycle C2 is shown in Figure 9. That is, Figure 9 shows the state after the operation S120 of changing the contour of the first layer, wherein the contour of the second layer 20 is changed by forming a second layer 20a with a uniform thickness and then applying plasma suitable for disrupting the bonding structure of the second layer with a uniform thickness. In Figure 9, the second layer 20a with a uniform thickness is represented by a dashed line, while the second layer 20b with a changed contour is represented by a solid line.
[0064] During the second cycle C2, a second layer 20a with a uniform thickness can be formed, and thus a second recess R2 with a second width can be formed between the first protrusion P1 and the second protrusion P2 by forming the second layer 20a. Subsequently, as the contour of the second layer 20a changes, the width of the second recess R2 in the second upper region UP2 increases, and the width of the second recess R2 in the second lower region DN2 decreases. Therefore, based on the second boundary BD2 between the second upper region UP2 and the second lower region DN2, the width (or thickness) of the second layer 20 may decrease (above the boundary line) or increase (below the boundary line).
[0065] As previously stated, the upper and lower regions described herein are distinguished based on whether the thickness of the layer increases during the alteration of the layer's profile. For example, when a second layer 20b is formed by altering the profile of a second layer 20a having a uniform thickness, the region where the thickness of the second layer 20a decreases can be classified as the second upper region UP2, while the region where the thickness of the second layer 20a increases can be classified as the second lower region DN2. Furthermore, the second boundary line BD2 can be defined as a boundary line dividing the second upper region UP2 and the second lower region DN2.
[0066] More specifically, by forming the second layer 20a, in the second upper region UP2 adjacent to the edges of the first protrusion P1 and the second protrusion P2, the second recess R2 may have a second upper width D2U, and in the second lower region DN2 below the second upper region UP2, the second recess R2 may have a second lower width D2L. Subsequently, when forming the second layer 20b with a changed profile, the second recess R2 may be changed to have a second upper width D2U' and a second lower width D2L'.
[0067] In some embodiments, the width of the second lower region DN2 of the second recess R2 may be reduced from D2L to D2L', and due to this reduction, a contact portion CP may be formed in which the first portion of the second layer 20 on one side surface of the first protrusion P1 and the second portion of the second layer 20 on one side surface of the second protrusion P2 come into contact with each other. Due to this contact, a gap may be formed in the second lower region DN2.
[0068] In this way, by performing a contour-changing operation that simultaneously increases the width of the second upper region UP2 of the second recess R2 and decreases the width of the second lower region DN2 of the second recess R2, the gap generated during the gap-filling process can be located further down. In other words, since the second lower region DN2 in Figure 9 is located lower than the first lower region DN1 in Figure 4, the possibility of gap exposure in the embodiments of Figures 8 and 9 to 11 is less than in the embodiments of Figures 1 and 2 to 7. This can also be explained based on the state of the second boundary line BD2 in Figure 9 being below the boundary line BD1 in Figure 4.
[0069] Subsequently, the loop is repeated to fill the space between the first protrusion P1 and the second protrusion P2 in order to perform a gap filling operation. Figure 10 shows how gap filling is achieved by subsequent loops. In other words, the space between the first protrusion P1 and the second protrusion P2 can be filled by performing a third loop C3, which includes forming a third layer 30 and changing the contour of the third layer; and a fourth loop C4, which includes forming a fourth layer 40 and changing the contour of the fourth layer.
[0070] Subsequently, referring to Figures 8 and 11, the planarization operation S410 is performed. As previously described, the planarization operation S410 can be performed to expose the upper surface of the pattern structure.
[0071] As described above, by performing a gap-filling operation using a first plasma for forming a layer and a second plasma for changing the contour of the formed layer, even if voids are formed, the formed voids can be located at a relatively low position (i.e., the lower part of the recess). Therefore, problems that may be caused by subsequent processes (e.g., post-planarization metallization processes) (such as voids exposed by planarization and metal material penetrating into the voids) can be prevented.
[0072] In some embodiments, the position of the voids can be changed by adjusting the process parameters of the operation of forming the layer using the first plasma and the operation of changing the layer profile using the second plasma.
[0073] For example, when a first plasma is applied for a first time period and a second plasma is applied for a second time period, the position of the gap remaining after the gap filling pattern structure is changed by adjusting the ratio between the first time period and the second time period. For example, by increasing the second time period compared to the first time period to further expand the width of the upper region of the recess, the gap can be located further down.
[0074] In another example, when a first sub-cycle involving the application of a first plasma is performed m times and a second sub-cycle involving the application of a second plasma is performed n times, the ratio of m to n can be adjusted. That is, by adjusting the ratio between the number of repetitions of the first sub-cycle and the number of repetitions of the second sub-cycle, the position of the gaps remaining in the pattern structure after the gap filling of the pattern structure can be changed. For example, by increasing the number of repetitions of the second sub-cycle compared to the number of repetitions of the first sub-cycle to further expand the width of the upper region of the recess, the gaps can be positioned further down.
[0075] Figures 12 and 13 are views illustrating substrate processing methods according to various embodiments. The substrate processing method according to the embodiments may be a variation of the substrate processing method according to the above embodiments. The embodiments will not be described again herein.
[0076] Referring to Figure 12, in order to perform gap filling on the pattern structure, a loop CN including a first sub-loop (operation S1110) and a second sub-loop (operation S1120) can be implemented, and then in operation S1130, it can be determined whether the gap filling is complete. For example, when the number of loop repetitions reaches a certain value, it is determined that the gap filling is complete, and the gap filling operation is terminated. Conversely, when the number of loop repetitions does not reach the specific value, the number of loop repetitions is increased, and the first sub-loop (operation S1110) and the second sub-loop (operation S1120) are executed again. In another embodiment, as shown in Figure 13, the determination of whether the gap filling is complete (operation S1130) can be performed between the first sub-loop (operation S1110) and the second sub-loop (operation S1120).
[0077] Figure 14 shows the boundary surfaces and voids formed in the gaps when a film is used to fill the gaps by atomic layer deposition.
[0078] In Figure 14, thin films 2 are sequentially stacked on two different surfaces 5 and 6 of a gap structure, facing opposite surfaces (in the direction of the arrows). Furthermore, the interfaces of the stacked surfaces contact each other to form a boundary surface 3. Voids 4 may be formed in a portion of the boundary surface 3. For example, when the upper region of the gap structure closes first, a void 4 may be formed between the two interfaces in the lower region of the boundary surface. Since the boundary surface 3 is the region between the interfaces of two films stacked in different directions, and not the location of chemical bonding between the two layers, the boundary surface 3 is formed during the process of filling the gap structure in a stacked manner. Figure 15 shows the voids exposed by subsequent processes.
[0079] In Figure 15, voids formed in the interstitial structure of the film may be exposed to the outside after a subsequent etch-back process. Furthermore, through the exposed voids, for example, metallic wiring material may penetrate and potentially compromise the insulating properties of the film. As described above, in interstitial filling processes by depositing interstitial structures, the films grow in different directions, and boundary surfaces exist between the stacked films. Therefore, alternatives are considered to maintain the film properties by minimizing the exposure of voids.
[0080] Therefore, this disclosure provides a method for minimizing the exposure of voids formed at the boundary surface during a gap filling process in which a gap structure is filled by layer-by-layer deposition. More specifically, it discloses a method for minimizing the exposure of voids on the boundary surface formed when a gap structure is filled by an atomic layer deposition method.
[0081] Figure 16 illustrates a method for controlling the position of a gap in a gap structure according to an embodiment.
[0082] The detailed description of each step in Figure 16 is as follows.
[0083] Step 1(a): Deposit the thin film 2 on an interstitial structure 1. The thin film 2 is deposited by a layer-by-layer deposition method, and the source gas, reactant gas, and first radio frequency power are supplied together for film deposition. Because the source gas and reactant gas are simultaneously decomposed by the first radio frequency power, the reactivity between the gases is improved, film formation is promoted, and the film growth rate is high. However, the intensity of the first radio frequency power supplied to improve the conformality of the film deposited on the surface of the interstitial structure is set to not excessively dissociate the source gas molecules. Alternatively, the intensity of the first radio frequency power is set to a degree that weakens the bonding force of the source gas molecules. That is, complete chemical vapor deposition (CVD) reaction can be prevented, but both film conformality and high film growth rate can be achieved simultaneously.
[0084] Step 2(b): In step 2, plasma treatment is performed by supplying a second radio frequency power to the film deposited on the upper region and supplying reactant gas, purge gas, or a mixture thereof. More specifically, the bonding structure of the film on the upper region is physically weakened / destroyed by ion bombardment of the upper region of the film. Sputtered film particles from the ion bombardment move from one surface to the film surface facing it, and these particles are redeposited here, increasing the film thickness in this region (a1 and a2). In Figure 16(b), this phenomenon is concentrated in the upper region of the gap, such that the weakening / destruction of the film formed in the upper region and the increase in film thickness in the lower region of the gap occur simultaneously. Figure 17 is an enlarged view of Figure 16(b).
[0085] Step 3(c): By repeating steps 1 and 2, the upper region of the gap is closed, and a void is formed in the gap. The void in the gap structure has a depth of d1.
[0086] Step 4(d): While continuously repeating steps 1 and 2, the collapse of the upper region of the gap and the redeposition at the sidewalls of the upper region continue, and the depth of the pores increases (d2 > d1). In other words, with repeated deposition-sputtering-redeposition, the area of redeposition and increased film growth rate in the upper region of the gap expands, and the depth of the pores increases. Even after the subsequent etch-back process, the pores are not exposed to the outside, and the upper part of the gap remains in a closed state.
[0087] According to Figure 16, by applying ion bombardment to the film stacked on the upper region of the gap structure using plasma active species, and weakening or destroying the bonding structure of the film in the upper region, the film profile in the upper region collapses and deforms into a concave profile inward toward the gap. Therefore, the upper region of the gap is artificially closed, and a void is formed inside the gap. By repeating this process, the upper region of the gap continues to be concave under the influence of ion bombardment, eventually resulting in a larger depth of voids in the gap, and even if a subsequent etch-back process is performed, the voids will not be exposed and the upper region of the gap can still remain in a closed state. In addition, according to Figure 16(a), when depositing a film on the surface of the gap structure, by simultaneously supplying source gas, reactant gas and radio frequency power, there is a technical effect of preventing the reduction of film conformability while improving the film growth rate. In other words, while controlling the position of the voids and the high film growth rate on the gap structure, there is a technical effect of preventing the voids in the gaps from being exposed in subsequent processes.
[0088] Figure 18 is a transmission electron microscope (TEM) photograph, which shows that, according to one embodiment, the upper part of the gap is closed and the vacancy position is deepened due to the redeposition of membrane particles (i.e., membrane components) caused by the indentation and splashing of the deposited film applied to the upper region of the gap structure.
[0089] The detailed description of each step in Figure 19 is as follows.
[0090] Step 1 (t1 to t2): In this step, as a step of depositing a film on the surface of the interstitial structure, a source gas and a reactant gas are supplied together, and the source gas and the reactant gas are decomposed and chemically reacted by a first radio frequency power to form a compound and a film (t1). Then, in a purging step (t2), the reaction byproducts are removed. This step is repeated at least once.
[0091] Step 2 (t3 to t4): In this step, as a plasma treatment step, a reactant gas or purge gas or a mixture thereof activated by a second radio frequency power is supplied. In this step, the membrane in the upper region of the gap structure has a profile in which the bonded structure is relaxed or destroyed by ion bombardment, and the membrane system in the upper part is concave inward. This step is repeated at least once. Steps 1 and 2 may be repeated multiple times (x cycles) to form a set of cycles. With the repetition of steps 1 and 2, the upper part of the gap closes, and the void is located deeper in the gap. Because the plasma treatment in this step involves ion bombardment on the membrane, it will be defined below as a sputtering step.
[0092] In Figure 19, the intensity of the radio frequency (RF) power in steps 1 and 2 is different. In step 1, the first RF power is supplied to a level that causes the source gas molecules to dissociate from the reactant gas or weakens the bonding forces in the source gas molecules to induce and promote film deposition, and increases the film growth rate through the decomposition and chemical reaction of the source gas and reactant gas. However, in step 2, a second RF power, stronger than that in step 1, is supplied to enhance the ion bombardment effect. Therefore, by varying the RF power applied to the deposition and sputtering steps, film deposition and ion bombardment can be performed more effectively.
[0093] In addition, compared with conventional plasma atomic layer deposition methods, by applying the source gas, reactant gas and first radio frequency power together in the deposition step (step 1) of Figure 19, the film growth rate can be improved, thereby improving the substrate processing speed and efficiency.
[0094] Furthermore, by applying a second radio frequency power in the sputtering step (step 2) of Figure 19, the properties of the film can be precisely controlled. For example, in one embodiment, the position of the voids within the gaps can be controlled. In another embodiment, the wet etch rate (WER) of the film can be controlled.
[0095] In this disclosure, the properties of the membrane are controlled by adjusting the intensity of the radio frequency power, but this disclosure is not limited thereto. For example, in another embodiment, the purpose of this disclosure can be achieved by changing the radio frequency, the radio frequency power application time, and the method of supplying the radio frequency power in steps 1 and 2. In another embodiment, a distal plasma can be applied in the deposition step, and the plasma can be applied directly in the sputtering step. In another embodiment, an additional gas can be supplied in the sputtering step to enhance the ion bombardment effect. For example, a heavy gas such as argon can be supplied and activated.
[0096] Although the reactant gas and purge gas are supplied together in Figure 19(a), in one embodiment according to Figure 19(b), only the reactant gas may be supplied without the purge gas. In this case, the reactant gas may be a reactive purge gas that reacts with the source gas only when radio frequency power is applied. For example, when forming a silicon oxide film, oxygen gas may be supplied as the reactive purge gas. When forming a silicon nitride film, nitrogen gas may be supplied as the reactive purge gas.
[0097] In one embodiment according to Figure 19, the source gas may be a silicon-containing gas. For example, the source gas may be at least one of aminosilane, iodosilane, or a silicon-containing gas (halide) containing a halogen element. The reactant gas may be an oxygen- or nitrogen-containing gas. For example, the reactant gas may be at least one of O2, N2O, NO2, O3, N2, N2H2 (diimide), and NH3, or mixtures thereof. In this case, the film deposited on the interstitial structure may be at least one of SiOx, SixNy, SiON, and SiCN, or mixtures thereof.
[0098] Figure 20 illustrates the depth of the void in relation to the progress of the deposition and splashing steps according to Figure 19.
[0099] As shown in Figure 20, the lower the progress ratio (D / S) of the deposition step D (step 1) and the sputtering step S (step 2), the deeper the void is located in the gap. The progress ratio can be the ratio of the number of repetitions or the ratio of the difference in applied RF power. Alternatively, the progress ratio can be the ratio of the RF power application time or the ratio of the difference in applied RF power frequency. Therefore, by controlling the RF power application method differently in the deposition and sputtering steps, the position of the void in the gap structure can be controlled and the exposure of the void can be suppressed in subsequent processes.
[0100] Figure 21 illustrates a process flow according to one of the other embodiments.
[0101] According to Figure 21, single-frequency RF power is supplied in the deposition step (t1), and dual-frequency RF power is supplied in the sputtering step (t3). The single-frequency RF power can be high-frequency RF power, and the dual-frequency RF power can be low-frequency / high-frequency RF power. The dual-frequency RF power can be supplied simultaneously with both low-frequency and high-frequency RF power. When dual-frequency RF power is applied, the amount of ions generated increases, and the ion bombardment effect increases. Furthermore, as the ion travel distance increases, the upper region of the gap where ion bombardment is applied can expand, allowing the pores in the gap to be deeper.
[0102] Figure 22 illustrates a process flow according to one of the other embodiments.
[0103] In Figure 22, a pre-flow step (t1) is further added to the deposition step. In the pre-flow step (t1), the source gas and reactant gas are supplied first before the RF power is supplied to reduce the plasma matching time in the reactor, so that more stable plasma generation can be achieved during the short RF power application time.
[0104] Table 1 shows the substrate processing conditions according to one embodiment. Temperature (°C) 50°C to 650°C (preferably 500°C to 600°C) Process pressure (Torque) 1 to 5 trays (preferably 2 to 4 trays) Silicon Source Diisopropylaminosilane (DIPAS) Gas flow rate (standard milliliters per minute (sccm)) O2 500 standard milliliters per minute to 4,000 standard milliliters per minute (preferably 1,000 to 3,000 standard milliliters per minute). Source carrier argon gas 500 standard milliliters per minute to 10,000 standard milliliters per minute (preferably 3,000 to 5,000 standard milliliters per minute) Purging argon gas 500 standard milliliters per minute to 4,000 standard milliliters per minute (preferably 1,000 to 3,000 standard milliliters per minute). reactant carrier argon gas 500 standard milliliters per minute to 4,000 standard milliliters per minute (preferably 1,000 to 3,000 standard milliliters per minute). Processing time per unit cycle (seconds) Pre-flow step 0.0 to 0.5 seconds (preferably 0.1 to 0.3 seconds) Deposition steps 0.1 to 1.0 seconds (preferably 0.2 to 0.6 seconds) Purging steps 0.1 to 0.5 seconds (preferably 0.2 to 0.6 seconds) Splashing steps 0.1 to 5.0 seconds (preferably 1.0 to 4.0 seconds) Purging steps 0.1 to 0.5 seconds (preferably 0.1 to 0.3 seconds) Plasma conditions Deposition steps (Single frequency) RF power 100 watts (W) to 2,000 watts (preferably 200 watts to 1,000 watts) Radio frequency 10 MHz to 100 MHz (preferably 12 MHz to 60 MHz) Splashing steps (Dual-band) RF power 100 watts to 2,000 watts - High frequency band (Preferably 1,000 watts to 1,500 watts) 100 watts to 1,000 watts - low frequency band (500 watts to 900 watts is preferred) Radio frequency 10 MHz to 100 MHz - High Frequency Band (Preferred range: 12 MHz to 60 MHz) 100 kHz to 500 kHz - Low frequency band (Preferred 150 kHz to 450 kHz)
[0105] Under the conditions in Table 1, high-frequency single-frequency radio frequency power is supplied in the deposition step, and dual-frequency radio frequency power, i.e., high-frequency radio frequency power and low-frequency radio frequency power, is supplied in the sputtering step. Diisopropylaminosilane (DIPAS) is used as the Si source under the processing conditions in Table 1, and SiO2 film is deposited on the interstitial structure by supplying oxygen gas as the reactant gas. However, various aminosilane gases other than DIPAS can be used as the Si source. Alternatively, Si sources based on iodosilanes or silicon halides can be used. For example, the Si source may include at least one of the following: TSA, (SiH3)3N, DSO, (SiH3)2, DSMA, (SiH3)2NMe, DSEA, (SiH3)2NEt, DSIPA, (SiH3)2N(iPr), DSTBA, (SiH3)2N(tBu), DEAS, SiH3NEt 2. DTBAS, SiH 3N(tBu) 2. BDEAS, SiH 2(NEt2) 2. BDMAS, SiH 2(NMe 2) 2. BTBAS, SiH 2(NHtBu) 2. BITS, SiH 2(NHSiMe3) 2. DIPAS, SiH 3N(iPr) 2. TEOS, Si(OEt) 4. SiCl 4. HCD, Si 2Cl 6, 3DMAS, SiH(N(Me) 2) 3, BEMAS, SiH2[N(Et)(Me)]2, AHEAD, Si2(NHEt)6, TEAS, Si(NHEt)4, Si3H8, DCS, SiH2Cl2, SiHI3, SiH2I2, or their derivatives or mixtures thereof. The oxygen reactant gas may include at least one of the following: O2, O3, CO2, H2O, NO2, N2O, or mixtures thereof.
[0106] Figure 23 is a schematic diagram of a reactor for applying an embodiment. A substrate 54 is mounted on a substrate support unit 53 of the reactor 51, and a gas inlet 52 is disposed in the opposite direction to the substrate support 53. The substrate support unit 53 may be a heating block that supplies heat energy to the substrate 54, and the gas inlet 52 may be a spray head. A gas system is supplied from the outside to the substrate 54 in the reactor 51 through the gas inlet 52, and the treated gas system is discharged through an exhaust unit 58. The exhaust unit 58 may be an exhaust pump. The gas inlet 52 is connected to a high-frequency power supply unit, and the high-frequency power supply unit includes a matching network 55, a high-frequency radio frequency power generator 56, and a low-frequency radio frequency power generator 57.
[0107] In the embodiment according to Figure 21 and Table 1, in the deposition step, radio frequency power is supplied from the high-frequency radio frequency power generator 56 to the reactor 51; in the sputtering step, radio frequency power is supplied from the high-frequency radio frequency power generator 56 and the low-frequency radio frequency power generator 57 to the reactor 51.
[0108] According to one embodiment, when forming a deposited film by stacking films on the surface of an interstitial structure, a source gas, a reactant gas, and high-frequency power are simultaneously supplied to form the film. Then, in a sputtering step, the film formed in the upper region of the interstitial structure is ion-bombarded with plasma active species, and redeposition is induced on the side surface of the upper region of the interstitial structure to close the upper region of the interstitial structure. This allows control over the position of the pores within the interstitial structure and suppresses pore exposure in subsequent processes. In another embodiment, supplying dual-frequency radio frequency power in the sputtering step increases the ion density and the ion bombardment effect on the upper region of the interstitial structure. Furthermore, compared to conventional plasma atomic layer deposition methods, supplying the source gas, reactant gas, and high-frequency power together to form the film increases the film growth rate and further improves the substrate processing speed per unit time.
[0109] It should be understood that the embodiments described herein are to be regarded as illustrative only and not as limiting. The description of various features or styles in the various embodiments should generally be regarded as other similar features or styles that can be used in other embodiments. Although one or more embodiments have been described with reference to drawings, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope of this disclosure as defined by the following claims. [Simplified Explanation of the Diagram]
[0025] The above and other features, characteristics and advantages of certain embodiments of this disclosure will become clearer from the following description and with reference to the accompanying drawings, in which: Figure 1 is a flowchart of a substrate processing method according to several embodiments; Figures 2 to 7 are cross-sectional views of the substrate in various stages of the substrate processing method illustrated in Figure 1; Figure 8 is a flowchart of a substrate processing method according to several embodiments; Figures 9 to 11 are cross-sectional views of the substrate in some stages of the substrate processing method illustrated in Figure 8; Figures 12 and 13 are views illustrating a substrate processing method according to several embodiments; Figure 14 shows the boundary surface and voids generated in the gaps when the gaps are filled by atomic layer deposition; Figure 15 is a view illustrating the voids exposed by subsequent processes after filling the gaps in Figure 14; Figure 16 is a view illustrating a method for controlling the void position in a gap structure according to an embodiment; Figure 17 is an enlarged view of Figure 16(b); Figure 18 is a transmission electron microscope (TEM) view. An electron microscope (TEM) image showing, according to one embodiment, the upper part of the gap is closed and the vacancy location is deepened due to the depression caused by the deposited film in the upper region of the ion bombardment gap structure and the redeposition of film particles caused by sputtering; Figure 19 is a flowchart of a substrate processing method according to several embodiments; Figure 20 is a graph showing the ratio of the progress of the deposition step and the sputtering step to the vacancy depth according to Figure 19; Figure 21 is a diagram showing a process flow according to another embodiment; Figure 22 is a diagram showing a process flow according to another embodiment; and Figure 23 is a schematic diagram of a reactor for applying an embodiment.
Claims
1. A substrate processing method, comprising: A pattern structure having a first protrusion and a second protrusion is provided, wherein the upper surface of the first protrusion and the second protrusion each has a flat portion and an edge portion surrounding the flat portion; a first layer having a first thickness is formed on the pattern structure, wherein a first width of a first recess is formed between the first protrusion and the second protrusion by forming the first layer; and a contour of the first layer is modified, wherein the contour of the first layer is modified such that the width of the first recess in a first upper region near the edges of the first protrusion and the second protrusion increases, and the width of the first recess in a first lower region below the first upper region decreases, wherein the formation of the first layer includes applying a first plasma, and the modification of the contour of the first layer includes applying a second plasma, wherein a substrate processing apparatus is configured to perform the substrate processing method, comprising a matching network, wherein the matching network is configured to perform a first matching operation for a first frequency range and a second matching operation for a second frequency range.
2. The substrate processing method of claim 1, wherein the formation of the first layer and the change of the contour of the first layer are repeated a plurality of times to achieve gap filling of a space between the first protrusion and the second protrusion.
3. The substrate processing method as described in claim 2, wherein the cycle includes: A second layer is formed on the first layer, wherein the formation of the second layer forms a second recess between the first protrusion and the second protrusion; And change the outline of the second layer, and during the change of the outline of the second layer, the width of the second recess in a second upper region increases, and the width of the second recess in a second lower region below the second upper region decreases.
4. The substrate processing method of claim 3, wherein the second lower region is below the first lower region.
5. The substrate processing method as described in claim 3, wherein, As the width of the second recess in the second lower region decreases, a first portion on one side surface of the first protrusion in the second layer and a second portion on one side surface of the second protrusion in the second layer come into contact with each other to form a gap.
6. The substrate processing method of claim 5, wherein the gap is contained in the second lower region.
7. The substrate processing method of claim 1, wherein the intensity of one of the second plasmas is greater than the intensity of one of the first plasmas.
8. The substrate processing method of claim 1, wherein the frequency of one of the second plasmas is less than the frequency of one of the first plasmas.
9. The substrate processing method of claim 1, wherein one frequency of the first plasma is a first frequency range, and one frequency of the second plasma includes the first frequency range and a second frequency range lower than the first frequency range.
10. The substrate processing method of claim 1, wherein the application of the first plasma is performed for a first time period, the application of the second plasma is performed for a second time period, and a position of a gap remaining in the pattern structure after gap filling is changed by adjusting a ratio between the first time period and the second time period.
11. The substrate processing method of claim 1, wherein a first sub-cycle of applying the first plasma during the formation of the first layer is performed a plurality of times, a second sub-cycle of applying the second plasma during the change of the contour of the first layer is performed a plurality of times, and a position of a void remaining in the pattern structure after gap filling is changed by adjusting a ratio between the number of repetitions of the second sub-cycle and the number of repetitions of the first sub-cycle.
12. The substrate processing method of claim 1, wherein the formation of the first layer includes supplying a source gas, supplying a reactant gas, and applying a first plasma, and the change of the contour of the first layer includes supplying the reactant gas and applying a second plasma different from the first plasma.
13. The substrate processing method of claim 12, wherein the supply of the source gas, the supply of the reactant gas, and the application of the first plasma are performed for the same duration.
14. The substrate processing method of claim 13, wherein the supply of the source gas and the supply of the reactant gas are supplied in advance before the same time period.
15. The substrate processing method of claim 12, wherein the formation of the first layer further includes at least one of the following: supplying a purge gas between the supply of the source gas and the supply of the reactant gas; and supplying the purge gas after the supply of the reactant gas.
16. The substrate processing method of claim 15, wherein the reactant gas is used as the purge gas.
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