Nitride semiconductor substrate and method for manufacturing nitride semiconductor substrate
Patent Information
- Application Number
- TW111143110
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2022-03-03
- Filing Date
- 2022-11-11
- Publication Date
- 2026-08-11
- Estimated Expiration
- 2042-11-10
AI Technical Summary
Existing GaN substrates face issues such as warping, cracking, and poor crystallinity due to thermal expansion coefficient mismatches, limiting the production of large-diameter, thick GaN epitaxial layers for high-frequency devices.
A nitride semiconductor substrate is developed with a composite structure comprising a polycrystalline ceramic core, adhesive layers, and a Group III nitride semiconductor seed layer, ensuring low dislocation and good crystallinity by minimizing thermal expansion coefficient differences, allowing for crack-free and thick GaN layers.
The substrate achieves reduced warpage, lower dislocation density, and improved crystallinity, enabling the production of self-standing GaN layers suitable for high-frequency devices without lattice mismatch and conductive layer leakage.
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Abstract
Description
Technical Field
[0001] This invention relates to a nitride semiconductor substrate and a method for manufacturing the nitride semiconductor substrate. Prior Technology
[0002] MOCVD, one of the methods for manufacturing semiconductor thin films, excels in large-diameter production and mass production capabilities, and can crystallize homogeneous thin films for deposition, thus it is widely used. Furthermore, nitride semiconductors, represented by GaN, are expected to be next-generation semiconductor materials, overcoming the limitations of silicon single crystals as a material.
[0003] Because GaN has a high saturation electron velocity, it can be used to fabricate devices capable of high-frequency operation. Furthermore, its large dielectric breakdown electric field allows for operation at high output. In addition, it promises to be lightweight, miniaturized, and have low power consumption.
[0004] In recent years, due to the high speed of communication represented by 5G and the accompanying requirement of high output, GaN HEMTs that operate at high frequency and can operate at high output have attracted much attention.
[0005] Silicon single-crystal substrates are the most cost-effective and advantageous for large-diameter applications when used as substrates for GaN epitaxial wafers used in GaN device fabrication. SiC substrates are also used due to their high thermal conductivity and good heat dissipation properties. However, the difference in thermal expansion coefficients between these substrates and GaN causes stress during the cooling process after epitaxial deposition, making them prone to cracking. Furthermore, the application of strong stress can sometimes lead to wafer breakage during device fabrication. Additionally, thicker GaN films cannot be formed, so even with complex stress-relief layers within the epitaxial layer, the thickness reaches a limit of approximately 5 μm without cracks.
[0006] Because the GaN substrate has the same (or very similar) coefficient of thermal expansion as the GaN epitaxial layer, the aforementioned problems are less likely to occur, and issues such as wafer breakage due to warping are also less likely to occur. Furthermore, because the lattice constant difference between the GaN substrate and the GaN layer used for epitaxial growth is extremely small, problems such as misalignment and crystallinity deterioration caused by lattice constant differences can also be resolved.
[0007] However, the fabrication of independent GaN substrates is not only difficult but also extremely expensive, making it impossible to produce substrates with large apertures, thus making them unsuitable for mass production.
[0008] Therefore, a large-diameter substrate for GaN epitaxy (hereinafter referred to as a GaN support substrate or simply a growth substrate) has been developed, which has a large diameter and a coefficient of thermal expansion similar to that of GaN. A typical GaN support substrate consists of a support structure, a planarization layer deposited on one side of the support structure, and a single-crystal silicon layer deposited on the planarization layer. The support structure includes a polycrystalline ceramic core, a first adhesive layer, a conductive layer, a second adhesive layer, and a barrier layer. Furthermore, sometimes the conductive layer is not formed or is only formed on one side. Alternatively, a conductive layer may be formed on the back side of the barrier layer.
[0009] By using this GaN support substrate, a GaN epitaxial substrate can be fabricated with a large diameter and a thick epitaxial layer, without cracking. Furthermore, due to the extremely small difference in thermal expansion coefficient between GaN and GaN, warping is less likely to occur during GaN growth or cooling. Therefore, not only can the warping of the substrate after film deposition be minimized, but there is also no need to set up complex stress-relief layers in the epitaxial growth layer. This shortens the epitaxial film deposition time and significantly reduces the cost of epitaxial growth.
[0010] Furthermore, most of the support substrates for GaN are ceramic, so the substrate itself is very hard and not only does it not easily undergo plastic deformation, but it also does not break the wafer, which occurs when nitride semiconductors are grown on silicon single crystal substrates with large apertures.
[0011] Patent document 1 discloses a technology for a bonding substrate (GaN support substrate) with a coefficient of thermal expansion similar to that of GaN.
[0012] While GaN support substrates are less prone to warping during growth due to differences in thermal expansion coefficients, their surface layer is composed of silicon, which, due to the difference in lattice constant between silicon and GaN layers, makes them more susceptible to crystallization defects (dislocations). As a result, the crystallinity of the GaN epitaxial layer deposited on the GaN support substrate is not significantly different from that when using a silicon single-crystal substrate as the support substrate.
[0013] Patent document 2 describes a method for separating a sapphire substrate from a GaN layer by irradiating it with pulsed laser light.
[0014] Patent document 3 describes a method in which a semiconductor thin film is peeled off by laser beam treatment or the like, and then bonded to another substrate. [Previous Technical Documents] (Patent Documents)
[0015] Patent document 1: Japanese Patent Publication No. 2019-523994. Patent document 2: Japanese Patent Application Publication No. 2013-21225. Patent document 3: Japanese Patent Application Publication No. 2010-161355. Summary of the Invention
[0016] [The problem the invention aims to solve] However, none of the patent documents 1 to 3 describe or suggest any measures to improve the crystallinity of the GaN epitaxial layer formed on the GaN support substrate.
[0017] The present invention is made to solve the above-mentioned problems, and aims to provide a nitride semiconductor substrate and a method for manufacturing the same, wherein the nitride semiconductor substrate includes a group III nitride semiconductor layer with low warpage, low inter-rowing, and good crystallinity. [Technical means to solve the problem]
[0018] To address the aforementioned problems, the present invention provides a nitride semiconductor substrate, wherein a group III nitride semiconductor layer comprising GaN is formed on a supporting substrate. The nitride semiconductor substrate is characterized in that… The aforementioned support substrate comprises: a composite substrate, which is formed by stacking multiple layers, the layers comprising a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a second adhesive layer deposited on the entire first adhesive layer, and a barrier layer bonded to the entire second adhesive layer; and, A group III nitride semiconductor seed layer, which is bonded to the aforementioned composite substrate through a planarization layer, and comprises at least GaN; and, The aforementioned group III nitride semiconductor layer is formed on the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the GaN (0002) growth surface of the aforementioned group III nitride semiconductor seed layer is less than 550 arcsec in terms of XRD full width at half maximum (FWHM).
[0019] As long as a nitride semiconductor substrate is formed by forming a group III nitride semiconductor layer on a group III nitride semiconductor seed layer, it is possible to make a group III nitride semiconductor layer with very low differential packing density and good crystallinity, thereby improving the characteristics of the device. The group III nitride semiconductor seed layer is a GaN seed with a (0002) growth surface crystallinity of 550 arcsec or less in terms of XRD full width at half maximum (FWHM).
[0020] Furthermore, as long as it is the nitride semiconductor substrate of the present invention, by using a support substrate comprising a composite substrate containing multiple layers, the warpage of the group III nitride semiconductor layer caused by the difference in thermal expansion coefficients during epitaxial growth can be reduced, thus enabling the formation of a crack-free and thick group III nitride semiconductor layer. Therefore, the group III nitride semiconductor layer can also be peeled off from the support substrate at the end to be used as a self-standing substrate.
[0021] Furthermore, the present invention provides a nitride semiconductor substrate, which has a GaN-containing group III nitride semiconductor layer formed on a support substrate. The nitride semiconductor substrate is characterized in that… The aforementioned support substrate includes: a composite substrate, which is formed by stacking multiple layers, each layer including a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a barrier layer bonded to the entire first adhesive layer, a second adhesive layer deposited on the back side of the barrier layer, and a conductive layer bonded to the back side of the second adhesive layer; and, A group III nitride semiconductor seed layer, which is bonded to the aforementioned composite substrate only through a planarization layer bonded to the front side of the composite substrate, and comprises at least GaN; and, The aforementioned group III nitride semiconductor layer is formed on the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the GaN (0002) growth surface of the aforementioned group III nitride semiconductor seed layer is less than 550 arcsec in terms of XRD full width at half maximum (FWHM).
[0022] As long as a nitride semiconductor substrate is formed by forming a group III nitride semiconductor layer on a group III nitride semiconductor seed layer, it is possible to make a group III nitride semiconductor layer with very low differential packing density and good crystallinity, thereby improving the characteristics of the device. The group III nitride semiconductor seed layer is a GaN seed with a (0002) growth surface crystallinity of 550 arcsec or less in terms of XRD full width at half maximum (FWHM).
[0023] Furthermore, by using a support substrate comprising a composite substrate containing multiple layers of the nitride semiconductor substrate, the warpage of the group III nitride semiconductor layer during epitaxial growth caused by the difference in thermal expansion coefficients can be reduced, thus enabling the formation of a crack-free and thick group III nitride semiconductor layer. Therefore, the group III nitride semiconductor layer can also be peeled off from the support substrate at the end to be used as a self-standing substrate.
[0024] Furthermore, as long as the nitride semiconductor substrate of the present invention includes the above-mentioned support substrate, no leakage path will be generated due to the front-side conductive layer of the support substrate, and it can be made to have excellent high-frequency characteristics.
[0025] Furthermore, the present invention provides a nitride semiconductor substrate, which has a GaN-containing group III nitride semiconductor layer formed on a support substrate. The nitride semiconductor substrate is characterized in that… The aforementioned support substrate includes: a composite substrate, which is formed by stacking multiple layers, each layer including a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a conductive layer bonded to the back side of the first adhesive layer, a second adhesive layer bonded to the back side of the conductive layer, and a barrier layer bonded to the front and side surfaces of the first adhesive layer, the side surface of the aforementioned conductive layer, and the side and back surface of the aforementioned second adhesive layer; and, A group III nitride semiconductor seed layer, which is bonded to the aforementioned composite substrate only through a planarization layer bonded to the front side of the composite substrate, and comprises at least GaN; and, The aforementioned group III nitride semiconductor layer is formed on the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the GaN (0002) growth surface of the aforementioned group III nitride semiconductor seed layer is less than 550 arcsec in terms of XRD full width at half maximum (FWHM).
[0026] As long as a nitride semiconductor substrate is formed on a group III nitride semiconductor seed layer, it is possible to make a group III nitride semiconductor layer with very low differential packing density and good crystallinity, thereby improving the characteristics of the device. The group III nitride semiconductor seed layer is GaN seed with a (0002) growth surface crystallinity of less than 550 arcsec in terms of XRD full width at half maximum (FWHM).
[0027] Furthermore, by using a support substrate comprising a composite substrate containing multiple layers of the nitride semiconductor substrate, the warpage of the group III nitride semiconductor layer during epitaxial growth caused by the difference in thermal expansion coefficients can be reduced, thus enabling the formation of a crack-free and thick group III nitride semiconductor layer. Therefore, the group III nitride semiconductor layer can also be peeled off from the support substrate at the end to be used as a self-standing substrate.
[0028] Furthermore, as long as the nitride semiconductor substrate of the present invention includes the above-mentioned support substrate, no leakage path will be generated due to the front-side conductive layer of the support substrate, and it can be made to have excellent high-frequency characteristics.
[0029] The aforementioned group III nitride semiconductor layer, in addition to GaN, can be configured to include one or more of AlN and AlGaN.
[0030] Thus, group III nitride semiconductor layers can contain nitrides other than GaN.
[0031] Preferably, the aforementioned polycrystalline ceramic core is configured to include aluminum nitride.
[0032] As long as the polycrystalline ceramic core contains aluminum nitride, the coefficient of thermal expansion can be made extremely small.
[0033] Preferably, the first adhesive layer and the second adhesive layer respectively comprise tetraethylsiloxane and / or silicon oxide, and the barrier layer comprises silicon nitride.
[0034] The first and second adhesive layers can, for example, contain the aforementioned compound. Furthermore, as long as the barrier layer contains the aforementioned compound, it can sufficiently block the movement of impurities from the interior of the composite substrate into the group III nitride semiconductor layer.
[0035] Preferably, the first adhesive layer and the second adhesive layer have a thickness of 50 to 200 nm, and the barrier layer has a thickness of 100 nm to 1500 nm.
[0036] As long as the thicknesses of the first and second adhesive layers are within the aforementioned range, the upper and lower layers can be bonded with sufficient force, and warping can be suppressed more effectively. Furthermore, as long as the thickness of the barrier layer is within the aforementioned range, the movement of impurities from the interior of the composite substrate into the group III nitride semiconductor layer can be sufficiently blocked.
[0037] Preferably, the aforementioned planarization layer comprises at least one selected from the group consisting of tetraethylsiloxane, silicon oxide, aluminum oxide, silicon nitride and silicon oxynitride, and has a thickness of 500 nm to 3000 nm.
[0038] Any material containing such a planarization layer can more reliably suppress warping and can contain a group III nitride semiconductor layer with better crystallinity. Furthermore, it can adequately planarize the unevenness of the front side.
[0039] The aforementioned group III nitride semiconductor seed layer can also have a thickness of more than 100 nm.
[0040] Group III nitride semiconductor seed layers can, for example, have a thickness of 100 nm or more.
[0041] Preferably, the composite substrate further has a conductive layer between the first adhesive layer and the second adhesive layer, the conductive layer being deposited on the entire first adhesive layer or one side of the first adhesive layer.
[0042] By including such a conductive layer, a nitride semiconductor substrate containing conductive portions can be made.
[0043] Preferably, the aforementioned conductive layer has a thickness of 50 nm to 500 nm.
[0044] As long as the thickness of the conductive layer is within this range, it is possible to create a nitride semiconductor substrate containing portions with excellent conductivity while suppressing warping.
[0045] Preferably, the aforementioned composite substrate further has a back conductive layer, which is deposited on the back side surface of the substrate not bonded with the aforementioned group III nitride semiconductor seed layer.
[0046] Any material with such a back conductive layer can be used to create a nitride semiconductor substrate with a conductive back side.
[0047] Furthermore, the present invention provides a method for manufacturing a nitride semiconductor substrate, wherein a group III nitride semiconductor layer is epitaxially grown on a group III nitride semiconductor seed layer containing at least GaN. This manufacturing method is characterized by comprising the following steps: Step (1) involves preparing a silicon single crystal substrate or a starter support substrate as a growth substrate in order to manufacture a group III nitride semiconductor substrate for bonding. The starter support substrate is formed by bonding a silicon single crystal thin film as a starter seed layer onto a starter composite substrate with multiple layers stacked on top of a starter planarization layer. Step (2) involves epitaxially growing a group III nitride semiconductor seed layer containing at least GaN on the aforementioned growth substrate to manufacture a group III nitride semiconductor substrate for bonding. The group III nitride semiconductor substrate for bonding includes the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the (0002) growth surface of GaN in the group III nitride semiconductor seed layer is 550 arcsec or less in terms of XRD full width at half maximum (FWHM). Step (3) involves irradiating the interface between the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film and the aforementioned group III nitride semiconductor seed layer of the aforementioned bonding group III nitride semiconductor substrate with a laser to form a release layer; Step (4) involves preparing a composite substrate that is different from the aforementioned initial composite substrate, and then depositing a planarization layer on the composite substrate. The composite substrate has multiple layers, including a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a second adhesive layer deposited to the entire first adhesive layer, and a barrier layer bonded to the entire second adhesive layer. Step (5) involves bonding the planarization layer, which has been deposited on the composite substrate as prepared in step (4), to the group III nitride semiconductor seed layer of the bonding group III nitride semiconductor substrate to obtain a bonding substrate; Step (6) involves using the aforementioned release layer to divide the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film of the aforementioned group III nitride semiconductor substrate for bonding, and peeling off a portion of the aforementioned growth substrate from the aforementioned bonding substrate; Step (7) involves grinding the release surface to remove any remaining portion of the silicon single-crystal substrate or the silicon single-crystal thin film on the bonding substrate, thereby obtaining a support substrate. This support substrate includes the composite substrate and the group III nitride semiconductor seed layer bonded to the composite substrate via a planarization layer; and... Step (8) involves epitaxially growing a group III nitride semiconductor layer containing GaN on the aforementioned group III nitride semiconductor seed layer of the aforementioned support substrate to manufacture a nitride semiconductor substrate.
[0048] Any method for manufacturing a nitride semiconductor substrate in this manner can perform epitaxial growth of a Group III nitride semiconductor layer containing GaN on a seed layer containing GaN and whose (0002) growth plane has a crystallinity of 550 arcsec or less in terms of XRD full width at half maximum (FWHM). Therefore, lattice mismatch between the seed layer and the epitaxial growth layer, i.e., the Group III nitride semiconductor layer, will not occur, and a Group III nitride semiconductor layer with low differential packing density and good crystallinity can be formed. Furthermore, by repeating the process, a Group III nitride semiconductor layer with even lower differential packing density can be formed.
[0049] Furthermore, the group III nitride semiconductor layer formed by this method can be deposited to a greater thickness due to fewer differential stackings. Moreover, by using a support substrate for a composite substrate containing multiple layers as the support substrate, warpage of the group III nitride semiconductor layer during growth caused by differences in thermal expansion coefficients can be reduced, and a crack-free and thick group III nitride semiconductor layer can be formed. Therefore, the group III nitride semiconductor layer can also be peeled off from the support substrate at the end for use as a self-standing substrate.
[0050] Furthermore, when the aforementioned starting support substrate is used as the growth substrate, the starting support substrate can be peeled off by dividing the silicon single crystal film using the self-bonding substrate. Therefore, the silicon single crystal can be bonded again on the peeled starting support substrate, and the obtained substrate can be used as a second starting support substrate, thereby achieving the benefit of cost reduction.
[0051] Preferably, in step (4), a composite substrate is prepared to have a conductive layer between the first adhesive layer and the second adhesive layer, wherein the conductive layer is deposited on the entire first adhesive layer or on one side of the first adhesive layer.
[0052] With this configuration, it is possible to manufacture nitride semiconductor substrates containing conductive portions.
[0053] Furthermore, the present invention provides a method for manufacturing a nitride semiconductor substrate, wherein a group III nitride semiconductor layer is epitaxially grown on a group III nitride semiconductor seed layer containing at least GaN. This manufacturing method is characterized by comprising the following steps: Step (1) involves preparing a silicon single crystal substrate or a starter support substrate as a growth substrate in order to manufacture a group III nitride semiconductor substrate for bonding. The starter support substrate is formed by bonding a silicon single crystal thin film as a starter seed layer onto a starter composite substrate with multiple layers stacked on top of a starter planarization layer. Step (2) involves epitaxially growing a group III nitride semiconductor seed layer containing at least GaN on the aforementioned growth substrate to manufacture a group III nitride semiconductor substrate for bonding. The group III nitride semiconductor substrate for bonding includes the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the (0002) growth surface of GaN in the group III nitride semiconductor seed layer is 550 arcsec or less in terms of XRD full width at half maximum (FWHM). Step (3) involves irradiating the interface between the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film and the aforementioned group III nitride semiconductor seed layer of the aforementioned bonding group III nitride semiconductor substrate with a laser to form a release layer; Step (4) involves preparing a composite substrate that is different from the aforementioned initial composite substrate. Then, a planarization layer is deposited only on the front side of the composite substrate. The composite substrate has multiple layers, including a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a barrier layer bonded to the entire first adhesive layer, a second adhesive layer deposited on the back side of the barrier layer, and a conductive layer bonded to the back side of the second adhesive layer. Step (5) involves bonding the planarization layer, which has been deposited on the composite substrate as prepared in step (4), to the group III nitride semiconductor seed layer of the bonding group III nitride semiconductor substrate to obtain a bonding substrate; Step (6) involves using the aforementioned release layer to divide the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film of the aforementioned group III nitride semiconductor substrate for bonding, and peeling off a portion of the aforementioned growth substrate from the aforementioned bonding substrate; Step (7) involves grinding the release surface to remove any remaining portion of the silicon single-crystal substrate or the silicon single-crystal thin film on the bonding substrate, thereby obtaining a support substrate. This support substrate includes the composite substrate and the group III nitride semiconductor seed layer bonded to the composite substrate via a planarization layer; and... Step (8) involves epitaxially growing a group III nitride semiconductor layer containing GaN on the aforementioned group III nitride semiconductor seed layer of the aforementioned support substrate to manufacture a nitride semiconductor substrate.
[0054] Any method for manufacturing a nitride semiconductor substrate in this manner can perform epitaxial growth of a Group III nitride semiconductor layer containing GaN on a seed layer containing GaN and whose (0002) growth plane has a crystallinity of 550 arcsec or less in terms of XRD full width at half maximum (FWHM). Therefore, lattice mismatch between the seed layer and the epitaxial growth layer, i.e., the Group III nitride semiconductor layer, will not occur, and a Group III nitride semiconductor layer with low differential packing density and good crystallinity can be formed. Furthermore, by repeating the process, a Group III nitride semiconductor layer with even lower differential packing density can be formed.
[0055] Furthermore, the group III nitride semiconductor layer formed by this method can be deposited to a greater thickness due to fewer differential stackings. Moreover, by using a support substrate for a composite substrate containing multiple layers as the support substrate, warpage of the group III nitride semiconductor layer during growth caused by differences in thermal expansion coefficients can be reduced, and a crack-free and thick group III nitride semiconductor layer can be formed. Therefore, the group III nitride semiconductor layer can also be peeled off from the support substrate at the end for use as a self-standing substrate.
[0056] Furthermore, when the aforementioned starting support substrate is used as the growth substrate, the starting support substrate can be peeled off by dividing the silicon single crystal film using the self-bonding substrate. Therefore, the silicon single crystal can be bonded again on the peeled starting support substrate, and the obtained substrate can be used as a second starting support substrate, thereby achieving the benefit of cost reduction.
[0057] Furthermore, as long as such a nitride semiconductor substrate manufacturing method is used, leakage paths will not be generated due to the front-side conductive layer of the supporting substrate, and a nitride semiconductor substrate with excellent high-frequency characteristics can be made.
[0058] Furthermore, the present invention provides a method for manufacturing a nitride semiconductor substrate, wherein a group III nitride semiconductor layer is epitaxially grown on a group III nitride semiconductor seed layer containing at least GaN. This manufacturing method is characterized by comprising the following steps: Step (1) involves preparing a silicon single crystal substrate or a starter support substrate as a growth substrate in order to manufacture a group III nitride semiconductor substrate for bonding. The starter support substrate is formed by bonding a silicon single crystal thin film as a starter seed layer onto a starter composite substrate with multiple layers stacked on top of a starter planarization layer. Step (2) involves epitaxially growing a group III nitride semiconductor seed layer containing at least GaN on the aforementioned growth substrate to manufacture a group III nitride semiconductor substrate for bonding. The group III nitride semiconductor substrate for bonding contains the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the (0002) growth surface of GaN in the group III nitride semiconductor seed layer is 550 arcsec or less in terms of XRD full width at half maximum (FWHM). Step (3) involves irradiating the interface between the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film and the aforementioned group III nitride semiconductor seed layer of the aforementioned bonding group III nitride semiconductor substrate with a laser to form a release layer; Step (4) involves preparing a composite substrate that is different from the aforementioned initial composite substrate. Then, a planarization layer is deposited only on the front side of the composite substrate. The composite substrate has multiple layers, including a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a conductive layer bonded to the back side of the first adhesive layer, a second adhesive layer bonded to the back side of the conductive layer, and a barrier layer. The barrier layer is bonded to the front and side sides of the first adhesive layer, the side side of the aforementioned conductive layer, and the side and back sides of the aforementioned second adhesive layer. Step (5) involves bonding the planarization layer, which has been deposited on the composite substrate as prepared in step (4), to the group III nitride semiconductor seed layer of the bonding group III nitride semiconductor substrate to obtain a bonding substrate; Step (6) involves using the aforementioned release layer to divide the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film of the aforementioned group III nitride semiconductor substrate for bonding, and peeling off a portion of the aforementioned growth substrate from the aforementioned bonding substrate; Step (7) involves grinding the release surface to remove any remaining portion of the silicon single-crystal substrate or the silicon single-crystal thin film on the bonding substrate, thereby obtaining a support substrate. This support substrate includes the composite substrate and the group III nitride semiconductor seed layer bonded to the composite substrate via a planarization layer; and... Step (8) involves epitaxially growing a group III nitride semiconductor layer containing GaN on the aforementioned group III nitride semiconductor seed layer of the aforementioned support substrate to manufacture a nitride semiconductor substrate.
[0059] Any method for manufacturing a nitride semiconductor substrate in this manner can perform epitaxial growth of a Group III nitride semiconductor layer containing GaN on a seed layer containing GaN and whose (0002) growth plane has a crystallinity of 550 arcsec or less in terms of XRD full width at half maximum (FWHM). Therefore, lattice mismatch between the seed layer and the epitaxial growth layer, i.e., the Group III nitride semiconductor layer, will not occur, and a Group III nitride semiconductor layer with low differential packing density and good crystallinity can be formed. Furthermore, by repeating the process, a Group III nitride semiconductor layer with even lower differential packing density can be formed.
[0060] Furthermore, the group III nitride semiconductor layer formed by this method can be deposited to a greater thickness due to fewer differential stackings. Moreover, by using a support substrate for a composite substrate containing multiple layers as the support substrate, warpage of the group III nitride semiconductor layer during growth caused by differences in thermal expansion coefficients can be reduced, and a crack-free and thick group III nitride semiconductor layer can be formed. Therefore, the group III nitride semiconductor layer can also be peeled off from the support substrate at the end for use as a self-standing substrate.
[0061] Furthermore, when the aforementioned starting support substrate is used as the growth substrate, the starting support substrate can be peeled off by dividing the silicon single crystal film from the bonding substrate. Therefore, the silicon single crystal can be bonded again on the peeled starting support substrate, and the obtained substrate can be used as a second starting support substrate, thereby achieving the benefit of cost reduction.
[0062] Furthermore, as long as such a nitride semiconductor substrate manufacturing method is used, leakage paths will not be generated due to the front-side conductive layer of the supporting substrate, and a nitride semiconductor substrate with excellent high-frequency characteristics can be made.
[0063] Preferably, the wavelength of the laser used in step (3) is set to be above 360 nm and below 1100 nm.
[0064] With this configuration, a release layer can be reliably formed, primarily near the interface of the silicon single-crystal thin film on the growth substrate or the silicon single-crystal substrate. [The effects of the invention]
[0065] As described above, any nitride semiconductor substrate of the present invention can be made to include a group III nitride semiconductor layer with low warpage, low inter-rowing, and good crystallinity.
[0066] Furthermore, any method for manufacturing a nitride semiconductor substrate according to the present invention can produce a nitride semiconductor substrate comprising a group III nitride semiconductor layer with low warpage, low inter-rowing, and good crystallinity. Simple Explanation of the Diagram
[0067] Figure 1 is a schematic cross-sectional view showing an example of the nitride semiconductor substrate of the present invention. Figure 2 is a partial flowchart of a first embodiment of the method for manufacturing a nitride semiconductor substrate according to the present invention. Figure 3 is a schematic cross-sectional view of the starting support substrate in the first embodiment of the manufacturing method of the nitride semiconductor substrate of the present invention. Figure 4 is a partial flowchart of a first embodiment of the method for manufacturing a nitride semiconductor substrate according to the present invention. Figure 5 is a partial flowchart of a first embodiment of the method for manufacturing a nitride semiconductor substrate according to the present invention. Figure 6 is a partial flowchart of a first embodiment of the method for manufacturing a nitride semiconductor substrate according to the present invention. Figure 7 is a partial flowchart of a second embodiment of the method for manufacturing a nitride semiconductor substrate according to the present invention. Figure 8 is a partial flowchart of a second embodiment of the method for manufacturing a nitride semiconductor substrate according to the present invention. Figure 9 is a partial flowchart of a second embodiment of the method for manufacturing a nitride semiconductor substrate according to the present invention. Figure 10 is a schematic cross-sectional view showing another example of the nitride semiconductor substrate of the present invention. Figure 11 is a schematic cross-sectional view showing another example of the nitride semiconductor substrate of the present invention. Implementation
[0068] As described above, the aim is to develop a nitride semiconductor substrate and a method for manufacturing the same, the nitride semiconductor substrate comprising a group III nitride semiconductor layer with low warpage, low inter-rowing, and good crystallinity.
[0069] The inventors dedicated themselves to researching the above-mentioned problems and discovered that as long as a nitride semiconductor substrate comprising a composite substrate, a group III nitride semiconductor seed layer, and a group III nitride semiconductor layer is used, it is possible to fabricate a nitride semiconductor substrate with a group III nitride semiconductor layer having extremely low differential packing density and good crystallinity and low warpage. Thus, the present invention is completed. The group III nitride semiconductor seed layer is bonded to the composite substrate through a planarization film, and the crystallinity of the GaN (0002) growth surface is less than 550 arcsec in terms of XRD full width at half maximum (FWHM). The group III nitride semiconductor layer is formed on the group III nitride semiconductor seed layer.
[0070] That is, the present invention is a nitride semiconductor substrate, wherein a group III nitride semiconductor layer comprising GaN is formed on a support substrate, and the nitride semiconductor substrate is characterized in that... The aforementioned support substrate comprises: a composite substrate, which is formed by stacking multiple layers, the layers comprising a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a second adhesive layer deposited on the entire first adhesive layer, and a barrier layer bonded to the entire second adhesive layer; and, A group III nitride semiconductor seed layer, which is bonded to the aforementioned composite substrate through a planarization layer, and comprises at least GaN; and, The aforementioned group III nitride semiconductor layer is formed on the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the GaN (0002) growth surface of the aforementioned group III nitride semiconductor seed layer is less than 550 arcsec in terms of XRD full width at half maximum (FWHM).
[0071] Furthermore, the present invention relates to a nitride semiconductor substrate, wherein a group III nitride semiconductor layer comprising GaN is formed on a support substrate, and the nitride semiconductor substrate is characterized in that... The aforementioned support substrate includes: a composite substrate, which is formed by stacking multiple layers, each layer including a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a barrier layer bonded to the entire first adhesive layer, a second adhesive layer deposited on the back side of the barrier layer, and a conductive layer bonded to the back side of the second adhesive layer; and, A group III nitride semiconductor seed layer, which is bonded to the aforementioned composite substrate only through a planarization layer bonded to the front side of the composite substrate, and comprises at least GaN; and, The aforementioned group III nitride semiconductor layer is formed on the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the GaN (0002) growth surface of the aforementioned group III nitride semiconductor seed layer is less than 550 arcsec in terms of XRD full width at half maximum (FWHM).
[0072] Furthermore, the present invention relates to a nitride semiconductor substrate, wherein a group III nitride semiconductor layer comprising GaN is formed on a support substrate, and the nitride semiconductor substrate is characterized in that... The aforementioned support substrate includes: a composite substrate, which is formed by stacking multiple layers, each layer including a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a conductive layer bonded to the back side of the first adhesive layer, a second adhesive layer bonded to the back side of the conductive layer, and a barrier layer bonded to the front and side surfaces of the first adhesive layer, the side surface of the aforementioned conductive layer, and the side and back surface of the aforementioned second adhesive layer; and, A group III nitride semiconductor seed layer, which is bonded to the aforementioned composite substrate only through a planarization layer bonded to the front side of the composite substrate, and comprises at least GaN; and, The aforementioned group III nitride semiconductor layer is formed on the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the GaN (0002) growth surface of the aforementioned group III nitride semiconductor seed layer is less than 550 arcsec in terms of XRD full width at half maximum (FWHM).
[0073] Furthermore, the present invention provides a method for manufacturing a nitride semiconductor substrate, wherein a group III nitride semiconductor layer is epitaxially grown on a group III nitride semiconductor seed layer containing at least GaN. This manufacturing method is characterized by comprising the following steps: Step (1) involves preparing a silicon single crystal substrate or a starter support substrate as a growth substrate in order to manufacture a group III nitride semiconductor substrate for bonding. The starter support substrate is formed by bonding a silicon single crystal thin film as a starter seed layer onto a starter composite substrate with multiple layers stacked on top of a starter planarization layer. Step (2) involves epitaxially growing a group III nitride semiconductor seed layer containing at least GaN on the aforementioned growth substrate to manufacture a group III nitride semiconductor substrate for bonding. The group III nitride semiconductor substrate for bonding includes the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the (0002) growth surface of GaN in the group III nitride semiconductor seed layer is 550 arcsec or less in terms of XRD full width at half maximum (FWHM). Step (3) involves irradiating the interface between the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film and the aforementioned group III nitride semiconductor seed layer of the aforementioned bonding group III nitride semiconductor substrate with a laser to form a release layer; Step (4) involves preparing a composite substrate that is different from the aforementioned initial composite substrate, and then depositing a planarization layer on the composite substrate. The composite substrate has multiple layers, including a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a second adhesive layer deposited to the entire first adhesive layer, and a barrier layer bonded to the entire second adhesive layer. Step (5) involves bonding the planarization layer, which has been deposited on the composite substrate as prepared in step (4), to the group III nitride semiconductor seed layer of the bonding group III nitride semiconductor substrate to obtain a bonding substrate; Step (6) involves using the aforementioned release layer to divide the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film of the aforementioned group III nitride semiconductor substrate for bonding, and peeling off a portion of the aforementioned growth substrate from the aforementioned bonding substrate; Step (7) involves grinding the release surface to remove any remaining portion of the silicon single-crystal substrate or the silicon single-crystal thin film on the bonding substrate, thereby obtaining a support substrate. This support substrate includes the composite substrate and the group III nitride semiconductor seed layer bonded to the composite substrate via a planarization layer; and... Step (8) involves epitaxially growing a group III nitride semiconductor layer containing GaN on the aforementioned group III nitride semiconductor seed layer of the aforementioned support substrate to manufacture a nitride semiconductor substrate.
[0074] Furthermore, the present invention provides a method for manufacturing a nitride semiconductor substrate, wherein a group III nitride semiconductor layer is epitaxially grown on a group III nitride semiconductor seed layer containing at least GaN. This manufacturing method is characterized by comprising the following steps: Step (1) involves preparing a silicon single crystal substrate or a starter support substrate as a growth substrate in order to manufacture a group III nitride semiconductor substrate for bonding. The starter support substrate is formed by bonding a silicon single crystal thin film as a starter seed layer onto a starter composite substrate with multiple layers stacked on top of a starter planarization layer. Step (2) involves epitaxially growing a group III nitride semiconductor seed layer containing at least GaN on the aforementioned growth substrate to manufacture a group III nitride semiconductor substrate for bonding. The group III nitride semiconductor substrate for bonding includes the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the (0002) growth surface of GaN in the group III nitride semiconductor seed layer is 550 arcsec or less in terms of XRD full width at half maximum (FWHM). Step (3) involves irradiating the interface between the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film and the aforementioned group III nitride semiconductor seed layer of the aforementioned bonding group III nitride semiconductor substrate with a laser to form a release layer; Step (4) involves preparing a composite substrate that is different from the aforementioned initial composite substrate. Then, a planarization layer is deposited only on the front side of the composite substrate. The composite substrate has multiple layers, including a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a barrier layer bonded to the entire first adhesive layer, a second adhesive layer deposited on the back side of the barrier layer, and a conductive layer bonded to the back side of the second adhesive layer. Step (5) involves bonding the planarization layer, which has been deposited on the composite substrate as prepared in step (4), to the group III nitride semiconductor seed layer of the bonding group III nitride semiconductor substrate to obtain a bonding substrate; Step (6) involves using the aforementioned release layer to divide the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film of the aforementioned group III nitride semiconductor substrate for bonding, and peeling off a portion of the aforementioned growth substrate from the aforementioned bonding substrate; Step (7) involves grinding the release surface to remove any remaining portion of the silicon single-crystal substrate or the silicon single-crystal thin film on the bonding substrate, thereby obtaining a support substrate. This support substrate includes the composite substrate and the group III nitride semiconductor seed layer bonded to the composite substrate via a planarization layer; and... Step (8) involves epitaxially growing a group III nitride semiconductor layer containing GaN on the aforementioned group III nitride semiconductor seed layer of the aforementioned support substrate to manufacture a nitride semiconductor substrate.
[0075] Furthermore, the present invention provides a method for manufacturing a nitride semiconductor substrate, wherein a group III nitride semiconductor layer is epitaxially grown on a group III nitride semiconductor seed layer containing at least GaN. This manufacturing method is characterized by comprising the following steps: Step (1) involves preparing a silicon single crystal substrate or a starter support substrate as a growth substrate in order to manufacture a group III nitride semiconductor substrate for bonding. The starter support substrate is formed by bonding a silicon single crystal thin film as a starter seed layer onto a starter composite substrate with multiple layers stacked on top of a starter planarization layer. Step (2) involves epitaxially growing a group III nitride semiconductor seed layer containing at least GaN on the aforementioned growth substrate to manufacture a group III nitride semiconductor substrate for bonding. The group III nitride semiconductor substrate for bonding includes the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the (0002) growth surface of GaN in the group III nitride semiconductor seed layer is 550 arcsec or less in terms of XRD full width at half maximum (FWHM). Step (3) involves irradiating the interface between the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film and the aforementioned group III nitride semiconductor seed layer of the aforementioned bonding group III nitride semiconductor substrate with a laser to form a release layer; Step (4) involves preparing a composite substrate that is different from the aforementioned initial composite substrate. Then, a planarization layer is deposited only on the front side of the composite substrate. The composite substrate has multiple layers, including a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a conductive layer bonded to the back side of the first adhesive layer, a second adhesive layer bonded to the back side of the conductive layer, and a barrier layer. The barrier layer is bonded to the front and side sides of the first adhesive layer, the side side of the aforementioned conductive layer, and the side and back sides of the aforementioned second adhesive layer. Step (5) involves bonding the planarization layer, which has been deposited on the composite substrate as prepared in step (4), to the group III nitride semiconductor seed layer of the bonding group III nitride semiconductor substrate to obtain a bonding substrate; Step (6) involves using the aforementioned release layer to divide the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film of the aforementioned group III nitride semiconductor substrate for bonding, and peeling off a portion of the aforementioned growth substrate from the aforementioned bonding substrate; Step (7) involves grinding the release surface to remove any remaining portion of the silicon single-crystal substrate or the silicon single-crystal thin film on the bonding substrate, thereby obtaining a support substrate. This support substrate includes the composite substrate and the group III nitride semiconductor seed layer bonded to the composite substrate via a planarization layer; and... Step (8) involves epitaxially growing a group III nitride semiconductor layer containing GaN on the aforementioned group III nitride semiconductor seed layer of the aforementioned support substrate to manufacture a nitride semiconductor substrate.
[0076] The present invention will now be described in detail with reference to the accompanying drawings, but the present invention is not limited thereto.
[0077] [Nitride semiconductor substrate] Figure 1 shows a schematic cross-sectional view of an example of the nitride semiconductor substrate of the present invention.
[0078] The nitride semiconductor substrate 100 shown in Figure 1 includes: a support substrate 10 and a group III nitride semiconductor layer 20 formed on the support substrate 10.
[0079] The support substrate 10 includes a composite substrate 6 and a group III nitride semiconductor seed layer 8, which is bonded to the composite substrate 6 through a planarization film 7.
[0080] The composite substrate 6 has multiple layers, including a polycrystalline ceramic core 1, a first adhesive layer 2 bonded to the entire polycrystalline ceramic core 1, a second adhesive layer 4 deposited to the entire first adhesive layer 2, and a barrier layer 5 bonded to the entire second adhesive layer 4. In the example of Figure 1, the composite substrate 6 further has a conductive layer 3 as an arbitrary layer between the first adhesive layer 2 and the second adhesive layer 4, which is deposited to the entire first adhesive layer 2.
[0081] In the example of Figure 1, a group III nitride semiconductor seed layer 8 is bonded to only one side of the composite substrate 6, separated by a planarization layer 7.
[0082] The group III nitride semiconductor seed layer 8 contains at least GaN. Furthermore, the crystallinity of the (0002) growth surface of the GaN in the group III nitride semiconductor seed layer 8 is less than 550 arcsec in terms of XRD (X-ray Diffraction) full width at half maximum (FWHM).
[0083] A group III nitride semiconductor layer 20 is formed on such a group III nitride semiconductor seed layer 8. The group III nitride semiconductor layer 20 contains GaN.
[0084] In the nitride semiconductor substrate 100 of the present invention, the group III nitride semiconductor layer 20 is epitaxially formed on the group III nitride semiconductor seed layer 8, whose crystallinity, measured by an XRD full width at half maximum (FWHM), is 550 arcsec or less on the (0002) growth plane of the GaN seed crystal. This allows it to exhibit extremely low packing density and excellent crystallinity. As a result, the characteristics of the device can be improved in the nitride semiconductor substrate 100 of the present invention.
[0085] Furthermore, the nitride semiconductor substrate 100 of the present invention, as described above, includes a support substrate 10 containing a composite substrate 6 with multiple layers stacked on it. This reduces the warpage of the group III nitride semiconductor layer 8 during epitaxial growth caused by the difference in thermal expansion coefficients, thus enabling the formation of a crack-free and thick group III nitride semiconductor layer 20. Therefore, the group III nitride semiconductor layer 20 can also be peeled off from the support substrate 10 at the end and used as a self-supporting substrate.
[0086] The nitride semiconductor substrate 100 shown in Figure 1 will be described in more detail below.
[0087] The polycrystalline ceramic core 1 can be configured to contain aluminum nitride, for example. As long as the polycrystalline ceramic core 1 contains aluminum nitride, the difference in the coefficient of thermal expansion can be made extremely small.
[0088] Such a polycrystalline ceramic core 1 can be calcined at a high temperature of 1800°C using calcination aids, and thus has a thickness of approximately 600~1150 μm. Basically, it is mostly formed to the thickness specified by SEMI (Semiconductor Equipment and Materials International) for silicon substrates.
[0089] The first adhesive layer 2 and the second adhesive layer 4 may, for example, comprise a tetraethylsiloxane (TEOS) layer or a silicon oxide (SiO2) layer, or a layer comprising both. The first adhesive layer 2 and the second adhesive layer 4 are deposited by LPCVD (Low-Pressure Chemical Vapor Deposition) or CVD (Chemical Vapor Deposition) processes and have a thickness of approximately 50 to 200 nm.
[0090] The conductive layer 3, for example, contains polysilicon and is deposited by a process such as LPCVD. The conductive layer 3 is a layer for imparting conductivity and is doped with, for example, boron (B) and phosphorus (P), etc. The conductive layer 3 containing polysilicon can be provided as needed, can also not be provided, and can also be formed on only one side of the first adhesive layer 2.
[0091] Any conductive layer 3 preferably has a thickness of 50 nm to 500 nm. As long as the thickness of the conductive layer 3 is within this range, a nitride semiconductor substrate 100 including a portion with excellent conductivity can be formed while suppressing the occurrence of warping.
[0092] The barrier layer 5, for example, contains silicon nitride and is deposited by a process such as LPCVD, with a thickness of about 100 nm to 1500 nm. The barrier layer 5 is a layer that blocks impurities from inside the substrate such as ceramics.
[0093] The planarization layer 7 can be deposited by a process such as LPCVD, for example, with a thickness of about 500 to 3000 nm. The planarization layer 7 is deposited to planarize the upper surface. As the material of the planarization layer 7, for example, tetraethoxysiloxane, or film materials of general ceramics such as silicon dioxide (SiO 2), aluminum oxide (Al 2O 3), silicon nitride (Si 3N 4), or silicon oxynitride (Si xO yN z, 0 < x < 1, 0 < y < 2, 0 ≦ z ≦ 0.6), etc. can be selected.
[0094] In the nitride semiconductor substrate 100 of the present invention, the crystallinity of the (0002) growth plane of GaN of the seed in the group III nitride semiconductor seed layer 8 is 550 arcsec or less in terms of the XRD full width at half maximum value. More preferably, the crystallinity of the (0002) growth plane of GaN of the seed is 300 arcsec or less in terms of the XRD full width at half maximum value. The preferable lower limit value of the XRD full width at half maximum value is not particularly limited, for example, it is 100 arcsec.
[0095] The group III nitride semiconductor seed layer 8, in addition to GaN, can be set to include one or more of AlN and AlGaN. <00 The group III nitride semiconductor layer 20 includes GaN, and in addition to GaN, it can also be configured to include one or more of AlN and AlGaN.
[0098] The GaN in the group III nitride semiconductor layer 20 is epitaxially grown on the group III nitride semiconductor seed layer 8, which has good crystallinity as described above. Therefore, it can exhibit the same good crystallinity as the GaN in the group III nitride semiconductor seed layer 8. In addition, the group III nitride semiconductor layer 20 can be crack-free and have a thickness of, for example, 10 μm or more.
[0099] Although not illustrated, in the nitride semiconductor substrate 100 of the present invention, the composite substrate 6 may further have a back conductive layer to replace the aforementioned conductive layer 3. This back conductive layer is deposited on the surface of the back layer to which the group III nitride semiconductor seed layer 8 is not bonded. The back conductive layer is the same as the conductive layer 3, for example, containing polycrystalline silicon, and may be deposited, for example, by an LPCVD process. Furthermore, the back conductive layer may have a thickness of, for example, 50 nm to 500 nm.
[0100] The nitride semiconductor substrate 100 of the present invention can be manufactured, for example, by the manufacturing method of the nitride semiconductor substrate of the present invention as exemplified below. However, the nitride semiconductor substrate 100 of the present invention can also be manufactured by methods other than the manufacturing method of the nitride semiconductor substrate of the present invention.
[0101] The nitride semiconductor substrate of the present invention, as a support substrate, can also use the composite substrate 10 schematically shown in Figure 10 or Figure 11.
[0102] The support substrate 10 shown in Figure 10 includes a composite substrate 6 and a group III nitride semiconductor seed layer 8. The group III nitride semiconductor seed layer 8 is bonded across a planarization layer 7 bonded only to the front side (front side surface) of the composite substrate 6, and contains at least GaN. The composite substrate 6 is a composite substrate 6 with multiple layers stacked on it. The layers include a polycrystalline ceramic core 1, a first adhesive layer 2 bonded to the entire polycrystalline ceramic core 1, a barrier layer 5 bonded to the entire first adhesive layer 2, a second adhesive layer 4 deposited on the back side of the barrier layer 5, and a conductive layer 3 bonded to the back side of the second adhesive layer 4.
[0103] The support substrate 10 shown in Figure 11 includes a composite substrate 6 and a group III nitride semiconductor seed layer 8. The group III nitride semiconductor seed layer 8 is bonded to the front side (front side surface) of the composite substrate 6 only, and contains at least GaN. The composite substrate 6 is a composite substrate 6 with multiple layers stacked on it. The layers include a polycrystalline ceramic core 1, a first adhesive layer 2 bonded to the entire polycrystalline ceramic core 1, a conductive layer 3 bonded to the back side of the first adhesive layer 2, a second adhesive layer 4 bonded to the back side of the conductive layer 3, and a barrier layer 5. The barrier layer 5 is bonded to the front and side sides of the first adhesive layer 2, the side side of the conductive layer 3, and the side and back sides of the second adhesive layer 4.
[0104] The layers of the composite substrate 6 shown in Figures 10 and 11 can be the same as those previously described.
[0105] As shown in Figures 10 and 11, the nitride semiconductor substrate 100, which includes a structure in which the conductive layer 3 is formed only on the back side, not only has the effect described above with reference to Figure 1, but also does not produce leakage paths caused by the conductive layer on the front side of the support substrate 10 when manufacturing high-frequency devices, thus enabling it to have excellent high-frequency characteristics.
[0106] [Manufacturing method of nitride semiconductor substrate] Hereinafter, as examples of a method for manufacturing a nitride semiconductor substrate according to the present invention, a first embodiment and a second embodiment will be described with reference to the accompanying drawings. However, the method for manufacturing a nitride semiconductor substrate according to the present invention is not limited to the examples described below.
[0107] (First Implementation Form) A first embodiment of the method for manufacturing a nitride semiconductor substrate of the present invention will be described with reference to Figures 2 to 6.
[0108] (Step (1): Preparing the initial support substrate as the growth substrate) In step (1), in order to manufacture a group III nitride semiconductor substrate for bonding, as shown in Figure 2(a), a starter support substrate 30 is prepared as a growth substrate. The starter support substrate 30 is formed by bonding a silicon single crystal thin film as a starter seed layer 38 onto a starter composite substrate 36 through a starter planarization layer 37. The starter support substrate 30 can also be referred to as a GaN support substrate.
[0109] The starting composite substrate 36 can have a configuration as shown in the schematic cross-sectional view in Figure 3. Specifically, the starting composite substrate 36 shown in Figure 3 is a support structure that includes a polycrystalline ceramic core 31, a first adhesive layer 32 bonded to the entire polycrystalline ceramic core 31, a conductive layer 33 bonded to the entire first adhesive layer 32, a second adhesive layer 34 bonded to the entire conductive layer 33, and a barrier layer 35 bonded to the entire second adhesive layer 34.
[0110] The polycrystalline ceramic core 31, the first adhesive layer 32, the conductive layer 33, the second adhesive layer 34, and the barrier layer 35 can, for example, be the same as the layers of the composite substrate 6 included in the nitride semiconductor substrate 100 of the present invention as described with reference to Figure 1. The starting composite substrate 36 can be manufactured using the method described in the description of the composite substrate 6. Furthermore, the starting composite substrate 36 can be a layer with multiple layers stacked, and is not limited to that shown in Figure 3. For example, the conductive layer 33 and the first adhesive layer 32 can be formed as needed, and are not necessarily present; there are also cases where they are formed only on one side.
[0111] In the examples shown in Figures 2(a) and 3, the planarization film 37 is bonded to only one side of the initial composite substrate 36. The planarization film 37 can be, for example, the same as the planarization film 7 described with reference to Figure 1, but is not limited thereto.
[0112] The silicon single crystal thin film 38 is bonded to the planarization film 37, and can also be referred to as a substantial silicon layer. The silicon single crystal thin film 38 has a thickness of about 50 nm to 1000 nm, for example, and is used for epitaxial growth of a group III nitride semiconductor seed layer containing GaN in step (2).
[0113] The initial seed layer, i.e., the silicon single-crystal thin film 38, is preferably axially oriented. <111> Silicon single-crystal thin films, but without considering resistivity, etc.
[0114] Silicon single-crystal thin film 38 can be formed, for example, by bonding it to planarization layer 37 using a bonding step, and then peeling it off using ion irradiation or the like to leave the desired thickness.
[0115] (Step (2): Step of manufacturing a group III nitride semiconductor substrate for bonding) Next, as step (2), the process of manufacturing a bonding group III nitride semiconductor substrate 200 as shown in Figure 2(b) is performed. In this step (2), the bonding group III nitride semiconductor substrate 200 is manufactured by epitaxially growing a group III nitride semiconductor seed layer 8 containing at least GaN on a growth substrate, i.e., a starting support substrate 30, and more specifically, on a starting seed layer, i.e., a silicon single crystal thin film 38. The bonding group III nitride semiconductor substrate 200 contains a group III nitride semiconductor seed layer 8, and the crystallinity of the GaN (0002) growth surface of the group III nitride semiconductor seed layer 8 is less than 550 arcsec in terms of XRD full width at half maximum (FWHM).
[0116] This step (2) can be carried out, for example, in an MOCVD (Metal Organic Chemical Vapor Deposition) reactor.
[0117] In step (2), epitaxial growth of a group III nitride semiconductor seed layer (epitaxy layer) 8, such as AlN, AlGaN, and GaN, is performed on the silicon single-crystal thin film 38 of the initial support substrate 30. The structure of the group III nitride semiconductor seed layer 8 is not limited to this, and also includes cases where no AlGaN film is formed, and cases where AlN is further formed after AlGaN film formation. In addition, cases where multiple AlGaN layers are formed, thus changing the Al composition, are also included. On the other hand, GaN growth is always performed in step (2). The film thickness can be varied depending on the application, so it is not particularly limited.
[0118] During epitaxial growth, trimethylaluminum (TMAl) can be used as the Al source, trimethylgallium (TMGa) as the Ga source, and NH3 as the N source. Furthermore, the carrier gas can be N2 or H2, or any one of them, and the process temperature can be set to approximately 900~1200℃.
[0119] In step (2), by controlling conditions, for example, the group III nitride semiconductor seed layer 8 can be epitaxially grown. <111> A bonding group III nitride semiconductor substrate 200 is fabricated on a silicon single crystal thin film 38. The bonding group III nitride semiconductor substrate 200 includes a group III nitride semiconductor seed layer 8. The crystallinity of the GaN (0002) growth surface of the group III nitride semiconductor seed layer 8 is less than 550 arcsec in terms of XRD full width at half maximum (FWHM).
[0120] (Step (3): The step of forming a release layer on a silicon single crystal thin film by laser irradiation) Subsequently, near the interface between the silicon single crystal thin film 38 of the bonding group III nitride semiconductor substrate 200 prepared in step (2) and the group III nitride semiconductor seed layer 8, a laser is irradiated as shown in Figure 2(c) to form the release layer 38a shown in Figure 4.
[0121] The laser wavelength is preferably longer than the wavelength of light with the band gap energy equal to that of GaN, and shorter than the wavelength of light with the band gap energy equal to that of silicon single crystal. Specifically, it is preferably between about 360 nm and 1100 nm. With this setting, the release layer 38a can be formed mainly on the silicon single crystal thin film 38, thus suppressing damage to the group III nitride semiconductor seed layer 8 containing GaN. In addition, the laser energy is not particularly limited as long as it is sufficient to form the release layer 38a, and is suitable to be about 5 W to 20 W. The laser irradiation pitch is preferably set to about 30 μm or less. By setting the irradiation pitch to 30 μm or less, a release layer 38a can be formed, which can sufficiently perform the release in step (6) described below.
[0122] By using a method of forming a release layer (destructive layer) 38a by laser irradiation, the difference in laser focusing ease between the GaN-containing group III nitride semiconductor seed layer 8 and the silicon single crystal can be utilized. By penetrating the GaN-containing group III nitride semiconductor seed layer 8, a release layer 38a can be formed on the silicon single crystal film 38, thus suppressing damage to the GaN-containing group III nitride semiconductor seed layer 8. Furthermore, the laser can focus light at a deeper location from the surface, so even when the GaN-containing group III nitride semiconductor seed layer 8 is only a few μm thick, a release layer 38a can still be formed near the interface between the silicon single crystal film 38 and the group III nitride semiconductor seed layer 8.
[0123] On the other hand, in ion irradiation-based stripping methods such as Smart Cut (registered trademark), the penetration depth is limited. If a group III nitride semiconductor seed layer of several μm or more is formed, ions may sometimes be unable to penetrate and stripping may not be possible. Furthermore, ion irradiation can damage the crystallization.
[0124] (Step (4): Prepare a composite substrate that is different from the starting composite substrate and deposit a planarization layer on the composite substrate) Next, a composite substrate 6 is prepared as shown in Figure 4(e) below. This composite substrate 6 is a support base substrate different from the initial composite substrate 36 prepared in step (1).
[0125] The composite substrate 6 prepared in step (4) is the same as the composite substrate included in the nitride semiconductor substrate of the present invention. That is, the composite substrate 6 is the same as the composite substrate 6 shown in Figure 1, and is a composite substrate 6 with multiple layers, which includes: a polycrystalline ceramic core 1, a first adhesive layer 2 bonded to the entire polycrystalline ceramic core 1, a second adhesive layer 4 deposited on the entire first adhesive layer 2, and a barrier layer 5 bonded to the entire second adhesive layer 4.
[0126] Subsequently, the planarization layer 7 is deposited on the prepared composite substrate 6.
[0127] For the method of fabricating the composite substrate 6 and the planarization layer 7, please refer to the description of the nitride semiconductor of the present invention.
[0128] (Step (5): Step of bonding the planarization layer to the group III nitride semiconductor seed layer to obtain the bonding substrate) Then, as shown in Figure 4(e), the planarization layer 7 is bonded to the group III nitride semiconductor seed layer 8 of the bonding group III nitride semiconductor substrate 200 (with a release layer 38a formed on the silicon single crystal thin film 38) to obtain the bonding substrate 300 shown in Figure 5(f). The planarization layer 7 is formed by depositing it on the composite substrate 6 prepared in step (4).
[0129] (Step (6): Step of peeling a portion of the growth substrate (starting support substrate) from the self-bonding substrate) Subsequently, in the bonding substrate 300 made in step (5), using the release layer 38a shown in Figure 5(f), as shown in Figure 5(g), the silicon single crystal film 38 of the bonding group III nitride semiconductor substrate 200 is divided into a portion 38b of the silicon single crystal film and another portion 38c of the silicon single crystal film, and then a portion of the growth substrate, i.e., the initial support substrate 30, is peeled off from the bonding substrate 300.
[0130] There is no particular limitation on the method for this peeling, but for example, the front and back sides of the bonding substrate 300 as shown in Figure 5(f) can be fixed to the jig using adhesive articles, and force can be applied to the opposite sides, thereby enabling the silicon single crystal thin film 38 to be separated and peeled off using the peeling layer 38a.
[0131] (Step (7): The step of removing the portion of the silicon single crystal thin film remaining on the bonding substrate to obtain the support substrate) Next, a portion of the silicon single-crystal thin film 38c remaining on the bonding substrate 300 is removed by grinding the peeling surface of the silicon single-crystal thin film as shown in Figure 6(h). By doing so, as shown in Figure 6(i), a support substrate 10 is obtained, which includes a composite substrate 6 and a group III nitride semiconductor seed layer 8 bonded to the composite substrate 6 as a group III nitride semiconductor seed layer separated by a planarization layer 7. As shown in Figure 6(i), the surface layer of the support substrate 10 is the group III nitride semiconductor seed layer 8 containing GaN.
[0132] By performing these steps, a support substrate 10 (GaN support substrate) can be fabricated, which includes a nitride semiconductor seed layer 8 as a surface layer, the nitride semiconductor seed layer 8 containing GaN, and the crystallinity of the (0002) growth surface of GaN is less than 550 arcsec in terms of XRD half width at half maximum value.
[0133] (Step (8): The step of epitaxially growing a group III nitride semiconductor layer containing GaN on a group III nitride semiconductor seed layer of a support substrate to manufacture a nitride semiconductor substrate) Then, as shown in Figure 6(j), a group III nitride semiconductor layer 20 containing GaN is epitaxially grown on the group III nitride semiconductor seed layer 8 of the support substrate 10. The epitaxial film formation conditions can be set to be the same as in step (2).
[0134] By using the steps (1) to (8) described above, a nitride semiconductor substrate 100 as shown in Figure 6(j) can be manufactured.
[0135] (Second Implementation Form) Next, a second embodiment of the method for manufacturing the nitride semiconductor substrate of the present invention will be described with reference to Figures 7 to 9.
[0136] The second embodiment differs significantly from the first embodiment in that it uses a silicon single-crystal substrate 40, as shown in Figure 7(a), instead of the initial support substrate 30 as the growth substrate. The following mainly describes the differences from the first embodiment.
[0137] In step (1), as described above, a silicon single crystal substrate 40 as shown in Figure 7(a) is prepared as a growth substrate.
[0138] The silicon single crystal substrate 40 is preferably axially oriented. <111> The silicon single crystal substrate is used, but resistivity and other properties are not considered.
[0139] In step (2), the same operation as in the first embodiment is used to epitaxially grow a group III nitride semiconductor seed layer 8 containing at least GaN on a growth substrate, i.e., a silicon single crystal substrate 40, to manufacture a group III nitride semiconductor substrate 200 for bonding as shown in Figure 7(b). The substrate contains a group III nitride semiconductor seed layer 8, and the crystallinity of the (0002) growth surface of GaN in the group III nitride semiconductor seed layer 8 is 550 arcsec or less in terms of XRD full width at half maximum (FWHM), for example, 100 arcsec or more and 550 arcsec or less.
[0140] In step (3), a laser is irradiated near the interface between the growth substrate, i.e., the silicon single crystal substrate 40, and the group III nitride semiconductor seed layer 8 to form a release layer. The formation of the release layer can be performed in the same manner as in the first embodiment.
[0141] Step (4) is the same as in the first implementation.
[0142] In step (5), the planarization layer 7 is bonded to the group III nitride semiconductor seed layer 8 of the bonding group III nitride semiconductor substrate 200 (a release layer 40a is formed on the silicon single crystal substrate 40) to obtain the bonding substrate 300 shown in Figure 8 (d). The planarization layer 7 is formed by depositing it on the composite substrate 6 prepared in step (4).
[0143] In step (6), in the bonding substrate 300 fabricated in step (5), using the release layer 40a shown in Figure 8(d), as shown in Figure 8(e), the silicon single crystal substrate 40 of the bonding group III nitride semiconductor substrate 200 is divided into a portion 40b of silicon single crystal thin film and another portion 40c of silicon single crystal thin film, and then a portion of the growth substrate, i.e., silicon single crystal substrate 40b, is peeled off from the bonding substrate 300. The peeling can be performed in the same manner as in the first embodiment.
[0144] In step (7), a portion 40c of the silicon single crystal film remaining on the bonding substrate 300, as shown in Figure 9(f), is removed by grinding. By doing so, as shown in Figure 9(g), a support substrate 10 is obtained, comprising a composite substrate 6 and a group III nitride semiconductor seed layer 8, which is bonded to the composite substrate 6 as a group III nitride semiconductor seed layer separated by a planarization layer 7. As shown in Figure 9(g), the surface layer of the support substrate 10 is a group III nitride semiconductor seed layer 8 containing GaN.
[0145] Step (8) is the same as in the first implementation.
[0146] By using the steps (1) to (8) described above, a nitride semiconductor substrate 100 as shown in Figure 9(h) can be manufactured.
[0147] The nitride semiconductor substrate manufacturing method of the present invention, as illustrated above, can significantly reduce the lattice constant difference between the GaN-containing group III nitride semiconductor layer (e.g., GaN epitaxial layer) 20 and the supporting substrate 10. Therefore, it is possible to form a group III nitride semiconductor layer 20 with fewer interphase arrangements and containing GaN with good crystallinity. Furthermore, by repeating the process, a group III nitride semiconductor layer 20 with even fewer interphase arrangements can be formed.
[0148] Furthermore, the group III nitride semiconductor layer 20 formed by this method has fewer interlayers, allowing for a thicker deposition. Moreover, by using a support substrate 10 containing a composite substrate 6 with multiple layers as the support substrate, warping of the group III nitride semiconductor layer 20 during growth due to differences in thermal expansion coefficients can be reduced, resulting in a crack-free and thick group III nitride semiconductor layer 20. Therefore, the group III nitride semiconductor layer 20 can be peeled off from the support substrate 10 at the end for use as a self-standing substrate.
[0149] On the other hand, even if GaN-containing group III nitride semiconductor seed crystals are formed on a composite substrate with multiple layers, it is still impossible to make the lattice constant appropriate, and thus it is impossible to form a group III nitride semiconductor seed crystal layer with a crystallization of less than 550 arcsec in terms of XRD full width at half maximum (FWHM) of the GaN (0002) growth surface.
[0150] Furthermore, in the first embodiment, as shown in Figure 5(g), the initial support substrate 30 can be peeled off from the bonding substrate 300 by splitting the silicon single crystal thin film 38. Therefore, silicon single crystals can be re-attached to the surface of the peeled initial support substrate 30, and the resulting substrate can be used as a second initial support substrate, thus achieving cost reduction. If necessary, portions 38b of the silicon single crystal thin film 8 remaining on the surface can be removed, and then SiO2 can be formed before bonding the silicon single crystals. If background removal is performed, substrate reuse is not possible.
[0151] Furthermore, as the composite substrate 6 prepared in step (4), a composite substrate 6 as shown in Figure 10 or Figure 11 can be prepared to replace the composite substrate 6 shown in Figure 1, and a planarization layer 7 is deposited only on the front side (surface side surface) of the composite substrate 6.
[0152] The method for manufacturing this modified nitride semiconductor substrate does not produce leakage paths caused by the front-side conductive layer of the support substrate, and can manufacture nitride semiconductor substrates with excellent high-frequency characteristics.
[0153] Furthermore, while the example shown in Figure 3 was used to illustrate the starting composite substrate 36, the structure of the starting composite substrate is not limited to that shown in Figure 3. For example, it can also be the same structure as the composite substrate 6 shown in Figure 10 or Figure 11. [Example]
[0154] The present invention will now be described in detail using examples and comparative examples, but the present invention is not limited to these examples.
[0155] (Example 1) In Example 1, a nitride semiconductor substrate is manufactured using the manufacturing process of the first embodiment shown in Figures 2 and 4 to 6.
[0156] (Step (1)) First, a starting support substrate (GaN support substrate) 30, as described in Figures 2(a) and 3 above, is manufactured as a growth substrate.
[0157] In step (1), the axial direction is... <111> The silicon single crystal is bonded to the planarization layer 37, and then peeled off using methods such as ion irradiation to leave the required thickness, thereby forming a silicon single crystal thin film 38.
[0158] (Step (2)) The starting support substrate 30 is placed in an MOCVD reactor, and then epitaxial growth of a group III nitride semiconductor seed layer containing AlN, AlGaN, and GaN is performed on the starting support substrate 30. The starting support substrate 30 is placed in a wafer pocket, also known as a satellite tray. During epitaxial growth, TMAl is used as the Al source, TMGa is used as the Ga source, and NH3 is used as the N source.
[0159] In addition, either N2 or H2 is used as the carrier gas. The process temperature is set at 1200℃.
[0160] In step (2), when GaN is placed on a satellite tray using a support substrate for epitaxial growth, the epitaxial layer is formed by sequentially depositing AlN and AlGaN from the substrate side toward the growth direction, and then epitaxially growing GaN.
[0161] Therefore, as shown in Figure 2(b), a group III nitride semiconductor seed layer (epitaxy layer) 8 is formed on the silicon single crystal thin film 38 of the initial support substrate 30 to form a group III nitride semiconductor substrate (GaN on GaN support substrate) 200 for bonding. The total film thickness of the group III nitride semiconductor seed layer (epitaxy layer) 8 is set to 1 μm.
[0162] (Step (3)) Then, as shown in Figure 2(c), a laser is irradiated near the interface between the silicon single crystal thin film 38 of the bonding group III nitride semiconductor substrate 200 made in step (2) and the group III nitride semiconductor seed layer (epterion layer) 8.
[0163] The laser wavelength was set to 1064 nm, and the irradiation spacing was set to 5 μm. Furthermore, the laser energy was set to 12 W. Through this step (3), the stripping layer 38a shown in Figure 4 (d) was formed.
[0164] (Step (4)) Prepare a composite substrate 6 as a support substrate, as shown in Figure 4(e) below, which is different from the initial composite substrate 36 prepared in step (1). Furthermore, a planarization layer 7 is deposited on the composite substrate 6. The composite substrate 6 and the planarization layer 7 are fabricated by a method that does not involve the step of bonding the surface silicon single-crystal thin film 38 within the fabrication method of the initial support substrate 30 in step (1).
[0165] (Step (5)) Then, as shown in Figure 4(e), the bonding group III nitride semiconductor substrate 200 prepared in steps (1) to (3) is bonded to the planarization layer 7 formed on the composite substrate 6 to obtain the bonding substrate 300 shown in Figure 5(f). The bonding step is performed at room temperature.
[0166] (Step (6)) In the bonding substrate 300 prepared in step (5), the silicon single crystal film 38 of the bonding group III nitride semiconductor substrate 200 is separated into a portion 38b and another portion 38c of the silicon single crystal film as shown in Figure 5(g) using the release layer 38a as shown in Figure 5(f), and is peeled off from the bonding substrate 300 to grow a portion of the substrate, i.e., the initial support substrate 30. Here, the bonding substrate 300 is fixed vertically to a fixture, and then external forces in opposite directions are applied, thereby separating the silicon single crystal film 38 using the release layer.
[0167] (Step (7)) After the stripping in step (6), as shown in Figure 6(h), a portion 38c of the silicon single-crystal thin film remaining on the surface of the bonding substrate 300 is polished. By polishing at approximately 100 nm, the silicon single-crystal thin film is completely removed. Thereby, as shown in Figure 6(i), a support substrate 10 is obtained, which includes a composite substrate 6 and a group III nitride semiconductor seed layer 8 bonded to the composite substrate 6 with a planarization layer 7.
[0168] The crystallinity of the GaN (0002) growth surface of the group III nitride semiconductor seed layer 8 on the surface of the supporting substrate 10 is 540 arcsec in terms of XRD half width at half maximum (FWHM).
[0169] (Step (8)) On the support substrate 10 fabricated up to step (7), as shown in Figure 6(j), a GaN layer is epitaxially grown as a group III nitride semiconductor layer 20. The epitaxial growth conditions are set to be the same as in step (2), except for the film thickness. The GaN layer 20 is formed to a thickness of 5 μm, merging with the GaN layer already present in the group III nitride semiconductor seed layer 8. In this way, the nitride semiconductor substrate 100 of Example 1, as shown in Figure 6(j), is manufactured.
[0170] Subsequently, when the crystallinity of GaN contained in GaN layer 20 was determined, the crystallinity of the (0002) growth plane of GaN was 250 arcsec as measured by XRD full width at half maximum (FWHM).
[0171] Furthermore, GaN layer 20 is free of cracks.
[0172] (Example 2) In Example 2, a nitride semiconductor substrate is manufactured using the manufacturing process of the second embodiment shown in Figures 7 to 9.
[0173] (Step (1)) First, a silicon single-crystal substrate 40 as shown in Figure 7(a) is prepared as the growth substrate. The silicon single-crystal substrate 40 is configured such that its axial direction is... <111> The person.
[0174] (Step (2)) The silicon single crystal substrate 40 was placed in an MOCVD reactor, and then epitaxial growth of a group III nitride semiconductor seed layer containing AlN, AlGaN, and GaN was performed on the silicon single crystal substrate 40. The silicon single crystal substrate 40 was placed in a wafer carrier disk called a satellite tray. During epitaxial growth, TMAl was used as the Al source, TMGa was used as the Ga source, and NH3 was used as the N source.
[0175] In addition, either N2 or H2 is used as the carrier gas. The process temperature is set at 1200℃.
[0176] In step (2), when GaN is placed on a satellite tray using a support substrate for epitaxial growth, the epitaxial layer is formed by sequentially depositing AlN and AlGaN from the substrate side toward the growth direction, and then epitaxially growing GaN.
[0177] Thus, as shown in Figure 7(b), a group III nitride semiconductor seed layer (epitaxy layer) 8 is formed on a silicon single crystal substrate 40 to create a group III nitride semiconductor substrate (GaN on Si substrate) 200 for bonding. The total film thickness of the group III nitride semiconductor seed layer (epitaxy layer) 8 is set to 1 μm.
[0178] (Step (3)) Then, as shown in Figure 7(c), a laser is irradiated near the interface between the silicon single crystal substrate 40 of the bonding group III nitride semiconductor substrate 200 made in step (2) and the group III nitride semiconductor seed layer (epterion layer) 8.
[0179] The laser wavelength was set to 1064 nm, and the irradiation spacing was set to 5 μm. Furthermore, the laser energy was set to 12 W. Through this step (3), a release layer was formed on the silicon single-crystal substrate 40.
[0180] (Step (4)) The same procedure as step (4) of Example 1 is followed to form the composite substrate 6 and the planarization layer 7.
[0181] (Step (5)) Subsequently, the bonding group III nitride semiconductor substrate 200 prepared in steps (1) to (3) is bonded to the planarization layer 7 formed on the composite substrate 6 prepared in step (4) to obtain the bonding substrate 300 shown in Figure 8(d). The bonding step is performed at room temperature.
[0182] The subsequent steps (6) to (8) are performed in the same manner as in Example 1.
[0183] The crystallinity of the GaN (0002) growth surface of the group III nitride semiconductor seed layer 8 on the surface of the support substrate 10 obtained by step (7) is 540 arcsec in terms of XRD half width at half maximum.
[0184] Furthermore, when determining the crystallinity of GaN in the surface layer GaN layer 20 of the nitride semiconductor substrate 100 obtained in step (8) as shown in Figure 9(h), the crystallinity of the (0002) growth surface of GaN is 450 arcsec in terms of XRD half width at half maximum.
[0185] Furthermore, GaN layer 20 is free of cracks.
[0186] (Comparative Example) In the comparative example, in step (2) of Example 1, a GaN layer was formed with a total film thickness of 5 μm to create a GaN on GaN support substrate. This support substrate was used as the nitride semiconductor substrate of the comparative example.
[0187] When measuring the crystallinity of GaN on the surface of the comparative example nitride semiconductor substrate, the crystallinity of the (0002) growth surface of GaN was 600 arcsec, expressed as XRD full width at half maximum (FWHM).
[0188] As can be seen from the above results, the surface layer of the nitride semiconductor substrate 100 of Embodiments 1 and 2 of the present invention, namely the group III nitride semiconductor layer 20, can suppress differential packing, and the crystallinity of the GaN (0002) growth surface is less than 550 arcsec in terms of XRD full width at half maximum value, which is better than the crystallinity of GaN on the surface layer of the nitride semiconductor substrate of the comparative example.
[0189] Furthermore, it was confirmed that the surface layer of the nitride semiconductor substrate 100 in Examples 1 and 2, namely the group III nitride semiconductor layer 20, did not warp.
[0190] Furthermore, the present invention is not limited to the embodiments described above. The embodiments described above are examples; all embodiments that have substantially the same structure and perform the same function as the technical concept described in the claims of the present invention are included in the technical scope of the present invention.
[0191] 1: Polycrystalline ceramic core 2: First adhesive layer 3: Conductive layer 4: Second adhesive layer 5: Barrier Layer 6: Composite substrate 7: Planarization layer 8: Group III nitride semiconductor seed layer 10: Support substrate 20: Group III nitride semiconductor layer 30: Initial support substrate 31: Polycrystalline ceramic core 32: First adhesive layer 33: Conductive layer 34: Second adhesive layer 35: Barrier Layer 36: Initial composite substrate 37: Initial planarization layer 38: Silicon single-crystal thin film (initial seed layer) 38a: Peel layer 38b: Part of a silicon single-crystal thin film 38c: Another part of silicon single-crystal thin films 40: Silicon single crystal substrate 40a: Peel layer 40b: Part of a silicon single-crystal substrate 40c: Another part of the silicon single crystal substrate 100: Nitride semiconductor substrate 200: Group III nitride semiconductor substrate 300: Bonding substrate
[0192] Domestic storage information (please note in order of storage institution, date, and number) none Overseas storage information (please note in the order of storage country, institution, date, and number) none
Claims
1. A method for manufacturing a nitride semiconductor substrate, wherein a group III nitride semiconductor layer is epitaxially grown on a group III nitride semiconductor seed layer comprising at least GaN, the method being characterized by comprising the following steps: Step (1), in order to manufacture a group III nitride semiconductor substrate for bonding, a silicon single crystal substrate or a starter support substrate is prepared as a growth substrate, wherein the starter support substrate is formed by bonding a silicon single crystal thin film as a starter seed layer on a starter composite substrate having multiple layers stacked thereon through a starter planarization layer; Step (2), wherein a group III nitride semiconductor substrate for bonding is manufactured by epitaxially growing a group III nitride semiconductor seed layer comprising at least GaN on the aforementioned growth substrate, wherein the group III nitride semiconductor substrate for bonding comprises the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the (0002) growth plane of GaN in the group III nitride semiconductor seed layer is 550 arcsec or less in terms of XRD full width at half maximum (FWHM). Step (3) involves irradiating the silicon single crystal substrate or the silicon single crystal thin film of the aforementioned bonding group III nitride semiconductor substrate near the interface with the aforementioned group III nitride semiconductor seed layer to form a release layer; Step (4) involves preparing a composite substrate as a composite substrate different from the aforementioned initial composite substrate, and then depositing a planarization layer on the composite substrate. The composite substrate has multiple layers, including a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a second adhesive layer deposited to the entire first adhesive layer, and a barrier layer bonded to the entire second adhesive layer; Step (5) involves bonding the aforementioned planarization layer prepared in step (4) and the aforementioned group III nitride semiconductor seed layer of the aforementioned bonding group III nitride semiconductor substrate to obtain a bonding substrate; Step (6) involves using the aforementioned release layer to divide the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film of the aforementioned bonding group III nitride semiconductor substrate, and peeling off a portion of the aforementioned growth substrate from the aforementioned bonding substrate; Step (7) involves grinding the release surface to remove the portion of the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film remaining on the aforementioned bonding substrate, thereby obtaining a support substrate, the support substrate comprising the aforementioned composite substrate and the aforementioned group III nitride semiconductor seed layer bonded to the aforementioned composite substrate through a planarization layer; and Step (8) involves epitaxially growing a group III nitride semiconductor layer comprising GaN on the aforementioned group III nitride semiconductor seed layer of the aforementioned support substrate to manufacture a nitride semiconductor substrate.
2. A method for manufacturing a nitride semiconductor substrate as described in claim 1, wherein, In step (4), a composite substrate is prepared to have a conductive layer between the first adhesive layer and the second adhesive layer. The conductive layer is deposited on the entire first adhesive layer or on one side of the first adhesive layer.
3. A method for manufacturing a nitride semiconductor substrate, wherein a group III nitride semiconductor layer is epitaxially grown on a group III nitride semiconductor seed layer containing at least GaN, the method being characterized by comprising the following steps: Step (1), in order to manufacture a group III nitride semiconductor substrate for bonding, a silicon single crystal substrate or a starter support substrate is prepared as a growth substrate, wherein the starter support substrate is formed by bonding a silicon single crystal thin film as a starter seed layer on a starter composite substrate having multiple layers stacked thereon through a starter planarization layer; Step (2), wherein a group III nitride semiconductor substrate for bonding is manufactured by epitaxially growing a group III nitride semiconductor seed layer containing at least GaN on the aforementioned growth substrate, wherein the group III nitride semiconductor substrate for bonding comprises the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the (0002) growth plane of GaN in the group III nitride semiconductor seed layer is 550 arcsec or less in terms of XRD full width at half maximum (FWHM). Step (3) involves irradiating the silicon single crystal substrate or the silicon single crystal thin film of the aforementioned bonding group III nitride semiconductor substrate near the interface with the aforementioned group III nitride semiconductor seed layer to form a release layer; Step (4) involves preparing a composite substrate as a composite substrate different from the aforementioned initial composite substrate, and then depositing a planarization layer only on the front side of the composite substrate. The composite substrate has multiple layers, including a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a barrier layer bonded to the entire first adhesive layer, a second adhesive layer deposited on the back side of the barrier layer, and a conductive layer bonded on the back side of the second adhesive layer; Step (5) involves bonding the aforementioned planarization layer prepared in step (4) to the aforementioned group III nitride semiconductor seed layer of the aforementioned bonding group III nitride semiconductor substrate to obtain a bonding substrate; Step (6) involves using the aforementioned release layer to divide the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film of the aforementioned bonding group III nitride semiconductor substrate, and peeling off a portion of the aforementioned growth substrate from the aforementioned bonding substrate; Step (7) involves grinding the release surface to remove the portion of the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film remaining on the aforementioned bonding substrate, thereby obtaining a support substrate, the support substrate comprising the aforementioned composite substrate and the aforementioned group III nitride semiconductor seed layer bonded to the aforementioned composite substrate through a planarization layer; and Step (8) involves epitaxially growing a group III nitride semiconductor layer comprising GaN on the aforementioned group III nitride semiconductor seed layer of the aforementioned support substrate to manufacture a nitride semiconductor substrate.
4. A method for manufacturing a nitride semiconductor substrate, wherein a group III nitride semiconductor layer is epitaxially grown on a group III nitride semiconductor seed layer comprising at least GaN, the method being characterized by comprising the following steps: Step (1), in order to manufacture a group III nitride semiconductor substrate for bonding, a silicon single crystal substrate or a starter support substrate is prepared as a growth substrate, wherein the starter support substrate is formed by bonding a silicon single crystal thin film as a starter seed layer on a starter composite substrate having multiple layers stacked thereon through a starter planarization layer; Step (2), wherein a group III nitride semiconductor substrate for bonding is manufactured by epitaxially growing a group III nitride semiconductor seed layer comprising at least GaN on the aforementioned growth substrate, wherein the group III nitride semiconductor substrate for bonding comprises the aforementioned group III nitride semiconductor seed layer, and the crystallinity of the (0002) growth plane of GaN in the group III nitride semiconductor seed layer is 550 arcsec or less in terms of XRD full width at half maximum (FWHM). Step (3) involves irradiating the silicon single crystal substrate or the silicon single crystal thin film of the aforementioned bonding group III nitride semiconductor substrate near the interface with the aforementioned group III nitride semiconductor seed layer to form a release layer; Step (4) involves preparing a composite substrate as a composite substrate different from the aforementioned initial composite substrate, and then depositing a planarization layer only on the front side of the composite substrate. The composite substrate has multiple layers, including a polycrystalline ceramic core, a first adhesive layer bonded to the entire polycrystalline ceramic core, a conductive layer bonded to the back side of the first adhesive layer, a second adhesive layer bonded to the back side of the conductive layer, and a barrier layer bonded to the front and side sides of the first adhesive layer, the side side of the aforementioned conductive layer, and the side and back side of the aforementioned second adhesive layer; Step (5) involves bonding the aforementioned planarization layer prepared in step (4) and the aforementioned group III nitride semiconductor seed layer of the aforementioned bonding group III nitride semiconductor substrate to obtain a bonding substrate; Step (6) involves using the aforementioned release layer to divide the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film of the aforementioned bonding group III nitride semiconductor substrate, and peeling off a portion of the aforementioned growth substrate from the aforementioned bonding substrate; Step (7) involves grinding the release surface to remove the portion of the aforementioned silicon single crystal substrate or the aforementioned silicon single crystal thin film remaining on the aforementioned bonding substrate, thereby obtaining a support substrate, the support substrate comprising the aforementioned composite substrate and the aforementioned group III nitride semiconductor seed layer bonded to the aforementioned composite substrate through a planarization layer; and Step (8) involves epitaxially growing a group III nitride semiconductor layer comprising GaN on the aforementioned group III nitride semiconductor seed layer of the aforementioned support substrate to manufacture a nitride semiconductor substrate.
5. A method for manufacturing a nitride semiconductor substrate as described in any one of claims 1 to 4, wherein, Set the wavelength of the aforementioned laser used in step (3) to be above 360 nm and below 1100 nm.
Citation Information
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