Methods for forming nanowires by selectively etching

Abstract

This invention provides a method for selectively etching silicon-germanium relative to silicon in a stack located on a chuck within an etching chamber. The chuck is maintained at a temperature below 15°C. The stack is exposed to an etching gas containing a fluorine-containing gas to selectively etch silicon-germanium relative to silicon.

Description

Technical Field

[0001] [CROSS-REFERENCE TO RELATED APPLICATIONS] This application claims priority to U.S. patent application No. 62 / 701,314, filed on July 20, 2018, which is hereby incorporated by reference for all purposes.

[0002] The present disclosure generally relates to methods for forming semiconductor devices on semiconductor wafers. More specifically, the present disclosure relates to selective etching of nanowires. Prior Art

[0003] When forming semiconductor devices, nanowires can be formed by selectively etching silicon germanium (SiGe) relative to silicon (Si). Nanowires can also be formed by selectively etching Si relative to SiGe. Summary of the Invention

[0004] To achieve the aforementioned objectives and in accordance with the present disclosure, a method is provided for selectively etching silicon germanium relative to silicon in a stack. The stack is positioned on a chuck in an etching chamber. The chuck is maintained at a temperature below 15° C. The stack is exposed to an etching gas comprising a fluorine-containing gas to selectively etch the silicon germanium relative to silicon.

[0005] In another embodiment, a method is provided for selectively etching silicon relative to silicon germanium in a stack. The stack is positioned on a chuck in an etching chamber. The chuck is maintained at a temperature below 15° C. The stack is exposed to an etching gas comprising hydrogen (H 2 ) and a fluorine-containing gas to selectively etch silicon relative to silicon germanium.

[0006] These and other features of this disclosure will be detailed in the following description and in conjunction with the following illustrations. Simple diagram description

[0007] The present disclosure is illustrated by way of example and not limitation in the figures of the accompanying drawings in which like reference characters refer to similar elements and in which:

[0008] FIG1 is a high-level flow chart of one embodiment.

[0009] FIG. 2 is a schematic top view of a processing tool that may be used in one embodiment.

[0010] Figure 3 is a schematic diagram of an etching chamber that can be used in one embodiment.

[0011] Figure 4 is a schematic diagram of a computer system that can be used to implement one embodiment.

[0012] Figures 5A-D are schematic cross-sectional views of a stack processed according to one embodiment.

[0013] Figure 6 shows a more detailed flowchart of the atomic layer deposition process.

[0014] 7A-D are cross-sectional views of a stack processed according to another embodiment.

[0015] Figures 8A-C are cross-sectional schematic diagrams of a stack processed according to another embodiment. Implementation Method

[0016] The present disclosure will now be described in detail with reference to several exemplary embodiments thereof, as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth to provide a thorough understanding of the present disclosure. However, it will be apparent to those skilled in the art that the present disclosure may be practiced without some or all of these specific details. In other instances, well-known processing steps and / or structures have not been described in detail in order to avoid unnecessarily obscuring the present disclosure.

[0017] In one embodiment, to form nanowires, a stack of alternating Si and SiGe layers is provided. The Si and SiGe layers can extend between and connect to electrical contacts or other structures. If the SiGe layer is selectively etched away, the Si layer remains between the electrical contacts. The Si layer can be used as a nanowire. Similarly, if the Si layer is selectively etched away, the SiGe layer remains between the electrical contacts. The SiGe layer can be used as a nanowire. The dimensions of the Si and SiGe layers are so small that etching should be highly selective. Additional processing should be provided to minimize removal of unetched layers.

[0018] Figure 2 is a schematic top view of a processing tool 200 used in one embodiment. Cassette 202 holds unprocessed wafers before they are processed and then holds processed wafers once all processing is complete in processing tool 200. Cassette 202 can hold a number of wafers, typically up to 25. An atmosphere transport module (ATM) 214 is used to transport wafers to and from cassette 202. Load lock station 205 represents at least one device used to transfer wafers between the atmosphere of ATM 214 and the vacuum of vacuum transport module (VTM) 212. VTM 212 is part of the processing tool and connects to a plurality of chambers. Different types of chambers may be present. In this embodiment, there are two breakout chambers 216, an etch chamber 220, and two atomic layer deposition (ALD) chambers 224. The robotic system within the vacuum transport module 212 uses a robotic arm to move stacked wafers between the load locking station 205 and the different chambers 216, 220, and 224. The ATM 214 uses a robotic system to transport wafers between the cassette 202 and the load locking station 205, which is in a vacuum environment.

[0019] FIG3 is a more detailed schematic diagram of an etching chamber 220 that can be used in one embodiment. In one or more embodiments, the etching chamber 220 includes a showerhead 306 and a chuck 308 located within a reactor chamber 310 and surrounded by chamber walls 312. The showerhead provides a gas inlet. Within the reactor chamber 310, a stack 314 is positioned above the chuck 308. A gas source 316 is connected to a remote plasma generator 320. The remote plasma generator 320 is connected to the reactor chamber 310 through the showerhead 306. A radio frequency (RF) source 330 provides 13.56 MHz RF power to the remote plasma generator 320. In this embodiment, the RF source 330 provides power to a coil. This power generates an inductively coupled plasma in the remote plasma generator 320. A chuck temperature controller 340 controls a cooler 344. The cooler 344 cools a refrigerant 348. The refrigerant is supplied to the chuck cooling system 350. The controller 335 is controllably connected to the RF source 330, the discharge pump 352, the chuck temperature controller 340, and the gas source 316.

[0020] FIG4 is a high-level block diagram of a computer system 400 suitable for implementing controller 335 used in an embodiment. Computer system 400 can take many physical forms, ranging from integrated circuits, printed circuit boards, and small handheld devices to large supercomputers. Computer system 400 includes one or more processors 402 and may further include an electronic display device 404 (for displaying graphics, text, and other data), main memory 406 (e.g., random access memory (RAM)), storage device 408 (e.g., a hard drive), removable storage device 410 (e.g., an optical drive), user interface device 412 (e.g., a keyboard, touch screen, keypad, cursor controller or other pointing device), and communication interface 414 (e.g., a wireless network interface). Communication interface 414 allows software and data to be transferred between computer system 400 and external devices via links. The system may also include communication infrastructure 416 (e.g., communication bus, cross-over bar, or network), to which the aforementioned devices / modules are connected.

[0021] Information transmitted via communication interface 414 may be in the form of signals, such as electronic, electromagnetic, optical, or other signals that can be received by communication interface 414 via a communication link that transmits signals and can be implemented using wires or cables, optical fibers, telephone lines, cellular phone links, radio frequency links, and / or other communication channels. With respect to such communication interface 414, it is contemplated that during the execution of the above-described method steps, one or more processors 402 may receive information from a network or output information to a network. Furthermore, method embodiments may be implemented solely on a processor or may be implemented over a network, such as the Internet, in conjunction with a remote processor that shares a portion of the processing.

[0022] The term "non-transitory computer-readable medium" is generally used to refer to media such as main memory, secondary memory, removable storage devices and storage devices (such as hard drives), flash memory, disk drive memory, CD-ROMs, and other forms of persistent memory, and should not be construed to include transitory content (such as carrier waves or signals). Examples of computer code include machine code (such as generated by a compiler) and files containing higher-level code that are executed by a computer using an interpreter. Computer-readable media may also be computer code transmitted via a computer data signal.

[0023] Figure 1 is a high-order flowchart of one embodiment. In an exemplary embodiment, the stack is placed in a breakthrough chamber 216 (step 104). The breakthrough chamber 216 is a chamber that provides a channel for the material to be etched to break through or remove a film layer. Figure 5A is a schematic cross-sectional view of a portion of the stack 314 on the wafer. In this embodiment, the stack 314 includes a first Si layer 508 adjacent to a SiGe layer 512. The SiGe layer 512 is adjacent to a second Si layer 516. The first Si layer 508 and the second Si layer 516 are located on opposite sides of the SiGe layer 512. The first Si layer 508, the SiGe layer 512, and the second Si layer 516 extend between and connect to the two structures (not shown). Because the stack 314 is exposed to air, a coating layer in the form of a native oxide layer 520 is formed on the sides of the first Si layer 508, the SiGe layer 512, and the second Si layer 516. Alternatively, the stack 314 may be coated with another type of cladding layer, such as ALD silicon oxide (SiO2), silicon carbide (SiC), or silicon nitride (SiN). This cladding layer may be deposited to prevent the formation of a cladding layer due to primary oxidation.

[0024] After the stack 314 has been placed into the breakthrough chamber 216, a breakthrough process is provided to remove the cladding layer, namely the native oxide layer 520 (step 108). In this example, the breakthrough process is a wet etching process. The breakthrough process is provided by exposing the stack 314 to an aqueous solution of diluted hydrofluoric acid (49%) with a volume dilution ratio of 300:1 to 10:1 at room temperature (RT) for 10-300 seconds. Figure 5B is a cross-sectional view of the stack 314 after the native oxide layer 520 has been removed.

[0025] VTM 212 transports the stack 314 from the breakthrough chamber 216 to the etching chamber 220 in a vacuum environment (step 112). If the stack 314 is not kept in a vacuum environment, a new native oxide layer will grow on the stack 314. The stack 314 is then secured to a chuck 308 located in the etching chamber 220.

[0026] The chuck is cooled (step 116). In this example, the chuck is cooled to a temperature of -15°C or lower. In this example, the cooler 344 cools the refrigerant 348 to a temperature of approximately -60°C. A remote plasma is generated from an etching gas (step 120). In this example, the etching gas is 45 sccm of carbon tetrafluoride (CF4), 1000 sccm of argon (Ar), and 1000 sccm of helium (He). In this example, the etching gas contains no hydrogen or is substantially free of hydrogen. The etching gas system flows from the gas source 316 to the remote plasma generator 320. The RF source 330 provides 200 watts of RF power at 13.56 MHz to the remote plasma generator 320. In the remote plasma generator 320, the etching gas is converted into a plasma of etching gas ions and high-energy neutral particles.

[0027] High-energy neutral particles flow from the remote plasma generator 320 through the showerhead 306 into the reactor chamber 310. The high-energy neutral particles can be high-energy neutral atoms or molecules of the etching gas. The high-energy neutral particles can include high-energy radical molecules or atoms. In this example, plasma ions do not flow into the reactor chamber 310. The reactor chamber pressure is maintained at no less than 300 mTorr. The high-energy neutral particles selectively etch the stack 314 (step 128) by selectively etching SiGe relative to Si. In this example, the step of selectively etching SiGe relative to Si has a SiGe to Si etching ratio greater than 20:1. FIG5C is a cross-sectional view of the stack 314 after the SiGe layer 512 has been selectively etched (step 128). In this example, the SiGe layer 512 has been completely etched away, leaving the first and second Si layers 508 and 516. The first and second Si layers 508 , 516 may extend between the two structures.

[0028] The VTM 212 transfers the stack 314 from the etch chamber 220 to the ALD chamber 224 in a vacuum environment (step 132). If the stack 314 is not kept in a vacuum environment, a new native oxide layer will grow on the stack 314. This new native oxide layer will consume some of the first and second Si layers 508 and 516.

[0029] An ALD layer is deposited on the stack 314 (step 136). Figure 6 is a more detailed flow chart of the atomic layer deposition process (step 136). The atomic layer deposition process (step 136) includes at least one cycle of providing a precursor (step 604) and converting the precursor (step 608). The precursor is provided to the stack 314 (step 604). In this embodiment, a liquid silicon-containing precursor is vaporized and delivered to the ALD chamber 224 in vapor form to saturate the stack 314. As a result, a layer of the precursor is formed above the stack 314. In this example, the precursor has a composition of the general formula C(x)H(y)N(z)O(a)Si(b). In some embodiments, the precursor has one of the following compositions: N,N,N',N',N'',N''-hexamethylsilanetriamine (C6H19N3Si, C8H22N2Si), (3-aminopropyl)triethoxysilane (C9H23NO3Si), and tetra(isopropoxy)silane (C12H28O4Si). In this example, the precursor is provided plasma-free. The precursor has silicon functional groups. Since the precursor does not attach to another precursor, the precursor forms a monolayer on the stack 314.

[0030] Once the stack 314 is dosed with the precursor, the delivery of the precursor vapor is stopped. A purge step is then provided to purge any excess precursor remaining in the ALD chamber 224. The precursor is then converted (step 608). In one embodiment, this is accomplished by subjecting the stack 314 to a flash process. The flash process involves delivering 1000 sccm to 2000 sccm of oxygen (O₂) flash gas to the ALD chamber 224. In this example, a power of 100 to 3000 watts at 13.56 MHz is delivered to convert the flash gas into a plasma. A pressure of 20 mTorr to 100 mTorr is provided. Because the power delivery time is relatively rapid, for example, between approximately 0.5 seconds and approximately 4 seconds, this flash process is referred to as an "O₂ flash" operation. The O flash operation uses a monolayer of a silicon-containing precursor to form a monolayer of silicon oxide on the stack 314. Once the O flash operation is complete, the ALD chamber 224 is purged. The cycle can then be repeated. FIG5D is a cross-sectional view of the stack 314 after an ALD layer 528 has been deposited to surround or encapsulate the entire perimeter of the Si layers 508 and 516. The ALD layer 528 prevents the Si layers 508 and 516 from being consumed by native oxide formation. Without the ALD layer 528, the native oxide would consume approximately 7 to 8 ounces of the Si layers 508 and 516.

[0031] The resulting coated Si layers 508 and 516 can extend between the two structures. Thus, the first and second Si layers 508 and 516 are used as horizontal nanowires for n-type metal-oxide-semiconductor (NMOS) devices. This embodiment provides an etch selectivity greater than 20:1 for etching SiGe relative to Si. Furthermore, less than 5 μg of Si is lost due to oxidation or etching during the process. This embodiment selectively etches SiGe relative to silicon oxide (SiO2) and silicon nitride (SiN) with a selectivity greater than 100:1. Because this embodiment selectively etches SiGe relative to SiO2 and SiN with a selectivity greater than 100:1, this embodiment includes separate breakthrough steps for etching SiO2 or SiN. In one embodiment, the selective etching of SiGe can be performed in less than 60 seconds.

[0032] It has been unexpectedly discovered that maintaining a low temperature while selectively etching the SiGe layer 512 relative to the Si layers 508 and 516 increases selectivity. In one exemplary embodiment, the chuck 308 is cooled to a temperature less than 15°C. In another exemplary embodiment, the chuck 308 is cooled to a temperature less than 0°C. In another exemplary embodiment, the chuck 308 is cooled to a temperature less than or equal to -15°C. In another exemplary embodiment, the chuck 308 is cooled to a temperature less than or equal to -40°C. In some embodiments, liquid nitrogen is used as a coolant, flowing through the chuck 308 to provide cooling. In other embodiments, liquid Vertel Sinera™ manufactured by DuPont Corporation of Wilmington, DE can be used as a coolant. This coolant can cool to -60°C.

[0033] In various embodiments, the etching gas contains a fluorine-containing component. In various embodiments, the fluorine-containing component is a fluorocarbon (e.g., CF4, hexafluoro-2-butyne (C4F6), or octafluorocyclobutane (C4F8)) or a hydrofluorocarbon (e.g., fluoroform (CHF3) or difluoromethane (CH2F2)). In various embodiments, the etching gas has a flow rate based on the total flow rate of etching gas molecules. The fluorine-containing component contains fluorine. The fluorine-containing component has a flow rate based on the fluorine atoms. The ratio of the total flow rate of etching gas molecules to the flow rate of fluorine atoms is from 1000:1 to 3:1. For example, in the above embodiments, the etching gas is 45 sccm of CF4, 1000 sccm of Ar, and 1000 sccm of He. In this example, since there are 4 fluorine atoms in CF4, the flow rate of fluorine atoms is 180 sccm. The total flow rate of all molecules of the etching gas is 2045 sccm. Therefore, the ratio of the total etching gas flow rate to the fluorine atomic flow rate is 2045:180. 2045:180 is approximately 11:1. To reduce the percentage of fluorine atoms compared to the total etching gas flow rate, one or more inert gases (e.g., inert gas) are added to the etching gas. To provide a more controllable process, inert gas can be used as a diluent.

[0034] During etching, high-energy neutral molecules of the etching gas are used to selectively etch the SiGe layer 512 relative to the Si layers 508 and 516. This etching is achieved by generating high-energy neutral molecules via remote plasma, rather than exposing the stack 314 to the plasma. In the plasma, the stack 314 is bombarded by more ions than by the high-energy neutral molecules. Reducing the ion system bombarding the stack 314 helps reduce the etching of the Si layers 508 and 516. To further reduce the etching of the Si layers 508 and 516, low RF power is used to generate the remote plasma. In various embodiments, the RF power provided to generate the remote plasma is less than 300 watts. Furthermore, in various embodiments, a bias voltage of less than 50 volts is provided. In one exemplary embodiment, no bias voltage is provided. Without a bias voltage, ions are not accelerated toward the stack 314. In one exemplary embodiment, no RF power is supplied to the reactor chamber 310 where the stack 314 is located, but only to a remote plasma generator 320. The remote plasma generator 320 is located outside the reactor chamber 310. The remote plasma generator 320 is separated from the reactor chamber 310 by a spray head 306. A large gap of at least 50 mm exists between the spray head 306 and the top of the stack 314 to further reduce the number of ions reaching the stack 314. In some embodiments, because the plasma is formed outside the reactor chamber 310, the treatment within the reactor chamber 310 is plasma-free.

[0035] The pressure in reactor chamber 310 is maintained at a level not less than 300 mTorr. In one exemplary embodiment, the pressure is at least 500 mTorr. Higher pressures promote selective etching of the SiGe layer 512 relative to the Si layers 508 and 516. Pressures less than 100 mTorr can be used for ion-based etching processes. Conversely, since various embodiments use high-energy neutral particles for etching, the pressure is maintained at a level not less than 300 mTorr. Higher pressures promote etching using high-energy neutral particles instead of ions. Furthermore, higher pressures help reduce the presence of ions and reduce unwanted species. It is believed that various embodiments can provide an etching selectivity of at least 50:1 for SiGe over Si.

[0036] The native oxide breakthrough step (step 108) removes the native oxide layer to allow for subsequent etching of the SiGe layer 512. Transferring the stack 314 from the breakthrough chamber 216 to the etch chamber 220 under vacuum (step 112) prevents the native oxide layer from regrowing during transfer. Transferring the stack 314 from the etch chamber 220 to the ALD chamber 224 under vacuum (step 132) prevents native oxide from forming on the Si layers 508 and 516. Such native oxide formation consumes portions of the Si layers 508 and 516. The consumption of portions of the Si layers 508 and 516 due to native oxide formation results in the removal of portions of the Si layers 508 and 516. Deposition of the ALD layer 528 (step 136) forms a film layer on the Si layers 508 and 516 without consuming silicon from the Si layers 508 and 516.

[0037] In another embodiment, the Si layer is selectively etched relative to the SiGe layer. FIG7A is a schematic cross-sectional view of stack 314. In this embodiment, stack 314 includes a first SiGe layer 708 adjacent to a Si layer 712. Si layer 712 is adjacent to a second SiGe layer 716. First SiGe layer 708 and second SiGe layer 716 are located on opposite sides of Si layer 712. Because stack 314 is exposed to air, a native oxide layer 720 forms on the sides of first SiGe layer 708, Si layer 712, and second SiGe layer 716.

[0038] The stack 314 is placed in the breakthrough chamber 216. A breakthrough treatment is provided to remove the native oxide layer 720 (step 108). In this example, the breakthrough treatment is provided by exposing the stack 314 to a dilute hydrofluoric acid (49%) aqueous solution having a volume dilution ratio of 300:1 to 10:1 for 10-300 seconds at room temperature (RT). FIG7B is a cross-sectional view of the stack 314 after the native oxide layer 720 has been removed.

[0039] The VTM 212 transfers the stack 314 from the breakthrough chamber 216 to the etch chamber 220 in a vacuum environment (step 112 ). The stack 314 is secured to the chuck 308 in the etch chamber 220 .

[0040] The chuck 308 is cooled (step 116). In this example, the chuck 308 is cooled to a temperature no greater than -15°C. In this example, the cooler 344 cools the refrigerant 348 to a temperature of approximately -60°C. A remote plasma is generated from the etching gas (step 120). In this example, the etching gas is 10 sccm of CF4, 100 sccm of H2, 1000 sccm of Ar, and 1000 sccm of He. A small flow of sulfur hexafluoride (SF6) or hydrogen sulfide (H2S) (0-100 sccm) may be added to improve selectivity. The etching gas system flows from the gas source 316 to the remote plasma generator 320. The RF source 330 provides 200 watts of RF power at 13.56 MHz to the remote plasma generator 320. In the remote plasma generator 320, the etching gas is converted into plasma.

[0041] Energetic neutral particles of the etching gas flow from the remote plasma generator 320 through the showerhead 306 into the reactor chamber 310. The energetic neutral particles can be energetic neutral atoms or molecules of the etching gas. In this example, plasma ions do not flow into the reactor chamber 310. The reactor chamber pressure is maintained at no less than 300 mTorr. The energetic neutral particles selectively etch the stack 314 (step 128) by selectively etching Si relative to SiGe. In this example, the step of selectively etching Si relative to SiGe has a Si to SiGe etching ratio greater than 20:1. Figure 7C is a cross-sectional view of the stack 314 after the Si layer 712 has been selectively etched (step 128). In this example, the Si layer 712 has been completely etched away, leaving behind the SiGe layers 708 and 716.

[0042] VTM 212 transports the stack 314 from the etching chamber 220 to the ALD chamber 224 in a vacuum environment (step 132). If the stack 314 is not kept in a vacuum environment, a new native oxide layer will grow on the stack 314.

[0043] An ALD layer is deposited on the stack 314 (step 136). Figure 6 is a more detailed flow chart of the ALD layer deposition process (step 136). The atomic layer deposition process (step 136) includes at least one cycle of providing a precursor (step 604) and converting the precursor (step 608). The precursor is provided to the stack 314 (step 604). In this embodiment, a liquid silicon-containing precursor is vaporized and delivered to the ALD chamber 224 in vapor form to saturate the stack 314. As a result, a layer of the precursor is formed above the stack 314. In this example, the precursor has a composition of the general formula C(x)H(y)N(z)O(a)Si(b). In certain embodiments, the liquid precursor has a composition selected from the group consisting of C₆H₁₆N₃Si, C₈H₂₂N₂Si, C₆H₂₃NO₃Si, and C₁₂H₂₄O₄Si. In this example, the precursor is provided without plasma. The precursor has silicon functional groups. Since the precursor does not attach to another precursor, the precursor forms a monolayer on the stack 314.

[0044] Once the stack 314 is dosed with the precursor, the delivery of the precursor vapor is stopped. A purge step is then provided to purge any excess precursor remaining in the ALD chamber 224. The precursor is then converted (step 608). In one embodiment, this conversion step is accomplished by subjecting the stack 314 to a flash vaporization process. The flash vaporization process includes delivering 1000 sccm to 2000 sccm of oxygen (O₂) flash gas to the ALD chamber 224. In this example, a power of 100 to 3000 watts at 13.56 MHz is supplied to form the flash gas into a plasma. A pressure of 20 mTorr to 100 mTorr is provided for between approximately 0.5 seconds and approximately 4 seconds. A monolayer of silicon oxide is formed on the stack 314 using a monolayer of the silicon-containing precursor. The ALD chamber 224 is then purged. The cycle can then be repeated. Figure 7D is a cross-sectional view of the stack 314 after the ALD layer 728 has been deposited.

[0045] The resulting SiGe layers 708 and 716 can be used as horizontal nanowires for p-type metal-oxide-semiconductor (PMOS) devices. This embodiment provides an etch selectivity greater than 20:1 for etching Si relative to SiGe. Furthermore, less than 5 μg of SiGe is lost due to oxidation or etching during the process. This embodiment selectively etches Si relative to silicon oxide (SiO2) and silicon nitride (SiN) with a selectivity greater than 100:1. This embodiment can provide this selective etch time of less than 60 seconds.

[0046] During etching, high-energy neutral molecules are used to selectively etch the Si layer 712 relative to the SiGe layers 708 and 716. This etching is achieved by generating high-energy neutral molecules via remote plasma, rather than exposing the stack 314 to plasma, where it would be bombarded by more ions than by high-energy neutral molecules. Reducing the number of ions bombarding the stack 314 helps reduce the etching of the SiGe layers 708 and 716. To further reduce the etching of the SiGe layers 708 and 716, low RF power is used to generate the remote plasma. In various embodiments, the RF power provided to generate the remote plasma is less than 300 watts. Furthermore, in various embodiments, a bias voltage of less than 50 volts is provided. One exemplary embodiment provides no bias voltage. Therefore, ions are not accelerated toward the stack 314. In one exemplary embodiment, no RF power is provided to the reactor chamber 310 where the stack 314 is disposed, but only to the remote plasma generator 320. A large gap of at least 50 mm exists between the spray head 306 and the top of the stack 314. This gap further reduces the number of ions reaching the stack 314. In some embodiments, the treatment in the reactor chamber 310 is plasma-free because the plasma system is formed outside the reactor chamber 310.

[0047] The pressure in reactor chamber 310 is maintained at a level not less than 300 mTorr. In one exemplary embodiment, the pressure is at least 500 mTorr. Higher pressures promote selective etching of Si layer 712 relative to SiGe layers 708, 716. Pressures less than 100 mTorr can be used for ion-based etching processes. Conversely, since various embodiments use high-energy neutral particles for etching, the pressure is maintained at a level not less than 300 mTorr. Higher pressures promote etching using high-energy neutral particles instead of ions. Furthermore, higher pressures help reduce the presence of ions and reduce unwanted species. It is believed that various embodiments can provide at least a Si-to-SiGe etching selectivity of 50:1. In the specification and claims, the term "high-energy neutral particles" includes reactive neutral molecules or atoms.

[0048] In other embodiments, the breakthrough process (step 108) may use vapor etching or dry etching. In one example of using vapor breakthrough (step 108), hydrogen fluoride (HF) vapor may be used to provide the breakthrough process (step 108). An example of dry breakthrough (step 108) may provide a plasma formed from CF4 and a bias voltage of 25 to 50 volts.

[0049] Instead of initially covering the stack 314 with a primary oxide layer 520, a coating layer can be formed to prevent silicon consumption during the formation of the primary silicon oxide. The coating layer can be SiO2 deposited by ALD, or it can be SiN or SiC. Different breakthrough processes (step 108) can be used for different coating layers. In other embodiments, instead of depositing SiO2 during the deposition of the ALD layer on the stack 314 (step 136), SiN or SiC can be deposited during the deposition of the ALD layer on the stack 314 (step 136). Layers containing SiO2, SiN, or SiC can be deposited in various embodiments.

[0050] In other embodiments, an inert gas may be used to provide inert conditions during the transfer of the stack 314 to the etching chamber 220 (step 112) or to the ALD chamber 224 (step 124), without using inert conditions provided by a vacuum. This inert gas may be Ar, He, or N₂. In other embodiments, the etching chamber 220 is equipped with a precursor and a fast-response valve. In this etching chamber 220, the deposition of the ALD layer 528 on the stack 314 (step 136) may be performed. In this embodiment, the stack 314 is not transferred to the ALD chamber 224.

[0051] In another embodiment where Si is selectively etched relative to SiGe, an etching gas comprising SF6 and H2 can be used. Fluorine from SF6 can combine with hydrogen to form HF, and SF6 can be used to passivate Ge in the form of Ge-F. The formation of Ge-F facilitates further passivation of SiGe. In other embodiments, the etching gas may comprise a fluorocarbon compound, SF6, and H2S or a sulfur-containing gas along with H2. In some embodiments, CF4 and H2 are used, with the CF4 to H2 ratio between 1:1 and 1:1000. The above embodiments have an SF6 to etching gas ratio of less than 1. The above embodiments have an H2S to etching gas ratio of less than 1. In some embodiments, CF4 can be replaced by another hydrofluorocarbon compound.

[0052] In another embodiment where SiGe is selectively etched relative to Si, a wet breakthrough process is provided. Figure 8A shows a schematic cross-sectional view of a portion of the stack 314 on a wafer. In this embodiment, the stack 314 includes a first Si layer 808 adjacent to a SiGe layer 812. The SiGe layer 812 is adjacent to a second Si layer 816. The first Si layer 808 and the second Si layer 816 are located on opposite sides of the SiGe layer 812. As the stack 314 is exposed to air, a coating layer in the form of a native oxide layer 820 is formed on the sides of the first Si layer 808, the SiGe layer 812, and the second Si layer 816. This breakthrough process is provided in part by exposing the stack 314 at room temperature (RT) to an aqueous solution of diluted hydrofluoric acid (49%) with a volume dilution ratio of 300:1 to 10:1 for a sufficient time to remove a portion of, rather than all, of the native oxide layer 820. FIG8B is a cross-sectional view of stack 314 after native oxide layer 820 has been partially removed.

[0053] The remaining portion of the native oxide layer 820 is removed using a dry etching process employing a fluorocarbon breakthrough gas. In this example, the fluorocarbon breakthrough gas comprises CF4. The breakthrough gas is used to form a plasma. The plasma from the breakthrough gas removes the remaining native oxide layer 820 and selectively deposits amorphous carbon relative to the SiGe layer 812 to coat the first Si layer 808 and the second Si layer 816. Figure 8C is a cross-sectional view of the stack 314 after the amorphous carbon layer 824 has been selectively deposited on the first Si layer 808 and the second Si layer 816. In other embodiments, the etching and ALD processes used can be employed to selectively etch the SiGe layer 812 relative to the first Si layer 808 and the second Si layer 816. The amorphous carbon layer 824 prevents oxidation of the first Si layer 808 and the second Si layer 816 and reduces the etching of the first Si layer 808 and the second Si layer 816. The native oxide layer 820 is partially etched using wet etching to reduce the time required for dry etching. Reducing the dry etching time means reducing the time the substrate is exposed to ions, thereby reducing the etching of the first Si layer 808 and the second Si layer 816 by dry etching.

[0054] While this disclosure has described several preferred embodiments, variations, modifications, substitutions, and various equivalents are possible and fall within the scope of this disclosure. It should also be noted that many alternative methods and apparatuses for implementing this disclosure exist. Therefore, the following appended claims are intended to be construed as including all such variations, modifications, substitutions, and various equivalents that fall within the true spirit and scope of this disclosure.

[0055] 104: Steps 108: Steps 112: Steps 116: Steps 120: Steps 124: Steps 128: Steps 132: Steps 136: Steps 200: Processing Tools 202:Cassette 205: Load lock station 212: Vacuum transport module 214: Atmospheric transport module 216: Breakthrough Chamber 220: Etching chamber 224:Atomic layer deposition chamber 306:Sprinkler head 308: Chuck 310: Reactor chamber 312: Chamber wall 314: Stack 316: Gas Source 320: Remote Plasma Generator 330:RF source 335:Controller 340: Chuck temperature controller 344: Cooler 348:Refrigerant 350:Chuck cooling system 352:Emission Pump 400: Computer System 402: Processor 404: Electronic display device 406: Main Memory 408: Storage device 410: Removable storage device 412: User Interface Device 414: Communication Interface 416: Communications Infrastructure 508: First Si layer 512:SiGe layer 516: Second Si layer 520: Native oxide layer 528: ALD layer 604: Steps 608: Steps 708:SiGe layer 712: Si layer 716:SiGe layer 720: Primary oxide layer 728: ALD layer 808: First Si layer 812:SiGe layer 816: Second Si layer 820: Native oxide layer 824:Amorphous carbon layer

Claims

1. A method for forming silicon nanowires by selectively etching silicon-germanium relative to silicon in a stack, the stack being disposed on a chuck in an etching chamber, the method comprising the steps of: maintaining the chuck at a temperature of 0°C or below; exposing the stack to an etching gas containing a fluorine-containing gas to selectively etch silicon-germanium relative to silicon to form silicon nanowires; and after exposing the stack to the etching gas in the etching chamber, depositing a layer containing SiO2, SiN, or SiC on the surface of the silicon nanowires using atomic layer deposition, wherein the layer containing SiO2, SiN, or SiC surrounds the silicon nanowires.

2. The method of claim 1, wherein the etching gas has a flow rate based on the total flow rate of the etching gas molecules, and wherein the fluorine-containing gas contains fluorine, wherein the fluorine has a flow rate based on the fluorine atoms, wherein the ratio of the flow rate based on the total flow rate of the etching gas molecules to the flow rate based on the fluorine atoms is between 1000:1 and 3:

1.

3. The method of claim 1 further comprises: in a remote plasma generator, forming the etching gas into a plasma having ions of the etching gas and high-energy neutral particles; and allowing the high-energy neutral particles to flow from the remote plasma generator into the etching chamber.

4. The method of claim 3, wherein the etching gas is not maintained as plasma in the etching chamber so as to expose the stack to the high-energy neutral particles.

5. The method of claim 1, wherein the etching gas further comprises a passivating gas.

6. The method of claim 1, wherein the fluorine-containing gas comprises CF4.

7. The method of claim 1 further includes maintaining an etching chamber pressure of at least 300 mTorr.

8. The method of claim 1 further comprises: transferring the stack from the etching chamber to an atomic layer deposition chamber under inert conditions.

9. The method of claim 1, wherein the stack further comprises an oxide coating layer, the method further comprising: using a breakthrough process to remove the oxide coating layer from the stack.

10. The method of claim 9, wherein the breakthrough process includes wet etching to provide the oxide coating.

11. The method of claim 10, wherein the breakthrough process further includes performing dry etching after the wet etching.

12. The method of claim 11, wherein the dry etching of the breakthrough process comprises selectively depositing a carbon-containing layer on silicon relative to silicon germanium.

13. The method of claim 12, wherein the dry etching of the breakthrough process comprises: providing a CF4-containing gas; and forming a plasma from the CF4-containing gas, wherein the plasma provides breakthrough etching and selectively deposits the carbon-containing layer on silicon relative to silicon-germanium.

14. The method of claim 9, wherein the step of providing the breakthrough treatment comprises providing the oxide coating by vapor etching or dry etching.

15. A method for forming silicon-germanium nanowires by selectively etching silicon relative to silicon-germanium in a stack, the stack being disposed on a chuck in an etching chamber, the method comprising the steps of: maintaining the chuck at a temperature of 0°C or below; exposing the stack to an etching gas comprising H2 and a fluorine-containing gas to selectively etch silicon relative to silicon-germanium to form silicon-germanium nanowires; and after exposing the stack to the etching gas in the etching chamber, depositing a layer containing SiO2, SiN, or SiC on the surface of the silicon-germanium nanowires using atomic layer deposition, wherein the layer containing SiO2, SiN, or SiC surrounds the silicon-germanium nanowires.

16. The method of claim 15 further comprises: in a remote plasma generator, forming the etching gas into a plasma having ions of the etching gas and high-energy neutral particles; and allowing the high-energy neutral particles to flow from the remote plasma generator into the etching chamber.

17. The method of claim 16, wherein the etching gas is not maintained as plasma in the etching chamber so as to expose the stack to the high-energy neutral particles.

18. The method of claim 15 further includes maintaining an etching chamber pressure of at least 300 mTorr.

19. The method of claim 15, wherein the etching gas further comprises at least one of H2S or SF6.

20. The method of claim 15, wherein the stack further comprises an oxide coating layer, the method further comprising: removing the oxide coating layer from the stack by a breakthrough process.

21. The method of claim 20, wherein the breakthrough process comprises wet etching, vapor etching, or dry etching to provide the oxide coating.

22. The method of claim 15, wherein the fluorine-containing gas comprises CF4.

23. The method of claim 15, wherein the step of maintaining the chuck at a temperature of 0°C or below 0°C is to maintain the chuck at a temperature of less than or equal to -15°C.

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