Waveform generation circuit, control chip and waveform generation method

Abstract

A waveform generation circuit includes a storage circuit, a counter, a first digital-to-analog converter circuit, a second digital-to-analog converter circuit, and a logic circuit. The storage circuit stores complex digital values. The counter adjusts a count value. The first digital-to-analog converter circuit sequentially converts a first complex input value to generate a first waveform. The second digital-to-analog converter circuit sequentially converts a second complex input value to generate a second waveform. Whenever the count value equals an initial value, the logic circuit selects a digital value as a first input value. After the count value equals a threshold value a preset number of times, whenever the count value equals the threshold value, the logic circuit selects a digital value as a second input value.

Claims

1. A waveform generation circuit, comprising: A storage circuit stores a complex number of digit values; a counter adjusts a count value according to a clock signal, and when the count value reaches a target value, the count value is reset to an initial value; a register circuit stores a first threshold value; a first digital-to-analog converter circuit sequentially converts a complex number of first input values ​​to generate a complex number of first analog signals, the first analog signals forming a first waveform; a second digital-to-analog converter circuit sequentially converts a complex number of second input values ​​to generate a complex number of second analog signals, the second analog signals forming a second waveform; a logic circuit reads from the storage circuit whenever the count value equals the initial value, to select one of the digit values ​​as one of the first input values, wherein: after the number of times the count value equals the first threshold value reaches a first preset number, whenever the count value equals the first threshold value, the logic circuit reads from the storage circuit to select one of the digit values ​​as one of the second input values.

2. The waveform generation circuit as described in claim 1, further comprising: A third digital-to-analog converter circuit sequentially converts complex third input values ​​to generate complex third analog signals, which constitute a third waveform. The register circuit further stores a second threshold value. After the count value equals the second threshold value a second preset number of times, whenever the count value equals the second threshold value, the logic circuit reads the stored circuit to select one of the digital values ​​as one of the third input values.

3. The waveform generating circuit as described in claim 2, wherein the frequency of the first waveform is the same as the frequency of the second waveform, and the frequency of the second waveform is the same as the frequency of the third waveform.

4. The waveform generation circuit as described in claim 3, further comprising: An arithmetic circuit calculates a preset frequency and the number of such digital values, generates an interval time, and generates the target value based on the product of the interval time and the frequency of the clock signal, wherein the frequency of the first waveform is equal to the preset frequency.

5. The waveform generation circuit as described in claim 4, wherein the arithmetic circuit calculates a first phase difference and the number of the digit values ​​to generate a first value and a second value, the arithmetic circuit processes the first value to generate the first preset number of times, and the arithmetic circuit calculates the product of the target value and the second value to generate the first threshold value.

6. The waveform generation circuit as described in claim 5, wherein the arithmetic circuit calculates a second phase difference and the number of the digit values ​​to generate a third value and a fourth value, the arithmetic circuit processes the third value to generate the second preset number of times, and the arithmetic circuit calculates the product of the target value and the fourth value to generate the second threshold value.

7. A control chip coupled to a load, and comprising: A processing circuit that provides complex number bit values; The circuit includes: a storage circuit for storing the digital values; a counter for adjusting a count value according to a clock signal, wherein the count value is reset to an initial value when it reaches a target value; a register circuit for storing a first threshold value; a first digital-to-analog converter circuit for sequentially converting complex first input values ​​to generate complex first analog signals, the first analog signals constituting a first waveform; a second digital-to-analog converter circuit for sequentially converting complex second input values ​​to generate complex second analog signals, the second analog signals constituting a second waveform; and a logic circuit for reading from the storage circuit whenever the count value equals the initial value, for selecting one of the digital values ​​as one of the first input values, wherein: After the count value equals the first threshold a first preset number of times, whenever the count value equals the first threshold, the logic circuit reads the storage circuit to select one of the digital values ​​as one of the second input values, and the load receives the first and second waveforms.

8. The control chip as described in claim 7, wherein the waveform generation circuit further comprises: A third digital-to-analog converter circuit sequentially converts complex third input values ​​to generate complex third analog signals, which constitute a third waveform. The register circuit further stores a second threshold value. After a count value equals the second threshold value a second preset number of times, whenever the count value equals the second threshold value, the logic circuit reads the stored value to select one of the digital values ​​as one of the third input values. The load is a motor, which receives the third waveform.

9. The control chip as claimed in claim 8, wherein in a first period, the logic circuit sequentially uses the bit values ​​as the first input values, in a second period, the logic circuit sequentially uses the bit values ​​as the second input values, and in a third period, the logic circuit sequentially uses the bit values ​​as the third input values, the duration of the first period being equal to the duration of the second period, and the duration of the second period being equal to the duration of the third period.

10. A waveform generation method, comprising: Adjust a count value based on a clock signal; When the count value reaches a target value, the count value is reset to an initial value; whenever the count value equals the initial value, one of the complex digit values ​​is selected and provided to a first digital-to-analog converter circuit; after the count value equals a first threshold value a first preset number of times, whenever the count value equals the first threshold value, one of the digit values ​​is selected and provided to a second digital-to-analog converter circuit, wherein: during a first period, the first digital-to-analog converter circuit sequentially converts the digit values ​​to generate a complex number of first analog signals, which constitute a first waveform; during a second period, the second digital-to-analog converter circuit sequentially converts the digit values ​​to generate a complex number of second analog signals, which constitute a second waveform.

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