Substrate structure

TWI935678BActive Publication Date: 2026-08-11SILICONWARE PRECISION IND CO LTD
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Patent Information

Application Number
TW114106306
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-02-20
Publication Date
2026-08-11
Estimated Expiration
2045-02-19

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    Figure TWG2TB001905617_003
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Abstract

This invention discloses a substrate structure comprising a substrate body, a patterned metal layer, and an insulating protective layer. The substrate body has a circuit layer and defines a die-placement region. The patterned metal layer is disposed on the substrate body. The insulating protective layer has an opening corresponding to the die-placement region and exposing a portion of the circuit layer and a portion of the patterned metal layer, thereby improving the delamination problem by reducing the area of ​​the patterned metal layer exposed by the opening of the insulating protective layer.
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Claims

1. A substrate structure, comprising: The substrate body has a circuit layer disposed on one surface and a crystal placement area defined on the surface. A patterned metal layer is disposed on the surface, wherein the patterned metal layer includes a plurality of metal blocks and a plurality of metal lines connecting at least two of the plurality of metal blocks; and an insulating protective layer is disposed on the surface and has an opening corresponding to the crystal region and exposing a portion of the circuit layer and a portion of the patterned metal layer, wherein the area of ​​the circuit layer and the patterned metal layer exposed by the opening accounts for 45% to 55% of the area of ​​the opening.

2. The substrate structure as described in claim 1, wherein, The substrate body can be a substrate with a core layer or a substrate without a core layer.

3. The substrate structure as described in claim 1, wherein, The circuit layer includes a plurality of electrical contact pads and a plurality of conductive traces connecting the plurality of electrical contact pads.

4. The substrate structure as described in claim 1, wherein, This patterned metal layer is used to provide power / grounding.

5. A substrate structure, comprising: The substrate body has a circuit layer disposed on one surface and a crystal placement area defined on the surface. A patterned metal layer is disposed on the surface, wherein the patterned metal layer includes a large-area metal layer and a plurality of slots formed on the large-area metal layer to expose the plurality of slots outside the substrate body; and an insulating protective layer is disposed on the surface and has an opening corresponding to the crystal placement region and exposing a portion of the circuit layer and a portion of the patterned metal layer, wherein the area of ​​the circuit layer and the patterned metal layer exposed by the opening accounts for 45% to 55% of the area of ​​the opening.

6. The substrate structure as described in claim 5, wherein, The slot shape can be square, round, oval, or irregular.

7. A substrate structure, comprising: The substrate body has a circuit layer disposed on one surface and a crystal placement area defined on the surface. A patterned metal layer is disposed on the surface, wherein the patterned metal layer includes grid-like metal lines; and an insulating protective layer is disposed on the surface and has an opening corresponding to the crystal region and exposing a portion of the circuit layer and a portion of the patterned metal layer, wherein the area of ​​the circuit layer and the patterned metal layer exposed by the opening accounts for 45% to 55% of the area of ​​the opening.

8. The substrate structure as described in claim 7, wherein, The patterned metal layer also includes metal blocks that connect the grid-like metal lines.

9. A substrate structure, comprising: The substrate body has a circuit layer disposed on one surface and a crystal placement area defined on the surface. A patterned metal layer is disposed on the surface; An insulating protective layer is disposed on the surface and has an opening corresponding to the crystal placement area and exposing a portion of the circuit layer and a portion of the patterned metal layer, wherein the area of ​​the circuit layer and the patterned metal layer exposed by the opening accounts for 45% to 55% of the area of ​​the opening, and the insulating protective layer is compounded to have a plurality of insulating blocks of the crystal placement area located within the opening.

10. The substrate structure as described in claim 9, wherein, The plurality of insulating blocks are spaced apart from each other and are circular, square or irregular in shape.

Citation Information

Patent Citations

  • Semiconductor package and packaging substrate

    CN103390602A

  • Electronic package and substrate structure thereof

    US20230253342A1