Semiconductor device and method for fabricating the same

TWI935789BActive Publication Date: 2026-08-11UNITED MICROELECTRONICS CORP
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Patent Information

Application Number
TW114117132
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-05-07
Publication Date
2026-08-11
Estimated Expiration
2045-05-06

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Abstract

This invention discloses a method for manufacturing a semiconductor device, which mainly involves first defining a silicon bridge die region and a spare die region on a substrate, then forming a metal interconnect in the silicon bridge die region, forming a through molding via (TMV) in the spare die region, and then cutting the substrate to form a first die.
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Claims

1. A method for fabricating a semiconductor device, characterized in that it comprises: defining a silicon bridge die region and a spare die region on a substrate; forming a metal interconnect in the silicon bridge die region; forming a through molding via (TMV) in the spare die region, wherein the metal interconnect is not located in the spare die region; and dicing the substrate to form a first die.

2. The method as described in claim 1 further comprises: forming an intermetallic dielectric layer on the substrate; forming the metal interconnect within the intermetallic dielectric layer; removing the intermetallic dielectric layer from the spare die region; forming the through-hole in the spare die region; and forming a sealing layer surrounding the through-hole.

3. The method as described in claim 1 further comprises: forming a silicon through-hole in the substrate to connect the metal interconnect; and forming a protrusion to connect the silicon through-hole.

4. The method as described in claim 1 further comprises: forming a silicon perforation guide hole in the substrate to connect the perforation guide hole; and forming a protrusion to connect the silicon perforation guide hole.

5. The method as described in claim 1 further includes forming a second grain connecting the metal interconnect and the through-hole.

6. The method as described in claim 1, wherein the substrate comprises a silicon wafer.

7. The method as described in claim 1 further comprises: forming an organic layer on the substrate; and forming a redistribution layer within the organic layer.

8. A semiconductor device, characterized in that it comprises: a silicon bridge die region and a spare die region disposed on a substrate; a metal interconnect disposed in the silicon bridge die region; and a through molding via (TMV) disposed in the spare die region, wherein the metal interconnect is not located in the spare die region.

9. The semiconductor device as described in claim 8 further comprises: an intermetallic dielectric layer surrounding the metal interconnect of the silicon bridge die region; and a sealing layer surrounding the through-hole of the spare die region.

10. The semiconductor device as described in claim 8 further comprises: a silicon through-hole disposed within the substrate connecting the metal interconnect; and a protrusion connecting the silicon through-hole.

11. The semiconductor element as described in claim 8 further comprises: a silicon through-hole disposed within the substrate and connected to the through-hole; and a protrusion connected to the silicon through-hole.

12. The semiconductor element as described in claim 8 further includes a die connecting the metal interconnect and the through-hole.

13. The semiconductor device as described in claim 8, wherein the substrate comprises a silicon wafer.

14. The semiconductor device as described in claim 8 further comprises: an organic layer disposed on the substrate; and a redistribution layer disposed within the organic layer.

Citation Information

Patent Citations

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