Semiconductor device and methods of forming

Abstract

During the formation of the gate structure of a semiconductor device, dipole layers containing different dipole forming elements and / or having different thicknesses are formed on the gate dielectric material in different regions of the semiconductor device. A dipole driving process (e.g., a thermal process) is then performed to drive the dipole forming elements of the dipole layers into the gate dielectric material. The dipole forming elements driven into the gate dielectric material form a dipole with an element of the gate dielectric material. The dipole is used to adjust the threshold voltage of the gate structure and achieves different threshold voltages for the gate structures formed in different regions of the semiconductor device.

Claims

1. A method of forming a semiconductor device, the method comprising: forming a fin protruding on a substrate; forming a first dummy gate structure and a second dummy gate structure above the fin; forming an interlayer dielectric (ILD) layer around the first dummy gate structure and the second dummy gate structure above the fin; forming a first gate trench and a second gate trench in the interlayer dielectric layer by removing the first dummy gate structure and the second dummy gate structure, respectively, wherein the first gate trench exposes a first channel region and the second gate trench exposes a second channel region; forming a gate dielectric material around the first channel region and the second channel region; forming a first dipole material around the gate dielectric material in the first gate trench and the second gate trench, wherein the first dipole material includes a first dipole forming element; forming a second dipole material around the first dipole material in the second gate trench, wherein the second dipole material includes a second dipole forming element. A dipole drive-in process is performed to drive the first dipole forming element and the second dipole forming element into the gate dielectric material; after performing the dipole drive-in process, the first dipole material and the second dipole material are removed; and the first gate trench and the second gate trench are filled with a gate electrode material to form a first replacement gate structure and a second replacement gate structure, respectively.

2. The method as described in claim 1, wherein forming the second dipole material comprises: forming the second dipole material in the first gate trench and the second gate trench; and after forming the second dipole material in the first gate trench and the second gate trench, removing the second dipole material from the first gate trench while retaining the second dipole material in the second gate trench.

3. The method as described in claim 1, wherein the first dipole forming element is a first dipole forming metal, the second dipole forming element is a second dipole forming metal, wherein after performing the dipole drive-in process, the first dipole forming metal and an element of the gate dielectric material form a plurality of dipoles of a first type in the gate dielectric material, and the second dipole forming metal and the element of the gate dielectric material form a plurality of dipoles of a second type in the gate dielectric material.

4. A method of forming a semiconductor device, the method comprising: forming a first dummy gate structure and a second dummy gate structure over a fin; forming a dielectric layer over the fin surrounding the first dummy gate structure and the second dummy gate structure; removing the first dummy gate structure and the second dummy gate structure to form a first gate trench and a second gate trench in the dielectric layer, respectively, wherein the first gate trench and the second gate trench expose a first channel region and a second channel region, respectively; forming a gate dielectric material around the first channel region and the second channel region; forming a first dipole layer in the first gate trench and the second gate trench surrounding the gate dielectric material, wherein the first dipole layer includes a first dipole forming element; forming a second dipole layer in the first gate trench and the second gate trench surrounding the first dipole layer, wherein the second dipole layer includes a second dipole forming element; After the second dipole layer is formed, the second dipole layer is removed from the first gate trench while the second dipole layer is retained in the second gate trench; after the second dipole layer is removed, the first dipole forming element and the second dipole forming element are driven into the gate dielectric material; and the first gate trench and the second gate trench are filled with a gate electrode material.

5. The method as described in claim 4, wherein the first of the first dipole forming element and the second dipole forming element is an n-type dipole forming element, and the second of the first dipole forming element and the second dipole forming element is a p-type dipole forming element.

6. The method as described in claim 4, further comprising, after removing the second dipole layer and before the driving in: forming a third dipole layer around the first dipole layer in the first gate trench and around the second dipole layer in the second gate trench; and after forming the third dipole layer, removing the third dipole layer from the second gate trench while retaining the third dipole layer in the first gate trench.

7. The method as described in claim 4, further comprising, after removing the second dipole layer and before the driving in: forming a third dipole layer around the first dipole layer in the first gate trench and around the second dipole layer in the second gate trench, wherein the third dipole layer and the second dipole layer are formed of the same material, wherein the driving in comprises performing a thermal process to drive the first dipole forming element and the second dipole forming element from the first, the second, and the third dipole layers into the gate dielectric material.

8. A semiconductor device comprising: a substrate; a fin projecting over the substrate; a first channel region above the fin; a first gate structure above the fin and surrounding the first channel region, the first gate structure comprising: a first gate dielectric layer surrounding the first channel region, wherein the first gate dielectric layer comprises a high-k dielectric material, a plurality of dipoles of a first type, and a plurality of dipoles of a second type; and a gate electrode material surrounding the first gate dielectric layer; a second channel region above the fin; and a second gate structure above the fin and surrounding the second channel region, adjacent to the first gate structure, the second gate structure comprising: a second gate dielectric layer surrounding the second channel region, wherein the second gate dielectric layer comprises the high-k dielectric material and the dipoles of the first type, wherein the second gate dielectric layer does not contain the dipoles of the second type; and the gate electrode material surrounding the second gate dielectric layer.

9. The semiconductor device as claimed in claim 8, wherein the dipoles of the first type are a plurality of n-type dipoles, and the dipoles of the second type are a plurality of p-type dipoles.

10. The semiconductor device as claimed in claim 8, wherein a first threshold voltage of a first transistor comprising one of the first gate structures is different from a second threshold voltage of a second transistor comprising one of the second gate structures.

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