Semiconductor structure with different spacings between conductive pads and filled with multi-layer silicon oxide, and method of fabricating the same

TWI935966BActive Publication Date: 2026-08-11UNITED MICROELECTRONICS CORP
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Patent Information

Application Number
TW114134406
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-09-09
Publication Date
2026-08-11
Estimated Expiration
2045-09-08

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Abstract

A semiconductor structure with different conductive pad spacings and filled with multiple layers of silicon oxide includes a dielectric layer, two first conductive pads disposed on the dielectric layer, defining a first trench between the first conductive pads, two second conductive pads disposed on the dielectric layer, defining a second trench between the second conductive pads, the aspect ratio of the first trench being greater than that of the second trench, a first silicon oxide layer covering and contacting the first trench and the second trench, the first silicon oxide layer containing carbon and hydrogen elements, a second silicon oxide layer contacting the first silicon oxide layer and filling the first trench and the second trench, the second silicon oxide layer containing carbon, hydrogen and nitrogen elements, and a third silicon oxide layer contacting the second silicon oxide layer and filling the second trench, the third silicon oxide layer containing carbon and hydrogen elements.
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Claims

1. A semiconductor structure having different conductive pad spacings and filled with multiple layers of silicon oxide, comprising: a dielectric layer; two first conductive pads disposed on the dielectric layer, wherein a first trench is defined between the first conductive pads; two second conductive pads disposed on the dielectric layer, wherein a second trench is defined between the second conductive pads, the aspect ratio of the first trench being greater than that of the second trench; a first silicon oxide layer covering and contacting the first trench and the second trench, wherein the first silicon oxide layer comprises carbon and hydrogen elements; a second silicon oxide layer contacting the first silicon oxide layer and filling the first trench and the second trench, the second silicon oxide layer comprising carbon, hydrogen, and nitrogen elements; and a third silicon oxide layer contacting the second silicon oxide layer and filling the second trench, wherein the third silicon oxide layer comprises carbon and hydrogen elements.

2. The semiconductor structure with different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 1, wherein neither the first silicon oxide layer nor the third silicon oxide layer contains nitrogen.

3. The semiconductor structure with different conductive pad spacing and filled with multiple layers of silicon oxide as described in claim 1, wherein the sidewall of the first trench forms a first bottom angle with the dielectric layer, and the sidewall of the second trench forms a second bottom angle with the dielectric layer, the second bottom angle being larger than the first bottom angle.

4. The semiconductor structure with different conductive pad spacing and filled with multiple layers of silicon oxide as described in claim 3, wherein the first base angle is between 90 degrees and 110 degrees and the second base angle is between 108 degrees and 132 degrees.

5. The semiconductor structure with different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 1, wherein the aspect ratio of the first trench is between 2.7 and 3.3, and the aspect ratio of the second trench is between 0.135 and 0.

165.

6. The semiconductor structure with different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 1, wherein the third silicon oxide layer is not filled in the first trench.

7. The semiconductor structure with different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 1, wherein the density of the second silicon oxide layer is between 1.01 and 1.5 times the density of the first silicon oxide layer, and the density of the second silicon oxide layer is between 1.01 and 1.5 times the density of the third silicon oxide layer.

8. The semiconductor structure with different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 1, further comprising: a first conductive element disposed on the first conductive pads and in contact with one of the first conductive pads, wherein the first conductive element contacts the second silicon oxide layer; and a second conductive element disposed on the second conductive pads and in contact with one of the second conductive pads, wherein the second conductive element does not contact the second silicon oxide layer.

9. A semiconductor structure with different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 1, wherein the upper surfaces of each first conductive pad and the upper surfaces of each second conductive pad are aligned, and the bottom surfaces of each first conductive pad and the bottom surfaces of each second conductive pad are aligned.

10. A method for fabricating a semiconductor structure having different conductive pad spacings and filled with multiple layers of silicon oxide, comprising: providing a dielectric layer; forming two first conductive pads and two second conductive pads on the dielectric layer, wherein a first trench is defined between the first conductive pads and a second trench is defined between the second conductive pads; performing a first non-conformal deposition process to form a first silicon oxide layer covering and contacting the first conductive pads, the second conductive pads, the first trench, the second trench, and the dielectric layer; performing a conformal deposition process to form a second silicon oxide layer covering and contacting the first silicon oxide layer, wherein a third trench is defined by the second silicon oxide layer in the second trench; A physical etching process is performed to remove a portion of the second silicon oxide layer and a portion of the first silicon oxide layer to enlarge the opening of the third trench; and after the physical etching process, a second non-conformal deposition process is performed to form a third silicon oxide layer that covers the second silicon oxide layer and fills the third trench.

11. A method for fabricating a semiconductor structure with different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 10, further comprising: etching the third silicon oxide layer, the second silicon oxide layer, and the first silicon oxide layer to form a first groove and a second groove, wherein one of the first conductive pads is exposed through the first groove, and one of the second conductive pads is exposed through the second groove; and forming a first conductive element and a second conductive element, wherein the first conductive element is filled in the first groove, and the second conductive element is filled in the second groove.

12. A method for fabricating a semiconductor structure having different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 11, wherein the first conductive element contacts the second silicon oxide layer, and the second conductive element does not contact the second silicon oxide layer.

13. A method for fabricating a semiconductor structure having different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 10, wherein the first silicon oxide layer and the second silicon oxide layer together fill the first trench after the conformal deposition process and before the physical etching process.

14. A method for fabricating a semiconductor structure having different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 10, wherein the aspect ratio of the first trench is greater than that of the second trench.

15. A method for fabricating a semiconductor structure with different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 10, wherein the sidewall of the first trench forms a first bottom angle with the dielectric layer, and the sidewall of the second trench forms a second bottom angle with the dielectric layer, the second bottom angle being larger than the first bottom angle.

16. A method for fabricating a semiconductor structure having different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 15, wherein the first base angle is between 90 degrees and 110 degrees, and the second base angle is between 108 degrees and 132 degrees.

17. A method for fabricating a semiconductor structure having different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 10, wherein the first silicon oxide layer and the third silicon oxide layer contain carbon and hydrogen elements, the first silicon oxide layer and the third silicon oxide layer do not contain nitrogen elements, and the second silicon oxide layer contains carbon, hydrogen and nitrogen elements.

18. A method for fabricating a semiconductor structure having different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 10, wherein the density of the second silicon oxide layer is between 1.01 and 1.5 times the density of the first silicon oxide layer, and the density of the second silicon oxide layer is between 1.01 and 1.5 times the density of the third silicon oxide layer.

19. A method for fabricating a semiconductor structure with different conductive pad spacings and filled with multiple layers of silicon oxide as described in claim 10, wherein the first non-conformal deposition process and the second non-conformal deposition process do not use a high-density plasma chemical vapor deposition process.

Citation Information

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