Semiconductor devices and manufacturing methods thereof

TWI937152BActive Publication Date: 2026-09-01THE UNIV OF TOKYO +2
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
TW110140366
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-10-29
Filing Date
2021-10-29
Publication Date
2026-09-01
Estimated Expiration
2041-10-28

AI Technical Summary

Technical Problem

Semiconductor devices with electronic components fixed to a substrate face issues with connection reliability due to bending, vibration, and external forces, particularly when using flexible substrates.

Method used

A semiconductor device configuration that includes a substrate with wiring and a wiring connection portion, an electrically connected electronic component, and a resin film that follows the shape of the electronic component and is laminated on the substrate surface, enhancing connection reliability through a manufacturing method involving conductive paste printing and resin film lamination.

Benefits of technology

Improves connection reliability between electronic components and substrates, particularly in flexible substrates, by enhancing bending resistance, vibration resistance, and scratch resistance, while reducing manufacturing steps and costs.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure TWG2TB001908129_001
    Figure TWG2TB001908129_001
  • Figure TWG2TB001908129_002
    Figure TWG2TB001908129_002
  • Figure TWG2TB001908129_003
    Figure TWG2TB001908129_003
Patent Text Reader

Abstract

This invention provides a semiconductor device and its manufacturing method that improve the connection reliability between electronic components and the substrate in a semiconductor device on which electronic components are fixed. The semiconductor device of this invention comprises: a substrate 10 having wiring and wiring connection portions 12 connected to the wiring; electronic components 20, 30, 40, and 50 electrically connected to the wiring connection portions 12 and fixed to the substrate 10; and a resin film 60 conforming to the shape of the electronic components 20, 30, 40, and 50 and covering the electronic components 20, 30, 40, and 50 and deposited on one surface of the substrate 10.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to a semiconductor device and a method for manufacturing the same. Prior Technology

[0002] In recent years, the concept of the Internet of Things (IoT) has been highly promoted, envisioning a networked society where sensors are installed on all objects. This IoT society requires inexpensive and mass-producible devices, and organic thin-film transistors (OTFTs) using organic semiconductors (OSCs) show promise as a core component. Compared to silicon semiconductors, which require vacuum processing, OSCs, which can be fabricated using low-cost printing methods, offer superior processability. Furthermore, transistor operation can be achieved using ultrathin films of a few molecular layers, thus reducing material costs. Moreover, OSCs are known to possess flexibility, resisting mechanical stress such as bending or strain, and allow for the application of subtle changes in transistor characteristics to sensing. Given these cost and functional advantages, OTFTs are expected to make a significant contribution to the IoT society.

[0003] Semiconductor devices are constructed by fixing various electronic components, such as OTFTs, onto a substrate and electrically connecting them via wiring. A typical reflow process for electrically connecting electronic components on a substrate includes the following stages: a first stage of patterning the wiring on the substrate using methods such as vapor deposition, plating, and printing; a second stage of printing solder paste; a third stage of mounting the electronic components; and a fourth stage of achieving conductivity between the electronic components and the wiring by heating and melting the solder.

[0004] Patent document 1 discloses a method for forming a layer of solder paste on the upper surface of an electrode formed on a substrate by screen printing.

[0005] Patent document 2 discloses a method for applying solder paste into the through-holes of a flexible printed circuit board by screen printing. [Previous Technical Documents] [Patent Literature]

[0006] [Patent Document 1] Japanese Patent Application Publication No. 2019-051667 [Patent Document 2] Japanese Patent Application Publication No. 2016-127205 Summary of the Invention

[0007] [The problem the invention aims to solve]

[0008] Furthermore, in semiconductor devices where electronic components are fixed to the aforementioned substrate, the electrical connection between the electronic components and the substrate can be damaged when the substrate is bent, vibrated, or scratched by external forces. In particular, when the substrate is flexible, it is easily affected by bending or vibration of the substrate.

[0009] In this specification, the reliability of the connection between the electronic components and the substrate when the substrate is bent, when vibration is applied to the substrate, and when the electronic components are scratched are referred to as bending resistance, vibration resistance, and scratch resistance, respectively.

[0010] The present invention was made in view of the above circumstances, and its object is to provide a semiconductor device and a method thereof for manufacturing the same, which can improve the connection reliability between electronic components and substrate in a semiconductor device for fixing electronic components to substrate. [Technical means to solve the problem]

[0011] The semiconductor device of the present invention comprises: a substrate having wiring and wiring connection portions connected to the wiring; an electronic component electrically connected to the wiring connection portions and fixed to the substrate; and a resin film that follows the shape of the electronic component, covers the electronic component, and is deposited on one side of the substrate.

[0012] The semiconductor device manufacturing method of the present invention includes the following steps: providing wiring and wiring connection portions connected to the wiring on a substrate; electrically connecting an electronic component to the wiring connection portions and fixing it to the substrate; and causing a resin film to follow the shape of the electronic component, cover the electronic component, and be deposited on one side of the substrate. [Effects of the Invention]

[0013] According to the present invention, the connection reliability between electronic components and substrate can be improved by fixing electronic components in a semiconductor device that is mounted on a substrate. Simple Explanation of the Diagram

[0014] Figure 1 is a top view of the semiconductor device according to the first embodiment. Figure 2 is a cross-sectional view of A-A' in Figure 1. Figure 3 is a cross-sectional view showing the steps of the manufacturing method of the semiconductor device according to the first embodiment. Figure 4 is a cross-sectional view showing the steps following Figure 3. Figure 5 is a cross-sectional view showing the steps following Figure 4. Figure 6 is a cross-sectional view showing the steps following Figure 5. Figure 7 is a cross-sectional view of the semiconductor device according to the second embodiment. Figure 8 is a cross-sectional view showing the steps of the manufacturing method of the semiconductor device according to the second embodiment. Figure 9 is a cross-sectional view showing the steps of the manufacturing method of the semiconductor device in the first variation. Figure 10 is a cross-sectional view showing the steps of the manufacturing method of the semiconductor device in the second variation. Implementation

[0015] [First Implementation] (Overall structure of a semiconductor device) Figure 1 is a top view of the semiconductor device according to this embodiment. Figure 2 is a cross-sectional view along line A-A' in Figure 1. The semiconductor device 1 includes a substrate 10, electronic components 20, 30, 40, 50, and a resin film 60.

[0016] (Substrate) The substrate 10 has wiring 11 and wiring connection portions 12 formed thereon. The substrate 10 is, for example, a flexible substrate. The thickness of the substrate 10 is, for example, 10 μm or more and 300 μm or less. The substrate 10 is, for example, formed of polyimide (PI). Alternatively, the substrate 10 is formed of a general-purpose resin film such as polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polylactic acid (PLA), epoxy resin, acrylic resin, etc., which have lower heat resistance than polyimide. Here, the substrate 10 is not limited to a single-layer substrate. As the substrate 10, a multilayer wiring substrate formed by stacking a plurality of flexible substrates, each having at least wiring 11, can be used. Furthermore, as the substrate 10, a multilayer wiring substrate can also be used, which is formed by alternately stacking a plurality of conductive layers and insulating layers on a single-layer substrate instead of stacking a plurality of flexible substrates. When using a multilayer wiring board as the substrate 10, it is preferable that the uppermost flexible substrate among the at least stacked flexible substrates also forms a wiring connection portion 12 in addition to the wiring 11.

[0017] (Wiring and wiring connections) Wiring 11 and wiring connection portion 12 connected to wiring 11 are disposed on substrate 10. Wiring 11 and wiring connection portion 12 are formed of the same material and, for example, of the same thickness (height). Wiring 11 and wiring connection portion 12 are formed simultaneously, for example, in a single manufacturing step. When wiring 11 and wiring connection portion 12 are formed simultaneously in a single manufacturing step, wiring 11 and wiring connection portion 12 are formed of the same material and have the same thickness (height). Wiring 11 and wiring connection portion 12 are obtained, for example, by printing and curing conductive paste with a specific wiring pattern at a specific thickness of 1 μm to 300 μm. Conductive paste is formed by dispersing conductive fillers in an organic dispersion medium such as an adhesive resin or an aqueous dispersion medium such as a silicate aqueous solution, and can be cured by firing, light irradiation, or drying, and used as a conductive layer. As conductive fillers, metal particles such as silver, copper, and nickel, carbon flakes, carbon particles, or carbon black such as carbon nanotubes can be used. The particle size of the conductive filler is, for example, from 0.1 μm to tens of μm. The line / space accuracy of screen printing is, for example, 50 μm / 50 μm (L / S).

[0018] The conductive paste used in the wiring 11 and wiring connection portion 12 of this embodiment is not particularly limited to this, and the curing temperature is 130°C or below, more preferably 100°C or below. By forming this configuration, when a flexible substrate is used as the substrate 10, or when an organic semiconductor element is mounted as the electronic element 50, the substrate 10 or the electronic element 50 will not be damaged, and the wiring connection portion 12 can be connected to the electronic element 50.

[0019] (Electronic components) Electronic components 20, 30, 40, and 50 are electrically connected to the wiring connection portion 12 and fixed to the substrate 10. Electronic components 20, 30, 40, and 50 can each be either active components such as transistors and integrated circuits, or passive components such as resistors and sensors. Electronic components 20, 30, 40, and 50 can also include both active and passive components. In Figures 1 and 2, electronic components 20, 40, and 50 represent active components, and electronic component 30 represents a passive component. The electronic components can be configured as a plurality of each, as shown in Figures 1 and 2, or they can be configured as a single component.

[0020] Electronic components 20, 30, 40, and 50 can be either inorganic semiconductor components formed from silicon or organic semiconductor components formed from organic materials. In Figures 1 and 2, electronic components 20, 30, and 40 represent inorganic semiconductor components, and electronic component 50 represents an organic semiconductor component.

[0021] (Inorganic semiconductor components) Electronic component 20 includes semiconductor component 21. Semiconductor component 21 is an inorganic semiconductor component containing active components, such as a MOS (Metal-Oxide-Semiconductor) transistor. It is formed by depositing an active region in a silicon semiconductor region with a gate electrode separated by a gate insulating film, and forming active and drain regions in the silicon semiconductor region on both sides of the gate electrode separated by the active region. Alternatively, it can be a thin-film transistor (TFT) consisting of a thin film semiconductor layer containing a silicon semiconductor region disposed on a support substrate. Electrodes 22 and 23, which are formed with bumps or the like, are connected to semiconductor component 21. Six electrodes 22 and 23 are shown in the figure, but the number of electrodes is arbitrary. The outermost layer of semiconductor component 21, except for the portions of electrodes 22 and 23, is sealed by a sealing layer (not shown) containing epoxy resin or the like. Electrodes 22 and 23 are electrically connected and fixed to the wiring connection part 12.

[0022] Electronic component 30 includes semiconductor component 31. Semiconductor component 31 is an inorganic semiconductor component that includes a passive component, such as a resistive component having a resistive region disposed in a silicon semiconductor region. Electrodes 32 and 33 are formed on semiconductor component 31. Two electrodes 32 and 33 are shown in the figure, but the number of electrodes is arbitrary. The outermost layer of semiconductor component 31, except for the portions of electrodes 32 and 33, is sealed by a sealing layer (not shown) containing epoxy resin or the like. Electrodes 32 and 33 are electrically connected to and fixed to wiring connection portion 12.

[0023] Electronic component 40 includes semiconductor component 41. Semiconductor component 41 is an inorganic semiconductor component containing active elements. For example, it is configured such that a semiconductor wafer with a MOS transistor or the like is mounted on a lead frame, the semiconductor wafer and the leads are connected by bonding wires, and the semiconductor wafer and the bonding wires are covered by a sealing layer (not shown) containing epoxy resin or the like. Semiconductor component 41 may also be configured to include a TFT. As shown in FIG2, it is configured such that lead electrodes 42 and 43 extend outward from semiconductor component 41. Six lead electrodes 42 and 43 are shown in the figure, but the number of lead electrodes is arbitrary. Lead electrodes 42 and 43 are electrically connected to and fixed to wiring connection portion 12.

[0024] (Organic semiconductor device) Electronic component 50 includes a semiconductor element 52 disposed on substrate 51. Semiconductor element 52 is an organic semiconductor element that includes either active elements such as transistors and integrated circuits, or passive elements such as resistors and sensors. Semiconductor element 52 may also include both active and passive elements. For example, semiconductor element 52 includes an organic thin-film transistor (OTFT), which is formed by depositing an active region of a gate electrode dielectric gate insulating film on an organic semiconductor film, and forming active and drain regions on both sides of the gate electrode across the active region. Electrodes 53 and 54, which are formed with bumps or other protrusions, are connected to semiconductor element 52. Six electrodes 53 and 54 are shown in the figure, but the number of electrodes is arbitrary. The outermost layer of semiconductor element 52, except for the portions of electrodes 53 and 54, is sealed by a sealing layer (not shown) including a barrier film or fluororesin. Electrodes 53 and 54 are electrically connected to and fixed to wiring connection portion 12.

[0025] Semiconductor device 52 is composed of a thin-film transistor, with the active region of the thin-film transistor formed by an organic semiconductor film. Unlike existing silicon semiconductors, semiconductor devices with active regions formed by organic semiconductor films can be manufactured using atmospheric coating and printing processes. Thus, by using organic semiconductors for the active region of the thin-film transistor, manufacturing can be achieved using a very simple process, enabling the production of small batches of diverse products and facilitating the adoption of devices at very low cost.

[0026] Methods for forming organic semiconductor films using organic semiconductors include PVD (Physical Vapor Deposition), represented by vacuum evaporation; plate printing and plateless printing using inks containing organic semiconductor materials; and edge casting or continuous edge casting using solutions of dissolved organic semiconductor materials. Edge casting is described in detail in, for example, Japanese Patent Application Publication No. 2015-185620, and continuous edge casting is described in detail in, for example, Japanese Patent Application Publication No. 2017-147456. When using PVD or continuous edge casting, after forming the organic semiconductor film over the entire surface of the insulating film, the shape of the organic semiconductor film can be patterned using photolithography or similar methods, or a mask can be used to pattern the shape of the organic semiconductor film. The organic semiconductor film is preferably a single-crystal film of an organic semiconductor.

[0027] Examples of materials for n-type organic semiconductor films include PDI1MPCN2 (N,N'-bis((S)-1-methylpentyl)-1,7(6)-dicyanoperyl-3,4:9,10-bis-(dimethylimide)), PDI-FCN2 (N-fluoroalkylated dicyanoperyl-3,4:9,10-bis(dimethylimide)), PDI-C8 (N,N'-dioctylperyldiimide), PDI-C13 (N,N'-di-tetrazylperyldiimide), PDI-8CN2 (N,N'-bis(n-octyl),1,6-dicyanoperyl-3,4:9,10-bis(dimethylimide)), PBI-F2, and PBI-F2. 4 (fluorine-substituted PBI (perylenetetracarboxylic acid diimidine) derivatives), F16CuPc (copper hexadecylfluorophthalocyanine), TC-PTCDI (tetrachloroperylenetetracarboxylic diimidine), BPE-PTCDI (N,N'-bis(2-phenylethyl)peryl-3,4:9:10-bis(dimethylimidine)), 2,9-diphenylethylanthracene[9,1,2-cde:10,5,6-c'd'e']bis([2,7] acetidine)-1,3,8,10(2H,9H)-tetraone, etc.

[0028] Furthermore, materials that can be deposited as p-type organic semiconductor films by vapor deposition include pentacene and copper phthalocyanine. Furthermore, materials that can be formed into p-type organic semiconductor films by lithographic or non-lithographic printing methods and edge casting include, for example, Tips-pentacene (6,13-bis(triisopropylsilylethynyl)pentacene), NSFAAP (13,6-N-sulfinylacetamidopentacene), DMP (6,13-dihydro-6,13-methanopentacene-15-one), and pentacene-N-sulfinyl-n-butylcarbamate adduct. Plextor precursors, such as adduct, pentacene-N-sulfinyl-tert-butylcarbamate, and others, are represented by BTBT ([1]benzothiophene[3,2-b]benzothiophene) and C10-DNBDT (3,11-dicepyldinaphtho[2,3-d:2',3'-d']benzo[1,2-b:4') Low molecular weight compounds or oligomers, represented by [3,11-didecyldinaphto[2,3-d:2',3'-d']benzo[1,2-b:4,5-b']dithiophene] or C9-DNBDT with different side chain lengths, those with a benzobisthiadiazole skeleton, porphyrin, benzoporphyrin, and oligothiophenes with alkyl groups as soluble groups, are represented by polythiophene, fumonisin copolymers, or IDT-BT (indacenodithiophene benzothiadiazole) and CDT-BT (Cyclopentadithiophene benzothiadiazole) with DA structures.

[0029] It is also preferable that the organic semiconductor film serving as the active region is formed from carbon nanotubes, graphene, oxide semiconductors, or semiconductors containing metal compounds such as black phosphorus. Thin-film transistors with carbon nanotubes as the active region are described in detail in, for example, Japanese Patent No. 6005204, "Dong-ming Sun et al., "Flexible high-performance carbon nanotube integrated circuits", Nature Nanotechnology volume 6, pages 156-161 (2011), "Donglai Zhong et al., "Gigahertz integrated circuits based on carbon nanotube films", Nature Electronics volume 1, pages 40-45 (2018), and "Jianshi Tang et al., "Flexible CMOS integrated circuits based on carbon nanotubes with sub-10 ns stage delays", Nature Electronics volume 1, pages 191-196 (2018).

[0030] Thin-film transistors with graphene as the active region are described in detail in, for example, Japanese Patent Application Publication No. 2013-253010, "Seunghyun Lee1 et al., "Flexible and Transparent All-Graphene Circuits for Quaternary Digital Modulations", Nature Communications volume 3, Article number: 1018 (2012), "Shu-Jen Han1 et al., "Graphene radio frequency receiver integrated circuit", Nature Communications volume 5, Article number: 3086 (2014), "Yu-Ming Lin et al., "Wafer-Scale Graphene Integrated Circuit", Science 10 Jun 2011, Vol. 332, Issue 6035, pp. 1294-1297.

[0031] Thin-film transistors with active regions being oxide semiconductors are described in detail in, for example, Japanese Patent Application Publication No. 2017-76789, Japanese Patent Application Publication No. 2018-50043, "Hiroaki Ozakia et al., "Wireless operations for 13.56-MHz band RFID tag using amorphous oxide TFTs", IEICE Electronics Express Volume 8 (2011) Issue 4 Pages 225-231", "Ming-Hao Hung et al., "Ultra Low Voltage IV RFID Tag Implement in aIGZO TFT Technology on Plastic", 2017 IEEE International Conference on RFID", and "Byung-Do Yang et al., "A Transparent Logic Circuit for RFID Tag in a-IGZO TFT Technology", ETRI Journal Volume 35, Issue 4 August 2013 Pages 610-616".

[0032] Thin-film transistors whose active region is a semiconductor containing a metal compound of black phosphorus are described in detail, for example, in Japanese Patent Application Publication No. 2018-14359, Japanese Patent Application Publication No. 2018-98338, "Xuewei Feng et al., “Complementary Black Phosphorus Nanoribbons Field-Effect Transistors and Circuits” IEEE Transactions on Electron Devices Volume 65, Issue 10, Oct. 2018 Page(s): 4122-4128, and "Peng Wu et al., “High Performance Complementary Black Phosphorus FETs and Inverter Circuits Operating at Record-Low VDD down to 0.2V” 2018 76th Device Research Conference (DRC).

[0033] The electronic components 20, 30, 40, and 50 in this embodiment are not particularly limited to this. It is preferable that the wiring connection portion 12 is electrically connected to the wiring connection portion without the solder or other materials (e.g., conductive pastes different from the conductive pastes constituting the wiring connection portion 12) being placed between the wiring connection portion 12 and the respective electrodes of the electronic components 20, 30, 40, and 50.

[0034] (Resin film) In the semiconductor device 1 of this embodiment, the resin film 60 is composed of two resin films 60A and 60B. Resin film 60A follows the shape of electronic components 20, 30, 40, and 50 and is deposited on one surface of the substrate 10, covering the electronic components 20, 30, 40, and 50. Resin film 60B is then deposited on the other surface of the substrate 10. The thickness of resin films 60A and 60B is, for example, 10 μm or more and 300 μm or less. Resin films 60A and 60B are formed, for example, from polyethylene terephthalate (PET), polystyrene (PS), polyamide (PA), polyethylene (PE), polypropylene (PP), polyvinyl chloride (PVC), polymethyl methacrylate (PMMA), etc. The resin film 60A follows the shape of electronic components 20, 30, 40, and 50 and covers them. However, gaps may remain between the substrate 10 and the electronic components 20, 30, 40, and 50. Here, "gaps" refers to spaces existing between the substrate 10 and the electronic components 20, 30, 40, and 50, which, when viewed from the resin film 60A, are on the back side of the electronic components 20, 30, 40, and 50 and are therefore difficult to fill with the resin film 60A. Slight air bubbles may also remain between the substrate 10 and the resin films 60A and 60B, but fewer air bubbles result in better adhesion between the substrate 10 and the resin films 60A and 60B. Here, bubbles refer to spaces existing between the substrate 10 and the resin films 60A and 60B that cannot be completely filled by the resin films 60A and 60B. The higher the conformability of the resin films 60A and 60B, the fewer bubbles remain between the substrate 10 and the resin films 60A and 60B. As described below, the amount of bubbles remaining between the substrate 10 and the resin films 60A and 60B can be controlled to a certain extent depending on the lamination method and lamination conditions of the resin films 60A and 60B.

[0035] (Manufacturing method of semiconductor device) Hereinafter, the manufacturing method of the semiconductor device according to this embodiment will be described with reference to FIGS. 3 to 6. FIGS. 3 to 6 show the steps of the manufacturing method of the semiconductor device according to this embodiment, and are cross-sectional views corresponding to FIG. 2. First, as shown in FIG. 3, a substrate 10 is prepared. Here, for example, a flexible substrate is prepared as the substrate 10.

[0036] Secondly, as shown in Figure 4, conductive paste is printed, for example, by screen printing, to form uncured wiring 11A and uncured wiring connection portions 12A connected to wiring 11A on substrate 10. Wiring 11A and wiring connection portions 12A are preferably formed from the same material, and more preferably, for example, with the same thickness. In this way, wiring 11A and wiring connection portions 12A can be formed simultaneously in a single manufacturing step. For example, the conductive paste that will become wiring 11A and wiring connection portions 12A is printed with a specific thickness of 1 μm to 300 μm. By curing the conductive paste printed with a specific wiring pattern, a conductive layer with a specific pattern, namely wiring 11 and wiring connection portions 12, can be formed. Here, a conductive paste with high viscosity and viscoelasticity is used. The viscosity is, for example, 20 Pa·s or more, and more preferably 100 Pa·s or more. When the conductive paste is printed using other printing methods such as spray printing, a viscosity suitable for each printing method is set. For example, in spray printing, a viscosity of 5 Pa·s or less is preferred, such as 0.5 Pa·s.

[0037] In the semiconductor device manufacturing method of this embodiment, before the conductive paste printed as described above hardens, as shown in FIG. 5, electronic components 20, 30, 40, and 50 are arranged on the wiring connection portion 12A. For example, electronic components 20, 30, 40, and 50 are respectively adsorbed by suction nozzles, and the electronic components 20, 30, 40, and 50 are arranged in specific positions such that the electrodes of each electronic component 20, 30, 40, and 50 are in contact with the upper surface of the wiring connection portion 12A. Due to the adhesiveness and viscoelasticity of the conductive paste, each electronic component 20, 30, 40, and 50 is temporarily fixed on the wiring connection portion 12A.

[0038] Next, hardening treatments such as firing, light irradiation, or drying are performed to harden the wiring 11A and wiring connection portion 12A containing the unhardened conductive paste. In the case of heat-curing conductive paste, for example, the entire assembly is fired at 130°C or below (100°C or below depending on the type of conductive paste). In the case of light-curing conductive paste, light of wavelengths in the visible to ultraviolet regions is irradiated. This forms a conductive layer formed by the hardening of the conductive paste, and then, along with the hardening of the conductive paste, electronic components 20, 30, 40, and 50 are electrically connected to and fixed to the hardened wiring connection portion 12.

[0039] Next, as shown in Figure 6, resin film 60A is deposited on one surface of substrate 10, following the shape of electronic components 20, 30, 40, and 50 and covering them. Then, simultaneously with the deposition of resin film 60A, resin film 60B is deposited on the other surface of substrate 10. In this embodiment, the deposition of resin films 60A and 60B onto substrate 10 is performed in a vacuum or depressurization space indicated by pressure P1. By depositing resin films 60A and 60B in a vacuum or depressurization space, the pressure difference when removing them at atmospheric pressure can improve the adhesion between substrate 10 and resin films 60A and 60B. As a result, if the resin films 60A and 60B are laminated in a vacuum or depressurized space, compared with the case of laminating the resin films 60A and 60B in the atmosphere, the number of air bubbles remaining between the substrate 10 and the resin films 60A and 60B can be reduced, and the adhesion between the substrate 10 and the resin films 60A and 60B can be improved.

[0040] The ratio of the area actually in close contact with the substrate 10, excluding the areas where electronic components 20, 30, 40, and 50 are located, to the area facing the resin film 60A, i.e., the area that can be in close contact with the substrate 10 due to the conformability of the resin film 60A, is defined as the ratio of the contact area. If fewer air bubbles remain between the substrate 10 and the resin films 60A and 60B, the ratio of the contact area increases. The ratio of the contact area is preferably 80% or more, and more preferably 90% or more. On the back side of the substrate 10 where electronic components 20, 30, 40, and 50 are not mounted, the ratio of the contact area between the resin film 60B and the substrate 10 is approximately 100%, depending on the presence or absence of wiring patterns.

[0041] (Function, Effect) In the semiconductor device of this embodiment, a resin film is deposited on one surface of a substrate to follow the shape of the electronic component and cover the electronic component, thereby improving the connection reliability between the electronic component and the substrate. In particular, when the substrate is a flexible substrate, the connection reliability is easily reduced due to the influence of substrate bending or substrate vibration. However, in the semiconductor device of this embodiment, bending resistance, vibration resistance, and scratch resistance can be improved, thereby improving the connection reliability.

[0042] Using a flexible substrate as the substrate can achieve weight reduction or cost reduction compared to using a rigid substrate, but it reduces the rigidity of the semiconductor device. As in this embodiment, by laminating a resin film, the overall rigidity of the semiconductor device can be improved. Furthermore, flexible substrates are thinner than rigid substrates, thus offering advantages in heat dissipation or thermal conductivity. In particular, when mounting high-current electronic components, higher heat dissipation is preferable. Also, for example, when mounting a temperature sensor, higher thermal conductivity is better for measuring the temperature of the object.

[0043] Furthermore, in the semiconductor device manufacturing method of this embodiment, conductive paste is printed, electronic components are arranged, and the conductive paste is hardened. This allows for the simultaneous formation of wiring and wiring connections, and the electronic components are electrically connected to and fixed to the hardened wiring connections.

[0044] In the semiconductor device manufacturing method of this embodiment, the number of steps can be reduced because the solder printing step is omitted. Furthermore, omitting the alignment adjustment of wiring patterns and solder printing simplifies the process. Also, since solder is not used, bonding problems between wiring metal materials and solder caused by oxide films can be avoided. Furthermore, it is possible to fix and conduct electronic components processed at temperatures below 130°C. By eliminating high-temperature processes, substrate materials with lower heat resistance can be selected. That is, general-purpose resin films such as PEN, PET, PLA, epoxy resin, and acrylic resin, which have lower heat resistance than polyimide, can be used. Therefore, these can be used as inexpensive, colorless, and transparent flexible substrates. Furthermore, the risk of thermal damage to organic semiconductor devices such as OTFTs can be reduced through the mounting process.

[0045] Wiring 11 and wiring connection 12 can be formed by applying conductive paste in a specific pattern using inkjet printing, spray printing, screen printing, or other printing methods. Screen printing is an inexpensive and easy method for patterning conductive paste, and it has the following advantages in circuit wiring, therefore it is preferable to form wiring 11 and wiring connection 12 by screen printing.

[0046] Screen printing allows for printed patterns with thicknesses exceeding 10 μm, reducing wiring resistance. Furthermore, due to the low cost of equipment and printing plates, and the recyclability of the printing paste, waste is minimal, enabling cost reduction. A wide range of conductive fillers with particle sizes from 0.1 μm to 10 μm can be used, providing a broad selection of conductive pastes. Screen printing can be applied to films, fabrics, glass, metals, and other materials, offering a wide range of printing options. The conductive paste can be cured at temperatures below 130°C, or, depending on the type of paste, at temperatures below 100°C. Layer printing with insulating layers between multiple conductive paste layers is possible, enabling multi-layer wiring and cross-hatching patterns. Line / gap accuracy of 50 μm / 50 μm can be achieved, providing practical precision for electronic circuit wiring. Printing from the mm to the m scale is possible, accommodating various sizes.

[0047] Screen printing can be done using either a metal mask or a mesh screen, or either method can be used. Using a mesh screen offers the following advantages: higher pattern precision than with a metal mask; ability to print densely lined or hollow patterns; and higher screen durability, making it suitable for mass production.

[0048] [Second Implementation] Figure 7 is a cross-sectional view of the semiconductor device of this embodiment. In the semiconductor device 2 of this embodiment, a resin film 60A is deposited on only one side of the substrate 10 on which electronic components 20, 30, 40, and 50 are mounted, following the shape of the electronic components 20, 30, 40, and 50 and covering them. No resin film is deposited on the other side of the substrate 10. Except as described above, it is the same as in the first embodiment.

[0049] Figure 8 is a cross-sectional view showing the steps of the semiconductor device manufacturing method according to this embodiment. Similar to the first embodiment, conductive paste is printed onto the substrate to form wiring and wiring connections. Electronic components are placed, and after the conductive paste hardens, in the step of laminating the resin film, the resin film 60A is laminated only on one side of the substrate 10 where the electronic components 20, 30, 40, and 50 are mounted, following the shape of the electronic components 20, 30, 40, and 50 and covering them. No resin film is laminated on the other side of the substrate 10. Except as described above, it is the same as the first embodiment.

[0050] In the semiconductor device of this embodiment, a resin film is deposited on one surface of a substrate to follow the shape of the electronic component and cover the electronic component, thereby improving the connection reliability between the electronic component and the substrate. In particular, when the substrate is a flexible substrate, the connection reliability is easily reduced due to the influence of substrate bending or substrate vibration. However, in the semiconductor device of this embodiment, bending resistance, vibration resistance, and scratch resistance can be improved, thereby improving the connection reliability.

[0051] [Example of the first variation] Figure 9 is a cross-sectional view showing the steps of the manufacturing method of the semiconductor device according to this variation. As shown in Figure 9, in the step of depositing resin film 60A on one side of substrate 10 and resin film 60B on the other side of substrate 10, the resin films 60A and 60B are deposited on one side and the other side of substrate 10 with the spatial pressure P1 on the substrate 10 side of resin films 60A and 60B lower than the spatial pressure P2 on the opposite side of resin films 60A and 60B from substrate 10. That is, the spatial pressures divided by resin films 60A and 60B are adjusted by the three-dimensional overlay method (TOM). For example, the space on the substrate 10 side of resin films 60A and 60B is a vacuum or depressurized environment, and the space on the opposite side of resin films 60A and 60B from substrate 10 is atmospheric pressure or a pressurized environment. Except as described above, it is the same as the first embodiment.

[0052] As described above, if resin films 60A and 60B are laminated using the TOM method—that is, if the spatial pressure on the substrate side of resin films 60A and 60B is lower than the spatial pressure on the opposite side of resin films 60A and 60B—the air bubbles remaining between the substrate 10 and the resin films 60A and 60B can be almost eliminated. The ratio of the close-fitting area between the substrate 10 and the resin film 60A is increased to over 95%. The conformability of the resin film 60A to electronic components 20, 30, 40, and 50 is improved, and the close-fitting property of the resin film 60A to electronic components 20, 30, 40, 50 and the substrate 10 is enhanced. On the back side of the substrate 10 where electronic components 20, 30, 40, and 50 are not mounted, although the presence or absence of wiring patterns is a factor, the ratio of the close-fitting area between the resin film 60B and the substrate 10 is approximately 100%.

[0053] [Second Variation Example] Figure 10 is a cross-sectional view showing the steps of the semiconductor device manufacturing method according to this variation. As shown in Figure 10, in the step of depositing the resin film 60A onto one surface of the substrate 10, the resin film 60A is deposited onto one surface of the substrate 10 with the spatial pressure P1 on the substrate 10 side of the resin film 60A lower than the spatial pressure P2 on the opposite side of the resin film 60A from the substrate 10. Similar to the first variation, the pressure of each space divided by the resin film 60A is adjusted using the TOM method. For example, the space on the substrate 10 side of the resin film 60A is a vacuum or depressurized environment, and the space on the opposite side of the resin film 60A from the substrate 10 is atmospheric pressure or a pressurized environment. Except as described above, it is the same as the second embodiment.

[0054] As described above, if the resin film 60A is laminated using the TOM method, that is, if the space pressure on the substrate side of the resin film 60A is lower than the space pressure on the opposite side of the resin film 60A from the substrate, then the air bubbles remaining between the substrate 10 and the resin film 60A can be almost eliminated. The conformability of the resin film 60A to the electronic components 20, 30, 40, and 50 becomes higher, and the adhesion of the resin film 60A to the electronic components 20, 30, 40, and 50 and the substrate 10 is improved.

[0055] [First Embodiment] A thermosetting silver paste (viscosity 130 Pa·s) is screen-printed onto a 50 μm thick substrate containing a polyimide (PI) film using a metal mask to form uncured wiring and wiring connections. Resistors are placed on the uncured wiring connections, and the uncured wiring and wiring connections are cured by firing at 130°C for 30 minutes. A module with wiring and wiring connections formed on the substrate and resistors mounted thereon is thus fabricated.

[0056] Regarding the accuracy of the wiring / gap, an L / S accuracy of 200 μm / 200 μm can be achieved. The resistance value on the circuit is measured using a tester to confirm that it matches the resistance value specified in the resistor, ensuring continuity between the resistor and the wiring and wiring connections. Even under various load tests, including applying a bend with a radius of curvature of 10 mm to the substrate (hereinafter referred to as the "bending test"), applying a 100 Hz sine wave with an acceleration of approximately 10 G to the substrate for 2 hours using a vibrator (hereinafter referred to as the "vibration test"), or scratching the resistor (specifically, pressing the resistor with the tip of tweezers) (hereinafter, the test of scratching electronic components such as resistors is referred to as the "scratching test"), the resistor does not detach. Furthermore, a cross-cutting test of the wiring section, performed to evaluate the adhesion of the silver paste, showed no areas of peeling.

[0057] For a module with wiring and wiring connections formed on the aforementioned substrate and a resistor mounted thereon, a 50 μm thick PET film is deposited on two surface layers of the module in a vacuum. In the resistor mounting surface, the PET film follows the shape of the resistor and covers it, thus being deposited. This further improves the reliability of the connection between the resistor and the wiring and wiring connections.

[0058] [Second Embodiment] A thermosetting silver paste (viscosity 130 Pa·s) was screen-printed onto a 125 μm thick substrate containing a polyethylene naphthalate (PEN) film using a metal mask (50 μm thick) to form uncured wiring and wiring connections. Seven temperature sensors were placed on the uncured wiring connections, and the uncured wiring and wiring connections were cured by firing at 130°C for 30 minutes. As described above, a module with wiring and wiring connections formed on the substrate and equipped with seven temperature sensors was manufactured.

[0059] Regarding the accuracy of the wiring gap, an L / S accuracy of 350 μm / 150 μm can be achieved. It was confirmed that the output of the temperature sensor on the circuit changes with the ambient temperature, and that the continuity between the temperature sensor and the wiring and wiring connections is ensured. Even under various load tests, including bending tests, vibration tests, and scratch tests on the temperature sensor, the temperature sensor will not detach.

[0060] For a module with wiring and wiring connections formed on the aforementioned substrate and a temperature sensor mounted thereon, a 50 μm thick PET film is deposited on two surface layers of the module in a vacuum. On the temperature sensor mounting surface, the PET film follows the shape of the temperature sensor and covers it. This improves the reliability of the connection between the temperature sensor and the wiring and wiring connections.

[0061] [Third Embodiment] A thermosetting carbon paste (viscosity 0.5 Pa·s) is spray-printed onto a film-like substrate (50 μm thick) containing polyimide (PI) using a metal mask (50 μm thick) to form wiring and wiring connection parts. In addition, carbon paste is supplied to connect resistors to the wiring connection parts, thus forming a module on which resistors are mounted on the substrate with wiring and wiring connection parts.

[0062] In the module obtained as described above, the accuracy of the wire / gap in the wiring can achieve an L / S accuracy of 200 μm / 200 μm. The resistance value on the circuit was measured using a tester to confirm that it was the resistance value specified in the resistor, ensuring continuity between the resistor and the wiring and wiring connections. Even when subjected to bending or vibration load tests on the module, the resistor did not detach. However, if a scratch test was performed on the temperature sensor, or if the temperature sensor was adhered to using tape (adhesive strength 3.93 N / 10 mm), the resistor detached.

[0063] For a module with wiring and wiring connections formed on the aforementioned substrate and a resistor mounted thereon, a 50 μm thick PET film is deposited on both sides of the module in a vacuum. On the resistor mounting surface, the PET film follows the shape of the resistor and covers the temperature sensor. As in this embodiment, when the PET film is deposited in a vacuum environment, compared to when the PET film is deposited in the atmosphere, the number of air bubbles between the substrate, the resistor, and the PET film is reduced. Therefore, the adhesion between the PET film and the substrate and the resistor is improved. Even when subjected to bending tests or vibration tests on the module with the PET film in this embodiment, the resistor will not detach. Furthermore, in the module with the PET film in this embodiment, even when subjected to scratch tests on the temperature sensor or tests using tape (adhesive strength 3.93 N / 10 mm) to adhere the temperature sensor, the resistor will not detach. This further improves the reliability of the connection between the resistor and the wiring and wiring connections.

[0064] [Example 4] In the module described in the third embodiment, which has wiring and wiring connections formed on a substrate and a resistor mounted thereon, a PET film with a thickness of 50 μm is laminated on both sides of the module. Here, in the step of laminating the PET film, the space on the module side of the PET film is a vacuum environment, and the space on the opposite side of the PET film is an atmospheric pressure environment. On the resistor mounting surface, the PET film is laminated following the shape of the resistor and covering the temperature sensor. Here, as described above, by making the space on the module side of the PET film a vacuum environment and the space on the opposite side of the PET film an atmospheric pressure environment, almost no air bubbles remain between the substrate, the resistor, and the PET film. On the resistor mounting surface side of the substrate, the ratio of the close contact area between the substrate and the PET film is increased to 95%. Therefore, the adhesion between the PET film and the substrate and the resistor is further improved. In the module with the PET film laminated in this embodiment, the resistor will not fall off even after bending tests, vibration tests, scratch tests on the temperature sensor, or tests using tape (adhesive strength 3.93 N / 10 mm) to adhere the temperature sensor. This further improves the reliability of the connection between the resistor and the wiring and wiring connections.

[0065] In the above embodiments and variations, a semiconductor device equipped with a plurality of electronic components has been described, but it is not limited thereto; a semiconductor device equipped with only one electronic component may also be described. Regarding the electronic components, electronic components including active components such as transistors or electronic components including passive components such as resistors have been described, but electronic components that include both active and passive components within a single chip may also be described.

[0066] 1: Semiconductor devices 2: Semiconductor devices 10:Substrate 11: Wiring 12: Wiring connection section 20, 30, 40, 50: Electronic components 21: Semiconductor components 22: Electrode 23: Electrode 31: Semiconductor components 32: Electrode 33: Electrode 41: Semiconductor components 42: Lead electrode 43: Lead electrode 51:Substrate 52: Semiconductor components 53: Electrode 54: Electrode 60: Resin film 60A: Resin film 60B: Resin film P1: Pressure P2: Pressure

Claims

1. A semiconductor device comprising: a flexible substrate having wiring and wiring connection portions connected to the wiring; an electronic component electrically connected to the wiring connection portions and fixed to the flexible substrate; and a resin film conforming to the shape of the electronic component and covering the electronic component and deposited on one surface of the flexible substrate, wherein the wiring and the wiring connection portions are formed of the same material and have the same thickness, and the electronic component is electrically connected to the wiring connection portions without intervening any material other than the material constituting the wiring connection portions between the wiring connection portions and the electrodes of the electronic component.

2. The semiconductor device of claim 1, wherein the wiring and the wiring connection portion are obtained by printing and curing conductive paste.

3. The semiconductor device of claim 2, wherein the conductive paste is a thermosetting conductive paste with a curing temperature of 130°C or below, or a photocuring conductive paste.

4. The semiconductor device of claim 1, wherein the electronic component comprises an organic semiconductor component.

5. The semiconductor device of claim 1, wherein the flexible substrate is a multilayer wiring substrate.

6. The semiconductor device of any one of claims 1 to 5, wherein the resin film is further deposited on another surface of the flexible substrate.

7. A method for manufacturing a semiconductor device, comprising the following steps: providing wiring and wiring connection portions connected to the wiring on a flexible substrate; electrically connecting an electronic component to the wiring connection portions and fixing it to the flexible substrate; and depositing a resin film on one surface of the flexible substrate, the resin film following the shape of the electronic component and covering the electronic component, wherein in the step of providing the wiring and the wiring connection portions, conductive paste is printed to simultaneously form uncured wiring and uncured wiring connection portions; in the step of fixing the electronic component to the flexible substrate, the electronic component is placed on the wiring connection portions before the conductive paste hardens, and then a hardening process is performed to harden the wiring and wiring connection portions containing the uncured conductive paste; and as the conductive paste hardens, the electronic component is electrically connected to and fixed to the hardened wiring connection portions.

8. The method for manufacturing a semiconductor device as claimed in claim 7, wherein the conductive paste is a thermosetting conductive paste and is fired at a temperature below 130°C.

9. The method for manufacturing a semiconductor device as claimed in claim 7, wherein the conductive paste is a photocurable conductive paste and is irradiated with light of wavelengths from the visible region to the ultraviolet region.

10. A method for manufacturing a semiconductor device according to any one of claims 7 to 9, wherein in the step of depositing the resin film on one surface of the flexible substrate, the resin film is deposited on one surface of the flexible substrate in a vacuum or depressurized space.

11. A method for manufacturing a semiconductor device according to any one of claims 7 to 9, wherein in the step of depositing the resin film on one side of the flexible substrate, the resin film is deposited on one side of the flexible substrate in such a state that the spatial pressure of the resin film on the flexible substrate side is lower than the spatial pressure of the resin film on the side opposite to the flexible substrate.

Citation Information

Patent Citations

  • Tape type semiconductor package with improved thermal dissipation

    TW200849511A

  • Film for a package substrate

    US20200303270A1