Plasma treatment system and plasma treatment method

TWI937275BActive Publication Date: 2026-09-01TOKYO ELECTRON LTD
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Patent Information

Application Number
TW111128247
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2022-07-26
Filing Date
2022-07-28
Publication Date
2026-09-01
Estimated Expiration
2042-07-27

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Abstract

This invention provides a plasma processing system that reduces reflected waves from RF (Radio Frequency) signals. The plasma processing system of this invention includes: a first RF signal generating unit configured to generate a first RF signal having a first frequency; a first matching circuit coupled to the first RF signal generating unit; a second RF signal generating unit configured to generate a second RF signal having a second frequency lower than the first frequency; a second matching circuit coupled to the second RF signal generating unit; and a phase adjustment circuit coupled to the second matching circuit and adjusting the phase of the second RF signal supplied from the second RF signal generating unit via the second matching circuit. The system is configured in the following manner: a first plasma processing device coupled to the first matching circuit and the second matching circuit, wherein a first RF signal is supplied to the first plasma processing device via the first matching circuit and a second RF signal is supplied to the first plasma processing device via the second matching circuit; and a second plasma processing device coupled to the first matching circuit and the phase adjustment circuit, wherein the first RF signal is supplied to the second plasma processing device via the first matching circuit and a second RF signal whose phase is shifted in the phase adjustment circuit is supplied to the second plasma processing device.
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Description

Technical Field

[0001] The exemplary embodiments of the present invention relate to a plasma treatment system and a plasma treatment method. Prior Technology

[0002] The device described in Patent Document 1 relates to matching technology for RF (Radio Frequency) signals. [Previous Technical Documents] [Patent Literature]

[0003] [Patent Document 1] International Publication No. 2020 / 227028 Summary of the Invention

[0004] [The problem the invention aims to solve]

[0005] This invention provides a plasma processing system that can reduce reflected waves of RF signals. [Problem-solving methods]

[0006] In one embodiment of the present invention, a plasma processing system is provided. The plasma processing system includes: a first RF signal generating unit configured to generate a first RF signal having a first frequency; a first matching circuit coupled to the first RF signal generating unit; a second RF signal generating unit configured to generate a second RF signal having a second frequency lower than the first frequency; a second matching circuit coupled to the second RF signal generating unit; and a phase adjustment circuit coupled to the second matching circuit and causing a phase shift in the second RF signal supplied from the second RF signal generating unit via the second matching circuit. The configuration includes: a first plasma processing device coupled to the first matching circuit and the second matching circuit, wherein a first RF signal is supplied to the first plasma processing device via the first matching circuit, and a second RF signal is supplied to the first plasma processing device via the second matching circuit; and a second plasma processing device coupled to the first matching circuit and the phase adjustment circuit, wherein the first RF signal is supplied to the second plasma processing device via the first matching circuit, and a second RF signal whose phase is shifted in the phase adjustment circuit is supplied to the second plasma processing device. [Effects of the invention]

[0007] According to an embodiment of the present invention, a plasma processing system can be provided that can reduce the reflected waves of RF signals. Simple Explanation of the Diagram

[0008] [Figure 1] is a block diagram showing an example of a plasma processing system. [Figure 2] is a block diagram showing the structure of an example of a plasma processing system. [Figure 3] is a schematic diagram of an example of a plasma processing apparatus 1. [Figure 4A] is a diagram showing an example of the circuit construction of the phase adjustment circuit 60. [Figure 4B] is a diagram showing an example of the circuit construction of the phase adjustment circuit 60. [Figure 5] is a block diagram showing an example of a plasma processing system. [Figure 6] is a flowchart illustrating an example of a plasma treatment method. [Figure 7] is a timing diagram showing an example of the source RF signal and the bias RF signal. [Figure 8] is a timing diagram showing an example of the source RF signal and the bias RF signal. [Figure 9] is a diagram illustrating an example of the relationship between the phase of a bias RF signal and the sheath capacitance. [Figure 10] is a block diagram showing an example of the construction of a plasma processing system in an embodiment. [Figure 11] is a block diagram showing an example of the structure of the first RF signal generating unit 31a, the second RF signal generating unit 31b, the first matching circuit 51a, and the second matching circuit 51b. [Figure 12] is a flowchart illustrating an example of a plasma processing method. [Figure 13] is a timing diagram showing an example of the supply period of the source RF signal SR and the bias RF signal BR1. [Figure 14] is a timing diagram showing an example of the phase of each bias RF signal. [Figure 15] is a block diagram showing an example of the construction of a plasma processing system in an embodiment. [Figure 16] is a block diagram showing an example of the structure of the first RF signal generating unit 31a, the first DC signal generating unit 32a, and the first matching circuit 51a. [Figure 17] is a flowchart illustrating an example of a plasma processing method. [Figure 18] is a timing diagram showing an example of the supply period of the source RF signal SR and the bias DC signal BD1. [Figure 19] is a timing diagram showing an example of the phase of each bias DC signal. Implementation

[0009] The following describes various embodiments of the present invention.

[0010] In one illustrative embodiment, a plasma processing system is provided. The plasma processing system includes: a first RF (Radio...) A frequency (RF) signal generating unit is configured to generate a first RF signal having a first frequency; a first matching circuit is coupled to the first RF signal generating unit; a second RF signal generating unit is configured to generate a second RF signal having a second frequency lower than the first frequency; a second matching circuit is coupled to the second RF signal generating unit; a phase adjustment circuit is configured to be coupled to the second matching circuit and to shift the phase of the second RF signal supplied from the second RF signal generating unit via the second matching circuit; a first plasma processing device is coupled to the first matching circuit and the second matching circuit, wherein the first RF signal is supplied to the first plasma processing device via the first matching circuit, and the second RF signal is supplied to the first plasma processing device via the second matching circuit; and a second plasma processing device is coupled to the first matching circuit and the phase adjustment circuit, wherein the first RF signal is supplied to the second plasma processing device via the first matching circuit, and the second RF signal whose phase is shifted in the phase adjustment circuit is supplied to the second plasma processing device.

[0011] In one illustrative embodiment, the phase adjustment circuit includes at least one inductor and at least one capacitor.

[0012] In one illustrative embodiment, the phase adjustment circuit includes at least one of a variable inductor and a variable capacitor.

[0013] In one example embodiment, it further includes: a sensor configured to monitor the first RF signal between the first RF signal generation unit and the first matching circuit and output the monitoring result; and a phase adjustment circuit configured to adjust one or both of the inductance of the variable inductor and the capacitance of the variable capacitor according to the monitoring result.

[0014] In one illustrative embodiment, the sensor is a VI (Voltage-Current) sensor configured to monitor the phase difference between the voltage and current of the first RF signal.

[0015] In one example implementation, the sensor is a directional coupler configured to monitor the reflected wave of the first RF signal.

[0016] In one exemplary embodiment, the phase adjustment circuit is configured to adjust one or both of the inductance of the variable inductor and the capacitance of the variable capacitor before or after plasma processing in the second plasma processing apparatus.

[0017] In one exemplary embodiment, the phase adjustment circuit is configured to adjust the inductance of the variable inductor and the capacitance of the variable capacitor between plasma processes in the second plasma processing apparatus.

[0018] In one illustrative embodiment, the phase difference between the second RF signal and the phase-shifted second RF signal is 180 degrees.

[0019] In one exemplary embodiment, a first plasma processing apparatus includes: a first plasma processing chamber; a first substrate support disposed within the first plasma processing chamber; one or more first lower electrodes disposed within the first substrate support; and a first upper electrode disposed above the first substrate support; a second plasma processing apparatus includes: a second plasma processing chamber; a second substrate support disposed within the second plasma processing chamber; one or more second lower electrodes disposed within the second substrate support; and a second upper electrode disposed above the second substrate support; a first matching circuit coupled to one or more first lower electrodes or first upper electrodes, and coupled to one or more second lower electrodes or second upper electrodes; a second matching circuit coupled to one or more first lower electrodes; and a phase adjustment circuit coupled to one or more second lower electrodes.

[0020] In one exemplary embodiment, a first plasma processing apparatus includes: a first plasma processing chamber; a first substrate support disposed within the first plasma processing chamber; a first lower electrode disposed within the first substrate support; and a first antenna disposed above the first plasma processing chamber. A second plasma processing apparatus includes: a second plasma processing chamber; a second substrate support disposed within the second plasma processing chamber; a second lower electrode disposed within the second substrate support; and a second antenna disposed above the second plasma processing chamber; a first matching circuit coupled to the first antenna and the second antenna; a second matching circuit coupled to the first lower electrode; and a phase adjustment circuit coupled to the second lower electrode.

[0021] In one illustrative embodiment, the first frequency is above 10MHz and below 120MHz.

[0022] In one illustrative embodiment, the second frequency is above 100 kHz and below 20 MHz.

[0023] In one example implementation, the second frequency is above 400 kHz and below 4 MHz.

[0024] In one example implementation, the first RF signal is a continuous wave having a first frequency.

[0025] In one illustrative embodiment, the first RF signal is a pulse wave that periodically includes a plurality of first electrical pulses; each of the plurality of first electrical pulses is configured to include a continuous wave having a first frequency.

[0026] In one example implementation, the second RF signal is a continuous wave with a second frequency.

[0027] In one illustrative embodiment, the second RF signal is a pulse wave that periodically includes a plurality of second electrical pulses; each of the plurality of second electrical pulses is configured to include a continuous wave having a second frequency.

[0028] In one illustrative embodiment, a plasma processing method is provided, which is performed in a plasma processing system including a first plasma processing apparatus and a second plasma processing apparatus. The plasma processing method includes: generating a first RF signal having a first frequency; generating a second RF signal having a second frequency lower than the first frequency; shifting the phase of the second RF signal; supplying the first RF signal to the first and second plasma processing apparatuses; supplying the second RF signal to the first plasma processing apparatus; and supplying the phase-shifted second RF signal to the second plasma processing apparatus.

[0029] In one illustrated embodiment, a plasma processing system is provided. The plasma processing system includes: an RF signal generating unit configured to generate an RF signal; a matching circuit coupled to the RF signal generating unit; a voltage pulse generating unit configured to generate a sequence of voltage pulses; a phase adjustment circuit configured to shift the phase of the sequence of voltage pulses supplied by the voltage pulse generating unit; a first plasma processing device coupled to the matching circuit and the voltage pulse generating unit, wherein the RF signal is supplied from the matching circuit to the first plasma processing device, and the sequence of voltage pulses is supplied from the voltage pulse generating unit to the first plasma processing device; and a second plasma processing device coupled to the matching circuit and the phase adjustment circuit, wherein the RF signal is supplied from the matching circuit to the second plasma processing device, and the phase-shifted sequence of voltage pulses is supplied from the phase adjustment circuit to the second plasma processing device.

[0030] In one illustrative embodiment, a plasma processing system is provided. A plasma processing system includes: a source RF signal generating unit configured to generate a source RF signal for plasma generation; a first matching circuit coupled to the source RF signal generating unit; a bias RF signal generating unit configured to generate a bias RF signal; a second matching circuit coupled to the bias RF signal generating unit; n plasma processing devices (n being an integer of 2 or more) coupled in parallel with respect to the first matching circuit; and n-1 phase adjustment circuits; the n-1 phase adjustment circuits are configured to be coupled in series between the second matching circuit and the nth plasma processing device among the n plasma processing devices, and to sequentially shift the phase of the bias RF signal supplied from the bias RF signal generating unit via the second matching circuit; the kth phase adjustment circuit (k being an integer from 1 to n-1) among the n-1 phase adjustment circuits is coupled to the kth plasma processing device and the (k+1)th plasma processing device among the n plasma processing devices; the n plasma processing devices... The first plasma processing apparatus includes a first plasma processing chamber and a first substrate support. The first substrate support is disposed in the first plasma processing chamber and includes one or more first lower electrodes. The source RF signal is supplied to the first plasma processing apparatus via the first matching circuit, and the bias RF signal is supplied to at least one of the one or more first lower electrodes of the first plasma processing apparatus via the second matching circuit. The (k+1)th plasma processing apparatus among the n plasma processing apparatuses... The device includes a (k+1)th plasma processing chamber and a (k+1)th substrate support. The (k+1)th substrate support is disposed in the (k+1)th plasma processing chamber and includes one or more (k+1)th lower electrodes. The source RF signal is supplied to the (k+1)th plasma processing device via the first matching circuit. A bias RF signal whose phase is offset in the kth phase adjustment circuit among the n-1 phase adjustment circuits is supplied to at least one of the one or more (k+1)th lower electrodes of the (k+1)th plasma processing device.

[0031] In one illustrative embodiment, the n-1 phase adjustment circuits are configured to sequentially shift the phase of the bias RF signal by 360 degrees / n.

[0032] In one exemplary embodiment, the plasma processing system further includes: n first switches that switch whether to couple the n plasma processing devices to the first matching circuit; and n second switches that switch whether to couple the n plasma processing devices to the second matching circuit.

[0033] In one illustrated embodiment, a plasma processing system is provided. The plasma processing system includes: a source RF signal generating unit configured to generate a source RF signal for plasma generation; a first matching circuit coupled to the source RF signal generating unit; a voltage pulse generating unit configured to generate a sequence of n (n is an integer from 2 to n) voltage pulses, wherein the sequence of n voltage pulses is out of phase with each other; and n plasma processing devices; the kth (k is an integer from 1 to n) plasma processing device among the n plasma processing devices includes a kth plasma processing chamber and a kth substrate support, the kth substrate support being disposed within the kth plasma processing chamber and including one or more first lower electrodes, the source RF signal being supplied to the kth plasma processing device via the first matching circuit, and the sequence of the kth voltage pulses from the sequence of n voltage pulses being supplied to at least one of the one or more kth lower electrodes of the kth plasma processing device.

[0034] Hereinafter, with reference to the drawings, various embodiments of the present invention will be described in detail. Furthermore, the same or identical elements will be marked with the same symbols in each drawing, and repeated descriptions will be omitted. Unless otherwise specified, the positional relationships (up, down, left, right, etc.) shown in the drawings are used to describe the relative positions. The scale of the drawings does not represent an actual scale, and the actual scale is not limited to the scale shown in the drawings.

[0035] Figure 1 is a block diagram showing an example embodiment of a plasma processing system. The plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support unit 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. Furthermore, the plasma processing chamber 10 has at least one gas supply port for supplying at least one type of processing gas to the plasma processing space; and at least one gas exhaust port for discharging gas from the plasma processing space. The gas supply port is connected to the gas supply unit 20 (described later); the gas exhaust port is connected to the exhaust system 40 (described later). The substrate support unit 11 is disposed within the plasma processing space and has a substrate support surface for supporting a substrate.

[0036] The plasma generation unit 12 is configured to generate plasma from at least one processing gas supplied to the plasma processing space. The plasma formed in the plasma processing space can be: capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECRP), helicon wave plasma (HWP), or surface wave plasma (SWP), etc. Furthermore, various types of plasma generation units, including AC (Alternating Current) signal plasma generation units and DC (Direct Current) signal plasma generation units, can also be used. In one embodiment, the AC signal (AC signal power) used by the AC signal plasma generation unit has a frequency in the range of 100 kHz to 10 GHz. Therefore, the AC signal includes RF signals and microwave signals. In one embodiment, the RF signal has a frequency in the range of 200kHz to 150MHz.

[0037] Control unit 2 processes computer-executable commands that cause plasma processing apparatus 1 to perform the various steps described herein. Control unit 2 may be configured to control the components of plasma processing apparatus 1 to perform the various steps described herein. In one embodiment, control unit 2 may be partially or entirely included in plasma processing apparatus 1. Control unit 2 may, for example, include a computer 2a. Computer 2a may, for example, include: a central processing unit (CPU) 2a1, a memory unit 2a2, and a communication interface 2a3. The processing unit 2a1 may be configured to perform various control actions according to the program stored in memory unit 2a2. Memory unit 2a2 may include: RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 can also communicate with the plasma processing device 1 via a communication line such as a LAN (Local Area Network).

[0038] Figure 2 is a block diagram showing the structure of an exemplary plasma processing system. The plasma processing system includes: a first plasma processing apparatus 1-1 and a second plasma processing apparatus 1-2, a power supply 30, an impedance matching circuit 50, and a phase adjustment circuit 60. In one embodiment, the first plasma processing apparatus 1-1 includes: a first plasma processing chamber; a first substrate support disposed within the first plasma processing chamber; a first lower electrode disposed within the first substrate support; and a first upper electrode disposed above the first substrate support. The second plasma processing apparatus 1-2 includes: a second plasma processing chamber; a second substrate support disposed within the second plasma processing chamber; a second lower electrode disposed within the second substrate support; and a second upper electrode disposed above the second substrate support. Hereinafter, the first plasma processing apparatus 1-1 and / or the second plasma processing apparatus 1-2 will also be collectively referred to as "plasma processing apparatus 1".

[0039] Figure 3 is a schematic diagram showing an example of the plasma treatment apparatus 1. Hereinafter, with reference to the figures, a structural example of a capacitively coupled plasma treatment apparatus, which is an example of the plasma treatment apparatus 1, will be described.

[0040] The plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, and an exhaust system 40. Additionally, the plasma processing apparatus 1 includes a substrate support unit 11 and a gas introduction unit. The gas introduction unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas introduction unit includes a spray head 13. The substrate support unit 11 is disposed within the plasma processing chamber 10. The spray head 13 is disposed above the substrate support unit 11. In one exemplary embodiment, the spray head 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s, which is demarcated by the spray head 13, the sidewall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 has: at least one gas supply port for supplying at least one type of processing gas to the plasma processing space 10s; and at least one gas outlet for discharging gas from the plasma processing space. The side wall 10a is grounded. The spray head 13 and the substrate support portion 11 are electrically insulated from the housing of the plasma processing chamber 10.

[0041] The substrate support portion 11 includes a body portion 111 and an annular assembly 112. The body portion 111 has a central region (substrate support surface) 111a for supporting a substrate (wafer) W; and an annular region (annular support surface) 111b for supporting the annular assembly 112. The annular region 111b of the body portion 111 surrounds the central region 111a of the body portion 111 when viewed from above. The substrate W is disposed on the central region 111a of the body portion 111; the annular assembly 112 is disposed on the annular region 111b of the body portion 111 such that it surrounds the substrate W on the central region 111a of the body portion 111. In one embodiment, the body portion 111 includes a base and an electrostatic chuck. The base includes a conductive member. The conductive member of the base can function as a lower electrode. The electrostatic chuck is disposed on the base. An electrostatic chuck includes a ceramic component and an electrostatic electrode disposed within the ceramic component. The ceramic component has a central region 111a. In one embodiment, the ceramic component also has an annular region. Additionally, other components surrounding the electrostatic chuck, such as an annular electrostatic chuck or an annular insulating component, may also have an annular region. In this case, the annular assembly 112 may be disposed on the annular electrostatic chuck or annular insulating component, or on both the electrostatic chuck and the annular insulating component. Furthermore, an RF signal electrode or a DC signal electrode may also be disposed within the ceramic component; in this case, the RF signal electrode or DC signal electrode may function as a lower electrode. When a bias RF signal or bias DC signal is supplied to the RF signal electrode or DC signal electrode (described later), the RF signal electrode or DC signal electrode is also referred to as a bias electrode. Alternatively, both the conductive component of the base and the RF signal electrode or DC signal electrode may function as lower electrodes. Therefore, the substrate support portion 11 includes one or more lower electrodes. The annular component 112 comprises one or more annular members. At least one of the annular members is an edge ring. Although omitted in the figures, the substrate support 11 may also include a temperature control module configured to adjust at least one of the electrostatic clamp, the annular component 112, and the substrate to a target temperature. The temperature control module may also include a heater, a heat-conducting medium, a flow channel, or a combination thereof. A heat-conducting fluid such as brine or gas flows through the flow channel. Furthermore, the substrate support 11 may also include a heat-conducting gas supply section configured to supply heat-conducting gas between the back surface of the substrate W and the substrate support surface 111a.

[0042] The spray head 13 (see Figure 3) is configured to "introduce at least one type of processing gas from the gas supply unit 20 into the plasma processing space within 10 seconds". The spray head 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas inlets 13c. The processing gas supplied to the gas supply port 13a is introduced into the plasma processing space within 10 seconds through the gas diffusion chamber 13b and the plurality of gas inlets 13c. Furthermore, the spray head 13 includes one or more upper electrodes. In addition to the spray head 13, the gas inlet may also include one or more side gas injectors (SGIs) mounted on one or more openings formed in the sidewall 10a.

[0043] The gas supply unit 20 may also include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one type of treatment gas from its respective gas source 21 to the spray head 13 via its respective flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may also include at least one flow modulation device, which modulates or pulses the flow rate of the at least one type of treatment gas.

[0044] The power supply 30 includes an RF signal power supply 31, which is coupled to the plasma processing chamber 10 via at least one impedance matching circuit 50. The RF signal power supply 31 is configured to supply at least one RF signal (RF signal power), including a source RF signal and a bias RF signal, to one or more lower electrodes and / or one or more upper electrodes. This allows plasma to be formed from at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF signal power supply 31 can function as at least part of the plasma generation unit 12. Furthermore, by supplying a bias RF signal to one or more lower electrodes, a bias potential can be generated on the substrate W, attracting ionic components from the formed plasma to the substrate W.

[0045] In one embodiment, the RF signal power supply 31 includes a first RF signal generating unit 31a and a second RF signal generating unit 31b. The first RF signal generating unit 31a is configured to "couple to at least one lower electrode and / or at least one upper electrode via at least one matching circuit 51a, and generate a source RF signal (source RF signal power) for plasma generation." The first RF signal generating unit 31a is an example of a source RF signal generating unit. In one embodiment, the source RF signal is a continuous wave or pulse wave configured to "include RF signals with frequencies in the range of 10MHz to 150MHz." In one embodiment, the first RF signal generating unit 31a may also be configured to generate a plurality of source RF signals with different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode. In one embodiment, the first RF signal generating unit 31a is configured to "generate a first continuous or pulsed RF signal having a first frequency as the source RF signal".

[0046] The first matching circuit 51a is coupled to the first RF signal generating unit 31a. Furthermore, the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2 are coupled to the first matching circuit 51a. That is, the first matching circuit 51a is coupled to one or more upper electrodes or one or more lower electrodes of the first plasma processing apparatus 1-1, and also coupled to one or more upper electrodes or one or more lower electrodes of the second plasma processing apparatus 1-2. Therefore, the generated first source RF signal is supplied via the first matching circuit 51a to one or more lower electrodes or one or more upper electrodes of the first plasma processing apparatus 1-1, and one or more lower electrodes or one or more upper electrodes of the second plasma processing apparatus 1-2. That is, the source RF signal is supplied from the first matching circuit 51a to one or more lower electrodes or one or more upper electrodes of the first plasma processing device 1-1, and one or more lower electrodes or one or more upper electrodes of the second plasma processing device 1-2.

[0047] The second RF signal generating unit 31b is configured to "couple to one or more lower electrodes via at least one matching circuit 51b and generate a bias RF signal (bias RF signal power)". The second RF signal generating unit 31b is an example of a bias RF signal generating unit. When one or more lower electrodes include two lower electrodes, one lower electrode may be coupled to the first RF signal generating unit 31a via matching circuit 51a, and the other lower electrode may be coupled to the second RF signal generating unit 31b via matching circuit 51b. As an example, one of the lower electrodes may be a base plate, and the other lower electrode may be a bias electrode.

[0048] In one embodiment, the bias RF signal has a lower frequency than the source RF signal. In another embodiment, the bias RF signal is a continuous wave or pulse wave configured to include RF signals with frequencies in the range of 100 kHz to 60 MHz. In another embodiment, the second RF signal generating unit 31b can also be configured to generate a plurality of bias RF signals with different frequencies. The generated one or more bias RF signals are supplied to one or more lower electrodes. Furthermore, in various embodiments, at least one of the source RF signal and the bias RF signal can be pulsed. In one embodiment, the second RF signal generating unit 31b is configured to generate a second continuous or pulsed RF signal with a second frequency lower than the first frequency as the bias RF signal.

[0049] The second matching circuit 51b is coupled to the second RF signal generating unit 31b. Furthermore, the first plasma processing device 1-1 and the phase adjustment circuit 60 are coupled to the second matching circuit 51b; the second plasma processing device 1-2 is coupled to the phase adjustment circuit 60. That is, the second matching circuit 51b is coupled to one or more lower electrodes of the first plasma processing device 1-1. Therefore, the generated bias RF signal is supplied to one or more lower electrodes of the first plasma processing device 1-1 and the phase adjustment circuit 60 via the second matching circuit 51b. In other words, the bias RF signal is supplied from the second matching circuit 51b to one or more lower electrodes of the first plasma processing device 1-1 and the phase adjustment circuit 60. Then, the phase of the bias RF signal supplied from the second RF signal generating unit 31b to the phase adjustment circuit 60 via the second matching circuit 51b is adjusted in the phase adjustment circuit 60. The phase adjustment circuit 60 is coupled to the second plasma processing device 1-2 (i.e., one or more lower electrodes of the second plasma processing device 1-2). Therefore, the phase-shifted bias voltage RF signal is supplied from the phase adjustment circuit 60 to one or more lower electrodes of the second plasma processing device 1-2.

[0050] Additionally, the power supply 30 may also include a DC signal power supply 32, which is coupled to the plasma processing chamber 10. The DC signal power supply 32 includes a first DC signal generating unit 32a and a second DC signal generating unit 32b. In one embodiment, the first DC signal generating unit 32a is configured to "connect to one or more lower electrodes and generate a first DC signal." The generated first DC signal is applied to one or more lower electrodes. In another embodiment, the first DC signal may also be applied to other electrodes, such as electrodes within the electrostatic chuck.

[0051] In one embodiment, the second DC signal generating unit 32b is configured to "connect to one or more upper electrodes and generate a second DC signal". The generated second DC signal is applied to one or more upper electrodes.

[0052] In various embodiments, the first and second DC signals can also be pulsed. In this case, a sequence of voltage pulses is applied to one or more lower electrodes and / or one or more upper electrodes. The voltage pulses can also have rectangular, trapezoidal, triangular, or combinations thereof pulse waveforms. In one embodiment, a waveform generation unit for generating a sequence of voltage pulses from the DC signals is connected between the first DC signal generation unit 32a and one or more lower electrodes. Therefore, the first DC signal generation unit 32a and the waveform generation unit constitute a voltage pulse generation unit. When the second DC signal generation unit 32b and the waveform generation unit constitute a voltage pulse generation unit, the voltage pulse generation unit is connected to one or more upper electrodes.

[0053] Voltage pulses can be positive or negative. Furthermore, the sequence of voltage pulses can include one or more positive voltage pulses and one or more negative voltage pulses within one cycle. Additionally, the first and second DC signal generating units 32a and 32b can be added to the RF signal power supply 31, or the first DC signal generating unit 32a can replace the second RF signal generating unit 31b. In the latter case, as shown in FIG5, the phase adjustment circuit 60 is connected between the voltage pulse generating unit (including the first DC signal generating unit 32a) and one or more lower electrodes of the second plasma processing device 1-2 without a matching circuit. In one embodiment, the voltage pulse generating unit (including the first DC signal generating unit 32a) is coupled to one or more lower electrodes of the first plasma processing device 1-1 and the phase adjustment circuit 60. Therefore, a sequence of voltage pulses generated by the voltage pulse generation unit, including the first DC signal generation unit 32a, is supplied to one or more lower electrodes of the first plasma processing device 1-1 and the phase adjustment circuit 60. Then, the phase of the sequence of voltage pulses supplied to the phase adjustment circuit 60 from the voltage pulse generation unit, including the first DC signal generation unit 32a, is adjusted in the phase adjustment circuit 60. The phase adjustment circuit 60 is coupled to one or more lower electrodes of the second plasma processing device 1-2. Therefore, a sequence of phase-shifted voltage pulses is supplied from the phase adjustment circuit 60 to one or more lower electrodes of the second plasma processing device 1-2.

[0054] Impedance matching circuit 50 includes a first matching circuit 51a and a second matching circuit 51b. The first matching circuit 51a has an input terminal and an output terminal. The input terminal is electrically coupled to the first RF signal generating unit 31a. The output terminal is also electrically coupled to the substrate support 11 or spray head 13 provided in the first plasma processing apparatus 1-1, and the substrate support 11 or spray head 13 provided in the second plasma processing apparatus 1-2. The first matching circuit 51a adjusts the impedance of the output terminal relative to the impedance of the input terminal. For example, the first matching circuit 51a matches the impedance of the input terminal with the impedance of the output terminal. The impedance of the input terminal can be the output impedance of the first RF signal generating unit 31a. Furthermore, the impedance of the output terminal can include the load of the plasma generated in the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2. The second matching circuit 51b has an input terminal and an output terminal. The input terminal is electrically coupled to the second RF signal generating unit 31b. The output terminal is electrically coupled to the substrate support 11 provided in the first plasma processing apparatus 1-1 and the substrate support 11 provided in the second plasma processing apparatus 1-2. The second matching circuit 51b adjusts the impedance of the output terminal relative to the impedance of the input terminal. For example, the second matching circuit 51b matches the impedance of the input terminal with the impedance of the output terminal. The impedance of the input terminal can be the output impedance of the second RF signal generating unit 31b. Furthermore, the impedance of the output terminal can include the load of the plasma generated in each of the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2.

[0055] The phase adjustment circuit 60 receives the first bias RF signal from the second RF signal generation unit 31b via the second matching circuit 51b. The phase adjustment circuit 60 shifts the phase of the first bias RF signal to generate a second bias RF signal that has a phase difference from the first bias RF signal.

[0056] Figures 4A and 4B are diagrams illustrating an example of the circuit structure of the phase adjustment circuit 60. The phase adjustment circuit 60 has an input terminal 61, an output terminal 62, one or more inductors 63, and one or more capacitors 64. The input terminal 61 of the phase adjustment circuit 60 is electrically coupled to the output terminal of the second matching circuit 51b. Furthermore, the output terminal 62 of the phase adjustment circuit 60 is electrically coupled to the lower electrode or a conductive component functioning as the lower electrode included in the second plasma processing apparatus 1-2. The phase adjustment circuit 60 can be a circuit in which one or both of the two circuits shown in Figures 4A and 4B are connected in series to form multiple segments.

[0057] The phase adjustment circuit 60 shown in Figure 4A has one inductor 63 and two capacitors 64-1 and 64-2. One end of inductor 63 is electrically coupled to the input terminal 61, and the other end is electrically coupled to the output terminal 62. One end of capacitor 64-1 is electrically coupled to both the input terminal 61 and one end of inductor 63, and the other end is grounded. Additionally, one end of capacitor 64-2 is electrically coupled to both the output terminal 62 and the other end of inductor 63, and the other end is grounded.

[0058] The phase adjustment circuit 60 shown in Figure 4B has a configuration with two inductors 63-1 and 63-2 and one capacitor 64. Inductors 63-1 and 63-2 are connected in series between the input terminal 61 and the output terminal 62. That is, one end of inductor 63-1 is electrically coupled to the input terminal 61, and the other end is electrically coupled to one end of inductor 63-2. The other end of inductor 63-2 is electrically coupled to the output terminal 62. One end of capacitor 64 is electrically coupled to the other end of inductor 63-1 and one end of inductor 63-2, and the other end is grounded.

[0059] The inductor 63, capacitor 64, and / or other components included in the phase adjustment circuit 60 can be configured to have variable characteristics. The capacitor 64 included in the phase adjustment circuit 60 shown in Figures 4A and 4B is a variable capacitor with variable capacitance. Additionally, the inductor 63 can be a variable inductor with a variable inductance value. When the phase adjustment circuit 60 includes variable components such as variable capacitors or variable inductors, the control unit 2 (refer to Figure 1) can control the characteristics of the variable components to adjust the phase difference between the second bias RF signal generated by the phase adjustment circuit 60 and the first bias RF signal. As an example, a plasma processing system includes a sensor electrically coupled between the first RF signal generation unit 31a and the first matching circuit 51a; the control unit 2 can control the characteristics of the variable components based on the measured values ​​of the sensor. As an example, this sensor can be a sensor that measures the phase difference between the voltage and current of the source RF signal, or a sensor that measures the electric current of the reflected wave of the source RF signal using a directional coupler. In one embodiment, the sensor is configured to "monitor parameters of the source RF signal between the first RF signal generation unit 31a and the first matching circuit 51a, and output the monitoring result." The sensor can be a VI sensor or a directional coupler. The VI sensor is configured to monitor the phase difference between the voltage and current of the source RF signal. The directional coupler is configured to monitor the reflected wave of the source RF signal. Then, the phase adjustment circuit 60 is configured to "adjust a variable inductor and / or a variable capacitor based on the monitoring result output by the sensor." The phase adjustment circuit 60 is configured to "adjust the variable inductor and / or the variable capacitor before or after plasma processing in the second plasma processing apparatus 1-2." Alternatively, the phase adjustment circuit 60 can also be configured to "adjust the variable inductor and / or the variable capacitor between plasma processing in the second plasma processing apparatus 1-2."

[0060] An exhaust system 40 (see Figure 3) may be connected, for example, to a gas outlet 10e located at the bottom of the plasma processing chamber 10. The exhaust system 40 may also include a pressure regulating valve and a vacuum pump. The pressure regulating valve is used to adjust the pressure within the plasma processing space 10s. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0061] Figure 6 is a flowchart illustrating an embodiment of the plasma processing method (hereinafter also referred to as "this processing method"). Figures 7 and 8 are timing diagrams illustrating an example of the supply period of the source RF signal, the first bias RF signal, and the second bias RF signal in this processing method. In Figure 7, the horizontal axis represents time. Additionally, in Figure 7, the vertical axis represents the power levels of the source RF signal, the first bias RF signal, and the second bias RF signal (as an example, the actual power values ​​of the source RF signal, the first bias RF signal, and the second bias RF signal). Each signal "L1" indicates that no signal is supplied (i.e., the power level is 0W), or indicates a power level lower than that shown by "H1".

[0062] As shown in Figure 6, this processing method includes: a step of configuring the substrate (ST1), a step of supplying processing gas (ST2), a step of supplying a source RF signal (ST3), and a step of supplying a bias RF signal (ST4). Furthermore, the step of supplying the bias RF signal (ST4) includes: a step of generating a first bias RF signal (ST41), a step of generating a second bias RF signal (ST42), and a step of supplying both the first and second bias RF signals (ST43). The following describes each step of this processing method. Unless otherwise specified, the description of the "plasma processing chamber 10" pertains to both the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2.

[0063] In step ST1, the substrate W is disposed on the substrate support portion 11. The substrate W may be, for example, a substrate on which a base film, an etched film etched by this processing method, or a mask film having a predetermined pattern is stacked on a silicon wafer. The etched film may be, for example, a dielectric film, a semiconductor film, or a metal film.

[0064] In step ST2, a processing gas is supplied into the plasma processing chamber 10. The processing gas is the gas used to etch the etch film formed on the substrate W. The type of processing gas can be appropriately selected according to the material of the etch film, the material of the mask film, the material of the base film, the pattern of the mask film, the etching depth, etc.

[0065] In steps ST3 and ST4, the source RF signal, the first bias RF signal, and the second bias RF signal are supplied to the plasma processing chamber 10. Steps ST3 and ST4 can start simultaneously or at different times. Furthermore, when steps ST3 and ST4 start at different times, their order can be arbitrary. The first bias RF signal and the second bias RF signal are collectively referred to as "bias RF signals".

[0066] In step ST3, firstly, the first RF signal generation unit 31a generates a source RF signal. As shown in Figures 7 and 8, the source RF signal, as an example, is a pulse wave that includes electrical pulses during period H. That is, the source RF signal is a signal that alternates between a period L during which the electrical level of the first RF signal constituting the source RF signal is zero and a period with a higher electrical level (i.e., period H). The frequency of the first RF signal constituting the electrical pulses of the source RF signal is, for example, between 10 MHz and 120 MHz. In addition, the electrical level of the first RF signal during period L can be a level greater than zero and smaller than H1. Furthermore, the source RF signal can be a continuous wave instead of a pulse wave. That is, the source RF signal can be a signal that is a continuous signal of the first RF signal.

[0067] Furthermore, the first RF signal generating unit 31a supplies the generated source RF signal to the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2 via the first matching circuit 51a. As an example, the first RF signal generating unit 31a supplies the source RF signal to the substrate support portion 11 of the first plasma processing apparatus 1-1 and simultaneously supplies the source RF signal to the substrate support portion 11 of the second plasma processing apparatus 1-2. In this way, plasma is generated in both the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2 using the processing gas supplied to the processing chamber.

[0068] In step ST4, a bias RF signal is supplied to the plasma processing chamber 10. First, in step ST41, the second RF signal generation unit 31b generates a first bias RF signal. As shown in Figures 7 and 8, the first bias RF signal, as an example, is a pulse wave that includes an electrical pulse during the H period. That is, the first bias RF signal is a signal that alternates between the L period (when the power level of the second RF signal constituting the first bias RF signal is zero) and the H period (when the power level of the second RF signal constituting the first bias RF signal is higher). The second RF signal constituting the first bias RF signal has a lower frequency than the first RF signal constituting the source RF signal. The frequency of the second RF signal is, for example, between 100 kHz and 20 MHz. The frequency of the second RF signal can be between 400 kHz and 4 MHz. In addition, the bias RF signal can be a continuous wave instead of a pulse wave. That is, the first bias RF signal can be a continuous signal of the second RF signal. For example, both the source RF signal and the first bias RF signal (and the second bias RF signal) can be continuous waves; alternatively, one can be a continuous wave and the other a pulse wave.

[0069] After the first bias RF signal is generated in step ST41, the phase adjustment circuit 60 generates a second bias RF signal in step ST42. The phase adjustment circuit 60 receives the first bias RF signal from the first RF signal generation unit 31a and shifts its phase to generate the second bias RF signal. That is, as shown in FIG8, during period H, the third RF signal constituting the second bias RF signal has a phase difference Δθ relative to the second RF signal constituting the electrical pulse of the first bias RF signal. In one embodiment, the phase difference Δθ is 180 degrees.

[0070] The phase difference Δθ can be set based on the measured value of the characteristics of the first RF signal. For example, this characteristic could be the phase difference between the voltage and current of the first RF signal, or the electrical current of the reflected wave of the first RF signal. For example, a sensor electrically coupled between the first RF signal generation unit 31a and the first matching circuit 51a can measure the characteristics of the first RF signal, and the control unit 2 can control the characteristics of the variable element included in the phase adjustment circuit 60 based on the measured value of these characteristics. The control unit 2 can preset the phase difference Δθ before performing plasma processing (e.g., etching) on ​​the substrate W. Then, the control unit 2 can maintain a constant characteristic of the variable element included in the phase adjustment circuit 60 to keep the phase difference Δθ constant during plasma processing and perform plasma processing on the substrate W. Alternatively, the control unit 2 can also dynamically control the phase difference Δθ during plasma processing. As an example, the sensor electrically coupled between the first RF signal generation unit 31a and the first matching circuit 51a can measure the characteristics of the first RF signal during the plasma processing, and the control unit 2 can dynamically control the characteristics of the variable element included in the phase adjustment circuit 60 during the plasma processing based on the measured value of the characteristics.

[0071] After generating the first bias RF signal and the second bias RF signal in steps ST41 and ST42, in step ST43, the first bias RF signal is supplied to the first plasma processing apparatus 1-1, and the second bias RF signal is supplied to the second plasma processing apparatus 1-2. As an example, the first bias RF signal and the second bias RF signal are supplied to the bias electrodes included in the substrate support portion 11 of the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2, respectively. Therefore, depending on the phase of the first bias RF signal, the capacitance (hereinafter referred to as "first sheath capacitance") generated in the first plasma processing apparatus 1-1 between the substrate W and the plasma changes. Similarly, depending on the phase of the second bias RF signal, the capacitance (hereinafter referred to as "second sheath capacitance") generated in the second plasma processing apparatus 1-2 between the substrate W and the plasma changes. Therefore, the plasma processing method implemented in the plasma processing system including the first plasma processing device 1-1 and the second plasma processing device 1-2 includes steps 1 to 6. In step 1, a first RF signal having a first frequency is generated. In step 2, a second RF signal having a second frequency lower than the first frequency is generated. In step 3, the phase of the second RF signal is shifted. In step 4, the first RF signal is supplied to both the first plasma processing device 1-1 and the second plasma processing device 1-2. In step 5, the second RF signal is supplied to the first plasma processing device 1-1. In step 6, the phase-shifted second RF signal is supplied to the second plasma processing device 1-2.

[0072] Figure 9 is a diagram illustrating an example of the relationship between the phase of a biased RF signal and the sheath capacitance. In Figure 9, the waveform of the first biased RF signal represents one cycle of the second RF signal contained within the first biased RF signal. Similarly, the waveform of the second biased RF signal represents one cycle of the third RF signal contained within the second biased RF signal. The diagram of the first sheath capacitance shows the capacitance relative to each phase of the first biased RF signal. Likewise, the diagram of the second sheath capacitance shows the capacitance relative to each phase of the second biased RF signal. In the example shown in Figure 9, the phase difference Δθ between the first and second biased RF signals is 180 degrees.

[0073] In this embodiment, the first matching circuit 51a is configured such that "when both the first sheath capacitor and the second sheath capacitor are capacitors C, the impedance of the input terminal of the first matching circuit 51a matches the impedance of the output terminal." That is, when both the first sheath capacitor and the second sheath capacitor are capacitors C, the impedances of the first plasma processing device 1-1 and the second plasma processing device 1-2 become matched impedances. On the other hand, when both the first sheath capacitor and the second sheath capacitor are not capacitors C, the impedances of the first plasma processing device 1-1 and the second plasma processing device 1-2 become unmatched impedances. That is, impedance mismatch occurs based on the difference between the first sheath capacitor and the second sheath capacitor and capacitor C (the slanted portion in FIG9).

[0074] On the other hand, as shown in FIG9, in this embodiment, a phase difference is set between the first bias RF signal and the second bias RF signal. Therefore, when the impedance mismatch of one of the first plasma processing device 1-1 and the second plasma processing device 1-2 increases, the impedance mismatch of the other decreases. Thus, even when the impedance mismatch of one of the first plasma processing device 1-1 and the second plasma processing device 1-2 is large, more power from the source RF signal is supplied to the plasma processing chamber of the other device with smaller impedance mismatch. For example, during period A (half a cycle of the bias RF signal) shown in FIG9, the second sheath capacitance deviates significantly from capacitance C compared to the first sheath capacitance. Therefore, during period A, more power from the source RF signal is supplied to the first plasma processing device 1-1 compared to the second plasma processing device 1-2. Furthermore, during period B (half a cycle of the bias RF signal), similarly, more power from the source RF signal is supplied to the second plasma processing unit 1-2 compared to the first plasma processing unit 1-1. This reduces the occurrence of reflected waves from the source RF signal, thus suppressing power loss from the source RF signal. Additionally, it reduces load fluctuations observed from the first RF signal generation unit 31a.

[0075] Figure 10 is a block diagram showing an example of the structure of a plasma processing system according to an embodiment. This plasma processing system includes n plasma processing devices, i.e., plasma processing devices 1-1 to 1-n. n is an integer of 2 or more. Furthermore, the plasma processing system includes: a power supply 30, an impedance matching circuit 50, and n-1 phase adjustment circuits 60-1 to 60-n-1. In one embodiment, each of the plasma processing devices 1-1 to 1-n may have the same structure as the plasma processing device 1 shown in Figure 3.

[0076] The first matching circuit 51a is coupled to the first RF signal generating unit 31a. Furthermore, the plasma processing devices 1-1 to 1-n are coupled in parallel to the first matching circuit 51a. Specifically, one or more upper electrodes or one or more lower electrodes disposed in the plasma processing devices 1-1 to 1-n are each coupled to the first matching circuit 51a. Therefore, the source RF signal SR generated in the first RF signal generating unit 31a is supplied to one or more upper electrodes or one or more lower electrodes of the plasma processing devices 1-1 to 1-n via the first matching circuit 51a.

[0077] The second matching circuit 51b is coupled to the second RF signal generating unit 31b. Furthermore, the plasma processing devices 1-1 to 1-n are coupled in parallel with the second matching circuit 51b. Specifically, each of the lower electrodes disposed in the plasma processing devices 1-1 to 1-n is coupled to the second matching circuit 51b. Therefore, the bias RF signal generated in the second RF signal generating unit 31b is supplied to one or more lower electrodes of the plasma processing devices 1-1 to 1-n via the second matching circuit 51b.

[0078] Phase adjustment circuits 60-1 to 60-n-1 are coupled in series between the second matching circuit 51b and the plasma processing device 1-n. Specifically, phase adjustment circuit 60-1 is coupled to the second matching circuit 51b and phase adjustment circuit 60-2. Furthermore, phase adjustment circuit 60-2 is coupled to phase adjustment circuits 60-1 and 60-3. Additionally, phase adjustment circuit 60-n-1 is coupled to phase adjustment circuit 60-n-2 and the plasma processing device 1-n.

[0079] The k-th phase adjustment circuit 60-k among the phase adjustment circuits 60-1 to 60-n-1 is coupled to the k-th plasma processing device 1-k and the (k+1)-th plasma processing device 1-k+1 among the plasma processing devices 1-1 to 1-n (k is an integer from 1 to n-1). Specifically, the plasma processing device 1-k is coupled to the input terminal of the phase adjustment circuit 60-k; the plasma processing device 1-k+1 is coupled to the output terminal of the phase adjustment circuit 60-k.

[0080] Phase adjustment circuits 60-1 to 60-n-1 receive the bias RF signal generated in the second RF signal generation unit 31b via the second matching circuit 51b, and shift the phase of the bias RF signal accordingly (hereinafter, the bias signal generated in the second RF signal generation unit 31b is also referred to as "bias RF signal BR1"; the bias RF signal whose phase is shifted by the phase adjustment circuit 60-k is also referred to as "bias RF signal BRk+1"; in addition, bias RF signals BR1 to BRn are collectively referred to as "bias RF signals"; furthermore, one of the bias RF signals BR1 to BRn is also referred to as "bias RF signal"). The bias RF signal BRk is then supplied to the plasma processing device 1-k. For example, the bias RF signal BR1 generated in the second RF signal generation unit 31b is supplied to the plasma processing device 1-1 and the phase adjustment circuit 60-1 via the second matching circuit 51b. Additionally, phase adjustment circuit 60-1 shifts the phase of bias RF signal BR1 to generate bias RF signal BR2. Bias RF signal BR2 is supplied to plasma processing device 1-2 and phase adjustment circuit 60-2. Then, phase adjustment circuit 60-n-1 shifts the phase of bias RF signal BRn-1 to generate bias RF signal BRn. Bias RF signal BRn is supplied to plasma processing device 1-n. Furthermore, phase adjustment circuits 60-1 to 60-n-1 may each have the same structure and / or function as the phase adjustment circuit 60 described in Figures 4A and 4B.

[0081] In this embodiment, the plasma processing system includes switches SWA1 to SWan and switches SWb1 to SWbn. Switches SWA1 to SWan are coupled to the first matching circuit 51a and the plasma processing devices 1-1 to 1-n. Each of the switches SWA1 to SWan switches whether to supply the source RF signal SR generated in the first RF signal generation unit 31a to the plasma processing devices 1-1 to 1-n. Furthermore, switches SWb1 to SWbn are coupled to the second matching circuit 51b or the phase adjustment circuits 60-1 to 60-n-1 and the plasma processing devices 1-1 to 1-n. Switches SWb1 to SWbn then switch whether to supply bias RF signals BR1 to BRn to the plasma processing devices 1-1 to 1-n.

[0082] Figure 11 is a block diagram showing an example of the structure of the first RF signal generating unit 31a, the second RF signal generating unit 31b, the first matching circuit 51a, and the second matching circuit 51b. The first RF signal generating unit 31a includes a control circuit 311 and an amplifier circuit 312. The second RF signal generating unit 31b includes a control circuit 313 and an amplifier circuit 314. The first matching circuit 51a includes a control circuit 511, a VI sensor 512, a matching circuit 513, and a voltage sensor 514. The second matching circuit 51b includes a control circuit 515, a VI sensor 516, a matching circuit 517, a low-pass filter 518, and a voltage sensor 519.

[0083] Figure 12 is a flowchart illustrating an example of the plasma processing method of this embodiment (hereinafter also referred to as "this processing method"). Figure 13 is a timing diagram illustrating an example of the supply period of the source RF signal SR and the bias RF signal BR1 in this processing method. Figure 14 is a timing diagram illustrating an example of the phase of each bias RF signal. Hereinafter, an example of this processing method will be described with reference to Figures 10 to 14.

[0084] As shown in Figure 12, this processing method includes: a step of configuring the substrate (ST1), a step of supplying processing gas (ST2), a step of generating a source RF signal (ST3), and a step of generating a bias RF signal (ST4). Furthermore, some or all of the steps ST included in this processing method can be performed in parallel within plasma processing apparatuses 1-1 to 1-n. In the example shown in Figure 12, at least steps ST3 and ST4 can be performed in parallel within plasma processing apparatuses 1-1 to 1-n. Additionally, in this processing method, steps ST2 to ST4 can be performed simultaneously. Furthermore, steps ST2 to ST4 can be performed in a sequence different from that described below.

[0085] First, in step ST1, in each of the plasma processing apparatuses 1-1 to 1-n, the substrate W is disposed on the substrate support 11. Then, in step ST2, processing gas is supplied to the plasma processing chamber 10.

[0086] Next, in step ST3, the first RF signal generation unit 31a generates a source RF signal SR. As shown in FIG. 13, the source RF signal SR is a pulse wave containing an electrical pulse during the H period. For example, the source RF signal SR is generated as follows: First, in the first RF signal generation unit 31a, the control circuit 311 generates a timing signal TS (refer to FIG. 11 and FIG. 13). The timing signal TS represents the H period and L period of the source RF signal and / or the bias RF signal. That is, the timing signal TS has a higher voltage period (hereinafter also referred to as "ON") and a lower voltage period (hereinafter also referred to as "OFF"). Then, during the period when the timing signal TS is ON, the source RF signal and / or the bias RF signal are in the H period. Conversely, during the period when the timing signal TS is OFF, the source RF signal and / or the bias RF signal are in the L period.

[0087] As shown in Figure 13, at time t1, the timing signal TS changes from off to on, at which point the amplifier circuit 312 generates an RF signal. Thus, as shown in Figure 13, at time t1, an electrical pulse is generated from the source RF signal SR. In this way, the amplifier circuit 312 periodically generates electrical pulses according to the timing signal TS to generate the source RF signal SR. The generated source RF signal SR is supplied to the first matching circuit 51a.

[0088] Next, in step ST4, the second RF signal generation unit 31b generates a bias RF signal BR1. The bias RF signal BR1 is generated based on the timing signal TS generated by the control circuit 311 of the first RF signal generation unit 31a. That is, firstly, the control circuit 311 supplies the timing signal TS to the control circuit 313 of the second RF signal generation unit 31b. Then, at time t1, the timing signal TS becomes ON, and at this time, the amplifier circuit 314 generates an RF signal according to the instruction from the control circuit 313. Thus, as shown in FIG13, an electrical pulse is generated in the bias RF signal BR1 at time t1. In this way, the amplifier circuit 314 periodically generates electrical pulses according to the timing signal TS to generate the bias RF signal BR1. The generated bias RF signal BR1 is supplied to the second matching circuit 51b.

[0089] When the bias RF signal BR1 is supplied to the second matching circuit 51b, the second matching circuit 51b matches the impedance of its input terminal (hereinafter referred to as "input impedance") with the impedance of its output terminal (hereinafter referred to as "output impedance"). Specifically, firstly, the VI sensor 516 measures the voltage and current of the bias RF signal BR1 supplied by the second RF signal generating unit 31b. Then, the control circuit 515 controls the matching circuit 517 based on the measured voltage and current to match the input impedance and output impedance of the second matching circuit 51b.

[0090] The bias RF signal BR1, after passing through the matching circuit 51b, is supplied to the plasma processing device 1-1 and the phase adjustment circuit 60-1 via the low-pass filter 518. Additionally, in the second matching circuit 51b, the voltage sensor 519 measures the voltage of the bias RF signal BR1 after passing through the low-pass filter. The voltage measured by the voltage sensor 519 is supplied to the control circuit 515 and the control circuit 311 of the first RF signal generation unit 31a.

[0091] When the voltage measured in the voltage sensor 519 is supplied to the control circuit 311, the control circuit 311 generates a gate signal GS based on the voltage. In one example, as shown in FIG13, the control circuit 311 can generate pulses in the gate signal GS when the voltage of the bias RF signal BR1 is at its peak. That is, the gate signal GS can be a signal that periodically includes pulses, and can be a signal in which each pulse appears in the sequence when the voltage of the bias RF signal BR1 is at its peak. In addition, the control circuit 311 supplies the generated gate signal GS to the control circuit 511 of the first matching circuit 51a.

[0092] Furthermore, the first matching circuit 51a matches its input impedance with its output impedance based on the gate control signal GS. The input impedance may include the output impedance of the first RF signal generation unit 31a. Additionally, the output impedance of the first matching circuit 51a may include the impedance of the load of the plasma processing devices 1-1 to 1-n. For example, the first matching circuit 51a matches its input impedance with its output impedance at the timing of the gate control signal GS pulse. For instance, at the timing of the gate control signal GS pulse, the matching circuit 513 can be controlled based on the voltage and current of the source RF signal SR measured by the VI sensor 512 to match the input impedance with the output impedance of the first matching circuit 51a. That is, the first matching circuit 51a can match its input impedance with its output impedance at the timing when the voltage of the bias RF signal BR1 is at its peak.

[0093] The bias RF signal BR1 output by the second matching circuit 51b is supplied to the plasma processing device 1-1 and the phase adjustment circuit 60-1. The phase adjustment circuit 60-1 shifts the phase of the bias RF signal BR1 to generate the bias RF signal BR2. Additionally, the phase adjustment circuit 60-1 supplies the bias RF signal BR2 to the plasma processing device 1-2 and the phase adjustment circuit 60-2. The phase adjustment circuits 60-2 to 60-n-1 sequentially shift the phases of the received bias RF signals BR2 to BRn-1 to generate bias RF signals BR3 to BRn respectively. The phase adjustment circuits 60-1 to 60-n-1 shift the phase of the received bias RF signal according to the number n of plasma processing devices 1. In this example, phase adjustment circuits 60-1 to 60-n-1 shift the phase of the received bias RF signal by 360° / n, that is, shift it by 360° divided by the number of plasma processing units 1. Additionally, phase adjustment circuits 60-2 to 60-n-1 supply bias RF signals BR3 to BRn to plasma processing units 1-3 to 1-n respectively. Furthermore, phase adjustment circuits 60-2 to 60-n-2 supply bias RF signals BR3 to BRn-1 to phase adjustment circuits 60-3 to 60-n-1.

[0094] Figure 14 is a timing diagram showing an example of the phase of the bias RF signals BR1 to BR4 within one cycle of the bias RF signal BR1. Figure 14 illustrates an example with n=4 (i.e., plasma processing devices 1-1 to 1-4 coupled to the first matching circuit 51a). In other words, in the example of Figure 14, phase adjustment circuits 60-1 to 60-3 are coupled in series between the second matching circuit 51b and the plasma processing devices 1-4. In Figure 14, the horizontal axis represents time or phase. Tbias represents one cycle of the bias RF signal BR1.

[0095] As shown in Figure 14, the bias RF signal BR2 is phase-shifted by 360° / 4, or 90°, relative to the bias RF signal BR1. Similarly, the bias RF signal BR3 is phase-shifted by 90° relative to the bias RF signal BR2. Additionally, the bias RF signal BR4 is phase-shifted by 90° relative to the bias RF signal BR3. Then, in this example, the first matching circuit 51a achieves impedance matching at a timing of phase delay Δθ from time t1, i.e., when the phase of the bias RF signal BR1 is 90°. Therefore, as illustrated in Figure 9, the impedance mismatch observed from the first matching circuit 51a is largest in plasma processing devices 1-3, second largest in plasma processing devices 1-2 and 1-4, and smallest in plasma processing device 1-1. Consequently, more power from the source RF signal SR is supplied to plasma processing device 1-1. Then, when the phase advances by 90°, the impedance mismatch is minimized in plasma processing device 1-2, and more power from the source RF signal SR is supplied to plasma processing device 1-2. Furthermore, when the phase advances by 90°, the impedance mismatch is minimized in plasma processing device 1-3, and more power from the source RF signal SR is supplied to plasma processing device 1-3. Additionally, when the phase advances by 90°, the impedance mismatch is minimized in plasma processing device 1-4, and more power from the source RF signal SR is supplied to plasma processing device 1-4. In other words, after one cycle of the biased RF signal, more power from the source RF signal SR is supplied to any one of plasma processing devices 1-1 to 1-4. This reduces the occurrence of reflections of the source RF signal SR, thus suppressing power loss from the source RF signal SR.

[0096] Furthermore, the timing of impedance matching performed by the first matching circuit 51a is not limited to the peak voltage of the bias RF signal BR1. In one example, this timing can be any one of the periods A shown in Figure 9. Alternatively, this timing can be one of several periods A shown in Figure 9. Furthermore, it can be a timing sequence where the impedances of the plasma processing devices 1-1 to 1-n do not repeat. In one example, when n=4, this timing can be a timing sequence where the phases of the bias RF signals BR1 to BR4 are 30° and 150° respectively.

[0097] Alternatively, switches SWA1~SWan and switches SWb1~SWbn can be used to disconnect one or more of the plasma processing devices 1-1~1-n from the impedance matching circuit 50, thereby activating the plasma processing system. These one or more plasma processing devices can, for example, be in a stopped or idle state. In this case, phase adjustment circuits 60-1~60-n-1 can adjust the phase offset according to the number of plasma processing devices coupled to the impedance matching circuit 50. For example, in the example shown in Figure 14, when plasma processing devices 1-4 are in a stopped or idle state, phase adjustment circuits 60-1 and 60-2 can be assumed to have n=3, and each can be offset by 360° / 3, or 120°.

[0098] Referring to Figure 13, at time t2, the timing signal TS changes from ON to OFF. At this time, the first RF signal generation unit 31a and the second RF signal generation unit 31b stop generating the source RF signal SR and the bias DC signal BD1. Then, at time t3, the timing signal TS changes from OFF to ON. At this time, the first RF signal generation unit 31a and the second RF signal generation unit 31b resume generating the source RF signal SR and the bias DC signal BD1. By repeating the above operation, plasma is generated from the processing gas in the plasma processing chamber 10, and plasma processing (e.g., etching processing) is performed on the substrate W.

[0099] Figure 15 is a block diagram showing an example of the structure of a plasma processing system according to an embodiment. The main difference between this plasma processing system and the one shown in Figure 10 is that a bias DC signal is supplied to the plasma processing devices 1-1 to 1-n as a bias signal. That is, in this embodiment, the first DC signal generating unit 32a generates bias DC signals BD1 to BDn, and these bias DC signals BD1 to BDn are supplied to the plasma processing devices 1-1 to 1-n.

[0100] Figure 16 is a block diagram showing an example of the structure of the first RF signal generating unit 31a, the first DC signal generating unit 32a, and the first matching circuit 51a. The first DC signal generating unit 32a includes a DC signal generating unit 321 and a DC signal control unit 322. The DC signal generating unit 321 includes a control circuit 323 and an amplifier circuit 324. The DC signal control unit 322 includes a control circuit 325, a pulse generating circuit 326, a voltage sensor 327, and low-pass filters 328-1 to 328-n.

[0101] Figure 17 is a flowchart illustrating an example of the plasma processing method of this embodiment (hereinafter also referred to as "this processing method"). Figure 18 is a timing diagram illustrating an example of the supply period of the source RF signal SR and the bias DC signal BD1 in this processing method. Figure 19 is a timing diagram illustrating an example of the phase of each bias DC signal. Hereinafter, an example of this processing method will be described with reference to Figures 15 to 19.

[0102] As shown in Figure 17, this processing method includes: a step of arranging the substrate (ST1), a step of supplying processing gas (ST2), a step of generating a source RF signal (ST3), and a step of generating a bias DC signal (ST4). Furthermore, some or all of the steps ST included in this processing method can be performed in parallel in plasma processing apparatuses 1-1 to 1-n. In the example shown in Figure 17, at least steps ST3 and ST4 can be performed in parallel in plasma processing apparatuses 1-1 to 1-n. Additionally, in this processing method, steps ST2 to ST4 can be performed simultaneously. Furthermore, steps ST2 to ST4 can be performed in a sequence different from that described below.

[0103] First, in step ST1, in each of the plasma processing apparatuses 1-1 to 1-n, the substrate W is disposed on the substrate support 11. Then, in step ST2, processing gas is supplied to the plasma processing chamber 10.

[0104] Next, in step ST3, the first RF signal generation unit 31a generates a source RF signal SR. As shown in FIG18, at time t1, the timing signal TS changes from off to on, at which time the source RF signal SR is generated. The generated source RF signal SR is supplied to the first matching circuit 51a.

[0105] Next, in step ST4, the first DC signal generation unit 32a generates a bias DC signal BD1. The bias DC signal BD1 is generated based on the timing signal TS. That is, firstly, the control circuit 311 of the first RF signal generation unit 31a supplies the timing signal TS to the control circuit 313 of the DC signal control unit 322. Then, at time t1, the timing signal TS becomes ON, and at this time, the pulse generation circuit 326 generates a sequence of voltage pulses from the DC signal voltage generated in the DC signal generation unit 321. The generated sequence of voltage pulses is output from the first DC signal generation unit 32a as the bias DC signal BD1 after passing through the low-pass filter 328-1. In addition, in the DC signal control unit 322, the voltage sensor 327 generates the voltage of the sequence of voltage pulses generated by the pulse generation circuit 326. The voltage measured by the voltage sensor 327 is supplied to the control circuit 325 and the control circuit 311 of the first RF signal generation unit 31a.

[0106] After the voltage measured in voltage sensor 327 is supplied to control circuit 311, control circuit 311 generates a gate signal GS based on the voltage. In one example, as shown in FIG18, control circuit 311 can generate pulses in gate signal GS at approximately a certain timing of the voltage pulse value. The timing of the pulses in gate signal GS can be near half the pulse width of the voltage pulse. First matching circuit 51a matches the input impedance to the output impedance based on gate signal GS.

[0107] The pulse generation circuit 326 generates bias DC signals BD2~BDn with phase shifts relative to the bias DC signal BD1. The bias DC signals BD2~BDn, like the bias DC signal BD1, are configured as a sequence containing voltage pulses. The pulse generation circuit 326 shifts the phases of the bias DC signals BD2~BDn according to the number n of plasma processing devices 1. In this example, the pulse generation circuit 326 shifts the phases of the bias DC signals BD1~BDn by T bias / n, that is, by the time component of one period of the bias DC signals BD1~BDn divided by the number of plasma processing devices 1.

[0108] Figure 19 is a timing diagram showing an example of the phase of the bias DC signals BD1 to BD4 within one cycle of the bias DC signal BD1. Figure 19 illustrates an example with n=4 (i.e., the first matching circuit 51a is coupled to plasma processing devices 1-1 to 1-4). In Figure 19, the horizontal axis represents time or phase. Tbias represents one cycle of the bias DC signal BD1.

[0109] As shown in Figure 19, the bias DC signal BD2 is phase-shifted by T bias / 4 relative to the bias DC signal BD1, that is, shifted by 1 / 4 period. Similarly, the bias DC signal BD3 is phase-shifted by 1 / 4 period relative to the bias DC signal BD2. Furthermore, the bias DC signal BD4 is phase-shifted by 1 / 4 period relative to the bias DC signal BD3. Then, in this example, the first matching circuit 51a achieves impedance matching over a time interval Δt (i.e., a delay of T bias / 8) from time t1. Thus, during the time interval when the voltage pulses of the bias DC signals BD1~BDn are ON, the impedance mismatch observed from the first matching circuit 51a is minimized in the plasma processing device supplied by that voltage pulse. For example, during the ON timing of the bias DC signal BD1 voltage pulse, the impedance mismatch observed from the first matching circuit 51a is minimized in the plasma processing unit 1-1, resulting in a greater supply of power from the source RF signal SR to the plasma processing unit 1-1. Consequently, after one cycle of the bias DC signal, a greater amount of power from the source RF signal SR is supplied to any one of the plasma processing units 1-1 to 1-4. This reduces the occurrence of reflections of the source RF signal SR, thus suppressing power loss from the source RF signal SR. Furthermore, the voltage pulses contained in each of the bias DC signals BD1 to BDn can be generated in a manner that does not overlap in time. In one example, as shown in Figure 19, the ON period of the pulse voltage (i.e., tON) can be shorter than Tbiad / n.

[0110] All features of the embodiments disclosed in this application should be considered merely illustrative and not limiting. The aforementioned embodiments may also be omitted, substituted, or modified into various other embodiments without departing from the scope and spirit of the appended claims. For example, the above embodiments are described using a capacitively coupled plasma device as an example, but are not limited to this and can be applied to other plasma devices. For example, an inductively coupled plasma (ICP) device may be used instead of a capacitively coupled plasma device. In this case, the ICP device includes an antenna and a lower electrode. The antenna is disposed above or above the plasma processing chamber; the lower electrode is disposed within the substrate support. In one embodiment, the first plasma processing device includes: a first plasma processing chamber; a first substrate support disposed within the first plasma processing chamber; a first lower electrode disposed within the first substrate support; and a first antenna disposed above the first plasma processing chamber. Additionally, the second plasma processing apparatus includes: a second plasma processing chamber; a second substrate support disposed within the second plasma processing chamber; a second lower electrode disposed within the second substrate support; and a second antenna disposed above the second plasma processing chamber. Then, a first matching circuit is coupled to the first antenna and the second antenna; a second matching circuit is coupled to the first lower electrode; and a phase adjustment circuit is coupled to the second lower electrode. Therefore, the first plasma processing apparatus is coupled to the first matching circuit and the second matching circuit; and the second plasma processing apparatus is coupled to the first matching circuit and the phase adjustment circuit.

[0111] In addition, embodiments of the present invention may include the following embodiments.

[0112] (Note 1) A plasma processing system includes: a source RF signal generating unit configured to generate a source RF signal for plasma generation; a first matching circuit coupled to the source RF signal generating unit; a bias RF signal generating unit configured to generate a bias RF signal; a second matching circuit coupled to the bias RF signal generating unit; a phase adjustment circuit coupled to the second matching circuit and configured to shift the phase of the bias RF signal supplied from the bias RF signal generating unit via the second matching circuit; and a first plasma processing apparatus including a first plasma processing chamber and a first substrate support, the first substrate support being disposed within the first plasma processing chamber and comprising one or more [missing information - likely related to a specific type of support]. The first lower electrode, wherein the source RF signal is supplied to the first plasma processing apparatus via the first matching circuit, and the bias RF signal is supplied to at least one of the one or more first lower electrodes of the first plasma processing apparatus via the second matching circuit; and the second plasma processing apparatus, comprising a second plasma processing chamber and a second substrate support, wherein the second substrate support is disposed in the second plasma processing chamber and comprises one or more second lower electrodes, wherein the source RF signal is supplied to the second plasma processing apparatus via the first matching circuit, and the bias RF signal whose phase is offset in the phase adjustment circuit is supplied to at least one of the one or more second lower electrodes of the second plasma processing apparatus.

[0113] (Note 2) As described in Note 1, the plasma processing system includes a phase adjustment circuit comprising at least one inductor and at least one capacitor.

[0114] (Note 3) As described in Note 2, the plasma processing system includes a phase adjustment circuit comprising at least one of a variable inductor and a variable capacitor.

[0115] (Note 4) The plasma processing system described in Note 3 further includes: a sensor configured to monitor the source RF signal between the source RF signal generation unit and the first matching circuit and output a monitoring result; and a phase adjustment circuit configured to adjust one or both of the inductance of the variable inductor and the capacitance of the variable capacitor according to the monitoring result.

[0116] (Note 5) As described in Note 4, the plasma processing system wherein the sensor is a VI sensor configured to monitor the phase difference between the voltage and current of the source RF signal.

[0117] (Note 6) As described in Note 4, in the plasma processing system, the sensor is a directional coupler configured to monitor the reflected wave of the source RF signal.

[0118] (Note 7) As described in any of Notes 3 to 6, the plasma processing system wherein the phase adjustment circuit is configured to adjust one or both of the inductance of the variable inductor and the capacitance of the variable capacitor before or after plasma processing in the second plasma processing apparatus.

[0119] (Note 8) As described in any of Notes 3 to 6, the plasma processing system wherein the phase adjustment circuit is configured to adjust the inductance of the variable inductor and the capacitance of the variable capacitor between plasma processes in the second plasma processing apparatus.

[0120] (Note 9) As described in any of Notes 1 to 8, the plasma processing system wherein the phase difference between the bias RF signal and the phase-shifted bias RF signal is 180 degrees.

[0121] (Note 10) The plasma processing system described in any one of Notes 1 to 9 includes a first plasma processing device comprising a first upper electrode disposed above the first substrate support; a second plasma processing device comprising a second upper electrode disposed above the second substrate support; a first matching circuit coupled to at least one of the one or more first lower electrodes or the first upper electrode, and coupled to at least one of the one or more second lower electrodes or the second upper electrode; a second matching circuit coupled to at least one of the one or more first lower electrodes; and a phase adjustment circuit coupled to at least one of the one or more second lower electrodes.

[0122] (Note 11) As described in any one of Notes 1 to 9, the first plasma processing device includes a first antenna disposed above the first plasma processing chamber; the second plasma processing device includes a second antenna disposed above the second plasma processing chamber; a first matching circuit is coupled to the first antenna and the second antenna; a second matching circuit is coupled to at least one of the one or more first lower electrodes; and a phase adjustment circuit is coupled to at least one of the one or more second lower electrodes.

[0123] (Note 12) As described in any of Notes 1 to 11, the plasma processing system wherein the source RF signal has a frequency in the range of 10 MHz to 120 MHz.

[0124] (Note 13) As described in any of Notes 1 to 11, the plasma processing system wherein the bias RF signal has a frequency in the range of 100 kHz to 20 MHz.

[0125] (Note 14) As described in any of Notes 1 to 11, the plasma processing system wherein the bias RF signal has a frequency in the range of 400 kHz to 4 MHz.

[0126] (Note 15) As described in any of Notes 1 to 14, the plasma processing system wherein the source RF signal is a continuous wave having a first frequency.

[0127] (Note 16) As described in any of Notes 1 to 14, the plasma processing system wherein the source RF signal is a pulse wave that periodically includes a plurality of first electrical pulses; each of the plurality of first electrical pulses is composed of a continuous wave having a first frequency.

[0128] (Note 17) As described in any of Notes 1 to 16, the plasma processing system wherein the bias RF signal is a continuous wave having a second frequency.

[0129] (Note 18) As described in any of Notes 1 to 16, the plasma processing system wherein the bias RF signal is a pulse wave that periodically includes a plurality of second electrical pulses; each of the plurality of second electrical pulses is composed of a continuous wave having a second frequency.

[0130] (Note 19) A plasma processing method, implemented in a plasma processing system including a first plasma processing apparatus and a second plasma processing apparatus, is characterized by comprising: generating a first RF signal having a first frequency; generating a second RF signal having a second frequency lower than the first frequency; shifting the phase of the second RF signal; supplying the first RF signal to the first plasma processing apparatus and the second plasma processing apparatus; supplying the second RF signal to the first plasma processing apparatus; and supplying the phase-shifted second RF signal to the second plasma processing apparatus.

[0131] (Note 20) A plasma processing system includes: an RF signal generating unit configured to generate an RF signal; a matching circuit coupled to the RF signal generating unit; a voltage pulse generating unit configured to generate a sequence of voltage pulses; a phase adjustment circuit configured to shift the phase of the sequence of voltage pulses supplied by the voltage pulse generating unit; and a first plasma processing apparatus including a first plasma processing chamber and a first substrate support, the first substrate support being disposed within the first plasma processing chamber and including one or more first lower electrodes, the RF signal being supplied to the first plasma processing chamber via the matching circuit. A first plasma processing apparatus, wherein a sequence of voltage pulses is supplied from a voltage pulse generating unit to one or more first lower electrodes of the first plasma processing apparatus; and a second plasma processing apparatus comprising a second plasma processing chamber and a second substrate support, the second substrate support being disposed within the second plasma processing chamber and comprising one or more second lower electrodes, wherein an RF signal is supplied to the second plasma processing apparatus via a matching circuit, and a sequence of voltage pulses whose phase is offset in a phase adjustment circuit is supplied to at least one of the one or more second lower electrodes of the second plasma processing apparatus.

[0132] (Note 21) A plasma processing system is characterized by comprising: a source RF signal generating unit configured to generate a source RF signal for plasma generation; a first matching circuit coupled to the source RF signal generating unit; a bias RF signal generating unit configured to generate a bias RF signal; a second matching circuit coupled to the bias RF signal generating unit; n plasma processing devices (n being an integer of 2 or more) coupled in parallel with respect to the first matching circuit; and n-1 phase adjustment circuits; the n-1 phase adjustment circuits are configured to be coupled in series between the second matching circuit and the nth plasma processing device among the n plasma processing devices, and to sequentially shift the phase of the bias RF signal supplied from the bias RF signal generating unit via the second matching circuit; the kth (k being an integer from 1 to n-1) phase adjustment circuit among the n-1 phase adjustment circuits is coupled to the kth and k+1th plasma processing devices among the n plasma processing devices; the n plasma processing devices... The first plasma processing apparatus in the processing device includes a first plasma processing chamber and a first substrate support. The first substrate support is disposed in the first plasma processing chamber and includes one or more first lower electrodes. A source RF signal is supplied to the first plasma processing apparatus via a first matching circuit, and a bias RF signal is supplied to at least one of the one or more first lower electrodes of the first plasma processing apparatus via a second matching circuit. The (k+1)th plasma processing apparatus among the n plasma processing apparatuses. The device includes a (k+1)th plasma processing chamber and a (k+1)th substrate support. The (k+1)th substrate support is disposed in the (k+1)th plasma processing chamber and includes one or more (k+1)th lower electrodes. The source RF signal is supplied to the (k+1)th plasma processing device via the first matching circuit. A bias RF signal whose phase is offset in the kth phase adjustment circuit among the n-1 phase adjustment circuits is supplied to at least one of the one or more (k+1)th lower electrodes of the (k+1)th plasma processing device.

[0133] (Note 22) As described in Note 21, the plasma processing system wherein the n-1 phase adjustment circuits are configured to sequentially shift the phase of the bias RF signal by 360 degrees / n.

[0134] (Note 23) The plasma processing system described in Note 21 or 22 further includes: n first switches that switch whether to couple the n plasma processing devices to the first matching circuit; and n second switches that switch whether to couple the n plasma processing devices to the second matching circuit.

[0135] (Note 24) A plasma processing system is characterized by comprising: a source RF signal generating unit configured to generate a source RF signal for plasma generation; a first matching circuit coupled to the source RF signal generating unit; a voltage pulse generating unit configured to generate a sequence of n (n is an integer of 2 or more) voltage pulses, wherein the sequence of n voltage pulses is out of phase with each other; and n plasma processing devices; the kth (k is an integer from 1 to n) plasma processing device among the n plasma processing devices includes a kth plasma processing chamber and a kth substrate support, the kth substrate support is disposed in the kth plasma processing chamber and includes one or more first lower electrodes, the source RF signal is supplied to the kth plasma processing device via the first matching circuit, and the sequence of the kth voltage pulses among the sequence of n voltage pulses is supplied to at least one of the one or more kth lower electrodes of the kth plasma processing device.

[0136] 1: Plasma treatment device 1-1~1-n: Plasma treatment device 2: Control Department 2a: Computer 2a1: Processing Department 2a2: Memory Department 2a3: Communication Interface 10: Plasma Treatment Room 10a: Sidewall 10e: Gas exhaust outlet 10s: Plasma processing space 11:Substrate support department 12: Plasma Generation Unit 13: Sprayer head 13a: Gas supply port 13b: Gas diffusion chamber 13c: Gas inlet 20: Gas Supply Department 21: Gas Source 22: Flow controller 30: Power supply 31: RF signal power supply 31a: First RF signal generation unit 31b: Second RF signal generation unit 32: DC signal power supply 32a: First DC signal generation unit 32b: Second DC signal generation unit 40: Exhaust System 50: Impedance matching circuit 51a: First matching circuit 51b: Second Matching Circuit 60, 60-1~60-n-1: Phase adjustment circuit 61: Input terminal 62: Output terminal 63, 63-1, 63-2: Inductors 64, 64-1, 64-2: Capacitors 111: Ontology Department 111a: Central Region 111b: Annular region 112: Ring-shaped component 311: Control Circuit 312: Amplifier Circuit 313: Control Circuit 314: Amplifier Circuit 321: DC signal generation unit 322: DC Signal Control Unit 323: Control Circuit 324: Amplifier Circuit 325: Control Circuit 326: Pulse Generation Circuit 327: Voltage Sensor 328-1~328-n: Low-pass filter 511: Control Circuit 512:VI sensor 513: Matching Circuit 514: Voltage Sensor 515: Control Circuit 516:VI sensor 517: Matching Circuit 518: Low-pass filter 519: Voltage Sensor A,B,H,L: Period BR1~BRn: Bias RF signals BD1~BDn: Bias DC signals C: Capacitor H1~H3, L1~L3: Signals ST1~ST4, ST41~ST43: Steps SWa1~Swan, SWb1~SWbn: Switches SR: Source RF signal W: substrate GS: Gate control signal TS: Timing signal t1~t3: Time points t ON: period Δθ: Phase difference T bias: periodicity

Claims

1. A plasma processing system, comprising: a source radio frequency signal generating unit configured to generate a source radio frequency signal for plasma generation; a first matching circuit coupled to the source radio frequency signal generating unit; a bias radio frequency signal generating unit configured to generate a bias radio frequency signal, the frequency of the bias radio frequency signal being lower than the frequency of the source radio frequency signal; a second matching circuit coupled to the bias radio frequency signal generating unit; and a phase adjustment circuit coupled to the second matching circuit and configured to shift the phase of the bias radio frequency signal supplied from the bias radio frequency signal generating unit via the second matching circuit, the phase adjustment circuit shifting the phase of the bias radio frequency signal and generating a phase-shifted bias radio frequency signal; A first plasma processing apparatus includes a first plasma processing chamber and a first substrate support, the first substrate support being disposed within the first plasma processing chamber and including one or more first lower electrodes, a source radio frequency signal being supplied to the first plasma processing apparatus via a first matching circuit, and a bias radio frequency signal being supplied to at least one of the one or more first lower electrodes of the first plasma processing apparatus via a second matching circuit; and a second plasma processing apparatus includes a second plasma processing chamber and a second substrate support, the second substrate support being disposed within the second plasma processing chamber and including one or more second lower electrodes, the source radio frequency signal being supplied to the second plasma processing apparatus via the first matching circuit, and a phase-shifted bias radio frequency signal being supplied to at least one of the one or more second lower electrodes of the second plasma processing apparatus.

2. The plasma treatment system as described in claim 1, wherein, The phase adjustment circuit includes at least one inductor and at least one capacitor.

3. The plasma treatment system as described in claim 2, wherein, The phase adjustment circuit includes at least one of a variable inductor and a variable capacitor.

4. The plasma treatment system as described in claim 3, wherein, It further includes: a sensor configured to monitor the source radio frequency signal between the source radio frequency signal generation unit and the first matching circuit and output a monitoring result; and a phase adjustment circuit configured to adjust one or both of the inductance of the variable inductor and the capacitance of the variable capacitor according to the monitoring result.

5. The plasma treatment system as described in claim 4, wherein, The sensor is a voltage and current sensor configured to monitor the phase difference between the voltage and current of the source radio frequency signal.

6. The plasma treatment system as described in claim 4, wherein, The sensor is a directional coupler configured to monitor the reflected waves of the source radio frequency signal.

7. The plasma treatment system as described in claim 3, wherein, The phase adjustment circuit is configured to adjust one or both of the inductance of the variable inductor and the capacitance of the variable capacitor before or after plasma processing in the second plasma processing apparatus.

8. The plasma treatment system as described in claim 3, wherein, The phase adjustment circuit is configured to adjust the inductance of the variable inductor and the capacitance of the variable capacitor between plasma processes in the second plasma processing apparatus.

9. The plasma treatment system as claimed in claim 1, wherein, The phase difference between the bias RF signal and the phase-shifted bias RF signal is 180 degrees.

10. The plasma processing system as claimed in claim 1, wherein, The first plasma processing apparatus includes a first upper electrode disposed above the first substrate support; the second plasma processing apparatus includes a second upper electrode disposed above the second substrate support; a first matching circuit is coupled to at least one of the one or more first lower electrodes or the first upper electrode, and is coupled to at least one of the one or more second lower electrodes or the second upper electrode; a second matching circuit is coupled to at least one of the one or more first lower electrodes; and a phase adjustment circuit is coupled to at least one of the one or more second lower electrodes.

11. The plasma processing system as claimed in claim 1, wherein, The first plasma processing apparatus includes a first antenna disposed above the first plasma processing chamber; the second plasma processing apparatus includes a second antenna disposed above the second plasma processing chamber; a first matching circuit is coupled to the first antenna and the second antenna; a second matching circuit is coupled to at least one of the one or more first lower electrodes; and a phase adjustment circuit is coupled to at least one of the one or more second lower electrodes.

12. The plasma processing system as described in claim 1, wherein, The source radio frequency signal has a frequency in the range of 10MHz to 120MHz.

13. The plasma processing system as described in claim 1, wherein, The bias RF signal has a frequency in the range of 100kHz to 20MHz.

14. The plasma processing system as described in claim 1, wherein, The bias RF signal has a frequency in the range of 400kHz to 4MHz.

15. The plasma processing system as claimed in claim 1, wherein, The source radio frequency signal is a continuous wave with a first frequency.

16. The plasma processing system as claimed in claim 1, wherein, The source radio frequency signal is a pulse wave that periodically includes a plurality of first electrical pulses; each of the plurality of first electrical pulses is composed of a continuous wave having a first frequency.

17. The plasma processing system as claimed in claim 1, wherein, The biased radio frequency signal is a continuous wave with a second frequency.

18. The plasma processing system as claimed in claim 1, wherein, The bias radio frequency signal is a pulse wave that periodically includes a plurality of second electrical pulses; each of the plurality of second electrical pulses is composed of a continuous wave having a second frequency.

19. A plasma processing method, performed in a plasma processing system including a first plasma processing apparatus and a second plasma processing apparatus, comprising: generating a first radio frequency signal having a first frequency; generating a second radio frequency signal having a second frequency lower than the first frequency; shifting the phase of the second radio frequency signal; supplying the first radio frequency signal to the first plasma processing apparatus and the second plasma processing apparatus; supplying the second radio frequency signal to the first plasma processing apparatus; and supplying the phase-shifted second radio frequency signal to the second plasma processing apparatus.

20. A plasma processing system comprising: a source radio frequency signal generating unit configured to generate a source radio frequency signal for plasma generation; a first matching circuit coupled to the source radio frequency signal generating unit; a bias radio frequency signal generating unit configured to generate a bias radio frequency signal, the frequency of which is lower than the frequency of the source radio frequency signal; a second matching circuit coupled to the bias radio frequency signal generating unit; n plasma processing devices coupled in parallel with respect to the first matching circuit, where n is an integer of 2 or more; and n-1 phase adjustment circuits; the n-1 phase adjustment circuits being configured to be coupled in series between the second matching circuit and the nth plasma processing device among the n plasma processing devices, and to sequentially shift the phase of the bias radio frequency signal supplied from the bias radio frequency signal generating unit via the second matching circuit; and a kth phase adjustment circuit among the n-1 phase adjustment circuits being coupled to the kth plasma processing device and the (k+1)th plasma processing device among the n plasma processing devices, where k is an integer from 1 to n-1; The first plasma processing device among the n plasma processing devices includes a first plasma processing chamber and a first substrate support. The first substrate support is disposed in the first plasma processing chamber and includes one or more first lower electrodes. The source radio frequency signal is supplied to the first plasma processing device via the first matching circuit, and the bias radio frequency signal is supplied to at least one of the one or more first lower electrodes of the first plasma processing device via the second matching circuit. The (k+1)th plasma processing device among the n plasma processing devices includes a (k+1)th plasma processing chamber and a (k+1)th substrate support. The (k+1)th substrate support is disposed in the (k+1)th plasma processing chamber and includes one or more (k+1)th lower electrodes. The source radio frequency signal is supplied to the (k+1)th plasma processing device via the first matching circuit. A biased radio frequency signal whose phase is offset in the kth phase adjustment circuit among the n-1 phase adjustment circuits is supplied to at least one of the one or more (k+1)th lower electrodes of the (k+1)th plasma processing device.

21. The plasma processing system as described in claim 20, wherein, The n-1 phase adjustment circuits are configured to sequentially shift the phase of the bias RF signal by 360 degrees / n.

22. The plasma processing system as described in claim 20, wherein, It further includes: n first switches, which switch whether to couple the n plasma processing devices to the first matching circuit; and n second switches, which switch whether to couple the n plasma processing devices to the second matching circuit.

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