System of inspecting a wafer and related nontransitory computer-readable medium

Abstract

This invention discloses an improved wafer inspection method. The improved method includes a non-transitory computer-readable medium storing a set of instructions executable by at least one processor of a device to cause the device to perform a method comprising: placing a wafer at a position on a stage; moving one or more movable segments of a conductive ring radially inward so that the conductive ring is within a predetermined distance from an edge of the wafer; and adjusting a voltage applied to the conductive ring or a voltage applied to the wafer such that the voltage applied to the conductive ring is substantially equal to the voltage applied to the wafer to provide a substantially consistent electric field across an inner portion of the conductive ring and an outer portion of the wafer.

Description

Wafer Edge Detection of a Charged Particle Detection System The description herein relates to the field of charged particle beam equipment, and more particularly to wafer edge detection for a charged particle detection system. A charged particle beam equipment can generate a 2D image of a wafer substrate by detecting secondary electrons, backscattered electrons, mirror electrons or other types of electrons from the surface of the wafer substrate after being impacted by a charged particle beam generated by the charged particle beam equipment. In the semiconductor industry, various charged particle beam equipments are used for semiconductor wafers for various purposes such as: wafer processing (e.g., electron beam direct write lithography system), process monitoring (e.g., critical dimension scanning electron microscope (CD-SEM)), wafer detection (e.g., electron beam detection system), defect analysis (e.g., defect inspection SEM or such as DR-SEM and focused ion beam system or such as FIB), etc. During wafer detection, any potential defects in the wafer can be found and removed, so that a flawless structure is formed in the wafer at a later stage. During the wafer detection process, the wafer can be placed inside a conductive ring, also called a high voltage (HV) ring structure, on a wafer holder (stage). The conductive ring can also be called a compensation ring. In a conventional system, there is a gap between the conductive ring and the wafer edge, which can generate a distorted potential near the wafer edge during the detection process. Embodiments of the present invention provide a system and method for detecting a wafer. Some embodiments provide a method for detecting a wafer, the method comprising: placing the wafer at a position on a stage; moving one or more movable segments of a conductive ring inward in a radial direction so that the conductive ring can be within a predetermined distance from an edge of the wafer; and adjusting a voltage applied to the conductive ring so that the voltage applied to the conductive ring can be substantially equal to the voltage applied to the wafer to provide a substantially uniform electric field across an inner portion of the conductive ring and an outer portion of the wafer. Some embodiments provide a system for detecting a wafer, the system comprising: a stage configured to support a wafer having a wafer edge; a conductive ring of the stage, the conductive ring comprising: one or more movable segments configured to move radially inward so that the conductive ring can move within a predetermined distance from the wafer edge; and a controller including circuitry configured to adjust a voltage applied to the conductive ring or a voltage applied to the wafer so that the voltage applied to the conductive ring can be substantially similar to the voltage applied to the wafer to provide a substantially uniform electric field across an inner portion of the conductive ring and an outer portion of the wafer. A non-transitory computer-readable medium stores a set of instructions executable by at least one processor of a device to cause the device to perform a method, the method comprising: placing a wafer at a position on a stage; moving one or more movable segments of a conductive ring inward in a radial direction such that the conductive ring is capable of being within a predetermined distance from an edge of the wafer; and adjusting a voltage applied to the conductive ring or a voltage applied to the wafer such that the voltage applied to the conductive ring is substantially equal to the voltage applied to the wafer to provide a substantially uniform electric field across an inner portion of the conductive ring and an outer portion of the wafer. Reference will now be made in detail to example embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the attached drawings, where like numerals in different drawings represent the same or similar elements unless otherwise indicated. The embodiments set forth in the following description of the example embodiments do not represent all embodiments consistent with the present invention. Rather, they are merely examples of apparatus and methods consistent with aspects of the subject matter as recited in the appended claims. Without limiting the scope of the present invention, some embodiments may be described in the context of a detection system and method provided in a system that utilizes an electron beam ("e-beam"). However, the present invention is not limited thereto. Other types of charged particle beams (e.g., including protons, ions, muons, or any other particle carrying a charge) may be similarly applied. In addition, the system and method for detection may be used in other imaging systems, such as optical imaging, photon detection, x-ray detection, ion detection, or the like. An electronic device is composed of circuits formed on a block of semiconductor material called a substrate. The semiconductor material may include, for example, silicon, gallium arsenide, indium phosphide, or silicon germanium or the like. Many circuits may be formed together on the same silicon block and are called integrated circuits or ICs. The size of these circuits has been greatly reduced such that more circuits can be installed on the substrate. For example, an IC chip in a smartphone can be as small as a thumbnail and can include more than 2 billion transistors, each transistor being smaller than 1 / 1000 the size of a human hair. Manufacturing such ICs with extremely small structures or components is a complex, time-consuming, and expensive process that often involves hundreds of individual steps. Even an error in one step has the potential to cause defects in the finished IC, rendering the finished IC useless. Thus, one goal of the manufacturing process is to avoid such defects to maximize the number of functional ICs produced during the process; that is, to improve the overall yield of the process. One component for improving yield is to monitor the wafer manufacturing process to ensure that it is producing a sufficient number of functional integrated circuits. One way to monitor the process is to detect the wafer circuit structure at different stages of circuit structure formation. A scanning charged particle microscope ("SCPM") can be used to perform the detection. For example, the SCPM can be a scanning electron microscope (SEM). The SCPM can be used to actually image these extremely small structures to obtain a "picture" of the structure of the wafer. The image can be used to determine whether the structure is properly formed in the proper location. If the structure is defective, the process can be adjusted so that the defect is unlikely to occur again. The working principle of the SEM is similar to that of a camera. A camera takes pictures by receiving and recording the intensity of light reflected or emitted from a person or object. The SEM takes a "picture" by receiving and recording the energy or quantity of electrons reflected or emitted from the structure of the wafer. Before taking such a "picture", an electron beam can be projected onto the structure, and when electrons are reflected or emitted ("ejected") from the structure (e.g., from the wafer surface, from a structure below the wafer surface, or both), the detector of the SEM can receive and record the energy or quantity of those electrons to generate a detection image. To take this "picture", the electron beam can scan across the wafer (e.g., in a row-by-row or zigzag pattern), and the detector can receive the ejected electrons (referred to as "beam spots") from the area under the projection of the electron beam. The detector can receive and record the ejected electrons from each beam spot one by one and combine the information recorded for all beam spots to generate a detection image. Some SEMs use a single electron beam (referred to as a "single-beam SEM") to take a single "picture" to generate a detection image, while some SEMs use multiple electron beams (referred to as "multi-beam SEMs") to take multiple "sub-pictures" of the wafer in parallel and stitch them together to generate a detection image. By using multiple electron beams, the SEM can provide more electron beams to the structure to obtain these multiple "sub-pictures", so that more electrons are ejected from the structure. Therefore, the detector can receive more ejected electrons at the same time and generate a detection image of the structure of the wafer with higher efficiency and faster speed. Typically, a structure is fabricated on a substrate (e.g., a silicon substrate) placed on a platform referred to as a stage or an electro chuck (electronic chuck) for imaging. The platform may include a wafer holder that surrounds the wafer. In a conventional wafer platform system, when a wafer is placed in the wafer holder, there is a gap between the wafer edge and the inner circle of the wafer holder. This gap creates a discontinuity or distortion in the electric field near the wafer edge, which affects the performance of the SEM. Specifically, the distortion of the electric field can cause the electron beam to defocus, deflect, and distort, thereby affecting any corresponding image of the wafer. In some cases, a high voltage (HV) ring structure located in the gap can be used to supply an additional voltage so that the electric potential near the wafer edge is more uniform. However, the conductive ring can be fixed, and the gap between the wafer edge and the ring cannot be adjusted. Problems can occur when the wafer is not perfectly located within the ring structure, such as when the wafer is eccentric. In such cases, the conductive ring may need to provide different compensation voltages at different positions. Additionally, in at least some conventional systems, the conductive ring can be below the wafer surface, thereby reducing the extremely high compensation voltage (several kV) to obtain the desired compensation performance. Generally, in current conventional systems, the distorted electric field cannot be fully compensated, or additional compensation elements in the electron optical device system must be adjusted to reduce the impact on image quality to an acceptable level. Therefore, current systems and procedures for wafer inspection can result in many errors due to the non-uniform electric field near the wafer edge. To improve the wafer inspection procedure, it may be advantageous to eliminate or minimize the distorted electric field near the wafer edge. According to at least some embodiments of the present invention, an adjustable multi-segment conductive ring surrounding the wafer is introduced. In some examples, each of the adjustable segments can move radially inwards / outwards or up / down. In some examples, several segments can be stationary or fixed, and the remaining parts of the segments can be movable, and the movable segments can be configured to move the wafer to contact the fixed segments. For example, at least some of the segments can move radially outwards to create an area for placing the wafer. After placing the wafer, the segments can move radially inwards and up / down until each segment contacts or is as close as possible to the wafer edge and is planar with the exposed surface of the wafer. Advantageously, the above procedure makes the electric potential distribution near the wafer edge more uniform, thereby improving the imaging ability near the edge of the wafer. As used herein, unless otherwise specifically stated, the term "or" encompasses all possible combinations, unless infeasible. For example, if it is stated that a component can include A or B, then unless otherwise specifically stated or infeasible, the component can include A, or B, or A and B. As a second example, if it is stated that a component can include A, B, or C, then unless otherwise specifically stated or infeasible, the component can include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C. FIG. 1 illustrates an exemplary electron beam inspection (EBI) system 100 in accordance with some embodiments of the present invention. The EBI system 100 can be used for imaging. As depicted in FIG. 1, the EBI system 100 includes a main chamber 101, a load / lock chamber 102, a beam tool 104, and an equipment front end module (EFEM) 106. The beam tool 104 is located within the main chamber 101. The EFEM 106 includes a first load port 106a and a second load port 106b. The EFEM 106 may include additional load ports. The first load port 106a and the second load port 106b receive wafer front opening unified pods (FOUPs) containing wafers to be inspected (e.g., semiconductor wafers or wafers made of other materials) or samples to be inspected (wafers and samples can be used interchangeably). A "lot" is a plurality of wafers that can be loaded for processing as a batch. One or more robotic arms (not shown in the figure) in the EFEM 106 can transport the wafers to the load / lock chamber 102. The load / lock chamber 102 is connected to a load / lock vacuum pump system (not shown in the figure), which removes gas molecules in the load / lock chamber 102 to achieve a first pressure lower than atmospheric pressure. After achieving the first pressure, one or more robotic arms (not shown in the figure) can transport the wafers from the load / lock chamber 102 to the main chamber 101. The main chamber 101 is connected to a main chamber vacuum pump system (not shown in the figure), which removes gas molecules in the main chamber 101 to achieve a second pressure lower than the first pressure. After achieving the second pressure, the wafers are subjected to inspection by the beam tool 104. The beam tool 104 can be a single beam system or a multi-beam system. A controller 109 is electronically connected to the beam tool 104. The controller 109 can be a computer configured to perform various controls of the EBI system 100. Although the controller 109 is depicted in FIG. 1 as being external to the structure including the main chamber 101, the load / lock chamber 102, and the EFEM 106, it should be understood that the controller 109 can be part of the structure. In some embodiments, the controller 109 may include one or more processors (not shown in the figure). The processor may be a general-purpose or specific electronic device capable of manipulating or processing information. For example, the processor may include any combination of the following: any number of central processing units (or "CPUs"), graphics processing units (or "GPUs"), optical processors, programmable logic controllers, microcontrollers, microprocessors, digital signal processors, intellectual property (IP) cores, programmable logic arrays (PLAs), programmable array logics (PALs), generic array logics (GALs), complex programmable logic devices (CPLDs), field programmable gate arrays (FPGAs), system-on-chips (SoCs), application-specific integrated circuits (ASICs), and any type of circuit capable of data processing. The processor may also be a virtual processor that includes one or more processors distributed across multiple machines or devices coupled via a network. In some embodiments, the controller 109 may further include one or more memories (not shown in the figure). The memory may be a general-purpose or specific electronic device capable of storing code and data accessible by the processor (e.g., via a bus). For example, the memory may include any combination of the following: any number of random access memories (RAMs), read-only memories (ROMs), optical discs, magnetic disks, hard disk drives, solid-state drives, flash drives, secure digital (SD) cards, memory sticks, compact flash (CF) cards, or any type of storage device. The code may include an operating system (OS) and one or more application programs (or "apps") for specific tasks. The memory may also be a virtual memory that includes one or more memories distributed across multiple machines or devices coupled via a network. FIG. 2 illustrates an example imaging system 200 according to an embodiment of the present invention. The electron beam tool 104 of FIG. 2 may be configured for use in the EBI system 100. The electron beam tool 104 may be a single-beam device or a multi-beam device. As depicted in FIG. 2, the electron beam tool 104 includes a motorized sample stage 201 and a wafer holder 202 supported by the motorized stage 201 to hold a wafer 203 to be inspected. The electron beam tool 104 further includes an objective lens assembly 204, an electron detector 206 (which includes electron sensor surfaces 206a and 206b), an objective aperture 208, a condenser lens 210, a beam limiting aperture 212, a gun aperture 214, an anode 216, and a cathode 218. It should be understood that the electron detector 206 may also be a single piece, such as a ring type. In some embodiments, the objective lens assembly 204 may include a modified swing objective retarding immersion lens (SORIL) that includes magnetic pole pieces 204a, control electrodes 204b, deflectors 204c, and excitation coils 204d. The electron beam tool 104 may additionally include an energy dispersive X-ray spectrometer (EDS) detector (not shown in the figure) to characterize materials on the wafer 203. A primary electron beam 220 is emitted from the cathode 218 by applying an accelerating voltage between the anode 216 and the cathode 218. The primary electron beam 220 passes through the gun aperture 214 and the beam limiting aperture 212, and both can determine the size of the electron beam entering the condenser lens 210 stored below the beam limiting aperture 212. The condenser lens 210 focuses the primary electron beam 220 before the beam enters the objective aperture 208 to set the size of the electron beam before entering the objective assembly 204. The deflector 204c deflects the primary electron beam 220 to facilitate beam scanning on the wafer. For example, in the scanning process, the deflector 204c can be controlled to sequentially deflect the primary electron beam 220 to different positions on the top surface of the wafer 203 at different time points to provide data for image reconstruction of different parts of the wafer 203. In addition, the deflector 204c can also be controlled to deflect the primary electron beam 220 to different sides of the wafer 203 at specific positions at different time points to provide data for three-dimensional image reconstruction of the wafer structure at that position. Additionally, in some embodiments, the anode 216 and the cathode 218 can generate multiple primary electron beams 220, and the electron beam tool 104 can include a plurality of deflectors 204c to simultaneously project the multiple primary electron beams 220 to different parts / sides of the wafer to provide data for image reconstruction of different parts of the wafer 203. The excitation coil 204d and the pole piece 204a generate a magnetic field that starts at one end of the pole piece 204a and terminates at the other end of the pole piece 204a. A portion of the wafer 203 being scanned by the primary electron beam 220 can be immersed in the magnetic field and can be charged, which in turn generates an electric field. The electric field reduces the energy of the primary electron beam 220 impinging on the surface of the wafer 203 before the primary electron beam 220 collides with the wafer 203. The control electrode 204b electrically isolated from the pole piece 204a controls the electric field on the wafer 203 to prevent micro-arching of the wafer 203 and ensure proper beam focusing. After receiving the primary electron beam 220, secondary electron beams 222 can be emitted from portions of the wafer 203. The secondary electron beams 222 can form beam spots on the sensor surfaces 206a and 206b of the electron detector 206. The electron detector 206 can generate a signal (e.g., voltage, current, or the like) representing the intensity of the beam spots and provide the signal to the image processing system 250. The intensity of the secondary electron beams 222 and the resulting beam spots can vary according to the external or internal structure of the wafer 203. In addition, as discussed above, the primary electron beam 220 can be projected to different positions on the top surface of the wafer or different sides of the wafer at specific positions to generate secondary electron beams 222 (and the resulting beam spots) with different intensities. Therefore, by mapping the intensity of the beam spots to the positions of the wafer 203, the processing system can reconstruct an image reflecting the internal or surface structure of the wafer 203. The imaging system 200 can be used to detect the wafer 203 on the automated sample stage 201 and includes an electron beam tool 104, as discussed above. The imaging system 200 may also include an image processing system 250, which includes an image acquirer 260, a storage 270, and a controller 109. The image acquirer 260 may include one or more processors. For example, the image acquirer 260 may include a computer, a server, a mainframe computer, a terminal, a personal computer, any kind of mobile computing device and the like, or a combination thereof. The image acquirer 260 can be connected to the detector 206 of the electron beam tool 104 via a medium such as a conductor, an optical fiber cable, a portable storage medium, IR, Bluetooth, the Internet, a wireless network, radio, or a combination thereof. The image acquirer 260 can receive signals from the detector 206 and can construct an image. The image acquirer 260 can thus acquire an image of the wafer 203. The image acquirer 260 can also perform various post-processing functions, such as generating contours, superimposing indicators on the acquired image, and the like. The image acquirer 260 can perform adjustments to the brightness and contrast of the acquired image or the like. The storage 270 can be a storage medium such as a hard disk, cloud storage, random access memory (RAM), other types of computer-readable memory, etc. The storage 270 can be coupled to the image acquirer 260 and can be used to store the scanned raw image data as a raw image and a post-processed image. The image acquirer 260 and the storage 270 can be connected to the controller 109. In some embodiments, the image acquirer 260, the storage 270, and the controller 109 can be integrated together as one control unit. In some embodiments, the image acquirer 260 can acquire one or more images of the sample based on the imaging signals received from the detector 206. The imaging signals can correspond to a scanning operation for performing charged particle imaging. The acquired images can be a single image including a plurality of imaging regions. The single image can be stored in the storage 270. The single image can be a raw image that can be divided into a plurality of regions. Each of the regions can include one imaging region containing features of the wafer 203. As explained with respect to FIGS. 3A, 3B, 4A, and 4B, the elimination of the electric field distortion is achieved in the following two steps: 1) by closing the gap between the wafer and the HV ring, and 2) by adjusting the x-y position (including height) of the conductive ring such that both the wafer and the conductive ring are at the same level. The zero gap between the wafer and the conductive ring and the same height of the wafer and the conductive ring ultimately allow both to be supplied with the same potential. The same potential extends the continuity of the electric field that is the same as the electric field of the wafer, thereby generating a uniform electric field at the wafer edge. FIG. 3A is an illustration of a top view of an example system in accordance with some embodiments of the present invention during wafer loading. Shown in FIG. 3A are a wafer stage 301, a wafer 303, and four segments 302-1, 302-2, 303-3, 302-4 of a conductive ring 302. It should be understood that the conductive ring 302 has an inner portion and an outer portion. The inner portion of the conductive ring is the portion closer to the wafer 303 where any distortion of the electric field on the inner portion of the conductive ring 302 has a greater impact on the electric field of the outer portion of the wafer 303. The outer portion of the conductive ring is the portion away from the wafer, and any distortion of the electric field on the outer portion of the conductive ring 302 has a small (if any) impact on the electric field on the outer portion of the wafer 303. Also shown is an inner circle 301-1 of the wafer stage 301, which encloses the wafer 303 and the conductive ring 302. The gap between the inner circle 301-1 of the wafer and the conductive ring segments (302-1, 302-2, 302-3, 302-4) is depicted by 301-2. Similarly, the gap between the conductive ring segments (302-1, 302-2, 302-3, 302-4) and the wafer 303 is depicted by 301-3. The thickness of the conductive ring is depicted by "d". The thickness d is large enough such that the edge of the wafer 303 is far enough from the inner circle 301-1 to minimize the impact on the wafer edge electric field. In some embodiments, the thickness d can be a few millimeters or a few micrometers or any suitable value depending on design considerations. It should be understood that the thickness d is predefined. In some embodiments, during the loading of the wafer 303, the wafer stage 301 remains stationary. The four segments (302-1, 302-2, 302-3 and 302-4) of the conductive ring 302 then move radially outward towards the inner circle 301-1 of the wafer stage 301 by leaving a sufficient gap, depicted by 301-3, between the wafer and the conductive ring 302. The conductive ring segments can move individually or all at once or in any combination. This helps to avoid collisions with the edge of the wafer 303. To avoid any potential collisions, the conductive ring 302 segments maintain a gap 301-2 with the inner circle 301-1 at multiple positions. After the wafer 303 is loaded, the four segments (302-1, 302-2, 302-3, 302-4) of the conductive ring can move radially inward towards the wafer 303 such that the gap 301-3 therebetween is substantially negligible. Although it is preferred that there is no gap or there is a zero gap between the conductive ring 302 and the wafer 303 and between adjacent segments (302-1, 302-2, 302-3, 302-4) of the conductive ring 302, it should be understood that some gap or gaps may occur due to manufacturing defects, design constraints, and objectives. In some embodiments, the disclosed system is designed to have a gap tolerance of 1 to 10% of the gap size, which is measured in micrometers. A top view of the disclosed system after the wafer 303 is loaded is shown in FIG. 3B. As can be seen, since the conductive ring segments have been moved to be closer to the wafer 303, the gap 301-3 between the segments and the wafer 303 is substantially minimized (e.g., a gap of zero or a few microns). In some embodiments, to avoid wafer collisions, the gap range can be from 1 to 10 microns. Generally speaking, a gap between 5 and 10 microns (the upper limit of this range) may be suitable for inspection applications with less stringent image quality requirements. A gap between 1 and 5 microns (the lower limit of this range) may be suitable for metrology applications that require higher image quality or more stringent image quality requirements. In some embodiments, since the gap 301-3 can be completely closed, the conductive ring segments 302-1, 302-2, 302-3, 302-4 are designed to have the same inner curvature radius as the wafer 303. In addition, the gap 301-2 between the inner circle and the conductive ring segments is larger in FIG. 3B than the gap in FIG. 3A. In addition, the conductive ring 302 can be supplied with the same potential as the wafer 303, thereby extending the continuity of the electric field above the segments from the edge of the wafer 303. More details about this will be explained with respect to FIGS. 4A and 4B. Although FIGS. 3A and 3B show a conductive ring with four segments, it should be understood that any number of segments can be used. For example, the minimum number of segments can be two. In addition, it should be understood that some of the segments can be in a fixed position. For example, it should be understood that the segment 302-4 can be in a fixed position with respect to the radial direction, while the other segments (i.e., segments 302-1, 302-2, and 302-3) can move radially inwards and outwards. The procedure of moving the conductive ring 302 as described above can be referred to as a conductive ring adjustment procedure. In some embodiments, to save the time required for the conductive ring adjustment procedure, there can be two sets of wafer stages, a first wafer stage for performing electron beam inspection and a second wafer stage for performing wafer loading and conductive ring adjustment procedures in parallel. That is, the wafer in the first wafer stage can undergo electron beam inspection, while the wafer in the second wafer stage can undergo wafer loading and conductive ring adjustment procedures. It should be understood that after the wafer in the first wafer stage has undergone electron beam inspection, the conductive ring can be adjusted to remove the wafer, and the first wafer stage can be moved to the wafer loading position for loading the next wafer. At the same time range, the second wafer stage can be positioned for inspection after undergoing the conductive ring adjustment procedure. FIG. 4A illustrates a cross-sectional view of the system after the wafer 303 has been loaded and the gap 301-3 between the conductive ring segment 302-2 and the wafer 303 has been substantially closed. FIG. 4A shows the wafer 303 placed on the electronic chuck 401 and the conductive ring segment 302-2 placed on the adjustable assembly 402. The electronic chuck 301 is used to apply the required potential to the wafer 303. In some embodiments, the assembly 402 can move in any direction along the x, y, or z axis relative to the wafer 303 and the wafer stage 301. The mechanism is adjusted in such a way that the x-y position of the conductive ring 302 is substantially similar to the x-y position of the top surface of the wafer 303. It should be understood that at this time, in the process, there is no gap between the wafer edge 407 and the conductive ring segment 302-2, and the tops of both the wafer 303 and the conductive ring segment 302-2 have substantially the same height. In other words, the top surfaces of both the conductive ring 302 and the wafer are substantially coplanar. Although preferably, the conductive ring 302, the wafer 303, and all adjacent segments (302-1, 302-2, 302-3, 302-4) of the conductive ring 302 are in exactly the same x-y position, it should be understood that some difference in the x-y position can occur due to manufacturing defects, design constraints, etc. In some embodiments, the disclosed system is designed to have an x-y position tolerance of less than one micron. In some embodiments, the disclosed system can include at least one position sensor to sense the x-y position of the conductive ring segment 302-2. The position sensor can send a control signal to the assembly 402, and the control signal indicates whether the x-y position is less than or greater than the x-y position of the wafer 303. As explained earlier, the x-y position can include height. After sensing a height lower than or higher than that of the wafer 303, the assembly can move up or down until the height of the conductive ring 302-2 becomes substantially equal to the height of the wafer 303. At this stage in the process, the same voltage can be supplied to the conductive ring 302 and the wafer 303, so that the potential distribution near the wafer edge 307 can be more uniform, and the details will be explained with respect to FIG. 4B. Figure 4B illustrates the potential distributions 406 (406-1 and 406-2) on the wafer 303 and the conductive ring 302. The potential distribution 406-2 represents a more uniform potential, while the potential distribution 406-1 represents a non-uniform (distorted) potential. As can be seen, there is a more uniform potential distribution 406-2 at the top of the wafer 303 and the conductive ring 302. The non-uniform potential distribution 406-1 is in the gap 301-2, which is far from the wafer 303 and especially far from the wafer edge 407. Therefore, when detecting near the wafer edge, the non-uniform potential distribution 406-1 has a smaller impact on the charged particle beam performance. In other words, since the gap 301-2 is far from the wafer edge 407, the non-uniform potential distribution 406-1 and the resulting edge electric field effect on the charged particle beam can be minimized or eliminated. FIG. 5 is a schematic diagram illustrating an example controller and an example sensor coupled to work with the system of FIGS. 3A, 3B, 4A, or 4B in accordance with some embodiments of the present invention. As will be explained with respect to FIG. 5, in some embodiments, a controller including a voltage sensing unit and a position sensing unit may be implemented in the disclosed system. The voltage sensing unit, together with other circuits, can be used to ensure that the voltage applied to the conductive ring 302 is substantially the same as the voltage of the wafer 303. In some examples, the two voltages can be adjusted independently of each other by circuits. Similarly, the position sensing unit can be used to ensure that the x-y position of the conductive ring 302 is the same as the x-y position of the wafer 302. As depicted in FIG. 5, the system 500 includes a controller 502 configured to obtain information from the wafer 303 and the conductive ring 302. The controller 502 is also configured to ensure that the conductive ring 302 is in the same x-y position as the x-y position of the wafer, and to apply the same voltage as the voltage of the wafer 303. The controller 502 may include a voltage sensing unit 516, a voltage control unit 506, a position sensing unit 514, a position control unit 504, and error amplifiers 508 and 510. The voltage sensing unit 516, the error amplifier 510, and the voltage control unit 506 form a feedback loop for controlling the voltage of the conductive ring 302 or the voltage of the wafer 303 or both to assist in providing a substantially uniform electric field across the outer portions of the conductive ring 302 and the wafer 303 (including the wafer edge 407). Similarly, the position sensing unit 514, the error amplifier 508, and the position control unit 504 can form a feedback loop for controlling the x-y position of the conductive ring 302 and the gap between the conductive ring and the edge of the wafer to assist in providing a substantially uniform electric field across the outer portions of the conductive ring 302 and the wafer 303 (including the wafer edge 407). The voltage sensing unit 516 may include a first sensor for sensing the wafer voltage and a second voltage sensor for sensing the conductive ring. In other examples, there may be a single sensor for sensing either the voltage or the difference between voltages. In some other examples, there may be a plurality of sensors. The controller 502 may be configured to obtain wafer voltage information from the first voltage sensor and conductive ring voltage information from the second voltage sensor. Generally, the voltage sensing unit 516 may sense the voltages of the wafer 303 and the conductive ring 302 and generate a voltage sensing signal 501 representing the voltage of the wafer 303 and a conductive ring voltage signal 503 representing the voltage of the conductive ring. The two signals may be fed to the error amplifier 510. The voltages of the wafer 303 and the conductive ring 302 may be sensed using any commonly known method known in the art, such as via an optical coupler. It should be understood that the error amplifier 510 may generate an error voltage 505 proportional to the difference between the voltages of the wafer 303 and the conductive ring 302. The error voltage 505 is fed to the voltage control unit 506, which may adjust the voltage of the conductive ring 302 (as depicted by the signal 507) by increasing or decreasing the voltage to substantially make the error voltage 505 equal to zero. The voltage control unit 506 may also adjust the voltage of the wafer 303 (as depicted by the signal 521) by increasing or decreasing the voltage to substantially make the error voltage 505 equal to zero. It should be understood that a zero error voltage may indicate that the voltage of the conductive ring 302 is the same or substantially the same as the voltage of the wafer 303. In other words, a zero error voltage may be an indication that there is no distortion in the electric field near the wafer edge 407 of the wafer 303. In addition, the controller 502 may be further configured to obtain wafer x-y position information and conductive ring x-y position information from the position sensing unit 514. The controller 502 may be further configured to adjust the x-y position of the conductive ring 302 by moving the conductive ring 302 up or down, or to adjust the x-y position of the wafer 303 by moving the wafer 303 up or down, such that the top surface of the conductive ring 302 is at least substantially coplanar with the top surface of the wafer 303. In some examples, the controller 502 may use its internal circuit to obtain the wafer x-y position information and the conductive ring x-y position information as illustrated by the following exemplary implementation. In some embodiments, the position sensing unit 514 may include a plurality of sensors. In some embodiments, a first position sensor may be coupled to sense the level of the wafer 303 to generate a wafer position signal 511. The position sensing unit 514 may include a second position sensor to sense the level of the conductive ring 302 to generate a conductive ring position signal 513. Both the wafer position sensing signal 511 and the conductive ring position sensing signal 513 may be provided to the error amplifier 508. The positions of the wafer 303 and the conductive ring 302 may be sensed using any commonly known method in the art, such as via a position or motion sensor that can convert the position into an electrical signal such as voltage or current. It should be understood that the error amplifier 508 may generate an error voltage 515 proportional to the difference between the positions of the wafer 303 and the conductive ring 302. The error voltage 515 may be fed to the position control unit 504, which may adjust the position of the conductive ring 302 (as depicted by signal 517) by increasing or decreasing the conductive ring 302 to substantially make the error voltage 515 equal to substantially zero. The position control unit 504 may also adjust the position of the wafer 303 (as depicted by signal 519) by increasing or decreasing the wafer 303 to substantially make the error voltage 515 equal to substantially zero. It should be understood that a zero error voltage may indicate that the position of the conductive ring 302 is substantially the same as the position of the wafer 303. In other words, a zero error voltage may be an indication that there is a substantially uniform electric field near the edge of the wafer. The controller 502 may include other circuitry or hardware or software (not shown in the figure) for controlling the voltage and position of the conductive ring 302. For example, the controller may have a software look-up table that may include entries corresponding to the error voltages 505 and 515. The voltage control unit 506 and the position control unit 504 may use the look-up table entries to adjust the voltage or position of the conductive ring 302. In some embodiments, the conductive ring 302 and the mechanical assembly 402 may be made of a variety of materials, including non-magnetic metal materials such as titanium, aluminum, etc., or insulating materials with a non-magnetic metal coating. It should be noted that voltage sensing may include sensing any type of electrical characteristic, such as direct current (dc) or alternating current (ac). Dc circuits or ac circuits may be used in the present invention without falling outside the scope of the present invention. FIG. 6 is a flowchart illustrating an example method 600 for wafer grounding in accordance with some embodiments of the present invention. The method 600 may be performed by a controller that may be coupled to a charged particle beam device (e.g., the EBI system 100). For example, the controller may be the controller 109 in FIG. 2 or the controller 502 in FIG. 5. The controller may be programmed to implement the method 600. At step 610, the wafer can be placed on the stage and the electronic chuck. The wafer can be the wafer 303 in FIG. 3A. To provide more space for placing the wafer, one or more segments (e.g., segments 302-1, 302-2, 302-3, and 302-4 in FIG. 3A) can move radially outward. At step 620, one or more segments of the conductive ring (e.g., segments 302-1, 302-2, 302-3, and 302-4 in FIG. 3B) can move radially inward to surround the wafer until a predetermined gap is achieved between the inner circle, the conductive ring segments, and the wafer. At step 630, voltage sensing data and position sensing data can be acquired to determine whether the position or voltage of the conductive ring needs to be adjusted or whether the position or voltage of the wafer needs to be adjusted. For example, referring back to FIG. 5, the wafer voltage sensing signal 501 and the conductive ring voltage sensing signal 503 from the voltage sensing unit 516 can be acquired by the controller 502. Similarly, the wafer position sensing signal 511 and the conductive ring position sensing signal 513 from the position sensing unit 514 can be acquired by the controller 502. At step 640, it can be checked whether the position of the conductive ring or the wafer needs to be adjusted. If so, the method can proceed to step 660. If not, the method can return to step 630 to check whether position sensing data is acquired. At step 650, it can be checked whether the voltage of the conductive ring or the wafer needs to be adjusted. If so, the method can proceed to step 670. If not, the method can return to step 630 to check whether position sensing data is acquired. Steps 640 and 650 can be executed serially or in parallel or in any combination in any order based on design considerations and system performance. At step 660, the position of the conductive ring 302 can be adjusted relative to the wafer such that the top surfaces of the conductive ring and the wafer are coplanar. For example, referring back to FIG. 5, the controller 502 can use the error amplifier 508 and the position control unit 504 to increase or decrease the position of the conductive ring based on the error voltage 515 and by increasing or decreasing the position signal 517. The controller 502 can use the error amplifier 508 and the position control unit 504 to increase or decrease the position of the wafer based on the error voltage 515 and by increasing or decreasing the position signal 519. At step 670, the voltage of the conductive ring 302 can be adjusted to generate a uniform potential distribution on its surface. For example, referring back to FIG. 5, the controller 502 can use the error amplifier 510 and the voltage control unit 506 to increase or decrease the voltage of the conductive ring based on the error voltage 505. Step 670 will be explained in more detail in FIG. 7. FIG. 7 is a flowchart of an exemplary method 700 for generating a substantially uniform electric field near the wafer edge in accordance with some embodiments of the present invention. Specifically, method 700 details step 670 of FIG. 6. At step 710, the voltage of the wafer can be sensed using a sensor (e.g., the voltage sensing unit 516 shown in FIG. 5) to generate a first sensed voltage. At step 720, the voltage of the conductive ring can be sensed using a sensor (e.g., the voltage sensing unit 516 shown in FIG. 5) to generate a second sensed voltage. At step 730, the first sensed voltage and the second sensed voltage can be compared by a controller (e.g., the controller 502 shown in FIG. 5), and an error voltage (e.g., the error voltage 505 shown in FIG. 5) proportional to the difference between the two voltages can be generated. At step 740, the error voltage (e.g., the error voltage 505 shown in FIG. 5) can be provided to a feedback loop to increase or decrease the voltage of the conductive ring (e.g., signal 507) or increase or decrease the voltage of the wafer (e.g., signal 521) to make the error voltage substantially zero. It should also be noted that the devices and systems described in connection with FIGS. 1-7 are not limited to use in wafer inspection. In fact, the devices and systems can be used in any system or device that includes a high voltage section and an adjustable mechanical assembly and has a need for elimination of any distortion for a uniform voltage distribution or near the wafer edge. For example, such a system or device can include, but is not limited to, a SEM, a transmission electron microscope (TEM), or an X-ray machine. A non-transitory computer-readable medium storing instructions for a processor (e.g., the processor of the controller 109 of FIG. 1) can be provided, the instructions for performing operations of image processing, data processing, database management, graphics display, charged particle beam equipment, or another imaging device, performing wafer inspection, moving the conductive ring radially outward to create space to place the wafer on the stage, placing the wafer on the stage, moving the conductive ring radially inward until the conductive ring is within a predetermined distance from the wafer edge, sensing the voltages of the conductive ring and the wafer, sensing the positions of the conductive ring and the wafer, adjusting the voltage of the conductive ring equal to the voltage of the wafer to generate a substantially uniform electric field, adjusting the position of the conductive ring equal to the position of the wafer so that the top surfaces of both are coplanar, etc. Common forms of non-transitory media include, for example: floppy disks, flexible disks, hard disks, solid state hard disks, magnetic tapes, or any other magnetic data storage media; CD-ROMs; any other optical data storage media; any physical media with a hole pattern; RAM, PROM, and EPROM; FLASH-EPROM or any other flash memory; NVRAM; cache memory; registers; any other memory chip or cartridge; and their networked versions. The embodiments can be further described using the following terms: 1. A method for detecting a wafer, the method comprising: placing the wafer at a position on a stage; moving one or more movable segments of a conductive ring inward in a radial direction such that the conductive ring can be within a predetermined distance from an edge of the wafer; and adjusting a voltage applied to the conductive ring such that the voltage applied to the conductive ring can be substantially equal to the voltage applied to the wafer to provide a substantially uniform electric field across an inner portion of the conductive ring and an outer portion of the wafer. 2. The method of item 1, further comprising: moving the conductive ring radially outward to increase an area of a position on the stage for placing the wafer. 3. The method of any one of items 1 and 2, wherein the conductive ring includes one or more fixed segments, and wherein moving the one or more movable segments inward in a radial direction further comprises: moving the one or more movable segments in a second radial direction such that the wafer can be within a predetermined distance from the one or more fixed segments. 4. The method of any one of items 1 to 3, wherein the conductive ring is supported by a mechanical assembly. 5. The method of item 4, wherein the mechanical assembly includes a separate mechanical assembly for each segment of the conductive ring. 6. The method of item 4, further comprising: using the mechanical assembly to adjust a height of the conductive ring such that a top surface of the conductive ring is substantially coplanar with a top surface of the wafer. 7. The method of any one of items 1 to 6, further comprising: obtaining wafer voltage information to generate a first sensed voltage, obtaining conductive ring voltage information to generate a second sensed voltage, comparing the first sensed voltage and the second sensed voltage by a controller, and adjusting the voltage applied to the conductive ring or the voltage applied to the wafer based on the comparison. 8. The method of item 7, wherein adjusting the voltage applied to the conductive ring or the voltage applied to the wafer based on the comparison further comprises: increasing or decreasing the voltage applied to the conductive ring to be substantially similar to the voltage applied to the wafer. 9. The method of item 7, wherein adjusting the voltage applied to the conductive ring or the voltage applied to the wafer based on the comparison further comprises: increasing or decreasing the voltage applied to the wafer to be substantially similar to the voltage applied to the conductive ring. 10. The method of item 7, further comprising: obtaining the wafer voltage information by a first voltage sensor, and obtaining the conductive ring voltage information by a second voltage sensor. 11. The method according to any one of clauses 1 to 10 further comprises: adjusting the height of the conductive ring by moving the one or more movable segments of the conductive ring in an upward direction. 12. The method according to any one of clauses 1 to 11 further comprises: adjusting the height of the conductive ring by moving the one or more movable segments of the conductive ring in a downward direction. 13. The method according to any one of clauses 11 and 12 further comprises: obtaining wafer height information from a first position sensor. 14. The method according to any one of clauses 11 and 12 further comprises: obtaining conductive ring height information from a second position sensor. 15. A system for detecting a wafer, the system comprising: a stage configured to support a wafer having a wafer edge; a conductive ring of the stage, the conductive ring comprising: one or more movable segments configured to move radially inwardly to enable the conductive ring to move within a predetermined distance from the wafer edge; and a controller including circuitry configured to adjust a voltage applied to the conductive ring or a voltage applied to the wafer such that the voltage applied to the conductive ring is substantially similar to the voltage applied to the wafer to provide a substantially uniform electric field across an inner portion of the conductive ring and an outer portion of the wafer. 16. The system according to clause 15, wherein the conductive ring is configured to move radially outward to increase an area of a position on the stage for placing the wafer. 17. The system according to any one of clauses 15 and 16, wherein the conductive ring is supported by a mechanical assembly. 18. The system according to clause 17, wherein the mechanical assembly includes a separate mechanical assembly for each segment of the conductive ring. 19. The system according to any one of clauses 15 to 18, wherein the conductive ring includes one or more fixed segments fixed in a radial direction, and wherein the one or more movable segments are movable in a radial direction and configured to enable the wafer to be within the predetermined distance from the one or more fixed segments. 20. The system according to any one of clauses 15 to 19, wherein the predetermined distance is a few micrometers. 21. The system according to any one of clauses 15 to 20, wherein the controller includes circuitry configured to adjust the voltage applied to the conductive ring and the voltage applied to the wafer independently of each other. 22. The system of clause 17, wherein the mechanical assembly is configured to move the conductive ring upward or downward such that the height of a top surface of each of the plurality of segments is substantially coplanar with a top surface of the wafer. 23. The system of clause 18, wherein the mechanical assembly is configured to move each of the plurality of segments upward. 24. The system of clause 18, wherein the mechanical assembly is configured to move each of the plurality of segments downward. 25. The system of any one of clauses 15 to 24, wherein: the controller includes circuitry configured to obtain wafer voltage information and generate a first sensed voltage; wherein the controller includes circuitry configured to obtain conductive ring voltage information and generate a second sensed voltage; and wherein the controller includes circuitry configured to adjust the voltage applied to the conductive ring or the voltage applied to the wafer based on a comparison of the first sensed voltage and the second sensed voltage. 26. The system of clause 25, wherein the controller includes circuitry configured to adjust the voltage applied to the conductive ring or the voltage applied to the wafer to provide a substantially uniform electric field across the one or more movable segments and the outer portion of the wafer. 27. The system of any one of clauses 15 to 26, wherein the one or more movable segments abut each other when moving radially inward. 28. The system of any one of clauses 15 to 27, wherein when the conductive ring is closed, an inner radius of curvature is substantially similar to a radius of the wafer. 29. The system of any one of clauses 15 to 28, wherein each of the one or more movable segments has a predefined thickness. 30. The system of clause 25, wherein to obtain the wafer voltage information, the controller includes circuitry configured to sense the wafer voltage via a first voltage sensor. 31. The system of clause 25, wherein to obtain the conductive ring voltage information, the controller includes circuitry configured to sense the conductive ring voltage via a second voltage sensor. 32. A system for detecting a wafer, the system comprising: a stage configured to support a wafer having a wafer edge; a conductive ring of the stage, the conductive ring comprising: one or more movable segments configured to move radially outward to increase an area of a position on the wafer holder to place the wafer and configured to move radially inward to enable the conductive ring to move within a predetermined distance from the wafer edge; a controller including circuitry configured to adjust a height of the one or more movable segments of the conductive ring or a height of the wafer such that a top surface of the conductive ring can be substantially coplanar with a top surface of the wafer. 33. The system of clause 32, wherein the conductive ring is configured to move radially outward to increase an area of a position on the stage to place the wafer. 34. The system of any one of clauses 32 and 33, wherein the conductive ring is supported by at least one mechanical assembly. 35. The system of clause 34, wherein the mechanical assembly includes a separate mechanical assembly for each segment of the conductive ring. 36. The system of any one of clauses 32 to 35, wherein the conductive ring includes one or more fixed segments fixed in a radial direction, and wherein the one or more movable segments are movable in a radial direction and configured to enable the wafer to move within the predetermined distance from the one or more segments. 37. The system of any one of clauses 32 to 36, wherein the controller includes circuitry configured to provide a substantially uniform electric field across an inner portion of the conductive ring and an outer portion of the wafer. 38. The system of any one of clauses 32 to 37, wherein the predetermined distance is a few micrometers. 39. The system of any one of clauses 32 to 38, wherein the controller includes circuitry configured to adjust to move the conductive ring up or down such that a height of a top surface of each of the plurality of segments is substantially coplanar with a top surface of the wafer. 40. The system of clause 34, wherein the mechanical assembly is configured to move each of the plurality of segments upward. 41. The system of clause 34, wherein the mechanical assembly is configured to move each of the plurality of segments downward. 42. The system of any one of clauses 32 to 41, wherein the one or more movable segments abut against each other when moving radially inward. 43. The system of clause 36, wherein when the wafer is within the predetermined distance from the one or more segments, an inner radius of a curvature of the conductive ring is substantially similar to a radius of the wafer. 44. A system as in any one of clauses 32 to 43, wherein each of the one or more movable segments has a predefined thickness. 45. A system as in any one of clauses 32 to 44, wherein: the controller includes circuitry configured to obtain wafer height information and generate a first sensed height; wherein the controller includes circuitry configured to obtain conductive ring height information and generate a second sensed height; and wherein the controller includes circuitry configured to adjust the conductive ring height or the wafer height based on a comparison of the first sensed height and the second sensed height, and further correct a difference therebetween. 46. The system of clause 45, wherein, in order to obtain the wafer height information, the controller includes circuitry configured to sense a wafer height via a first position sensor. 47. The system of clause 45, wherein, in order to obtain the conductive ring height information, the controller includes circuitry to sense the conductive ring height via a second position sensor. 48. A non-transitory computer-readable medium storing a set of instructions executable by at least one processor of a device to cause the device to perform a method, the method comprising: placing a wafer at a position on a stage; moving one or more movable segments of a conductive ring inward in a radial direction so that the conductive ring can be within a predetermined distance from an edge of the wafer; and adjusting a voltage applied to the conductive ring or a voltage applied to the wafer such that the voltage applied to the conductive ring can be substantially equal to the voltage applied to the wafer to provide a substantially uniform electric field across an inner portion of the conductive ring and an outer portion of the wafer. 49. The non-transitory computer-readable medium of clause 48, wherein the set of instructions executable by the at least one processor causes the device to further perform the following operation: moving the one or more movable segments of the conductive ring radially outward to increase an area at a position on the stage for placing the wafer. 50. The non-transitory computer-readable medium of any one of clauses 48 and 49, wherein the set of instructions executable by the at least one processor causes the device to further perform the following operation: moving the one or more movable segments inward in a radial direction, which further includes: moving the one or more movable segments in a second radial direction so that the wafer can be within a predetermined distance from one or more fixed segments included in the conductive ring. 51. The non-transitory computer-readable medium of any one of clauses 48 to 50, wherein the conductive ring is supported by a mechanical assembly. 52. A non-transitory computer-readable medium as in any one of clauses 48 to 51, wherein each of the one or more movable segments of the conductive ring is supported by a separate mechanical assembly. 53. A non-transitory computer-readable medium as in clause 50, wherein the conductive ring includes one or more fixed segments fixed in a radial direction, and wherein the set of instructions executable by the at least one processor causes the device to further perform the following operations: move the one or more movable segments in a radial direction so that the wafer can be within a predetermined distance from the one or more fixed segments. 54. A non-transitory computer-readable medium as in clause 51, wherein the set of instructions executed by the at least one processor causes the device to further perform the following operations: configure the mechanical assembly to move the one or more movable segments of the conductive ring upward or downward, or to make the height of the top surface of each of the one or more movable segments substantially coplanar with the top surface of a wafer. 55. A non-transitory computer-readable medium as in any one of clauses 48 to 54, wherein the set of instructions executable by the at least one processor causes the device to further perform the following operations: obtain wafer voltage information to generate a first sensed voltage, obtain conductive ring voltage information to generate a second sensed voltage, compare the first sensed voltage with the second sensed voltage by a controller, and adjust the voltage applied to the conductive ring or the voltage applied to the wafer based on the comparison. 56. A non-transitory computer-readable medium as in clause 53, wherein the set of instructions executable by the at least one processor causes the device to further perform the following operations: increase or decrease the voltage applied to the conductive ring to be substantially similar to the voltage applied to the wafer. 57. A non-transitory computer-readable medium as in clause 54, wherein the set of instructions executable by the at least one processor causes the device to further perform the following operations: increase or decrease the voltage applied to the wafer to be substantially similar to the voltage applied to the conductive ring. 58. A non-transitory computer-readable medium as in clause 55, wherein the set of instructions executable by the at least one processor causes the device to further perform the following operations: obtain the wafer voltage information by a first voltage sensor and obtain the conductive ring voltage information by a second voltage sensor. 59. A non-transitory computer-readable medium as in clause 52, wherein the set of instructions executable by the at least one processor causes the device to further perform the following operations: adjust the height of the one or more movable segments of the conductive ring by moving the conductive ring in an upward direction. 60. The non-transitory computer-readable medium as recited in clause 52, wherein the set of instructions executable by the at least one processor causes the device to further perform the following operations: adjusting the height of one or more movable segments of the conductive ring by moving the one or more movable segments of the conductive ring in a downward direction. 61. The non-transitory computer-readable medium as recited in clause 48, wherein the set of instructions executable by the at least one processor causes the device to further perform the following operations: obtaining wafer height information from a first position sensor. 62. The non-transitory computer-readable medium as recited in clause 48, wherein the set of instructions executable by the at least one processor causes the device to further perform the following operations: obtaining conductive ring height information from a second position sensor. 63. A method for detecting a wafer, the method comprising: placing the wafer at a position on a stage; moving one or more movable segments of a conductive ring inward in a radial direction so that the conductive ring can be within a predetermined distance from an edge of the wafer; and adjusting a height of the conductive ring or a height of the wafer so that a top surface of the conductive ring can be substantially coplanar with a top surface of the wafer. 64. A non-transitory computer-readable medium storing a set of instructions executable by at least one processor of a device to cause the device to perform a method, the method comprising: placing a wafer at a position on a stage; moving one or more movable segments of a conductive ring inward in a radial direction so that the conductive ring can be within a predetermined distance from an edge of the wafer; and adjusting a height of the one or more movable segments of the conductive ring or a height of the wafer so that a top surface of the conductive ring can be substantially coplanar with a top surface of the wafer. The block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer hardware or software products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, segment, or portion of code that includes one or more executable instructions for implementing a specified logical function. It should be understood that in some alternative implementations, the functions indicated in the blocks may not occur in the order mentioned in the figures. For example, depending on the functionality involved, two blocks shown in succession may be executed or implemented substantially simultaneously, or the two blocks may sometimes be executed in the reverse order. Some blocks may also be omitted. It should also be understood that each block of the block diagrams and combinations of these blocks may be implemented by a system based on dedicated hardware that performs the specified functions or actions, or by a combination of dedicated hardware and computer instructions. It should be understood that the embodiments of the present invention are not limited to the exact construction described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from the scope of the present invention. 100: Exemplary Electron Beam Inspection (EBI) System 101: Main Chamber 102: Load / Lock Chamber 104: Beam Tool 106: Equipment Front End Module (EFEM) 106a: First Loading Port 106b: Second Loading Port 109: Controller 200: Example Imaging System 201: Automated Stage 202: Wafer Holder 203: Wafer 204: Objective Assembly 204a: Pole Piece 204b: Control Electrode 204c: Deflector 204d: Excitation Coil 206: Electron Detector 206a: Electron Sensor Surface 206b: Electron Sensor Surface 208: Objective Aperture 210: Condenser Lens 212: Beam Limiting Aperture 214: Gun Aperture 216: Anode 218: Cathode 220: Primary Electron Beam 222: Secondary Electron Beam 250: Image Processing System 260: Image Acquirer 270: Storage 301: Wafer Stage 301-1: Inner Circle 301-2: Gap 301-3: Gap 302: Conductive Ring 302-1: Segment 302-2: Segment 302-3: Segment 302-4: Segment 303: Wafer 401: Electron Clamp 402: Adjustable Mechanical Assembly 406: Potential Distribution 406-1: Potential Distribution 406-2: Potential Distribution 407: Wafer Edge 500: System 501: Voltage Sensing Signal 502: Controller 503: Conductive Ring Voltage Signal 504: Position Control Unit 505: Error Voltage 506: Voltage Control Unit 507: Signal 508: Error Amplifier 510: Error Amplifier 511: Wafer Position Signal 513: Conductive Ring Position Signal 514: Position Sensing Unit 515: Error Voltage 516: Voltage Sensing Unit 517: Signal 519: Signal 521: Signal 600: Example Method for Wafer Grounding 610: Step 620: Step 630: Step 640: Step 650: Step 660: Step 670: Step 700: Example Method for Generating a Substantially Uniform Electric Field Near the Wafer Edge 710: Step 720: Step 730: Step 740: Step d: Thickness FIG. 1 is a schematic diagram illustrating an exemplary electron beam inspection (EBI) system in accordance with some embodiments of the present invention. FIG. 2 is a schematic diagram illustrating an exemplary electron beam tool that can be part of the exemplary electron beam inspection system of FIG. 1 in accordance with some embodiments of the present invention. FIG. 3A is an illustration of a top view of an exemplary system during wafer loading in accordance with some embodiments of the present invention. FIG. 3B is an illustration of a top view of an exemplary system after wafer loading in accordance with some embodiments of the present invention. FIG. 4A is an illustration of a cross-sectional view of an example system in accordance with some embodiments of the present invention during wafer loading. FIG. 4B is an illustration of a cross-sectional view of an example system in accordance with some embodiments of the present invention after wafer loading. FIG. 5 is a schematic diagram illustrating an example controller and an example sensor that are coupled to work with the system of FIGS. 3A, 3B, 4A, or 4B in accordance with some embodiments of the present invention. FIG. 6 is a flowchart illustrating an example method for detecting a wafer in accordance with an embodiment of the present invention. FIG. 7 is a flowchart illustrating an example method for eliminating a distorted electric field near a wafer edge in accordance with some embodiments of the present invention. 301: Wafer stage 301-1: Inner circle 301-2: Gap 302: Conductive ring 303: Wafer 401: Electronic chuck 402: Adjustable assembly 406: Potential distribution 406-1: Potential distribution 406-2: Potential distribution 407: Wafer edge

Claims

1. A system for inspecting a wafer, comprising: a stage configured to support a wafer having a wafer edge; a conductive ring of the stage, the conductive ring comprising: one or more movable segments configured to move radially outward to increase a region on a wafer holder for placing the wafer, and configured to move radially inward to enable the conductive ring to move to a predetermined distance from the wafer edge; and a controller including circuitry configured to adjust a height of the one or more movable segments of the conductive ring or a height of the wafer such that a top surface of the conductive ring is substantially co-planar with a top surface of the wafer.

2. The system of claim 1, wherein the conductive ring is configured to move radially outward to increase an area at one position on the stage for placing the wafer.

3. The system of claim 1 or 2, wherein the conductive ring is supported by at least one mechanical assembly.

4. The system of claim 3, wherein the mechanical assembly comprises a separate mechanical assembly for each segment of the conductive ring.

5. The system of claim 1 or 2, wherein the conductive ring comprises one or more fixed sections fixed in a radial direction, and wherein the one or more movable sections are movable in a radial direction and configured to enable the wafer to move to within the predetermined distance of the one or more sections.

6. The system of claim 1 or 2, wherein the controller includes circuitry configured to provide a substantially uniform electric field across an inner portion of the conductive ring and an outer portion of the wafer.

7. The system as requested in item 1 or 2, wherein the predetermined distance is a few micrometers.

8. The system of claim 1 or 2, wherein the controller includes circuitry configured to adjust the conductive ring to move up or down such that the height of one top surface of each of the plurality of segments is substantially coplanar with one top surface of the wafer.

9. The system of claim 3, wherein the mechanical assembly is configured to move each of the plurality of sections upward.

10. A non-transitory computer-readable medium storing a set of instructions executable by at least one processor of a device to cause the device to perform a method comprising: placing a wafer at a position on a stage; moving one or more movable segments of a conductive ring in a radial direction such that the conductive ring is within a predetermined distance from an edge of the wafer; and adjusting a height of the one or more movable segments of the conductive ring or a height of the wafer such that a top surface of the conductive ring is substantially coplanar with a top surface of the wafer.

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