Trench metal-oxide-semiconductor field-effiect transistor

Abstract

This invention discloses a trench-type metal-oxide-semiconductor field-effect transistor. First, a P-type semiconductor and an N-type semiconductor with high doping concentration are embedded in the drift layer by ion implantation. The P-type semiconductor and the N-type semiconductor form an I-type junction at the junction surface. The same and opposite quantum state energy levels generated by the I-type junction can absorb the tunneling electrons between the carriers generated after the device is irradiated and the P and N-type semiconductors. In addition, the effect of overlapping synchronous quantum states generates a large number of quantum state energy levels to absorb carriers, thereby effectively improving the radiation resistance of the device. Furthermore, PIN or NIP diodes can be embedded in different positions in the drift layer to give them different radiation resistance and on-resistance to meet the user's optimal needs.

Claims

1. A trench metal-oxide-semiconductor (MOSFET) comprising: a substrate doped with an N-type conductive dielectric at a high doping concentration; an N-type drift layer formed on the substrate with the N-type conductive dielectric at a low doping concentration; a plurality of P-type well regions formed within the N-type drift layer with the P-type conductive dielectric at a low doping concentration; a plurality of P-type contact regions formed on each of the P-type well regions with the P-type conductive dielectric; a plurality of N-type source regions formed above each of the P-type well regions with the N-type conductive dielectric at a high doping concentration; a plurality of dielectric layers formed above each of the P-type well regions; a plurality of trench gate layers formed on the N-type drift layer; and a plurality of I-type regions embedded in the N-type drift layer and implanted with at least one dopant ion, wherein... The dopant ion in this type I region is an argon ion.

2. The trench metal-oxide-semiconductor field-effect transistor as described in claim 1, wherein, The substrate and the N-type drift layer are made of Si or SiC.

3. A trench metal-oxide-semiconductor (MOSFET) comprising: a substrate doped with an N-type conductive dielectric at a high doping concentration; an N-type drift layer formed on the substrate with the N-type conductive dielectric at a low doping concentration; a plurality of P-type well regions formed within the N-type drift layer with the P-type conductive dielectric at a low doping concentration; a plurality of P-type contact regions formed on each of the P-type well regions with the P-type conductive dielectric; a plurality of N-type source regions formed above each of the P-type well regions with the N-type conductive dielectric at a high doping concentration; and a plurality of dielectric layers formed above each of the P-type well regions. Multiple trench gate layers are formed on the N-type drift layer; and multiple PIN diodes are embedded in the N-type drift layer. Each PIN diode includes a P-type semiconductor and an N-type semiconductor. The N-type semiconductor is embedded on top of the P-type semiconductor, and the P-type semiconductor and the N-type semiconductor are in contact to form an I-type junction.

4. The trench metal-oxide-semiconductor field-effect transistor as described in claim 3, wherein, The substrate and the N-type drift layer are made of Si or SiC.

5. The trench metal-oxide-semiconductor field-effect transistor as described in claim 3, wherein, The P-type conductive medium is composed of boron ions, indium ions, or gallium ions, and the N-type conductive medium is composed of phosphorus ions, arsenic ions, or antimony ions.

6. The trench metal-oxide-semiconductor field-effect transistor as described in claim 3, wherein, At least one of the PIN diodes is embedded in the N-type drift layer, and the PIN diode is embedded in the middle of the N-type drift layer.

7. The trench metal-oxide-semiconductor field-effect transistor as described in claim 3, wherein, At least one of the PIN diodes is embedded in the N-type drift layer, and the N-type semiconductor is adjacently embedded below the trench gate layer.

8. The trench metal-oxide-semiconductor field-effect transistor as described in claim 3, wherein, At least one of the PIN diodes is embedded in the N-type drift layer, and the P-type semiconductor is fabricated on the substrate.

9. The trench metal-oxide-semiconductor field-effect transistor as described in claim 3, wherein, The Type I interface is formed using a single dopant via ion implantation.

10. The trench metal-oxide-semiconductor field-effect transistor as described in claim 9, wherein, The dopant is an argon ion.

11. A trench-type metal-oxide-semiconductor field-effect transistor (MOSFET) comprising: a substrate doped with a high doping concentration of a P-type conductive dielectric; a P-type drift layer extended and formed on the substrate with a low doping concentration of the P-type conductive dielectric; a plurality of N-type well regions, each extended and formed within the P-type drift layer with a low doping concentration of the N-type conductive dielectric; a plurality of N-type contact regions implanted and formed on each of the N-type well regions with the N-type conductive dielectric; a plurality of P-type source regions implanted and formed above each of the N-type well regions with a high doping concentration of the P-type conductive dielectric; a plurality of dielectric layers formed above each of the N-type well regions; a plurality of trench gate layers formed on the P-type drift layer; and a plurality of I-type regions buried in the P-type drift layer and implanted with at least one doped ion, wherein... The dopant ion in this type I region is an argon ion.

12. The trench metal-oxide-semiconductor field-effect transistor as described in claim 11, wherein, The substrate and the P-type drift layer are made of Si or SiC.

13. A trench metal-oxide-semiconductor field-effect transistor, comprising: a substrate doped with a high doping concentration of a P-type conductive dielectric; a P-type drift layer extended and formed on the substrate with a low doping concentration of the P-type conductive dielectric; a plurality of N-type well regions, each extended and formed within the P-type drift layer with a low doping concentration of the N-type conductive dielectric; a plurality of N-type contact regions implanted and formed on each of the N-type well regions with the N-type conductive dielectric; a plurality of P-type source regions implanted and formed above each of the N-type well regions with a high doping concentration of the P-type conductive dielectric; and a plurality of dielectric layers formed above each of the N-type well regions. Multiple trench gate layers are formed on the P-type drift layer; and multiple NIP diodes are embedded in the P-type drift layer. Each NIP diode includes an N-type semiconductor and a P-type semiconductor. The P-type semiconductor is embedded on top of the N-type semiconductor, and the N-type semiconductor and the P-type semiconductor are in contact to form an I-type junction.

14. The trench metal-oxide-semiconductor field-effect transistor as described in claim 13, wherein, The substrate and the P-type drift layer are made of Si or SiC.

15. The trench metal-oxide-semiconductor field-effect transistor as described in claim 13, wherein, The P-type conductive medium is composed of boron ions, indium ions, or gallium ions, and the N-type conductive medium is composed of phosphorus ions, arsenic ions, or antimony ions.

16. The trench metal-oxide-semiconductor field-effect transistor as described in claim 13, wherein, At least one NIP diode is embedded in the P-type drift layer, and the NIP diode is embedded in the middle of the P-type drift layer.

17. The trench metal-oxide-semiconductor field-effect transistor as described in claim 13, wherein, At least one of the NIP diodes is embedded in the P-type drift layer, and the N-type semiconductor is adjacently embedded below the trench gate layer.

18. The trench metal-oxide-semiconductor field-effect transistor as described in claim 13, wherein, At least one NIP diode is embedded in the P-type drift layer, and the N-type semiconductor is fabricated on the substrate.

19. The trench metal-oxide-semiconductor field-effect transistor as described in claim 13, wherein, The Type I interface is formed using a single dopant via ion implantation.

20. The trench metal-oxide-semiconductor field-effect transistor as described in claim 19, wherein, The dopant is an argon ion.

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