Display device

Abstract

A display device according to an embodiment of the present invention may include: a substrate including a display area and a non-display area; a first electrode disposed on the substrate; a light-emitting element disposed on each of the first electrodes; and a first passivation layer disposed on the first electrode. The first electrode may include: a first driving electrode disposed in the display area; and a first dummy electrode disposed in the non-display area. The first passivation layer may include a first opening disposed on the first dummy electrode.

Description

Technical Field

[0001] This invention relates to a display device, and more specifically to a display device, for example, having improved reliability without limitation. Prior Technology

[0002] Display devices are being used in various electronic devices, such as TVs, mobile phones, laptops, and tablets.

[0003] Display devices include self-emissive organic light-emitting display (OLED) devices, liquid crystal display (LCD) devices that require a separate light source, and the like.

[0004] In recent years, display devices incorporating light-emitting diodes (LEDs) have attracted attention as the next generation of display devices. Because LEDs are formed from inorganic rather than organic materials, LED-incorporated display devices have fast lighting speed and high luminous efficiency, and can display high-brightness images compared to liquid crystal displays and organic light-emitting displays.

[0005] As another example, micro LEDs can be used as light-emitting elements.

[0006] The descriptions provided in the Background section should not be assumed to be prior art simply because they are mentioned in or associated with the Background section. The Background section may contain information describing one or more aspects of the target technology. Summary of the Invention

[0007] The inventors of this application have newly recognized that in display devices using micro light-emitting diodes (micro-LEDs), a large amount of gas may be generated during the manufacturing process due to the stacking of multiple layers containing organic materials. However, there may be situations where the gas cannot be vented to the outside (e.g., when inorganic layers are stacked on top of organic layers). As a result, the reliability of the display device is degraded.

[0008] One or more aspects of the present invention provide a display device with improved reliability.

[0009] The forms according to embodiments of the present invention are not limited to those described above, and those skilled in the art will clearly understand from the following description other forms not described herein.

[0010] To achieve these and other aspects of the inventive concepts specifically embodied and broadly described herein, a display device according to an exemplary embodiment of the present invention includes: a substrate comprising a display area and a non-display area; a first electrode disposed on the substrate; a light-emitting element disposed on each of the first electrodes; and a first passivation layer disposed on the first electrode. The first electrode may include: a first driving electrode disposed in the display area; and a first dummy electrode disposed in the non-display area. The first passivation layer may include a first opening disposed on the first dummy electrode.

[0011] According to embodiments of the present invention, a display device with improved reliability can be provided.

[0012] The effects of the embodiments of the present invention are not limited to those mentioned above, and those skilled in the art will clearly understand from the description of the claims that other effects are not mentioned.

[0013] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory, and are intended to provide further explanation of the claimed inventive concepts. Simple Explanation of the Diagram

[0014] To further explain the present invention, accompanying drawings may be included, which are incorporated into and form part of the present invention, illustrating embodiments of the invention and, together with the description, serving to explain the various principles of the invention.

[0015] The above and other features, characteristics, and advantages of the present invention will become more apparent to those skilled in the art from the detailed description of exemplary embodiments of the invention with reference to the accompanying drawings, wherein: Figure 1 is an exploded perspective view of a display device according to an exemplary embodiment of the present invention; Figure 2 is a plan view of a display device according to an exemplary embodiment of the present invention; Figure 3 is an enlarged view of a display device according to an exemplary embodiment of the present invention; Figure 4 is a diagram illustrating the circuit structure according to an exemplary embodiment of the present invention; Figure 5 is a plan view of a display device according to an exemplary embodiment of the present invention; Figure 6 is a plan view of a display device according to an exemplary embodiment of the present invention; Figure 7 is a plan view of a display device according to an exemplary embodiment of the present invention; Figures 8A and 8B are cross-sectional views of a display device according to an exemplary embodiment of the present invention, taken along lines I-I' and II-II' of Figure 3, respectively; Figure 9 is a cross-sectional view of a display device according to an exemplary embodiment of the present invention; Figure 10 is an enlarged view of a display device according to an exemplary embodiment of the present invention; Figure 11 is a cross-sectional view of a display device according to an exemplary embodiment of the present invention; Figure 12A is a cross-sectional view illustrating a second virtual region of a display device according to an exemplary embodiment of the present invention; Figure 12B is a plan view illustrating the first virtual electrode of a display device according to an exemplary embodiment of the present invention; Figure 13 is a cross-sectional view of a display device according to an exemplary embodiment of the present invention; Figure 14 is a cross-sectional view of a display device according to an exemplary embodiment of the present invention; Figures 15 and 16 are views illustrating the state in which the first calibration key is exposed according to an exemplary embodiment of the present invention; Figure 17 is a view illustrating the state in which the second calibration key is disposed outside the display device according to an exemplary embodiment of the present invention; Figure 18 is a cross-sectional view of a display device according to an exemplary embodiment of the present invention; Figure 19 is a cross-sectional view of a display device according to an exemplary embodiment of the present invention; Figure 20 is an example view illustrating the state in which the second calibration key is layered; Figure 21 is a cross-sectional view of a display device according to an exemplary embodiment of the present invention; and Figures 22 to 25 are views illustrating the apparatus to which the display device according to an exemplary embodiment of the present invention is applied.

[0016] Throughout the drawings and detailed descriptions, unless otherwise stated, the same stylistic references shall be understood to refer to the same elements, features, and structures. For clarity, illustration, and convenience, the relative dimensions and depictions of these elements may be exaggerated. Implementation

[0017] Reference will now be made in detail to embodiments of the invention, examples of which are illustrated in the accompanying drawings. In the following description, detailed descriptions of known functions or configurations relevant to this document will be omitted where it is determined that such detailed descriptions would unnecessarily obscure the gist of the inventive concept. The described processing steps and / or the progression of operations are illustrative; however, the order of steps and / or operations is not limited to the order described herein, and may be changed as is known in the art, except that the steps and / or operations must occur in a specific order. Throughout, similar reference numerals refer to similar elements. The names of the elements used in the following explanation may be chosen solely for the purpose of writing this specification, and therefore may differ from the names used in actual products.

[0018] The advantages, features, and implementation methods of the present invention will become clear from the exemplary embodiments described in detail below with reference to the accompanying drawings. However, the present invention is not limited to the exemplary embodiments described below and can be implemented in various different forms. Exemplary embodiments are provided only to enable those skilled in the art to fully understand the scope of the invention. Any embodiment described herein as an "example" is not necessarily considered superior or advantageous to other embodiments.

[0019] The shapes, dimensions, ratios, angles, quantities, and the like disclosed in the drawings for the purpose of describing embodiments of the invention are illustrative only and are not limited to what is shown in this specification. Throughout the specification, similar reference numerals refer to similar elements. Furthermore, in describing the invention, detailed descriptions of prior art will be omitted where deemed likely to unnecessarily hinder understanding of the spirit of the invention. Terms such as "comprising," "including," "having," and "consisting of" as used herein are intended to allow for the addition of other elements, unless these terms are used in conjunction with more restrictive terms such as "only." Elements described in the singular are intended to include a plural of elements, and vice versa, unless the context clearly indicates otherwise.

[0020] Even if the error or tolerance range is not explicitly described, the component is still interpreted as including a normal error or tolerance range.

[0021] In describing positional relationships, such as when using terms like "on," "above," "below," "over," "below," "under," "near," "close to," "adjacent to," "next to," "right next to," and similar expressions to describe the positional relationship between two components, one or more other components may be positioned between the two components, unless more restrictive terms such as "closely," "directly," or "tightly" are used. For example, when a structure is described as being "on," "above," "below," "above," "below," or "under" another structure, "close to," "near," or "adjacent to" another structure, "next to," or "next to" another structure, such a description should be interpreted to include situations where these structures are in contact with each other and where a third structure is positioned or inserted between these structures. In addition, the terms “left side”, “right side”, “top”, “bottom”, “down”, “up”, “upper”, “lower”, and similar terms refer to any reference architecture.

[0022] When describing temporal relationships, discontinuous situations may be included when the temporal sequence is described as such as "after," "next," "following," "next," and "before," unless more restrictive terms such as "just," "immediately," or "directly" are used.

[0023] Although the terms "first," "second," and similar terms may be used herein to describe various elements, the nature, order, sequence, or number of elements is not limited by these terms. These terms are used only to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of the invention.

[0024] When describing the elements of the present invention, terms such as first, second, A, B, (a), (b), or similar may be used herein. These terms are used only to distinguish one element from another and do not limit the nature, order, sequence, number, or similarity of the elements.

[0025] It should be understood that when an element is described as “connected,” “coupled,” “linked,” or “attached” to another element, the element may be directly connected, coupled, linked, or attached to the other element, but unless otherwise specifically stated, another element may be inserted between the two elements such that they are indirectly connected, coupled, linked, or attached.

[0026] It should also be understood that when an element or layer is described as "in contact" or "overlapping" with another element or layer, the element or layer may be in direct contact or overlap with the other element or layer, but unless otherwise specifically stated, another element or layer may be inserted between the two elements or layers such that they are in indirect contact or overlap with each other.

[0027] The term "at least one" should be understood as including any and all combinations of one or more of the associated listed components. For example, "at least one of the first element, the second element, and the third element" means any combination of two or more of the first element, the second element, and the third element, and any one of the first element, the second element, or the third element.

[0028] The terms “first direction,” “second direction,” “third direction,” “column direction,” “row direction,” “X-axis direction,” “Y-axis direction,” and “Z-axis direction” should not be construed as referring only to geometrically perpendicular relationships, but may indicate a broader range of directions within the functional scope of the configuration described in this specification.

[0029] The features of the various embodiments of the present invention can be partially or completely coupled or combined with each other, and technically, various types of interconnections and drives are possible. Embodiments of the present invention can be implemented independently of each other, or they can be implemented together in some related relationship.

[0030] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the exemplary embodiments pertain. It should be further understood that terms such as those defined in common dictionaries should be interpreted as having a meaning consistent with, for example, their meaning in the context of the relevant field, and not as an idealized or overly formal meaning, unless so explicitly defined herein. For example, the terms "part" or "unit" can be applied to, for example, a single circuit or structure, an integrated circuit, a computational block of a circuit device, or any structure configured to perform the described functions, which would be understood by one of ordinary skill in the art.

[0031] The display device according to the present invention can be implemented as a light-emitting display device or a quantum dot display (QDD) device. In the following description, for ease of description, a self-emissive light-emitting display device based on, for example, inorganic or organic light-emitting diodes will be described, but the invention is not limited thereto, and various other types of display devices can be similarly applied.

[0032] In this invention, the pixel circuits and gate drivers formed on the display panel may include a plurality of transistors. The transistors may be implemented using oxide thin-film transistors (oxide TFTs) containing oxide semiconductors, low-temperature polysilicon (LTPS) TFTs containing low-temperature polysilicon, and the like.

[0033] Furthermore, the thin-film transistors (TFTs) described below can be implemented using n-type TFTs, p-type TFTs, or a combination of n-type and p-type TFTs. A TFT can be a three-electrode device comprising a gate, a source, and a drain. The source can be the electrode that provides carriers to the transistor. In a TFT, carriers can begin to flow out from the source. The drain can be the electrode from which carriers flow from the TFT to the outside. For example, in a TFT, carriers flow from the source to the drain.

[0034] In a p-type TFT, because the carriers are holes, the source voltage can be higher than the drain voltage, allowing holes to flow from the source to the drain. Because holes flow from the source to the drain in a p-type TFT, current can flow from the source to the drain. Conversely, in an n-type TFT, because the carriers are electrons, the source voltage can be lower than the drain voltage, allowing electrons to flow from the source to the drain. Because electrons flow from the source to the drain in an n-type TFT, current can flow from the drain to the source. However, the source and drain of a TFT can switch based on the applied voltage. Therefore, in the following description, one of the source and drain will be described as the first electrode, and the other as the second electrode. However, since the source and drain electrodes can change according to the applied voltage, the source and drain electrodes of a transistor are not fixed.

[0035] In the following, various exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Furthermore, all components of each display device according to all embodiments of the present invention are operatively coupled and configured.

[0036] Figure 1 is an exploded perspective view illustrating a display device according to an embodiment of the present invention. Figure 2 is a plan view of a display device according to an embodiment of the present invention. Figure 3 is an enlarged view of a display device according to an embodiment of the present invention.

[0037] Referring to Figures 1 to 3, a display device 1000 according to an embodiment of the present invention may include one or more of a display panel 100, a polarizing layer 293, an adhesive layer 295, a cover member 120, a substrate (or support substrate) 110, a flexible circuit board CB, and a printed circuit board 160. However, the present invention is not limited thereto, and more or fewer components are included in the display device of the present invention. For example, various other functional layers such as diffusion layers and reflective layers may also be disposed on the display device 1000.

[0038] For example, the display device 1000 may include a substrate 110. The substrate 110 may be a component supporting other components of the display device 1000. The substrate 110 may be formed of an insulating material. For example, the substrate 110 may be formed of glass, resin, or the like. In addition, the substrate 110 may be formed of a flexible material. For example, the substrate 110 may be formed of a flexible plastic material (such as polyethylene terephthalate (PET), polycarbonate (PC), acrylonitrile-butadiene-styrene copolymer (ABS), polymethyl methacrylate (PMMA), polyethylene naphthalate (PEN), polyether sulfone (PES), cyclic olefin copolymer (COC), triacetylcellulose (TAC), polyvinyl alcohol (PVA), polyimide (PI), and polystyrene (PS)). However, embodiments of the present invention are not limited thereto.

[0039] The display panel 100 can implement information, video, and / or images provided to the user. For example, the display panel 100 may include a display area AA and a non-display area NA adjacent to the display area AA. For example, the substrate 110 may include a display area AA and a non-display area NA. The display area AA and the non-display area NA are not limited to the substrate 110, but may be disposed at various locations throughout the display device 1000.

[0040] The display area AA can be an area for displaying an image. The display area AA can contain a plurality of pixels PX. Each of the plurality of pixels PX can contain a plurality of sub-pixels. A plurality of light-emitting elements can be disposed in each of the plurality of sub-pixels. The plurality of light-emitting elements can be configured differently depending on the type of the display device 1000. For example, when the display device 1000 is an inorganic light-emitting display device, the light-emitting elements can be light-emitting diodes (LEDs), micro light-emitting diodes (micro-LEDs), or mini light-emitting diodes (mini-LEDs), but the embodiments of the present invention are not limited thereto. Micro-LEDs can be light-emitting elements with a size of 100 μm or smaller, but the present invention is not necessarily limited thereto.

[0041] The non-display area NA can be an area where no image is displayed. Various lines, circuits, and the like used to drive the plurality of pixels PX of the display area NA can be arranged in the non-display area NA. For example, various lines and driving circuits can be mounted in the non-display area NA, and integrated circuits, printed circuits, and the like can be provided connected to pads PADs, but the embodiments of the present invention are not limited thereto.

[0042] For example, the driving circuit may be a data driving circuit and / or a gate driving circuit, but embodiments of the present invention are not limited thereto. The lines through which the control signals for controlling the driving circuit pass may be disposed on the display panel 100. For example, the control signals may include various timing signals, such as clock signals, input data enable signals, and synchronization signals, but embodiments of the present invention are not limited thereto. The control signals may be received through the pad PAD. For example, the link LL for transmitting signals may be disposed in the non-display area NA. For example, driving elements such as flexible circuit boards CB and printed circuit boards 160 may be connected to the pad PAD.

[0043] According to the present invention, the non-display area NA may include a first non-display area NA1, a curved area BA, and a second non-display area NA2. For example, the first non-display area NA1 may be a region surrounding at least a portion of the display area AA. The curved area BA may be a region extending from at least one of the plurality of sides of the first non-display area NA1, and may be a bendable region. The second non-display area NA2 may be a region extending from the curved area BA, and a pad PAD may be disposed therein. For example, the curved area BA may be in a curved state, while the remaining area of ​​the substrate 110 other than the curved area BA may be in a flat state. In this case, when the curved area BA is bent, the second non-display area NA2 may be located on the rear surface of the display area AA. However, embodiments of the present invention are not limited thereto.

[0044] Depending on the design of the display device 1000, the substrate 110 or the display area AA of the display device 1000 can be configured in various shapes. For example, the display area AA can be configured as a rectangular shape with four rounded corners, but embodiments of the present invention are not limited thereto. As another example, the display area AA can be configured as a rectangular shape, a circular shape, or similar shapes with four right-angled corners, but embodiments of the present invention are not limited thereto.

[0045] According to the present invention, the width of the second non-display area NA2, in which a plurality of pad electrodes PE are disposed, can be greater than the width of the curved area BA, in which only a plurality of chain lines LL are disposed. Additionally, the width of the display area AA, in which a plurality of sub-pixels are disposed, can be greater than the width of the curved area BA, in which only a plurality of chain lines LL are disposed. In the figures, the width of the curved area BA is shown as smaller than the width of each of the other areas of the substrate 110, but the shape of the substrate 110 including the curved area BA is exemplary, and embodiments of the present invention are not limited thereto.

[0046] Referring to Figure 3, a plurality of pixel driving circuits (PDs) can be disposed in the display area AA. The plurality of pixel driving circuits (PDs) can be circuits for driving the light-emitting elements of a plurality of sub-pixels. Each of the plurality of pixel driving circuits (PDs) includes a plurality of transistors containing driving transistors, storage capacitors, and the like, and the pixel driving circuits (PDs) can supply control signals, power, and driving current to the light-emitting elements of the plurality of sub-pixels, thereby controlling the light-emitting operation of the plurality of light-emitting elements. For example, the pixel driving circuits (PDs) can include power lines and signal lines for controlling the on / off state and / or light-emitting time of the light-emitting elements. For example, the plurality of pixel driving circuits (PDs) can be drivers manufactured on a semiconductor substrate using a metal-oxide-silicon (MOSFET) manufacturing process, but embodiments of the present invention are not limited thereto. The driver includes a plurality of pixel driving circuits (PDs) and can drive a plurality of sub-pixels.

[0047] Referring to Figure 1, a flexible circuit board (also referred to as a flexible printed circuit or flexible film) CB and a printed circuit board 160 may be disposed beneath the display panel 100. The flexible circuit board CB and the printed circuit board 160 may be disposed at at least one side edge of the display panel 100, but embodiments of the present invention are not limited thereto. One side of the flexible circuit board CB may be attached to the display panel 100, and the other side may be attached to the printed circuit board 160, but embodiments of the present invention are not limited thereto. The flexible circuit board CB may be a flexible film, but embodiments of the present invention are not limited thereto.

[0048] A pad portion PAD comprising a plurality of pad electrodes PE may be disposed in a second non-display area NA2. A driving assembly comprising one or more flexible circuit boards (or flexible films) CB and a printed circuit board 160 may be attached to or combined with the pad portion PAD. The plurality of pad electrodes PE of the pad portion PAD are electrically connected to one or more flexible circuit boards (or flexible films) CB, and can transmit various signals (or power) output from the printed circuit board 160 and the flexible circuit boards (or flexible films) CB to a plurality of pixel driving circuits PD in the display area AA.

[0049] The flexible circuit board (or flexible film) CB can be a film in which various components are disposed on a flexible base film. For example, a driver integrated circuit (IC), such as a gate driver IC or a data driver IC, can be disposed on the flexible circuit board (or flexible film) CB, but embodiments of the present invention are not limited thereto. The driver IC can be a component that processes data and drive signals for displaying images. Depending on the assembly method, the driver IC can be disposed using methods such as chip-on-glass (COG), chip-on-film (COF), or tape carrier package (TCP), but embodiments of the present invention are not limited thereto. The flexible circuit board (or flexible film) CB can be attached or bonded to a plurality of pad electrodes PE through a conductive adhesive layer, but embodiments of the present invention are not limited thereto.

[0050] Printed circuit board 160 may be a component electrically connected to one or more flexible circuit boards (or flexible films) CB and supplying signals to a driver IC. Printed circuit board 160 may be disposed on one side of a flexible circuit board (or flexible film) CB and may be electrically connected to the flexible circuit board (or flexible film) CB. Various components for supplying various signals to the driver IC may be disposed on printed circuit board 160. For example, various components such as timing controllers, power supplies, memory, or processors may be disposed on printed circuit board 160. For example, printed circuit board 160 may include power management integrated circuit (PMIC), but embodiments of the present invention are not limited thereto.

[0051] Printed circuit board 160 may include at least one hole 180, but embodiments of the invention are not limited thereto. Internal components configured to detect ambient light or temperature (up to a plurality of sensors may be provided) may be located in the area corresponding to at least one hole 180. For example, the internal components may include an ambient light sensor (ALS), a temperature sensor, or the like, but embodiments of the invention are not limited thereto. For example, hole 180 may be a through-hole or the like, but embodiments of the invention are not limited thereto. In another example, hole 180 may be a transmission area or a via, but exemplary embodiments of the invention are not limited thereto.

[0052] Referring to Figure 1, a polarizing layer 293 may be disposed on the display panel 100. The polarizing layer 293 can prevent or reduce light generated by external light sources from entering the display panel 100 and affecting the light-emitting elements or the like.

[0053] A cover member 120 may be disposed on the polarizing layer 293. The cover member 120 may be a component for protecting the display panel 100. An adhesive layer 295 may be disposed between the polarizing layer 293 and the cover member 120. The cover member 120 may be attached to the display panel 100 through the adhesive layer 295. The adhesive layer 295 may comprise optically clear adhesive (OCA), optically clear resin (OCR), pressure-sensitive adhesive (PSA), or similar materials, but embodiments of the present invention are not limited thereto.

[0054] The substrate 110 may be disposed between the display panel 100 and the printed circuit board 160. The substrate 110 may enhance the rigidity of the display panel 100. The substrate 110 may be a back plate, but the embodiments of the present invention are not limited thereto.

[0055] Referring to Figures 1 to 3, a plurality of link lines LL can be disposed in the non-display area NA. The plurality of link lines LL can be lines that transmit various signals supplied from one or more flexible circuit boards (or flexible films) CB and printed circuit boards 160 to the display area AA. The plurality of link lines LL can extend from a plurality of pad electrodes PE in the second non-display area NA2 toward the bending area BA and the first non-display area NA1, and can be electrically connected to the plurality of link lines LL in the display area AA. A plurality of pixel driving circuits PD can be driven by receiving signals from one or more flexible circuit boards (or flexible films) CB and printed circuit boards 160 through the driving lines VL in the display area AA and the link lines LL in the non-display area NA.

[0056] For example, a plurality of drive lines VL, together with a plurality of link lines LL, can be used as lines for transmitting signals output from the flexible circuit board (or flexible film) CB and the printed circuit board 160 to a plurality of pixel driving circuits PD. The plurality of drive lines VL can be disposed in the display area AA and electrically connected to the plurality of pixel driving circuits PD respectively. The plurality of drive lines VL can extend from the display area AA toward the non-display area NA to be electrically connected to the plurality of link lines LL. Therefore, signals output from the flexible circuit board (or flexible film) CB and the printed circuit board 160 can be transmitted through the plurality of link lines LL and the plurality of drive lines VL to each of the plurality of pixel driving circuits PD.

[0057] When the bending region BA bends, some of the multiple chain wires LL may also bend. Stress may concentrate on a portion of the bent chain wires LL, and as a result, cracks may appear in the chain wires LL. Therefore, the multiple chain wires LL may be formed of a conductive material with excellent flexibility to reduce cracking during bending of the bending region BA. For example, the multiple chain wires LL may be formed of a conductive material with excellent flexibility (such as gold (Au), silver (Ag), or aluminum (Al)), but embodiments of the invention are not limited thereto. In addition, the multiple chain wires LL may be formed of one of various conductive materials used in the display region AA. For example, the multiple chain wires LL may be formed of an alloy of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), silver (Ag), and magnesium (Mg), or an alloy thereof, but embodiments of the invention are not limited thereto. The multiple chain wires LL may be configured as a multilayer structure comprising various conductive materials. For example, a plurality of chain lines LL can be configured as a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti), but the embodiments of the present invention are not limited thereto.

[0058] The plurality of chain lines LL can be configured in various shapes to reduce stress. At least some of the chain lines LL disposed in the curved region BA can extend in the same direction as the extension direction of the curved region BA, or in a direction different from the extension direction of the curved region BA, to reduce stress. For example, when the curved region BA extends from the first non-display region NA1 toward the second non-display region NA2 in one direction, at least some of the chain lines LL disposed in the curved region BA can extend in a direction inclined to that direction. As another example, at least some of the chain lines LL can be configured in various pattern shapes. For example, at least some of the chain lines LL disposed in the curved region BA can have a conductive pattern that is repeated in at least one of the following shapes: diamond shape, rhombus shape, trapezoidal wave shape, triangular wave, sawtooth wave, sine wave, circle, and omega (Ω) shape, but embodiments of the present invention are not limited thereto. Therefore, in order to minimize or reduce the stress and cracks concentrated on the plurality of chain lines LL, the plurality of chain lines LL can be formed in various shapes as described above, but the embodiments of the present invention are not limited thereto.

[0059] Figure 4 is a diagram illustrating the circuit structure according to an embodiment of the present invention.

[0060] Figure 4 illustrates an example of a light-emitting element (ED) connected to a (micro) driver (μDriver), but the invention is not limited thereto. For example, eight EDs may be connected to one μDriver. As another example, 16 EDs may be connected to one μDriver, or 32 or 64 EDs may be simultaneously connected to one μDriver. The EDs may be micro LEDs. The μDriver may correspond to a pixel driving circuit (PD), or may contain multiple pixel driving circuits (PD) integrated therein.

[0061] A driver μDriver may include a driving transistor TDR and a light-emitting transistor TEM, but embodiments of the present invention are not limited thereto. For example, one or more other transistors and one or more capacitors may be included in the driver μDriver. For example, 2T1C, 3T1C, 4T1C, 5T1C, 3T2C, 4T2C, 5T2C, 6T2C, 7T1C, 7T2C, 8T1C, 8T2C structures, etc., can also be used in the driver μDriver.

[0062] For example, a driving transistor TDR has: a first electrode to which a high-potential power supply voltage VDD can be applied, a second electrode to which the first electrode of a light-emitting transistor TEM can be connected, and a gate electrode to which a scan signal SC can be applied. The scan signal SC applied to the gate electrode of the driving transistor TDR can be direct current (DC) power, and a fixed reference voltage Vref can be applied for each frame, but embodiments of the present invention are not limited thereto.

[0063] The light-emitting transistor (TEM) has: a first electrode to which the second electrode of the driving transistor TDR can be connected, a second electrode to which the light-emitting element (ED) can be connected, and a gate electrode to which a light-emitting signal (EM) can be applied. The light-emitting signal (EM) applied to the gate electrode of the light-emitting transistor TEM can be a pulse-width modulation (PWM) signal different for each frame, but the embodiments of the present invention are not limited thereto.

[0064] The first electrode of the light-emitting element (ED) can be connected to the second electrode of the light-emitting transistor (TEM), while the second electrode of the ED can be grounded. For example, the first electrode of the ED can be an anode, and the second electrode of the ED can be a cathode, but the embodiments of the present invention are not limited thereto.

[0065] The driving transistor TDR and the light-emitting transistor TEM can be either n-type transistors or p-type transistors, respectively.

[0066] In the driver μDriver, the driving transistor TDR can be turned on by a scan signal SC applied from the timing controller (T-CON), while the light-emitting transistor TEM can be turned on by a light-emitting signal EM. As a result, by applying a high-potential power supply voltage VDD to the first electrode of the driving transistor TDR, a driving current can be applied to the light-emitting element ED through the driving transistor TDR and the light-emitting transistor TEM, thereby causing the light-emitting element ED to emit light.

[0067] Figures 5 to 7 are plan views of a display device according to an embodiment of the present invention.

[0068] For example, Figure 5 is an enlarged plan view of a display area containing a plurality of pixels. For example, Figure 6 is an enlarged plan view of a display area containing one pixel. For example, Figure 7 is an enlarged plan view of a display area containing a plurality of pixels.

[0069] Figures 5 and 6 illustrate only a plurality of signal lines TL, a plurality of communication lines NL, a plurality of first driving electrodes CE1, a plurality of bank electrodes BNK, and a plurality of light-emitting elements ED, but the embodiments of the present invention are not limited thereto. Figure 7 is an enlarged plan view of the display area of ​​Figure 5, wherein a plurality of second electrodes CE2 are additionally provided.

[0070] Referring to Figures 5 and 6, a plurality of pixels PX can be disposed in the display area AA, and each pixel PX contains a plurality of sub-pixels. Each of the plurality of sub-pixels contains a light-emitting element ED and can emit light independently. The plurality of sub-pixels can be arranged in a matrix form with a plurality of columns and a plurality of rows, but the embodiments of the present invention are not limited thereto.

[0071] The plurality of sub-pixels may include: a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. For example, one of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may be a red sub-pixel, another may be a green sub-pixel, and the remainder may be a blue sub-pixel. The type of the plurality of sub-pixels is exemplary, and the embodiments of the present invention are not limited thereto.

[0072] Each of the plurality of pixels PX may include: one or more first sub-pixels SP1, one or more second sub-pixels SP2, and one or more third sub-pixels SP3. For example, a pixel PX may include: a pair of first sub-pixels SP1, a pair of second sub-pixels SP2, and a pair of third sub-pixels SP3. The pair of first sub-pixels SP1 may include: 1-1 sub-pixels SP1a and 1-2 sub-pixels SP1b. The pair of second sub-pixels SP2 may include: 2-1 sub-pixels SP2a and 2-2 sub-pixels SP2b. The pair of third sub-pixels SP3 may include: 3-1 sub-pixels SP3a and 3-2 sub-pixels SP3b. For example, a pixel PX may include: 1-1 sub-pixels SP1a and 1-2 sub-pixels SP1b, 2-1 sub-pixels SP2a and 2-2 sub-pixels SP2b, and 3-1 sub-pixels SP3a and 3-2 sub-pixels SP3b, but embodiments of the present invention are not limited thereto.

[0073] The plurality of subpixels constituting a pixel PX can be arranged in various ways. For example, in a pixel PX, the pair of first subpixels SP1 can be arranged in the same row, the pair of second subpixels SP2 can be arranged in the same row, and the pair of third subpixels SP3 can be arranged in the same row. The first subpixels SP1, the second subpixels SP2, and the third subpixels SP3 can be arranged in the same column. The number and arrangement of the plurality of subpixels constituting a pixel PX are exemplary, and the embodiments of the present invention are not limited thereto.

[0074] Multiple signal lines TL can be disposed in the region between multiple sub-pixels. Multiple signal lines TL can extend along the row direction between the multiple sub-pixels. Multiple signal lines TL can be lines that transmit the anode voltage output from the pixel driving circuit PD to the multiple sub-pixels. For example, multiple signal lines TL can be electrically connected to multiple pixel driving circuits PD and the first driving electrode CE1 of the multiple sub-pixels. The anode voltage output from the pixel driving circuit PD can be transmitted to the first driving electrode CE1 of the multiple sub-pixels through multiple signal lines TL. For example, the first driving electrode CE1 can be an electrode electrically connected to the anode 134 of the light-emitting element ED. Therefore, the anode voltage transmitted through the signal lines TL can be transmitted to the anode 134 of the light-emitting element ED through the first driving electrode CE1.

[0075] Therefore, the structure of the display device 1000 can be simplified by using a pixel driving circuit PD instead of forming multiple transistors and storage capacitors in each of the multiple sub-pixels, and the multiple pixel circuits are integrated into one pixel driving circuit PD. In addition, since the circuits provided in each of the multiple sub-pixels are integrated into one pixel driving circuit PD, high efficiency and low power driving can be achieved.

[0076] The plurality of signal lines TL may include: a first signal line TL1, a second signal line TL2, a third signal line TL3, a fourth signal line TL4, a fifth signal line TL5, and a sixth signal line TL6. The first signal line TL1 and the second signal line TL2 may be electrically connected to the pair of first sub-pixels SP1, respectively. The third signal line TL3 and the fourth signal line TL4 may be electrically connected to the pair of second sub-pixels SP2, respectively. The fifth signal line TL5 and the sixth signal line TL6 may be electrically connected to the pair of third sub-pixels SP3, respectively.

[0077] A first signal line TL1 may be disposed on one side of the pair of first sub-pixels SP1, and a second signal line TL2 may be disposed on the other side of the pair of first sub-pixels SP1. The first signal line TL1 may be electrically connected to the first driving electrode CE1 of one of the pair of first sub-pixels SP1 (e.g., sub-pixel 1-1 SP1a). The second signal line TL2 may be electrically connected to the first driving electrode CE1 of the other of the pair of first sub-pixels SP1 (e.g., sub-pixel 1-2 SP1b).

[0078] A third signal line TL3 may be disposed on one side of the pair of second sub-pixels SP2, while a fourth signal line TL4 may be disposed on the other side of the pair of second sub-pixels SP2. For example, the third signal line TL3 may be disposed adjacent to the second signal line TL2. The third signal line TL3 may be electrically connected to the first driving electrode CE1 of one of the pair of second sub-pixels SP2 (e.g., sub-pixel 2-1 SP2a). The fourth signal line TL4 may be electrically connected to the first driving electrode CE1 of the other of the pair of second sub-pixels SP2 (e.g., sub-pixel 2-2 SP2b).

[0079] The fifth signal line TL5 can be disposed on one side of the pair of third sub-pixels SP3, while the sixth signal line TL6 can be disposed on the other side of the pair of third sub-pixels SP3. For example, the fifth signal line TL5 can be disposed adjacent to the fourth signal line TL4. The sixth signal line TL6 can be disposed adjacent to the first signal line TL1 connected to the adjacent pixel PX. The fifth signal line TL5 can be electrically connected to the first driving electrode CE1 of one of the pair of third sub-pixels SP3 (e.g., sub-pixel 3-1 SP3a). The sixth signal line TL6 can be electrically connected to the first driving electrode CE1 of the other of the pair of third sub-pixels SP3 (e.g., sub-pixel 3-2 SP3b).

[0080] The plurality of signal lines TL can be formed of conductive materials. For example, the plurality of signal lines TL can be formed of conductive materials such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but embodiments of the present invention are not limited thereto. As another example, the plurality of signal lines TL can be formed of a multilayer structure of conductive materials. For example, the plurality of signal lines TL can be formed of a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but embodiments of the present invention are not limited thereto.

[0081] A plurality of communication lines NL can be disposed in the region between a plurality of pixels PX. The plurality of communication lines NL can be disposed in the region between the plurality of pixels PX extending in a column direction. The plurality of communication lines NL are disposed in the region between a plurality of second electrodes CE2 and may not overlap with the plurality of second electrodes CE2. For example, the plurality of communication lines NL can be lines for short-circuit-range communication such as Near Field Communication (NFC). The plurality of communication lines NL can function as antennas. For example, the plurality of communication lines NL can be a plurality of connecting lines or the like, but embodiments of the present invention are not limited thereto.

[0082] According to the present invention, a seawall BNK can be disposed in each of a plurality of sub-pixels. The plurality of seawall BNKs can be a structure for mounting a plurality of light-emitting elements EDs. The seawall BNKs of each of the plurality of sub-pixels can be configured to be separate from each other. For example, the seawall BNKs of each of the plurality of sub-pixels can be formed in an island shape. The plurality of seawall BNKs can guide the position of the plurality of light-emitting elements EDs during the transfer process of transferring the plurality of light-emitting elements EDs to the display device 1000. Therefore, the seawall BNKs of the first sub-pixel, the second sub-pixel, and the third sub-pixel, wherein different types of light-emitting elements EDs are transferred to these seawall BNKs, can be easily identified.

[0083] In the transfer process of a plurality of light-emitting elements (EDs), the plurality of EDs can be transferred onto a plurality of bank blocks (BNKs). The plurality of bank blocks (BNKs) can be bank patterns or structures, but the embodiments of the present invention are not limited thereto.

[0084] The bank BNKs of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be set to be spaced apart from each other. The bank BNKs of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be configured to be separated in this way. Therefore, the bank BNKs of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be easily identified, wherein different types of light-emitting elements ED are transferred to these bank BNKs.

[0085] The bank BNK of sub-pixel SP1a (1-1) and the bank BNK of sub-pixel SP1b (1-2) can be connected to each other, spaced apart, or formed separately. For example, considering the design requirements of the transfer process and similar methods, the bank BNK of sub-pixel SP1a (1-1) and the bank BNK of sub-pixel SP1b (1-2) which are provided with the same type of light-emitting element ED can be connected to each other, spaced apart, or formed separately. Similarly, the bank BNK of sub-pixel SP2a (2-1) and the bank BNK of sub-pixel SP2b (2-2) can be connected to each other, spaced apart, or formed separately. The bank BNK of sub-pixel SP3a (3-1) and the bank BNK of sub-pixel SP3b (3-2) can be connected to each other, spaced apart, or formed separately. Therefore, the bank BNKs of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be formed in various ways, but the embodiments of the present invention are not limited thereto.

[0086] For example, a plurality of embankment BNKs can be formed of organic insulating materials. A plurality of embankment BNKs can be formed of single-layer or multi-layer organic insulating materials. For example, a plurality of embankment BNKs can be formed of photoresist, polyimide (PI) based materials, or acrylic based materials, but embodiments of the present invention are not limited thereto.

[0087] A first driving electrode CE1 may be disposed in each of a plurality of sub-pixels. The first driving electrode CE1 may be disposed on a bank BNK. The first driving electrode CE1 may be electrically connected to one of a plurality of signal lines TL. At least a portion of the first driving electrode CE1 may extend outward from the bank BNK to be electrically connected to the signal line TL closest to the first driving electrode CE1. For example, a portion of the first driving electrode CE1 of sub-pixel SP1a can extend to one side of sub-pixel SP1a to be electrically connected to the first signal line TL1, while a portion of the first driving electrode CE1 of sub-pixel SP1b can extend to the other side of sub-pixel SP1b to be electrically connected to the second signal line TL2. A portion of the first driving electrode CE1 of sub-pixel SP2a can extend to one side of sub-pixel SP2a to be electrically connected to the third signal line TL3, while a portion of the first driving electrode CE1 of sub-pixel SP2b can extend to the other side of sub-pixel SP2b to be electrically connected to the fourth signal line TL4. A portion of the first driving electrode CE1 of sub-pixel SP3a can extend to one side of sub-pixel SP3a to be electrically connected to the fifth signal line TL5, while a portion of the first driving electrode CE1 of sub-pixel SP3b can extend to the other side of sub-pixel SP3b to be electrically connected to the sixth signal line TL6.

[0088] The first driving electrode CE1 can be electrically connected to the anode 134 of the light-emitting element ED, and can transmit the anode voltage output from the pixel driving circuit PD to the light-emitting element ED through the signal line TL. Depending on the displayed image, different voltages can be applied to the first driving electrode CE1 of each of the plurality of sub-pixels. For example, different voltages can be applied to the first driving electrode CE1 of each of the plurality of sub-pixels. Therefore, the first driving electrode CE1 can be a pixel electrode, but embodiments of the present invention are not limited thereto.

[0089] The first driving electrode CE1 may be formed of a conductive material. For example, the first driving electrode CE1 may be integrally configured with a plurality of signal lines TL. For example, the first driving electrode CE1 and the plurality of signal lines TL may be formed of the same conductive material, but embodiments of the present invention are not limited thereto. For example, the first driving electrode CE1 may be formed of conductive materials such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but embodiments of the present invention are not limited thereto. As another example, the first driving electrode CE1 may be formed of a multilayer structure of conductive material. For example, a plurality of first driving electrodes CE1 may be formed of a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but embodiments of the present invention are not limited thereto.

[0090] A light-emitting element (ED) can be disposed in each of a plurality of sub-pixels. Each of the plurality of light-emitting elements (ED) can be a light-emitting diode (LED) or a miniature light-emitting diode (MLED), but embodiments of the present invention are not limited thereto. The plurality of light-emitting elements (ED) can be disposed on the embankment BNK and the first driving electrode CE1. The plurality of light-emitting elements (ED) can be disposed on the first driving electrode CE1 and can be electrically connected to the first driving electrode CE1. Therefore, the light-emitting element (ED) can emit light by receiving the anode voltage from the pixel driving circuit PD through the signal line TL and the first driving electrode CE1.

[0091] A plurality of light-emitting elements (EDs) may include a first light-emitting element 130, a second light-emitting element 140, and a third light-emitting element 150. The first light-emitting element 130 may be disposed in a first sub-pixel SP1. The second light-emitting element 140 may be disposed in a second sub-pixel SP2. The third light-emitting element 150 may be disposed in a third sub-pixel SP3. For example, one of the first light-emitting element 130, the second light-emitting element 140, and the third light-emitting element 150 may be a red light-emitting element, another may be a green light-emitting element, and the remainder may be a blue light-emitting element, but the embodiments of the present invention are not limited thereto. Therefore, by combining the red, green, and blue light emitted from the plurality of light-emitting elements (EDs), light of various colors including white can be realized. The types of the plurality of light-emitting elements (EDs) are exemplary, and the embodiments of the present invention are not limited thereto.

[0092] The first light-emitting element 130 may include: a 1-1 light-emitting element 130a disposed in sub-pixel SP1a, and a 1-2 light-emitting element 130b disposed in sub-pixel SP1b. The second light-emitting element 140 may include: a 2-1 light-emitting element 140a disposed in sub-pixel SP2a, and a 2-2 light-emitting element 140b disposed in sub-pixel SP2b. The third light-emitting element 150 may include: a 3-1 light-emitting element 150a disposed in sub-pixel SP3a, and a 3-2 light-emitting element 150b disposed in sub-pixel SP3b.

[0093] Referring together to Figures 5 to 7, the second electrode CE2 can be disposed in each of the plurality of sub-pixels. The second electrode CE2 can be disposed on the light-emitting element ED. The second electrode CE2 can be electrically connected to the pixel driving circuit PD through a plurality of contact electrodes CCE.

[0094] For example, the second electrode CE2 can be electrically connected to the cathode 135 of the light-emitting element ED, and can transmit the cathode voltage output from the pixel driving circuit PD to the light-emitting element ED. The same cathode voltage can be applied to the second electrode CE2 of each of the plurality of sub-pixels. For example, the same voltage can be applied to the second electrodes CE2 of the plurality of sub-pixels and the cathode 135 of the light-emitting element ED. Therefore, the second electrode CE2 can be a common electrode, but embodiments of the present invention are not limited thereto.

[0095] At least some of the sub-pixels in a plurality of sub-pixels may share the second electrode CE2. At least some of the second electrodes CE2 in a plurality of sub-pixels may be electrically connected to each other. Since the same voltage is applied to the second electrodes CE2, at least some of the sub-pixels' second electrodes CE2 may be shared. For example, the second electrodes CE2 of at least some of the pixels PX located in the same column may be connected to each other. For example, one second electrode CE2 may be provided in a plurality of pixels PX. One second electrode CE2 may be provided for every N sub-pixels.

[0096] For example, some of the second electrodes CE2 of a plurality of sub-pixels can be spaced apart or separated from each other. For example, the second electrode CE2 connected to the pixel PX in the nth column and the second electrode CE2 connected to the pixel PX in the (n+1)th column can be spaced apart or separated from each other. For example, a plurality of second electrodes CE2 can be arranged to be spaced apart from each other, wherein a plurality of communication lines NL extending in the column direction are inserted between the plurality of second electrodes CE2. Therefore, the number of sub-pixels can be greater than the number of second electrodes CE2. As another example, all the second electrodes CE2 of a plurality of sub-pixels can be interconnected, such that one second electrode CE2 is disposed on the substrate 110, but embodiments of the present invention are not limited thereto.

[0097] The plurality of second electrodes CE2 may be formed of a transparent conductive material, but embodiments of the present invention are not limited thereto. The plurality of second electrodes CE2 may be formed of a transparent conductive material such that light emitted from the light-emitting element ED passes through the second electrodes CE2 upwards. For example, the second electrodes CE2 may be formed of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but embodiments of the present invention are not limited thereto.

[0098] A plurality of contact electrodes CCE may be disposed on the substrate 110. For example, the plurality of contact electrodes CCE may be disposed spaced apart from a plurality of shore BNKs and a plurality of signal lines TL. Each of the plurality of second electrodes CE2 may overlap with at least one contact electrode CCE. For example, one second electrode CE2 may overlap with a plurality of contact electrodes CCE.

[0099] For example, a plurality of contact electrodes CCE can be electrically connected to a plurality of second electrodes CE2. The plurality of contact electrodes CCE can be disposed between the substrate 110 and the plurality of second electrodes CE2, and can transmit the cathode voltage output from the pixel driving circuit PD to the second electrodes CE2.

[0100] When micro-LEDs are used as light-emitting elements (EDs), a plurality of micro-LEDs can be fabricated on a wafer and transferred to a substrate 110 of a display device 1000 to manufacture the display device 1000. During the process of transferring a plurality of EDs with minute dimensions from the wafer to the substrate 110, various defects may occur. For example, in some sub-pixels, a transfer defect may occur where the ED is not transferred, while in other sub-pixels, a defect may occur where the ED is transferred to an unintended position due to misalignment. Furthermore, even if the transfer process proceeds normally, the transferred ED itself may be defective. Therefore, considering the defects that may occur during the transfer process of a plurality of EDs, a plurality of EDs of the same type can be transferred to a single sub-pixel. A lighting test can be performed on the plurality of EDs, and ultimately, only one ED that is determined to be functioning correctly can be used.

[0101] For example, light-emitting elements 1-1 (130a) and 1-2 (130b) can be transferred together to a single pixel PX, and inspected to determine if any defects exist. If both 1-1 (130a) and 1-2 (130b) are determined to be normal, 1-1 (130a) can be used, while 1-2 (130b) can be omitted. As another example, if 1-2 (130b) is determined to be normal, 1-1 (130a) can be omitted, while 1-2 (130b) can be used. Therefore, even when multiple light-emitting elements ED of the same type are transferred to a single pixel PX, only one light-emitting element ED can ultimately be used.

[0102] Therefore, one of a pair of light-emitting elements (EDs) can be the primary (or main) ED, and the other can be a redundant ED. The redundant ED can be a backup ED prepared to be transferred in case of a defective primary ED. If the primary ED is defective, the redundant ED can be used as a replacement. Therefore, by transferring both the primary and redundant EDs to a single pixel (PX), the degradation in display quality caused by the failure of either the primary or redundant ED can be minimized or reduced.

[0103] For example, the 1-1 light-emitting elements 130a, 2-1 light-emitting elements 140a, and 3-1 light-emitting elements 150a transferred to a pixel PX can be used as the main light-emitting elements ED, while the 1-2 light-emitting elements 130b, 2-2 light-emitting elements 140b, and 3-2 light-emitting elements 150b transferred to a pixel PX can be used as redundant light-emitting elements ED.

[0104] The display panel 100 according to the present invention may include a first driving electrode CE1 disposed under the light-emitting element ED, and the light extraction efficiency can be improved by exposing a portion of a conductive layer with high reflectivity among a plurality of conductive layers disposed on the first driving electrode CE1 through a process such as an etching process.

[0105] Figures 8A and 8B are cross-sectional views of a display device according to an embodiment of the present invention. For example, Figure 8A is a cross-sectional view of the display area taken along line I-I' of Figure 3, while Figure 8B is a cross-sectional view of the first non-display area, the curved area, and the second non-display area taken along line II-II' of Figure 3.

[0106] FIG9 is a cross-sectional view of a display device according to an embodiment of the present invention. For example, FIG9 is a cross-sectional view illustrating a sub-pixel including a light-emitting element disposed in the display area AA.

[0107] Referring to Figures 8A and 8B, the first buffer layer 111a and the second buffer layer 111b can be disposed in the remaining area of ​​the substrate 110 other than the bending region BA.

[0108] The first buffer layer 111a and the second buffer layer 111b can be disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2. The first buffer layer 111a and the second buffer layer 111b can reduce the penetration of moisture or impurities through the substrate 110. The first buffer layer 111a and the second buffer layer 111b can be formed of inorganic insulating material. For example, the first buffer layer 111a and the second buffer layer 111b can be formed as a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but the embodiments of the present invention are not limited thereto.

[0109] For example, some of the first buffer layer 111a and the second buffer layer 111b located in the bending region BA can be removed. The upper surface of the substrate 110 located in the bending region BA can be exposed from the first buffer layer 111a and the second buffer layer 111b. The first buffer layer 111a and the second buffer layer 111b, which are formed of inorganic insulating material, can be removed from the bending region BA to minimize or reduce cracks that may occur in the first buffer layer 111a and the second buffer layer 111b during bending.

[0110] A plurality of alignment keys MK may be disposed between the first buffer layer 111a and the second buffer layer 111b. The plurality of alignment keys MK may be configured to identify the position of the pixel driving circuit PD during the manufacturing process of the display device 1000. For example, the plurality of alignment keys MK may be configured to align the position of the pixel driving circuit PD transferred to the adhesive layer 112. Alternatively, the plurality of alignment keys MK may be omitted.

[0111] An adhesive layer 112 may be disposed on the second buffer layer 111b. The adhesive layer 112 may be disposed in the display area AA, the first non-display area NA1, the curved area BA, and the second non-display area NA2. Alternatively, at least a portion of the adhesive layer 112 may be removed from the non-display area NA containing the curved area BA. For example, the adhesive layer 112 may be formed from any of the following: an adhesive polymer, epoxy resin, ultraviolet (UV)-curable resin, polyimide-based material, acrylate-based material, urethane-based material, and polydimethylsiloxane (PDMS), but embodiments of the present invention are not limited thereto.

[0112] In the display area AA, a pixel driving circuit PD can be disposed on the adhesive layer 112. When the pixel driving circuit PD is implemented as a driver, the driver can be assembled on the adhesive layer 112 through a transfer process, but the embodiments of the present invention are not limited thereto.

[0113] The first protective layer 113a and the second protective layer 113b may be disposed on the adhesive layer 112 and the pixel driving circuit PD. The first protective layer 113a and the second protective layer 113b may be disposed around the side surface of the pixel driving circuit PD, but embodiments of the present invention are not limited thereto. For example, the second protective layer 113b may be disposed to cover at least a portion of the upper surface of the pixel driving circuit PD. For example, at least one of the first protective layer 113a and the second protective layer 113b disposed in the curved region BA may be omitted. For example, the first protective layer 113a may be completely disposed in the display area AA and the non-display area NA, while the second protective layer 113b may be partially disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2. For example, a portion of the second protective layer 113b in the curved region BA may be removed. However, embodiments of the present invention are not limited thereto.

[0114] The first protective layer 113a and the second protective layer 113b may be formed of organic insulating materials, but embodiments of the present invention are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b may be formed of photoresist, polyimide (PI) based materials, photoacrylic-based materials, or similar materials, but embodiments of the present invention are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b may be an outer coating or an insulating layer, respectively, but embodiments of the present invention are not limited thereto.

[0115] According to the present invention, a plurality of first connecting lines (or connecting electrodes) 121 may be disposed on the second protective layer 113b in the display area AA. The plurality of first connecting lines 121 may be lines used to electrically connect a pixel driving circuit PD to other components. For example, the pixel driving circuit PD may be electrically connected to a plurality of signal lines TL, a plurality of contact electrodes CCE, and the like via the plurality of first connecting lines 121. For example, the plurality of first connecting lines 121 may include: 1-1 connecting line 121a, 1-2 connecting line 121b, 1-3 connecting line 121c, and 1-4 connecting line 121d, but embodiments of the present invention are not limited thereto.

[0116] For example, a plurality of 1-1 connection lines 121a may be disposed on the second protective layer 113b. The plurality of 1-1 connection lines 121a may be electrically connected to the pixel driving circuit PD. The plurality of 1-1 connection lines 121a may transmit the voltage output from the pixel driving circuit PD to the first driving electrode CE1 or the second electrode CE2.

[0117] For example, a third protective layer 114 may be disposed on the second protective layer 113b. The third protective layer 114 may be completely disposed in the display area AA and the non-display area NA. In the curved area BA, the third protective layer 114 may cover the side surface of the second protective layer 113b and the upper surface of the first protective layer 113a. The third protective layer 114 may be formed of an organic insulating material. For example, the third protective layer 114 may be formed of a photoresist, a polyimide (PI) based material, a photoacrylic material, or the like, but embodiments of the present invention are not limited thereto. For example, the first protective layer 113a, the second protective layer 113b, and the third protective layer 114 may be formed of the same material, but embodiments of the present invention are not limited thereto.

[0118] A plurality of 1-2 connecting lines 121b may be disposed on the third protective layer 114. The plurality of 1-2 connecting lines 121b may be connected to or directly connected to the pixel driving circuit PD. For example, some 1-2 connecting lines 121b may be directly connected to the pixel driving circuit PD through the contact holes of the third protective layer 114. Other 1-2 connecting lines 121b may be electrically connected to the 1-1 connecting line 121a through the contact holes of the third protective layer 114. However, embodiments of the present invention are not limited thereto. The voltage output from the pixel driving circuit PD may be transmitted to the first driving electrode CE1 or the second electrode CE2 through the plurality of 1-2 connecting lines 121b and other connecting lines.

[0119] The first insulating layer 115a may be disposed on a plurality of 1-2 connecting lines 121b. The first insulating layer 115a may be completely disposed in the display area AA and the non-display area NA, but embodiments of the present invention are not limited thereto. The first insulating layer 115a may be formed of an organic insulating material, but embodiments of the present invention are not limited thereto. For example, the first insulating layer 115a may be formed of a photoresist, a polyimide (PI) based material, a photoacrylic material, or the like, but embodiments of the present invention are not limited thereto.

[0120] A plurality of 1-3 connecting lines 121c may be disposed on the first insulating layer 115a. The plurality of 1-3 connecting lines 121c may be electrically connected to a plurality of 1-2 connecting lines 121b. For example, the 1-3 connecting lines 121c may be electrically connected to the 1-2 connecting lines 121b through contact holes in the first insulating layer 115a.

[0121] The second insulating layer 115b may be disposed on a plurality of 1-3 connecting lines 121c. The second insulating layer 115b may be disposed in the remaining areas excluding the curved region BA, but embodiments of the present invention are not limited thereto. The second insulating layer 115b may be disposed in the display region AA, the first non-display region NA1, and the second non-display region NA2, but embodiments of the present invention are not limited thereto. For example, a portion of the second insulating layer 115b disposed in the curved region BA may be removed. The second insulating layer 115b may be formed of an organic insulating material, but embodiments of the present invention are not limited thereto. For example, the second insulating layer 115b may be formed of a photoresist, a polyimide (PI) based material, a photoacrylic material, or the like, but embodiments of the present invention are not limited thereto.

[0122] A plurality of 1-4 connecting lines 121d may be disposed on the second insulating layer 115b. The plurality of 1-4 connecting lines 121d may be electrically connected to a plurality of 1-3 connecting lines 121c. For example, the 1-4 connecting lines 121d may be electrically connected to the 1-3 connecting lines 121c through contact holes in the second insulating layer 115b.

[0123] According to the present invention, a plurality of second connecting lines (or connecting electrodes) 122 may be disposed on the second protective layer 113b in the non-display area NA. The plurality of second connecting lines 122 may be lines for transmitting signals from the flexible circuit board (or flexible film) CB and the printed circuit board 160 (see FIG. 1) to the pad PAD to the pixel driving circuit PD in the display area AA. For example, the plurality of second connecting lines 122 may be electrically connected to a plurality of pad electrodes PE to receive signals output from the flexible circuit board (or flexible film) CB and the printed circuit board 160.

[0124] For example, a plurality of second connection lines 122 may extend from the pad PAD toward the display area AA and may transmit signals to the display area AA. In this case, the plurality of second connection lines 122 may function as link lines LL. The plurality of second connection lines 122 may include: 2-1 connection line 122a, 2-2 connection line 122b, 2-3 connection line 122c, and 2-4 connection line 122d.

[0125] A plurality of 2-1 connecting lines 122a may be disposed on the second protective layer 113b. The plurality of 2-1 connecting lines 122a may extend from the second non-display area NA2 to the curved area BA and the first non-display area NA1. The plurality of 2-1 connecting lines 122a may transmit signals from the flexible circuit board (or flexible film) CB and the printed circuit board 160 to the pad PAD to the pixel driving circuit PD of the display area AA.

[0126] A plurality of 2-2 connection lines 122b may be disposed on the third protective layer 114. A plurality of 2-2 connection lines 122b may be disposed in the second non-display area NA2. The 2-2 connection lines 122b may be electrically connected to the 2-1 connection line 122a through the contact holes of the third protective layer 114. Therefore, signals output from the flexible circuit board (or flexible film) CB and the printed circuit board 160 may be transmitted to the 2-1 connection line 122a through the 2-2 connection lines 122b.

[0127] The 2-3 connection line 122c can be disposed on the first insulating layer 115a. The 2-3 connection line 122c can also be disposed in the second non-display area NA2. The 2-3 connection line 122c can be electrically connected to the 2-2 connection line 122b through the contact hole of the first insulating layer 115a. Therefore, the signal output from the flexible circuit board (or flexible film) CB and the printed circuit board 160 can be transmitted to the 2-1 connection line 122a through the 2-3 connection line 122c and the 2-2 connection line 122b.

[0128] Connection line 122d (2-4) can be disposed on the second insulating layer 115b. Connection line 122d (2-4) can also be disposed in the second non-display area NA2. Connection line 122d (2-4) can be electrically connected to connection line 122c (2-3) through the contact hole of the second insulating layer 115b. Therefore, signals output from the flexible circuit board (or flexible film) CB and the printed circuit board 160 can be transmitted to connection line 122a (2-1) through connection lines 122d (2-4), 122c (2-3), and 122b (2-2).

[0129] The plurality of first connecting lines 121 and the plurality of second connecting lines 122 may be formed of any of a highly flexible conductive material or a variety of conductive materials used in the display area AA. For example, the second connecting lines 122 (some of which are disposed in the curved area BA) may be formed of a highly flexible conductive material such as gold (Au), silver (Ag), or aluminum (Al), but embodiments of the invention are not limited thereto. As another example, the plurality of first connecting lines 121 and the plurality of second connecting lines 122 may be formed of alloys of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), silver (Ag), and magnesium (Mg), or alloys thereof, or the like, but embodiments of the invention are not limited thereto.

[0130] The third insulating layer 115c may be disposed on a plurality of first connecting lines 121 and a plurality of second connecting lines 122. The third insulating layer 115c may be disposed in the remaining areas excluding the curved region BA, but embodiments of the present invention are not limited thereto. The third insulating layer 115c may be disposed in the display region AA, the first non-display region NA1, and the second non-display region NA2. A portion of the third insulating layer 115c in the curved region BA may be removed. The third insulating layer 115c may be formed of an organic insulating material, but embodiments of the present invention are not limited thereto. For example, the third insulating layer 115c may be formed of a photoresist, a polyimide (PI) based material, a photoacrylic material, or the like, but embodiments of the present invention are not limited thereto.

[0131] In the display area AA, a plurality of bank BNKs may be disposed on the third insulating layer 115c. The plurality of bank BNKs may be disposed to overlap with a plurality of sub-pixels respectively. At least one or more light-emitting elements ED of the same type may be disposed on each of the plurality of bank BNKs.

[0132] Multiple signal lines TL can be disposed on the third insulating layer 115c in the display area AA. Multiple signal lines TL can be disposed in the area between multiple embankments BNK. For example, each of the multiple signal lines TL can be disposed adjacent to its respective embankment in the multiple embankments BNK.

[0133] A plurality of contact electrodes CCE can be disposed on the third insulating layer 115c in the display area AA. The plurality of contact electrodes CCE can supply the cathode voltage output from the pixel driving circuit PD to the second electrode CE2.

[0134] The first driving electrode CE1 may be disposed on the embankment BNK. For example, the first driving electrode CE1 may be disposed to extend from the adjacent signal line TL toward the upper part of the embankment BNK. The first driving electrode CE1 may be disposed on the upper surface and side surface of the embankment BNK. For example, the first driving electrode CE1 may be disposed to extend from the signal line TL on the upper surface of the third insulating layer 115c toward the side surface and upper surface of the embankment BNK.

[0135] Referring to Figure 9, the first driving electrode CE1 and the contact electrode CCE may each be provided with a plurality of conductive layers. The first driving electrode CE1 and the contact electrode CCE may be formed by the same process, and each of the first driving electrode CE1 and the contact electrode CCE may contain the same plurality of conductive layers.

[0136] The first driving electrode CE1 may include: a first conductive layer CE1a, a second conductive layer CE1b, a third conductive layer CE1c, and a fourth conductive layer CE1d, but the embodiments of the present invention are not limited thereto.

[0137] The first conductive layer CE1a can be disposed on the embankment BNK. The second conductive layer CE1b can be disposed on the first conductive layer CE1a. The third conductive layer CE1c can be disposed on the second conductive layer CE1b. The fourth conductive layer CE1d can be disposed on the third conductive layer CE1c. For example, the first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d can be formed from at least one of titanium (Ti), molybdenum (Mo), aluminum (Al), and indium tin oxide (ITO), but the embodiments of the present invention are not limited thereto.

[0138] According to the present invention, among the plurality of conductive layers forming the first driving electrode CE1, some conductive layers with high reflectivity can be configured as calibration keys and / or reflectors for aligning the light-emitting element ED. For example, among the plurality of conductive layers of the first driving electrode CE1, the second conductive layer CE1b may contain a reflective material. For example, the second conductive layer CE1b may contain aluminum (Al), but embodiments of the present invention are not limited thereto. Therefore, the second conductive layer CE1b can be configured as a reflector. Furthermore, due to the high reflectivity of the second conductive layer CE1b, identification can be facilitated during the manufacturing process, thereby allowing the alignment or repositioning of the light-emitting element ED based on the second conductive layer CE1b.

[0139] For example, to configure the second conductive layer CE1b as a reflector, the third conductive layer CE1c and the fourth conductive layer CE1d covering the second conductive layer CE1b can be partially removed or etched. For example, some of the third conductive layer CE1c and the fourth conductive layer CE1d can be removed or etched to expose the upper surface of the second conductive layer CE1b. For example, in each of the third conductive layer CE1c and the fourth conductive layer CE1d, the edge portions and the central portion on which the solder pattern SDP is disposed can be retained, while the remaining portions can be removed. For example, the edge portions of each of the third conductive layer CE1c formed of titanium (Ti) and the fourth conductive layer CE1d formed of indium tin oxide (ITO) can be left unetched. Therefore, other conductive layers of the first driving electrode CE1 (e.g., the second conductive layer CE1b) can be prevented or excluded from being etched by the tetramethylammonium hydroxide (TMAH) solution used in the masking process for forming the first driving electrode CE1.

[0140] According to the present invention, the first conductive layer CE1a and the third conductive layer CE1c may comprise titanium (Ti) or molybdenum (Mo). The second conductive layer CE1b may comprise aluminum (Al). The fourth conductive layer CE1d may comprise a transparent conductive oxide layer, such as indium tin oxide (ITO) or indium zinc oxide (IZO), which has good adhesion to the solder pattern SDP and exhibits corrosion resistance and acid resistance. However, embodiments of the present invention are not limited thereto.

[0141] The first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d can be deposited sequentially, and then patterned through photolithography and etching processes. However, the embodiments of the present invention are not limited to this.

[0142] According to the present invention, the signal line TL, contact electrode CCE, and pad electrode PE disposed on the same layer as the first driving electrode CE1 can be formed of multilayer conductive materials, but the embodiments of the present invention are not limited thereto. For example, the signal line TL, contact electrode CCE, and pad electrode PE can be formed of multilayer indium tin oxide (ITO) / titanium (Ti) / aluminum (Al) / titanium (Ti), but the embodiments of the present invention are not limited thereto.

[0143] According to the present invention, a solder pattern SDP can be disposed on a first driving electrode CE1 in each of a plurality of sub-pixels. The solder pattern SDP allows a light-emitting element ED to be bonded to the first driving electrode CE1. The first driving electrode CE1 and the light-emitting element ED can be electrically connected via eutectic bonding using the solder pattern SDP, but embodiments of the present invention are not limited thereto. For example, the first driving electrode CE1 and the anode 134 of the light-emitting element ED can be electrically connected via eutectic bonding using the solder pattern SDP, but embodiments of the present invention are not limited thereto. For example, when the solder pattern SDP is formed of indium (In) and the anode 134 of the light-emitting element ED is formed of gold (Au), the solder pattern SDP and the anode 134 can be bonded by applying heat and pressure during the transfer process of the light-emitting element ED. Through eutectic bonding, the light-emitting element ED can be bonded to the solder pattern SDP and the first driving electrode CE1 without the need for additional adhesive. For example, the solder pattern SDP can be formed of indium (In), tin (Sn), or alloys thereof, but embodiments of the present invention are not limited thereto. For example, the solder pattern SDP can be a patterned layer, a pattern, a bonding pad, a bonding pad, or the like, but the embodiments of the present invention are not limited thereto.

[0144] According to the present invention, a first passivation layer 116 may be disposed on a plurality of signal lines TL, a plurality of first driving electrodes CE1, a plurality of contact electrodes CCE, and a third insulating layer 115c. For example, the first passivation layer 116 may be disposed in the display area AA and the second non-display area NA2. The portion of the first passivation layer 116 disposed in the curved area BA and the first non-display area NA1 may be removed. In the second non-display area NA2, the portion of the first passivation layer 116 covering the plurality of pad electrodes PE may be removed. The first passivation layer 116 may be disposed to cover the remaining area except for the curved area BA and the first non-display area NA1, the area where the plurality of pad electrodes PE and the solder pattern SDP are disposed, and the portion of the contact electrodes CCE exposed for connection to the second electrode CE2, thereby reducing the penetration of moisture or impurities into the light-emitting element ED. For example, the first passivation layer 116 may be formed as a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but the embodiments of the present invention are not limited thereto. For example, the first passivation layer 116 may be a protective layer, an insulating layer, or the like, but embodiments of the present invention are not limited thereto. Additionally, the first passivation layer 116 may be formed with a thickness of 1000 to 2000 Å, which is less than the thickness of the second electrode CE2.

[0145] In each of the plurality of sub-pixels, a light-emitting element ED can be disposed on a solder pattern SDP. A first light-emitting element 130 can be disposed in the first sub-pixel SP1. A second light-emitting element 140 can be disposed in the second sub-pixel SP2. A third light-emitting element 150 is disposed in the third sub-pixel SP3.

[0146] Light-emitting elements (EDs) can be formed on silicon wafers using methods such as metal-organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), or sputtering, but embodiments of the present invention are not limited thereto.

[0147] The first light-emitting element 130 may include an anode 134, a light-emitting structure, a cathode 135, and an encapsulation film 136, but the embodiments of the present invention are not limited thereto. For example, the first light-emitting element 130 may not include the encapsulation film 136. The light-emitting structure may include a first semiconductor layer 131, an active layer 132, and a second semiconductor layer 133.

[0148] The first semiconductor layer 131 may be disposed on the solder pattern SDP. The second semiconductor layer 133 may be disposed on the first semiconductor layer 131.

[0149] For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 may be a III-V compound semiconductor, a II-VI compound semiconductor, or the like, and may be doped with impurities (or dopants). For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 may be a semiconductor layer doped with n-type impurities, while the other may be a semiconductor layer doped with p-type impurities, but the embodiments of the present invention are not limited thereto. For example, one or more of the first semiconductor layer 131 and the second semiconductor layer 133 may be layers doped with n-type or p-type impurities in materials such as gallium nitride (GaN), gallium phosphide (GaP), gallium arsenide phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), indium aluminum phosphide (InAlP), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), aluminum indium gallium nitride (AlInGaN), aluminum gallium arsenide (AlGaAs), gallium arsenide (GaAs), or similar materials, but the embodiments of the present invention are not limited thereto. For example, n-type impurities may include silicon (Si), germanium (Ge), selenium (Se), carbon (C), tellurium (Te), tin (Sn), and the like, but the embodiments of the present invention are not limited thereto. For example, p-type impurities may include magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), beryllium (Be), etc., but the embodiments of the present invention are not limited thereto.

[0150] For example, the first semiconductor layer 131 and the second semiconductor layer 133 may be a nitride semiconductor containing n-type impurities and a nitride semiconductor containing p-type impurities, respectively, but the embodiments of the present invention are not limited thereto. For example, the first semiconductor layer 131 may be a nitride semiconductor containing p-type impurities, and the second semiconductor layer 133 may be a nitride semiconductor containing n-type impurities, but the embodiments of the present invention are not limited thereto.

[0151] An active layer 132 may be disposed between a first semiconductor layer 131 and a second semiconductor layer 133. The active layer 132 may emit light by receiving holes and electrons from the first semiconductor layer 131 and the second semiconductor layer 133. For example, the active layer 132 may comprise one of a single-well structure, a multi-well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure, but embodiments of the present invention are not limited thereto. For example, the active layer 132 may be formed of indium gallium nitride (InGaN), gallium nitride (GaN), or similar materials, but embodiments of the present invention are not limited thereto.

[0152] For example, the active layer 132 may comprise a multiple quantum well (MQW) structure having a well layer and a barrier layer having a higher bandgap than the well layer. For example, the active layer 132 may comprise an InGaN well layer and an AlGaN barrier layer, but embodiments of the present invention are not limited thereto.

[0153] An anode 134 may be disposed between the first semiconductor layer 131 and the solder pattern SDP. For example, the anode 134 may be electrically connected to the first semiconductor layer 131 and the first driving electrode CE1. The anode voltage output from the pixel driving circuit PD may be applied to the first semiconductor layer 131 through the signal line TL, the first driving electrode CE1, and the anode 134. For example, the anode 134 may be formed of a conductive material capable of eutectic bonding with the solder pattern SDP, but embodiments of the present invention are not limited thereto. For example, the anode 134 may be formed of gold (Au), tin (Sn), tungsten (W), silicon (Si), silver (Ag), titanium (Ti), iridium (Ir), chromium (Cr), indium (In), zinc (Zn), lead (Pb), nickel (Ni), platinum (Pt), copper (Cu), or alloys thereof, but embodiments of the present invention are not limited thereto.

[0154] A cathode 135 may be disposed on the second semiconductor layer 133. For example, the cathode 135 may be electrically connected to the second semiconductor layer 133 and the second electrode CE2. The cathode voltage output from the pixel driving circuit PD may be applied to the second semiconductor layer 133 through the contact electrode CCE, the second electrode CE2, and the cathode 135. The cathode 135 may be formed of a transparent conductive material to direct the light emitted by the light-emitting element ED upwards, but embodiments of the present invention are not limited thereto. For example, the cathode 135 may be formed of materials such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but embodiments of the present invention are not limited thereto.

[0155] The encapsulation film 136 may be disposed on at least some of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode 134, and the cathode 135. For example, the encapsulation film 136 may surround at least some of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode 134, and the cathode 135.

[0156] For example, the encapsulation film 136 can protect the first semiconductor layer 131, the active layer 132, and the second semiconductor layer 133. For example, the encapsulation film 136 can be disposed on the side surfaces of the first semiconductor layer 131, the active layer 132, and the second semiconductor layer 133.

[0157] For example, the encapsulation film 136 may be disposed on at least a portion of each of the anode 134 and the cathode 135, for example, on the edge portion (or one side) of the anode 134 and the edge portion (or one side) of the cathode 135. At least a portion of the anode 134 may be exposed from the encapsulation film 136, thereby allowing the anode 134 to be connected to the solder pattern SDP. For example, at least a portion of the cathode 135 may be exposed from the encapsulation film 136, thereby allowing the cathode 135 to be connected to the second electrode CE2. For example, the encapsulation film 136 may be formed of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), but embodiments of the invention are not limited thereto.

[0158] For example, the encapsulation film 136 may have a structure in which reflective material is dispersed in a resin layer, but embodiments of the present invention are not limited thereto. For example, the encapsulation film 136 may be manufactured as a reflector with various structures, but embodiments of the present invention are not limited thereto. Light emitted from the active layer 132 can be reflected upward by the encapsulation film 136, thereby enhancing light extraction efficiency. For example, the encapsulation film 136 may be a reflective layer, but embodiments of the present invention are not limited thereto.

[0159] According to the present invention, the light-emitting element (ED) has been described as having a vertical structure, but the embodiments of the present invention are not limited thereto. For example, the light-emitting element (ED) may have a lateral structure or a flip chip structure.

[0160] Although the first light-emitting element 130 has been described with reference to FIG9, the second light-emitting element 140 and the third light-emitting element 150 may have substantially the same structure as the first light-emitting element 130. For example, the second light-emitting element 140 and the third light-emitting element 150 may have substantially the same structure as the first semiconductor layer 131, active layer 132, second semiconductor layer 133, anode 134, cathode 135, and encapsulation film 136 of the first light-emitting element 130.

[0161] According to the present invention, a first optical layer 117a surrounding a plurality of light-emitting elements ED may be disposed around the light-emitting elements ED in a display area AA. The first optical layer 117a may surround the plurality of light-emitting elements ED. For example, the first optical layer 117a may be disposed to cover the plurality of light-emitting elements ED and the bank BNK in a region of a plurality of sub-pixels. For example, the first optical layer 117a may cover the bank BNK, a portion of the first passivation layer 116, and the space between the plurality of light-emitting elements ED. The first optical layer 117a may be disposed or may cover the space between the plurality of light-emitting elements ED and the plurality of bank BNK contained in a pixel PX. For example, the first optical layer 117a may extend in a first direction (X-axis direction) and may be spaced apart in a second direction (Y-axis direction). For example, the first optical layer 117a may be disposed to surround the side portion of the light-emitting elements ED and the bank BNK between the first passivation layer 116 and the second electrode CE2, but embodiments of the present invention are not limited thereto. For example, the first optical layer 117a may be a diffusion layer, a sidewall diffusion layer, or the like, but the embodiments of the present invention are not limited thereto.

[0162] The first optical layer 117a may comprise an organic insulating material in which microparticles are dispersed, but embodiments of the present invention are not limited thereto. For example, the first optical layer 117a may be formed of a siloxane in which micro-metal particles, such as titanium dioxide (TiO2) particles, are dispersed, but embodiments of the present invention are not limited thereto. Light emitted from the plurality of light-emitting elements ED can be scattered by the microparticles dispersed in the first optical layer 117a and emitted to the outside of the display device 1000. Therefore, the first optical layer 117a can improve the extraction efficiency of light emitted by the plurality of light-emitting elements ED.

[0163] For example, the first optical layer 117a may be disposed in each of the plurality of pixels PX, or the first optical layer 117a may be disposed together with some pixels PX disposed in the same column, but the embodiments of the present invention are not limited thereto. For example, the first optical layer 117a may be disposed in each of the plurality of pixels PX, or the plurality of pixels PX may share a single first optical layer 117a. As another example, each of the plurality of sub-pixels may separately contain the first optical layer 117a, but the embodiments of the present invention are not limited thereto.

[0164] According to the present invention, the second optical layer 117b may be disposed on the first passivation layer 116 in the display area AA. For example, the second optical layer 117b may be disposed around the first optical layer 117a. For example, the second optical layer 117b may be disposed to surround the first optical layer 117a. For example, the second optical layer 117b may be in contact with the side surface of the first optical layer 117a. For example, the second optical layer 117b may be disposed in the region between a plurality of pixels PX. However, embodiments of the present invention are not limited thereto, and for example, the second optical layer 117b may be a diffusion layer, a diffusion layer window, a window diffusion layer, or the like, but embodiments of the present invention are not limited thereto.

[0165] The second optical layer 117b may be formed of an organic insulating material, but embodiments of the present invention are not limited thereto. The second optical layer 117b may be formed of the same material as the first optical layer 117a, but embodiments of the present invention are not limited thereto. For example, the first optical layer 117a may contain microparticles, and the second optical layer 117b may not contain microparticles. For example, the second optical layer 117b may be formed of a silicate, but embodiments of the present invention are not limited thereto.

[0166] For example, the thickness of the first optical layer 117a may be less than the thickness of the second optical layer 117b, but the embodiments of the present invention are not limited thereto. Therefore, when viewed in a plan view, the area where the first optical layer 117a is disposed may include a recessed portion that is recessed inward relative to the upper surface of the second optical layer 117b.

[0167] According to the present invention, the second electrode CE2 may be disposed on the first optical layer 117a and the second optical layer 117b. For example, the second electrode CE2 may be electrically connected to a plurality of contact electrodes CCE through contact holes in the second optical layer 117b. For example, the second electrode CE2 may be disposed on a plurality of light-emitting elements ED. For example, the second electrode CE2 may contain a transparent conductive oxide such as indium tin oxide (ITO) or indium zinc oxide (IZO), but embodiments of the present invention are not limited thereto. For example, the second electrode CE2 may be disposed in contact with the cathode 135. For example, the second electrode CE2 may overlap with the first optical layer 117a. For example, the second electrode CE2 may cover the outer plane of the first optical layer 117a.

[0168] The second electrode CE2 can extend continuously in the first direction (X-axis direction) of the substrate 110. Therefore, the second electrode CE2 can be connected to a plurality of pixels PX disposed in the first direction (X-axis direction) of the substrate 110. For example, the second electrode CE2 can be connected to a plurality of pixels PX.

[0169] According to the present invention, the second electrode CE2 may extend continuously on the first optical layer 117a, the second optical layer 117b, and the light-emitting element ED. The region where the first optical layer 117a is disposed may include a recessed portion that is recessed inward relative to the upper surface of the second optical layer 117b. Therefore, since the first portion of the second electrode CE2 disposed on the first optical layer 117a is disposed along the recessed portion, the first portion of the second electrode CE2 may be disposed at a position lower than the position of the second portion of the second electrode CE2 disposed on the second optical layer 117b.

[0170] A third optical layer 117c may be disposed on the second electrode CE2. The third optical layer 117c may be disposed overlapping with a plurality of light-emitting elements ED and a first optical layer 117a. Since the third optical layer 117c is disposed on the second electrode CE2 and the plurality of light-emitting elements ED, it can improve the appearance of muras that may occur in some of the plurality of light-emitting elements ED. For example, when a plurality of light-emitting elements ED are transferred onto the substrate 110 of the display device 1000, unevenly spaced areas may appear between the plurality of light-emitting elements ED due to process differences or similar reasons. When the spacing between the plurality of light-emitting elements ED is uneven, the light-emitting area of ​​each of the plurality of light-emitting elements ED may be unevenly distributed, which may cause the user to perceive muras. Therefore, by configuring the third optical layer 117c to uniformly diffuse light across the plurality of light-emitting elements ED, the occurrence of muras caused by the light emitted by some of the light-emitting elements ED can be reduced. Therefore, the light emitted from the plurality of light-emitting elements ED is uniformly diffused by the third optical layer 117c and extracted to the outside of the display device 1000, thereby improving the brightness uniformity of the display device 1000.

[0171] The third optical layer 117c may be formed from an organic insulating material in which microparticles are dispersed, but embodiments of the present invention are not limited thereto. For example, the third optical layer 117c may be formed from a siloxane in which micro-metal particles, such as titanium dioxide (TiO2) particles, are dispersed, but embodiments of the present invention are not limited thereto. For example, the third optical layer 117c may be formed from the same material as the first optical layer 117a, but embodiments of the present invention are not limited thereto. For example, the third optical layer 117c may be a diffusion layer, an upper diffusion layer, or the like, but embodiments of the present invention are not limited thereto.

[0172] According to the present invention, light emitted from a plurality of light-emitting elements (EDs) can be scattered by microparticles dispersed in the third optical layer 117c and emitted to the outside of the display device 1000. The third optical layer 117c can uniformly mix the light emitted from the plurality of light-emitting elements (EDs), thereby further improving the brightness uniformity of the display device 1000. In addition, the light extraction efficiency of the display device 1000 can be improved by the light scattered by the plurality of microparticles, thereby enabling the display device 1000 to operate at lower power.

[0173] In the display area AA, a black matrix BM can be disposed on the second electrode CE2, the first optical layer 117a, the second optical layer 117b, and the third optical layer 117c. For example, the contact holes of the second optical layer 117b can be filled with the black matrix BM. The black matrix BM is configured to cover the display area AA, and thus reduces color mixing of light from multiple sub-pixels and reflection of external light. For example, the black matrix BM is also disposed in the contact holes where the second electrode CE2 connects to the contact electrode CCE, and thus prevents or reduces light leakage between multiple adjacent sub-pixels.

[0174] For example, the black matrix BM can be formed of an opaque material, but embodiments of the present invention are not limited thereto. For example, the black matrix BM can be an organic insulating material containing black pigment or black dye, but embodiments of the present invention are not limited thereto.

[0175] In the display area AA, a cover layer 118 may be disposed on the black matrix BM. The cover layer 118 protects the arrangement beneath it, and for example, the cover layer 118 may be formed of an organic insulating material, but embodiments of the invention are not limited thereto. For example, the cover layer 118 may be formed of a photoresist, a polyimide (PI) based material, a photoacrylic material, or the like, but embodiments of the invention are not limited thereto. For example, the cover layer 118 may be an outer coating, an insulating layer, or the like, but embodiments of the invention are not limited thereto.

[0176] The polarizing layer 293 may be disposed on the cover layer 118 via the first adhesive layer 291. The cover member 120 may be disposed on the polarizing layer 293 via the second adhesive layer 295. For example, the first adhesive layer 291 and the second adhesive layer 295 may comprise optically transparent adhesive (OCA), optically transparent resin (OCR), pressure-sensitive adhesive (PSA), or similar materials, but embodiments of the present invention are not limited thereto.

[0177] According to the present invention, a plurality of pad electrodes PE may be disposed on a third insulating layer 115c in a second non-display area NA2. For example, at least some of the pad electrodes PE may be exposed from a first passivation layer 116. For example, the plurality of pad electrodes PE may be electrically connected to the 2-4 connection line 122d through contact holes in the third insulating layer 115c.

[0178] An adhesive layer ACF can be disposed on a plurality of pad electrodes PE. The adhesive layer ACF can be an adhesive layer in which conductive spheres are dispersed in an insulating material, but embodiments of the present invention are not limited thereto. When heat or pressure is applied to the adhesive layer ACF, the conductive spheres located at the portions where heat or pressure is applied can become electrically connected, thereby exhibiting conductive properties. The adhesive layer ACF can be disposed between a plurality of pad electrodes PE and a flexible circuit board (or flexible film) CB, thereby allowing the flexible circuit board (or flexible film) CB to be attached or bonded to the plurality of pad electrodes PE. For example, the adhesive layer ACF can be an anisotropic conductive film (ACF), but embodiments of the present invention are not limited thereto.

[0179] A flexible circuit board (or flexible film) CB can be disposed on an adhesive layer ACF. The flexible circuit board (or flexible film) CB can be electrically connected to a plurality of pad electrodes PE through the adhesive layer ACF. Therefore, the signal output from the flexible circuit board (or flexible film) CB and the printed circuit board 160 can be transmitted to the pixel driving circuit PD of the display area AA through the plurality of pad electrodes PE and 2-4 connection lines 122d, 2-3 connection lines 122c, 2-2 connection lines 122b and 2-1 connection lines 122a. In addition, as shown in Figures 8A and 8B, these connection lines 121a to 121d can be disposed on the same layer as these connection lines 122a to 122d. For example, these connection lines 121a to 121d and these connection lines 122a to 122d can be formed simultaneously from the same material in the same masking process.

[0180] FIG10 is an enlarged view of a display device according to an embodiment of the present invention. FIG11 is a cross-sectional view of a display device according to an embodiment of the present invention. For example, FIG10 may be a partially enlarged view of the display area and the first non-display area. FIG11 may be a cross-sectional view of FIG10. It should be noted that although, as shown in FIG5 to 7 and FIG10, in arranging sub-pixels or light-emitting elements, the main light-emitting elements are arranged in the same column, while redundant light-emitting elements are arranged in another column, the present invention is not limited thereto. For example, within a pixel, one of the main light-emitting elements (e.g., the second main light-emitting element) may be arranged in a column provided with the first redundant light-emitting element and the third redundant light-emitting element, while one of the redundant light-emitting elements (e.g., the second redundant light-emitting element) may be arranged in a column provided with the first main light-emitting element and the third main light-emitting element.

[0181] Referring to Figures 10 and 11, the first non-display area NA1 may be located outside and adjacent to the display area AA. The first non-display area NA1 may include a first virtual area DUA1 surrounding the display area AA and / or a second virtual area DUA2 surrounding the first virtual area DUA1. The first virtual area DUA1 may be located outside the display area AA, while the second virtual area DUA2 may be located outside the first virtual area DUA1.

[0182] The first virtual region DUA1 can be configured to provide a process margin during the transfer of light-emitting elements (EDs). When the transfer is performed only in the display area AA, if a process error occurs at the edge of the display area AA, areas where EDs are not transferred may appear in the display area AA. Therefore, by performing the transfer in an area wider than the display area AA containing the first virtual region DUA1, it is possible to prevent EDs from being transferred in the display area AA or to reduce the amount of EDs transferred in the display area AA. The second virtual region DUA2 can be configured for a cutting margin during panel cutting. If the second virtual region DUA2 is not provided, the display area AA may be damaged if a cutting tolerance occurs. For example, the cutting may be a trimming process or a dicing process, but embodiments of the present invention are not limited thereto.

[0183] The areas of the first virtual region DUA1 and the second virtual region DUA2 can be adjusted in various ways. For example, the first virtual region DUA1 can be wider than the second virtual region DUA2. For example, the first virtual region DUA1 can be narrower than the second virtual region DUA2. For example, the areas of the first virtual region DUA1 and the second virtual region DUA2 can be the same.

[0184] A virtual light-emitting element (DED) can be disposed in the first virtual area DUA1. The virtual light-emitting element DED can be a normal light-emitting element that does not emit light without applied power. A signal line TL can be disposed in the display area AA to connect to the first driving electrode CE1; however, the line may not be disposed in the first virtual area DUA1 and the second virtual area DUA2. Since the first virtual area DUA1 and the second virtual area DUA2 are virtual areas taking into account tolerances, lines for applying power may not be provided to them. However, embodiments of the present invention are not limited to this. For example, lines may also be disposed in the first virtual area DUA1 and the second virtual area DUA2.

[0185] The cross-sectional structure of the first virtual region DUA1 and the second virtual region DUA2 can be similar to the cross-sectional structure of the display region AA. In the first virtual region DUA1 and the second virtual region DUA2, the first buffer layer 111a and the second buffer layer 111b can be disposed on the substrate 110.

[0186] The adhesive layer 112 may be disposed on the second buffer layer 111b. The adhesive layer 112 may be formed of any of the following: adhesive polymer, epoxy resin, ultraviolet (UV) curable resin, polyimide material, acrylate material, urethane material, and polydimethylsiloxane (PDMS), but the embodiments of the present invention are not limited thereto.

[0187] A virtual pixel driving circuit (DPD) can be disposed on the adhesive layer 112 in the first virtual region DUA1. When the virtual pixel driving circuit (DPD) is implemented as a driver, the virtual driver can be assembled on the adhesive layer 112 through a transfer process, but the embodiments of the present invention are not limited thereto. The virtual pixel driving circuit (DPD) can be configured such that the height of the first virtual region DUA1 matches the height of the display region AA.

[0188] In the second virtual region DUA2, a virtual pixel driving circuit DPD may not be provided. However, the embodiments of the present invention are not limited thereto. For example, the virtual pixel driving circuit DPD may also be provided in the second virtual region DUA2.

[0189] The first protective layer 113a and the second protective layer 113b may be disposed on the adhesive layer 112 and the virtual pixel driving circuit DPD. The first protective layer 113a and the second protective layer 113b may be disposed to surround the side surface of the virtual pixel driving circuit DPD, but embodiments of the present invention are not limited thereto. For example, the second protective layer 113b may be disposed to cover at least a portion of the upper surface of the virtual pixel driving circuit DPD.

[0190] The first protective layer 113a and the second protective layer 113b may be formed of organic insulating materials, but the embodiments of the present invention are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b may be formed of photoresist, polyimide (PI) based materials, photoacrylic materials, or similar materials, but the embodiments of the present invention are not limited thereto.

[0191] According to the present invention, a plurality of connecting lines 121 and 123 may be disposed on the second protective layer 113b. The plurality of connecting lines 121 and 123 may include a plurality of first connecting lines 121 disposed in the display area AA and a plurality of virtual connecting lines 123 disposed in the first non-display area NA1.

[0192] The plurality of first connecting lines 121 may be lines used to electrically connect the pixel driving circuit PD to the light-emitting element. Since the plurality of virtual connecting lines 123 are virtual lines whose height matches the height of the plurality of first connecting lines 121, the plurality of virtual connecting lines 123 may not be electrically connected to the virtual pixel driving circuit DPD. However, the invention is not limited thereto. For example, the plurality of virtual connecting lines 123 may also be electrically connected to the virtual pixel driving circuit DPD.

[0193] The plurality of first connecting lines 121 may include: 1-1 connecting line 121a, 1-2 connecting line 121b, 1-3 connecting line 121c, and 1-4 connecting line 121d, but the embodiments of the present invention are not limited thereto. The plurality of virtual connecting lines 123 may include: 1-1 virtual connecting line 123a disposed at the lowest layer, 1-2 virtual connecting line 123b disposed on 1-1 virtual connecting line 123a, 1-3 virtual connecting line 123c disposed on 1-2 virtual connecting line 123b, and 1-4 virtual connecting line 123d disposed on 1-3 virtual connecting line 123c, but the embodiments of the present invention are not limited thereto.

[0194] A plurality of 1-1 connecting lines 121a and a plurality of 1-1 virtual connecting lines 123a may be disposed on the second protective layer 113b. The plurality of 1-1 connecting lines 121a may be electrically connected to the pixel driving circuit PD. The plurality of 1-1 connecting lines 121a may transmit the voltage output from the pixel driving circuit PD to the first driving electrode CE1 or the second electrode CE2.

[0195] Virtual connection line 123a can be configured as the lowest layer among a plurality of virtual connection lines 123, and can be configured to be closest to the virtual pixel driving circuit DPD. Virtual connection line 123a can be electrically insulated from the virtual pixel driving circuit DPD. The virtual pixel driving circuit DPD can be a virtual driver, but embodiments of the present invention are not limited thereto.

[0196] The third protective layer 114 may be disposed on the second protective layer 113b. The third protective layer 114 may be completely disposed in the display area AA and the first non-display area NA1. The third protective layer 114 may be formed of an organic insulating material. For example, the third protective layer 114 may be formed of a photoresist, a polyimide (PI) based material, a photoacrylic material, or the like, but embodiments of the present invention are not limited thereto. For example, the first protective layer 113a, the second protective layer 113b, and the third protective layer 114 may be formed of the same material, but embodiments of the present invention are not limited thereto.

[0197] Multiple 1-2 connection lines 121b and multiple 1-2 virtual connection lines 123b can be disposed on the third protective layer 114. Multiple 1-2 connection lines 121b can be connected to or directly connected to the pixel driving circuit PD.

[0198] The first insulating layer 115a may be disposed on a plurality of 1-2 connecting lines 121b and a plurality of 1-2 virtual connecting lines 123b. The first insulating layer 115a may be entirely disposed within the display area AA and the first non-display area NA1, but embodiments of the present invention are not limited thereto. The first insulating layer 115a may be formed of an organic insulating material, but embodiments of the present invention are not limited thereto. For example, the first insulating layer 115a may be formed of a photoresist, a polyimide (PI) based material, a photoacrylic material, or the like, but embodiments of the present invention are not limited thereto.

[0199] A plurality of 1-3 connecting lines 121c and a plurality of 1-3 virtual connecting lines 123c may be disposed on the first insulating layer 115a. The plurality of 1-3 connecting lines 121c may be electrically connected to a plurality of 1-2 connecting lines 121b.

[0200] The second insulating layer 115b may be disposed on a plurality of 1-3 connecting lines 121c and a plurality of 1-3 virtual connecting lines 123c. The second insulating layer 115b may be formed of an organic insulating material, but embodiments of the present invention are not limited thereto. For example, the second insulating layer 115b may be formed of a photoresist, a polyimide (PI) based material, a photoacrylic material, or the like, but embodiments of the present invention are not limited thereto.

[0201] A plurality of 1-4 connecting lines 121d and a plurality of 1-4 virtual connecting lines 123d may be disposed on the second insulating layer 115b. A plurality of 1-4 connecting lines 121d may be electrically connected to a plurality of 1-3 connecting lines 121c. A third insulating layer 115c may be disposed on a plurality of first connecting lines 121 and a plurality of virtual connecting lines 123.

[0202] The first protective layer 113a, second protective layer 113b, third protective layer 114, first insulating layer 115a, second insulating layer 115b, and third insulating layer 115c can be formed of organic insulating materials, but embodiments of the present invention are not limited thereto. For example, the first protective layer 113a, second protective layer 113b, third protective layer 114, first insulating layer 115a, second insulating layer 115b, and third insulating layer 115c can be formed of photoresist, polyimide (PI) based materials, photoacrylic based materials, or similar materials, but embodiments of the present invention are not limited thereto. During the manufacturing process, organic insulating materials may generate a large amount of gas. Since the gas cannot pass through the inorganic layer, the inability to expel the gas from inside the panel may cause the inorganic layer to rise.

[0203] The embankment BNK can be disposed on the third insulating layer 115c. The first electrodes CE1 and DCE1 can be disposed on the embankment BNK. The first electrodes CE1 and DCE1 can include a first driving electrode CE1 disposed on the embankment BNK in the display area AA and a first virtual electrode DCE1 disposed on the embankment BNK in the first non-display area NA1. The first driving electrode CE1 and the first virtual electrode DCE1 can contain the same material. The first driving electrode CE1 can be electrically connected to the pixel driving circuit PD through a plurality of first connecting lines 121. The first virtual electrode DCE1 can be electrically insulated from the virtual connecting lines 123 and the virtual pixel driving circuit DPD.

[0204] The solder pattern SDP can be disposed on each of the first driving electrode CE1 and the first dummy electrode DCE1. The solder pattern SDP allows the light-emitting element ED to be bonded to the first driving electrode CE1 and the dummy light-emitting element DED to be bonded to the first dummy electrode DCE1.

[0205] The first passivation layer 116 may be disposed on the light-emitting element (ED) and the virtual light-emitting element (DED), and may contain an inorganic insulating material. The first passivation layer 116 can reduce the penetration of moisture or impurities into the light-emitting element (ED) and the virtual light-emitting element (DED). For example, the first passivation layer 116 may be formed as a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but the embodiments of the present invention are not limited thereto.

[0206] The first optical layer 117a may be configured to cover a plurality of light-emitting elements ED, a plurality of virtual light-emitting elements DED, and a plurality of embankment BNK. For example, the first optical layer 117a may cover a portion of the embankment BNK, a portion of the first passivation layer 116, the space between the plurality of light-emitting elements ED, and the space between the plurality of virtual light-emitting elements DED.

[0207] The second electrode CE2 can be disposed in the display area AA. The second electrode CE2 can be disposed on the light-emitting element ED. The second electrode CE2 can be electrically connected to the pixel driving circuit PD.

[0208] The second electrode CE2 may not be located in the first non-display area NA1. However, the embodiments of the present invention are not limited thereto. For example, the second electrode CE2 may also be located on the virtual light-emitting element DED. For example, when the virtual connection line 123 is not electrically connected to the virtual pixel driving circuit DPD, the virtual light-emitting element DED may not emit light even if the second electrode CE2 is located on the virtual light-emitting element DED.

[0209] The black matrix BM can be completely disposed within the display area AA and the first non-display area NA1. The black matrix BM can have an opening formed in an area corresponding to the light-emitting element ED in the display area AA, and can be completely disposed above the virtual light-emitting element DED in the first non-display area NA1. Since the first virtual area DUA1 and the second virtual area DUA2 are not light-emitting areas, the black matrix BM can be completely disposed above the first virtual area DUA1 and the second virtual area DUA2.

[0210] Referring to Figures 11, 12A, and 12B, the second virtual region DUA2 can be an area formed to provide margin at the portion to be cut after panel manufacturing. Virtual connection lines 123 corresponding to the first connection line 121 in the display area AA can be provided in the second virtual region DUA2. For example, the first virtual region DUA1 may include: virtual connection lines 1-1a, 1-2b, 1-3c, and 1-4d, which correspond to the connection lines 1-1a, 1-2b, 1-3c, and 1-4d respectively provided in the display area AA. However, embodiments of the present invention are not limited thereto. For example, virtual connection lines 123 can be omitted in the second virtual region DUA2.

[0211] In the second virtual region DUA2, the inorganic light-emitting element ED may not be disposed on the embankment BNK, but the embodiments of the present invention are not limited thereto. For example, the virtual light-emitting element DED may be disposed in at least a portion of the second virtual region DUA2. For example, in the second virtual region DUA2, embankment BNKs on which virtual light-emitting elements DED are disposed may be alternately disposed with embankment BNKs on which virtual light-emitting elements DED are not disposed, but the present invention is not limited thereto.

[0212] The first passivation layer 116 may cover the embankment BNK and the first electrode disposed in the display area AA, the first virtual area DUA1, and the second virtual area DUA2. The first passivation layer 116 may include a first opening 116a, which is disposed on the first driving electrode CE1 in the display area AA and the first virtual electrode DCE1 in the first virtual area DUA1 and the second virtual area DUA2. The first driving electrode CE1 in the display area AA and the first virtual electrode DCE1 in the first virtual area DUA1 and the second virtual area DUA2 may be exposed through the first opening 116a of the first passivation layer 116.

[0213] The light-emitting element ED can be disposed on the first driving electrode CE1, while the virtual light-emitting element DED can be disposed on the first virtual electrode DCE1 in the first virtual region DUA1. In the second virtual region DUA2, the first virtual electrode DCE1 can be in a state where no virtual light-emitting element DED is disposed and only a solder pattern SDP is disposed thereon, but the present invention is not limited thereto. In another example, in the second virtual region DUA2, the solder pattern SDP and / or the first virtual electrode DCE1 can also be omitted.

[0214] In display devices using inorganic light-emitting elements (EDs), a large amount of gas GS is generated during the panel manufacturing process due to the stacking of a relatively large number of organic layers. According to an embodiment of the present invention, the gas GS can be discharged to the outside through the first opening 116a of the first passivation layer 116. Since the virtual light-emitting elements (DEDs) are not stacked on the first opening 116a formed in the second virtual region DUA2, the first opening 116a can remain open. Therefore, the gas GS can be discharged to the outside through the first opening 116a of the second virtual region DUA2.

[0215] According to an embodiment of the present invention, since the virtual light-emitting element DED is not disposed on the first virtual electrode DCE1 in the second virtual region DUA2, even after the light-emitting element ED is transferred, the gas GS can still be discharged to the outside through the first opening 116a formed in the second virtual region DUA2. Therefore, the problem of the first driving electrode CE1, the first virtual electrode DCE1, or the first passivation layer 116 being lifted or displaced by the gas GS can be improved.

[0216] The first passivation layer 116 may further include a second opening 116b disposed between the embankment BNK in the second virtual region DUA2 and / or the first virtual region DUA1. The second opening 116b facilitates the discharge of gas GS inside the panel. In the second virtual region DUA2, the number of second openings 116b may be greater than the number of first openings 116a. However, embodiments of the invention are not limited thereto. For example, in the second virtual region DUA2, the number of second openings 116b may be less than the number of first openings 116a. When the number of second openings 116b is too large, the adhesion between the first passivation layer 116 and the third insulating layer 115c may be weakened.

[0217] According to an embodiment of the present invention, a second passivation layer 119 may be disposed on the 1-1 connection line 121a and the 1-1 virtual connection line 123a. In the second passivation layer 119, a third opening 119a may be formed on the 1-1 virtual connection line 123a in the first virtual region DUA1 and the second virtual region DUA2, allowing the gas GS generated from the first protective layer 113a and the second protective layer 113b to be discharged to the outside. Referring to FIG12A, the third opening 119a may be disposed on the 1-1 virtual connection line 123a. When the third opening 119a is disposed outside the 1-1 virtual connection line 123a, moisture can permeate into the interior of the display panel through the third opening 119a. Since the 1-1 virtual connection line 123a is a virtual line that does not affect the performance of the display panel even when it is raised or delamination due to gas discharge, the 1-1 virtual connection line 123a can be configured as a channel for gas discharge.

[0218] Referring to Figure 10, a bank BNK can be set for each of the plurality of sub-pixels, and a light-emitting element ED can be set on the bank BNK. A first calibration key AK1 for guiding the position of the light-emitting element ED can be set on one of the plurality of banks BNK. The bank on which the first calibration key AK1 is set can be called an alignment bank BNK1, but the present invention is not limited thereto.

[0219] The first calibration bond AK1 and the first driving electrode CE1 can be formed simultaneously and can have the same layer structure, but the embodiments of the present invention are not limited to this. For example, the first calibration bond AK1 can be formed of conductive materials such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but the embodiments of the present invention are not limited to this.

[0220] The first calibration bond AK1 can be formed in a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but the embodiments of the present invention are not limited thereto.

[0221] The first calibration key AK1 can be located on one or more of the plurality of embankment BNKs. For example, the first calibration key AK1 can be located on one of 16 embankment BNKs. However, the invention is not limited thereto, and the first calibration key AK1 can be located on one of 32 or 64 embankment BNKs.

[0222] Referring to Figures 13 and 14, a first passivation layer 116 may be disposed on a plurality of alignment banks BNK1. The first passivation layer 116 may cover the first drive electrode CE1. The first passivation layer 116 may include a fourth opening 116c disposed on the first calibration key AK1. The alignment banks BNK1 may be formed of an organic insulating material. The alignment banks BNK1 may be formed of a single layer or multiple layers of organic insulating material. Therefore, gases generated from the alignment banks BNK1 and the organic layer beneath the alignment banks BNK1 can be discharged through the fourth opening 116c. Therefore, since gas GS is discharged through the fourth opening 116c, the phenomenon of the first calibration key AK1 being lifted or displaced can be improved.

[0223] Referring to Figure 15, a fourth opening 116c may be provided on the first calibration key AK1. A first passivation layer 116 may cover the edge of the first calibration key AK1, thereby improving the delamination problem of the first calibration key AK1. However, embodiments of the present invention are not limited to this. As shown in Figure 16, the fourth opening 116c may be provided to surround the first calibration key AK1 while being spaced apart from it. Therefore, gas GS can be discharged through the fourth opening 116c without passing through the first calibration key AK1, thereby improving the lifting or displacement problem of the first calibration key AK1. Furthermore, the first calibration key AK1 can be configured in various other shapes to perform various guiding or alignment functions necessary for manufacturing the display panel.

[0224] Figure 17 is a view illustrating the state in which the second calibration key is disposed outside the display device according to an embodiment of the present invention. Figure 18 is a cross-sectional view of the display device according to an embodiment of the present invention. Figure 19 is a cross-sectional view of the display device according to an embodiment of the present invention. Figure 20 is a view illustrating the state in which the second calibration key is layered. Figure 21 is a cross-sectional view of the display device according to an embodiment of the present invention.

[0225] Referring to Figure 17, the substrate 110 may include a display area AA and a first non-display area NA1. A plurality of second calibration keys AK2 may be disposed outside the first non-display area NA1. The second calibration keys AK2 can perform alignment necessary for manufacturing the display panel. For example, the second calibration keys AK2 may include calibration keys AK21 used as guides during the stacking of touch panels, calibration keys used for alignment during the transfer of light-emitting elements ED, and calibration keys used as guides for the cutting position of the display panel, but embodiments of the present invention are not limited thereto. The plurality of second calibration keys AK2 may be arranged in different shapes to perform various guiding or alignment functions necessary for manufacturing the display panel.

[0226] A plurality of second calibration keys AK2 may be configured to surround a first non-display area NA1 of the display panel. The plurality of second calibration keys AK2 may be configured on a cut area TUA, which is the outer area of ​​the first non-display area NA1. The cut area TUA may be an area removed by cutting after panel manufacturing is completed. For example, the cut area TUA may be a trimming area or a scribing area, but embodiments of the invention are not limited thereto.

[0227] Referring to Figure 18, a first buffer layer 111a, a second buffer layer 111b, an adhesive layer 112, a first protective layer 113a, and a second protective layer 113b may be formed on the substrate 110, and a 1-1 virtual interconnect line 123a may be formed on the second protective layer 113b. A second passivation layer 119 may be formed on the 1-1 virtual interconnect line 123a.

[0228] The second passivation layer 119 may include a third opening 119a exposing the upper part of the 1-1 virtual connection line 123a. Therefore, the gas GS generated in the first protective layer 113a and the second protective layer 113b can be discharged to the outside through the third opening 119a. Thus, the problem of the second passivation layer 119 being lifted due to the gas GS generated in the first protective layer 113a and the second protective layer 113b can be mitigated.

[0229] Referring to Figure 19, a third protective layer 114, a first insulating layer 115a, a second insulating layer 115b, and a third insulating layer 115c may be formed on the second passivation layer 119. A bank BNK may be formed on the third insulating layer 115c, and a first virtual electrode DCE1 may be formed on the bank BNK. In the cutting region TUA, a second calibration key AK2 may be formed simultaneously with the first virtual electrode DCE1.

[0230] The first passivation layer 116 may include a first opening 116a exposing the first dummy electrode DCE1 and a fifth opening 116d surrounding the second calibration key AK2. Gas GS generated in the organic layer is discharged through the fifth opening 116d, thereby preventing the second calibration key AK2 from being lifted or delaminated by the gas GS. As shown in Figure 20, when the second calibration key AK2 delaminates, identification of the second calibration key may become difficult, which can lead to misalignment in subsequent processes.

[0231] Referring to Figure 21, various processes performed after the transfer process can be executed using the second calibration key AK2. A black matrix BM can be set in the first non-display area NA1, and a cover layer 118 can be set on it. After the display panel manufacturing is completed, the cut area TUA can be removed along the cutting line (or trimming line or scribing line).

[0232] Figures 22 to 25 are views illustrating the apparatus used in the display device according to an embodiment of the present invention.

[0233] Referring to Figures 22 to 25, the display device 1000 according to an embodiment of the present invention may be included in various devices or electronic devices. For example, various electronic devices may include wearable devices 1100, mobile devices 1200, notebook computers 1300, and monitors or TVs 1400, but the embodiments of the present invention are not limited thereto.

[0234] Wearable device 1100, mobile device 1200, laptop computer 1300, and monitor or TV 1400 may respectively include housing portions 1005, 1010, 1015, and 1020, and may respectively include display panel 100 and display device 1000 according to embodiments of the present invention as described with reference to Figures 1 to 21.

[0235] For example, the display device according to embodiments of the present invention can be applied to mobile devices, video phones, smartwatches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, curved devices, sliding devices, variable devices, electronic notebooks, e-books, portable multimedia players (PMPs), personal digital assistants (PDAs), MP3 players, mobile medical devices, desktop personal computers (PCs), laptops, netbook computers, workstations, navigation devices, vehicle display devices, theater display devices, televisions, wallpaper devices, signage devices, gaming devices, laptops, monitors, cameras, camcorders, home appliances, and the like.

[0236] The following describes a display device according to one or more exemplary embodiments of the present invention.

[0237] A display device according to one or more embodiments of the present invention may include: a substrate including a display area and a non-display area; a first electrode disposed on the substrate; a light-emitting element disposed on each of the first electrodes; and a first passivation layer disposed on the first electrode. The first electrode may include a first driving electrode disposed in the display area; and a first dummy electrode disposed in the non-display area, and the first passivation layer may include a first opening disposed on the first dummy electrode.

[0238] According to one or more embodiments of the present invention, the display device may further include a plurality of insulating layers disposed on a substrate. The plurality of insulating layers may be disposed below the first electrode.

[0239] According to one or more embodiments of the present invention, the plurality of insulating layers may comprise organic materials. The first passivation layer may comprise inorganic materials.

[0240] According to one or more embodiments of the present invention, the first opening of the first passivation layer may be provided on each of the first driving electrode and the first virtual electrode.

[0241] According to one or more embodiments of the present invention, the display device may further include a driver electrically connected to the first driving electrode.

[0242] According to one or more embodiments of the present invention, the light-emitting element may be electrically connected to the first driving electrode through eutectic bonding.

[0243] According to one or more embodiments of the present invention, the light-emitting element may include: an anode; a light-emitting structure disposed on the anode; and a cathode disposed on the light-emitting structure.

[0244] According to one or more embodiments of the present invention, the non-display area may include: a first virtual area disposed outside the display area; and a second virtual area disposed outside the first virtual area.

[0245] According to one or more embodiments of the present invention, the display device may further include a virtual light-emitting element disposed in a first virtual area.

[0246] According to one or more embodiments of the present invention, the display device may further include a virtual driver disposed in a first virtual region, wherein the virtual light-emitting element and the virtual driver may be electrically insulated from each other.

[0247] According to one or more embodiments of the present invention, the display device may further include a plurality of banks disposed between and spaced apart from the plurality of insulating layers and the first driving electrode. A light-emitting element may be disposed on each of the plurality of banks.

[0248] According to one or more embodiments of the present invention, in the non-display area, the first passivation layer may include a second opening disposed between a plurality of embankments.

[0249] According to one or more embodiments of the present invention, a plurality of connecting lines may include: a plurality of first connecting lines disposed in a display area; and a plurality of virtual connecting lines disposed in a non-display area. The plurality of first connecting lines may be electrically connected to a pixel driving circuit, while the plurality of virtual connecting lines may be electrically insulated from a virtual pixel driving circuit.

[0250] According to one or more embodiments of the present invention, a plurality of virtual connection lines may include 1-1 virtual connection lines, which are disposed at the lowest layer.

[0251] According to one or more embodiments of the present invention, the display device may further include a second passivation layer disposed on the 1-1 virtual connection line. The second passivation layer may include a third opening disposed on the 1-1 virtual connection line.

[0252] According to one or more embodiments of the present invention, the first electrode may include a first calibration key disposed on one of a plurality of embankments. The first passivation layer may include a fourth opening disposed on the first calibration key.

[0253] According to one or more embodiments of the present invention, the fourth opening may surround the first calibration key while being spaced apart from the first calibration key.

[0254] According to one or more embodiments of the present invention, the non-display area may include a cut-out region disposed outside the second virtual area. The non-display area may further include a second calibration key located within the cut-out region. The first passivation layer may further include a fifth opening surrounding the second calibration key.

[0255] According to one or more embodiments of the present invention, the display device may further include: a first optical layer disposed around a plurality of light-emitting elements; and a second optical layer disposed around the first optical layer.

[0256] According to one or more embodiments of the present invention, the first optical layer may be further disposed in the non-display area and overlap with the first opening of the first passivation layer.

[0257] According to one or more embodiments of the present invention, a solder pattern may be inserted in the first opening between the first optical layer and the first virtual electrode.

[0258] According to one or more embodiments of the present invention, the display device may further include: a second electrode disposed on a plurality of light-emitting elements; and a third optical layer disposed on the second electrode.

[0259] According to one or more embodiments of the present invention, the display device may further include a black matrix disposed on a third optical layer.

[0260] According to one or more embodiments of the present invention, each of the plurality of light-emitting elements may include: an anode; a first semiconductor layer disposed on the anode; an active layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the active layer; and a cathode disposed on the second semiconductor layer.

[0261] According to one or more embodiments of the present invention, a first electrode is located below a plurality of light-emitting elements and electrically connected to an anode. The first electrode and the anode can be electrically connected to each other via a patterned layer located between the first electrode and the anode through eutectic bonding.

[0262] According to one or more embodiments of the present invention, the light-emitting element may be an inorganic light-emitting element.

[0263] A display device according to one or more embodiments of the present invention may include: a substrate including a display area and a non-display area; a first electrode disposed on the substrate and including a first driving electrode disposed in the display area and a first virtual electrode disposed in the non-display area; a light-emitting element disposed on the first driving electrode; and a first passivation layer disposed on the first electrode, wherein the first passivation layer includes a first opening overlapping the first virtual electrode in the non-display area.

[0264] Since the essential features for the scope of the patent application are not specified in the detailed description of the invention and exemplary embodiments of the present invention, the scope of the scope of the patent application is not limited to the contents described in the content of the present invention.

[0265] According to the present invention, the gas inside the panel can be vented to the outside, thereby preventing the electrodes or calibration keys from lifting or shifting. Therefore, micro-LEDs or panel elements can be stacked in precise positions, thereby providing a display device with improved reliability.

[0266] According to the present invention, a display device capable of high-efficiency, low-power driving can be provided by individually controlling a plurality of micro-LEDs using a plurality of individual pixel driving circuits.

[0267] The effects of the present invention are not limited to those mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art based on the following description.

[0268] Although embodiments of the invention have been described in detail above with reference to the accompanying drawings, the invention is not necessarily limited to these embodiments and various changes and modifications can be made without departing from the spirit of the invention. Therefore, the embodiments disclosed herein are intended to illustrate, not limit, the technical concept of the invention, and the scope of the technical concept of the invention is not limited by these embodiments. Thus, the embodiments described above should be understood as exemplary and not restrictive in any way. The scope of the invention should be interpreted as defined by the appended claims, and all technical concepts within their equivalent scope should be interpreted as included within the scope of the invention.

[0269] [Cross-reference to related applications] This application claims priority and benefit to Korean Patent Application No. 10-2024-0098861, filed in the Republic of Korea on July 25, 2024, the entire disclosure of which is incorporated herein by reference for all purposes as if fully described herein.

[0270] 100: Display panel 110:Substrate 111a: First buffer layer 111b: Second Buffer Layer 112: Adhesive layer 113a: First protective layer 113b: Second protective layer 114: Third protective layer 115a: First insulating layer 115b: Second insulating layer 115c: Third insulating layer 116: First passivation layer 116a: First opening 116b: Second opening 116c: Fourth opening 116d: Fifth opening 117a: First optical layer 117b: Second optical layer 117c: Third optical layer 118: Overlay 119: Second passivation layer 119a: Third opening 120: Covering component 121: First connecting line, connecting line 121a:1-1 connecting cable 121b:1-2 connecting cable 121c:1-3 connecting cable 121d:1-4 connecting cable 122: Second connecting line 122a:2-1 connecting cable 122b:2-2 connecting cable 122c: 2-3 connecting cable 122d:2-4 connecting cable 123: Virtual connection cable, connection cable 123a:1-1 Virtual connection cable 123b:1-2 Virtual Connection Cable 123c:1-3 Virtual connection cable 123d:1-4 Virtual connection cable 130: First light-emitting element 130a:1-1 Light-emitting element 130b:1-2 Light-emitting elements 131: First semiconductor layer 132: Active Layer 133: Second semiconductor layer 134: Anode 135: Cathode 136: Encapsulation film 140: Second light-emitting element 140a: 2-1 Light-emitting element 140b: 2-2 Light-emitting elements 150: Third light-emitting element 150a:3-1 Light-emitting element 150b:3-2 Light-emitting element 160: Printed Circuit Board 180: Kong 291: First adhesive layer 293: Polarizing layer 295: Adhesive layer 1000: Display device 1005, 1010, 1015, 1020: Shell section 1100: Wearable devices 1200: Mobile Device 1300: Notebook computer 1400: Monitor, TV AA: Display area ACF: Adhesive Layer AK1: First calibration button AK2: Second Calibration Key AK21: Calibration Key BA: Bending area BM: Black Matrix BNK: Embankment BNK1: Aiming at the embankment CB: Flexible Circuit Board CCE: Contact Electrode CE1: First driving electrode, first electrode CE1a: First conductive layer CE1b: Second conductive layer CE1c: Third conductive layer CE1d: Fourth conductive layer CE2: Second electrode DCE1: First virtual electrode, first electrode DED: Virtual Light Emitting Element DPD: Virtual Pixel Driving Circuit DUA1: First Virtual Zone DUA2: Second Virtual Zone ED: Light-emitting element EM: Light Emitting Signal GS: Gas LL: Link MK: Calibration Key NA: Non-display area NA1: First non-display area NA2: Second non-display area NL: Communication Line PAD: Pad PD: Pixel driving circuit PE: Pad Electrode PX: pixel SC: Scan Signal SDP: Solder Pattern SP1: First sub-pixel SP1a:1-1 subpixel SP1b: 1-2 subpixels SP2: Second subpixel SP2a:2-1 sub-pixel SP2b: 2-2 subpixels SP3: Third subpixel SP3a: 3-1 subpixel SP3b: 3-2 subpixels TDR: Driving Transistor TEM: Light Emitting Transistor TL: Signal line TL1: First Signal Line TL2: Second Signal Line TL3: Third Signal Line TL4: Fourth Signal Line TL5: Fifth Signal Line TL6: Sixth Signal Line TUA: Cutting Area VDD: High-potential power supply voltage VL: Drive line μDriver: Driver

Claims

1. A display device, comprising: A substrate includes a display area and a non-display area; a plurality of first electrodes are disposed on the substrate; A light-emitting element is disposed on each of the first electrodes; a first passivation layer is disposed on the first electrode; and a second electrode is disposed on the light-emitting element, wherein the first electrodes include: a first driving electrode disposed in the display area; and a first virtual electrode disposed in the non-display area, and the first passivation layer includes a first opening disposed on the first virtual electrode.

2. The display device as described in claim 1, further comprising: A plurality of insulating layers are disposed on the substrate, wherein the plurality of insulating layers are disposed below the first electrode.

3. The display device as described in claim 2, wherein, The plurality of insulating layers comprise an organic material, and the first passivation layer comprises an inorganic material.

4. The display device as described in claim 1, wherein, The first opening in the first passivation layer may be disposed on each of the first driving electrode and the first virtual electrode.

5. The display device as claimed in claim 1, further comprising a driver electrically connected to the first driving electrode.

6. The display device as described in claim 5, wherein, The light-emitting element is electrically connected to the first driving electrode through a eutectic bonding.

7. The display device as described in claim 1, wherein, The light-emitting element has a vertical structure and includes: an anode; a light-emitting structure disposed on the anode; and a cathode disposed on the light-emitting structure.

8. The display device as described in claim 1, wherein, The non-display area includes: a first virtual area disposed outside the display area; and a second virtual area disposed outside the first virtual area.

9. The display device as described in claim 8, further comprising: A virtual light-emitting element is set in the first virtual area.

10. The display device as claimed in claim 9, further comprising a virtual driver disposed in the first virtual area, wherein, The virtual light-emitting element and the virtual driver are electrically isolated from each other.

11. The display device as described in claim 2, further comprising: A plurality of embankments are disposed between the plurality of insulating layers and the first driving electrode and spaced apart from each other, wherein the light-emitting element is disposed on each of the plurality of embankments.

12. The display device as claimed in claim 11, wherein, In the non-display area, the first passivation layer includes a second opening disposed between the plurality of embankments.

13. The display device as described in claim 10, further comprising: A plurality of first connecting lines are set in this display area; And multiple virtual connection lines are set in this non-display area.

14. The display device as claimed in claim 13, wherein, The plurality of virtual connection lines includes a 1-1 virtual connection line, which is set to be closest to the virtual drive.

15. The display device as claimed in claim 14, further comprising: A second passivation layer is disposed on the 1-1 virtual connection line, wherein the second passivation layer includes a third opening disposed on the 1-1 virtual connection line.

16. The display device as claimed in claim 11, wherein, The first electrode includes a first calibration key disposed on one of the plurality of embankments, and the first passivation layer includes a fourth opening disposed on the first calibration key, wherein the fourth opening surrounds the first calibration key and is spaced apart from the first calibration key.

17. The display device as described in claim 8, wherein, The non-display area includes a cut-out area located outside the second virtual area, and further includes a second calibration key located in the cut-out area, and the first passivation layer further includes a fifth opening surrounding the second calibration key.

18. The display device as described in claim 1, further comprising: A first optical layer is disposed around the light-emitting element; A second optical layer is disposed around the first optical layer, wherein the first optical layer is further disposed in the non-display area and overlaps with the first opening of the first passivation layer, wherein a solder pattern is inserted in the first opening between the first optical layer and the first virtual electrode.

19. The display device as claimed in claim 1, further comprising: A third optical layer is disposed on the second electrode; And a black matrix is ​​set on the third optical layer.

20. A display device, comprising: A substrate includes a display area and a non-display area; a plurality of first electrodes are disposed on the substrate and include: a first driving electrode disposed in the display area; and a first virtual electrode disposed in the non-display area; a light-emitting element disposed on the first driving electrode; a first passivation layer disposed on the first electrode; and a second electrode disposed on the light-emitting element, wherein the first passivation layer includes a first opening that overlaps with the first virtual electrode in the non-display area.

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