Design method for semiconductor parameters and electronic device
Patent Information
- Application Number
- TW114130254
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2024-09-04
- Filing Date
- 2025-08-08
- Publication Date
- 2026-09-01
- Estimated Expiration
- 2045-08-07
AI Technical Summary
Traditional semiconductor device design processes are computationally intensive and resource-intensive due to the reliance on Technology Computer-Aided Design (TCAD) software, which requires multiple verification procedures for each design parameter adjustment, impacting design and manufacturing efficiency.
A design method utilizing a conditional variational autoencoder (CVAE) model to generate and correct predicted design parameters based on conditional parameters, improving design efficiency by verifying and adjusting parameters to meet set conditions.
The method effectively reduces design complexity and enhances manufacturing efficiency by generating output design parameters that meet specified conditions, as demonstrated by improved breakdown voltage in semiconductor devices.
Smart Images

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Abstract
Description
[Technical Field]
[0001] This invention relates to a method and apparatus, and more particularly to a design method and electronic device. [Previous Technology]
[0002] The traditional semiconductor device design process largely relies on Technology Computer Aided Design (TCAD) software for simulation and verification. However, TCAD software requires a lot of time and computing resources for computation. In each process of adjusting the design parameters of a semiconductor device, multiple verification procedures are often required, which greatly affects the design and production efficiency of semiconductors. [Summary of the Invention]
[0003] The present invention provides a design method and an electronic device that can effectively improve the design efficiency of semiconductor devices.
[0004] The semiconductor parameter design method of the present invention includes: inputting conditional parameters into the decoder of a conditional variational autoencoder (CVAE) model to generate predicted design parameters; inputting the predicted design parameters into the encoder of the CVAE model to generate predicted conditional parameters corresponding to the predicted design parameters; and correcting the predicted design parameters based on the predicted conditional parameters and the conditional parameters to generate output design parameters.
[0005] The electronic device of the present invention includes a memory and a processor. The memory stores instructions. The processor is coupled to the memory and is used to access and execute the following steps according to the instructions: inputting conditional parameters to the decoder of a conditional variational autoencoder (CVAE) model to generate predictive design parameters; inputting the predictive design parameters to the encoder of the CVAE model to generate predictive conditional parameters corresponding to the predictive design parameters; and correcting the predictive design parameters based on the predictive conditional parameters and the conditional parameters to generate output design parameters.
[0006] Based on the above, the design method and electronic device of the present invention can verify whether the predicted design parameters meet the set condition parameters, and make appropriate corrections to the predicted design parameters accordingly, thereby effectively improving the design efficiency of semiconductor devices.
Implementation Method
[0008] Figure 1 is a flowchart of a semiconductor parameter design method according to Embodiment 1 of the present invention. The design method in Figure 1 can apply a conditional variational autoencoder (CVAE) model. In general, the design method in Figure 1 can generate design parameter values in the circuit while considering conditional parameters, so that the overall circuit design can adaptively predict according to the set conditional parameters, thereby producing output design parameters that meet the corresponding conditions.
[0009] The design method in Figure 1 includes steps S10 to S12. In step S10, the conditional parameters are input into the decoder of the CVAE model, enabling the decoder to make predictions based on the conditional parameters and generate predictive design parameters. Ideally, the predictive design parameters generated by the decoder in the trained CVAE model should meet the constraints of the conditional parameters. However, in some cases, the predictive design parameters generated by the decoder may not yet meet the requirements of the conditional parameters. In this case, the design method can verify and adjust the predictive design parameters in subsequent steps S11 and S12.
[0010] In step S11, the predictive design parameters generated by the decoder are input into the encoder of the CVAE model to generate predictive condition parameters corresponding to the predictive design parameters. In this embodiment, the encoder architecture of the CVAE model used in the design method is trained so that the encoder can receive the predictive design parameters and generate corresponding predictive condition parameters. In this way, the design method can evaluate whether the generated predictive condition parameters meet the input condition parameters in the subsequent step S12, and make corresponding corrections to the predictive design parameters accordingly.
[0011] In step S12, the predicted design parameters are corrected based on the predicted condition parameters and the condition parameters to generate output design parameters. Generally, the correction of the predicted design parameters can be based on their gradient. Specifically, the correction of the predicted design parameters can be achieved by first calculating the difference between the condition parameters and the predicted condition parameters. Then, the difference between the condition parameters and the predicted condition parameters is multiplied by the gradient of the predicted design parameters to calculate their product. Finally, this product is added to the predicted design parameters to correct the output design parameters, thereby generating the corrected output design parameters. In some embodiments, the corrected output design parameters can be used to manufacture a corresponding semiconductor device.
[0012] Broadly speaking, the CVAE model used in the design method shown in Figure 1 is an extension of the Variational Autoencoder (VAE) architecture. The main difference lies in the introduction of conditional variables into the generative model of the CVAE model. The goal of the VAE model is to learn a generative model that allows it to generate data by sampling from the latent space. The CVAE model further adds conditional variables, enabling it to produce corresponding prediction results based on different conditions when generating data. Generally, the CVAE model has an encoder and a decoder, which correspond to each other. The encoder aims to map the input data (e.g., images, text, etc.) to the latent space, while the decoder aims to generate prediction data based on the sampling results in the latent space and the input conditional variables. Both the encoder and decoder have hidden layers to extract and identify features. Specifically, the encoder and decoder store weights to represent the mathematical relationships between conditional parameters, prediction setting parameters, and prediction conditional parameters.
[0013] Figure 2 is a schematic diagram of the architecture of CVAE model 2 according to Embodiment 1 of the present invention. CVAE model 2 in Figure 2 includes an encoder 20 and a decoder 21. The process of generating output design parameters in the design method in Figure 1 will be described below in conjunction with Figures 1 and 2.
[0014] In step S10, the condition parameter y is provided to the decoder 21 of the CVAE model 2. Specifically, along with the condition parameter y, a sampling vector Z is also input into the decoder 21, which can be obtained by random sampling from a normal distribution (which can be represented by the mean and standard deviation). The decoder 21 can perform inference based on the received sampling vector Z and the condition parameter y, and thus generate the predicted design parameters corresponding to the condition parameter y.
[0015] In step S11, the predicted design parameters are input to the encoder 20 of the CVAE model 2. After training, the encoder 20 can generate prediction condition parameters corresponding to the predicted design parameters. As shown in Figure 2, in addition to generating prediction condition parameters, the encoder 20 also generates a distribution model of the predicted design parameters. In some embodiments, the predicted design parameters may have a normal distribution and can be represented by the distribution mean Zµ and the distribution standard deviation Zσ. Furthermore, the mean and standard deviation generated by the encoder for the design parameters are only used during training and not during inference.
[0016] Finally, in step S12, the difference between the conditional parameter y and the predicted conditional parameter can be calculated as shown in equation (1). (1) Wherein is the difference between the conditional parameter y and the predicted conditional parameter. Then, the difference between the conditional parameter y and the predicted conditional parameter can be multiplied by the gradient of the predicted conditional parameter, and the product of the two can be added to the predicted design parameter to generate the output design parameter.
[0017] First, define: (1).(2).(.) as encoder equations. (3). Assume there are two features (e.g., =(a,b));
[0018] Step 1: Calculate; where can be obtained by substituting the weights into the encoder.
[0019] Step 2: Calculate, where the distance moved in the gradient direction can be adjusted; too large a distance may result in worse results. Here are the output design parameters.
[0020] In some embodiments, the design method can be applied to the process of designing and manufacturing a semiconductor device with guard rings. To enable the designed and manufactured semiconductor device to achieve a specific withstand voltage, the conditional parameter of the semiconductor device may be, for example, the breakdown voltage. Adjustable design parameters in the semiconductor device may include, for example, the number of guard rings, the implantation dose, the implantation energy, or other similar design parameters. During the manufacturing process of the semiconductor device, the above-mentioned or other design parameters will more or less affect the breakdown voltage of the semiconductor device. Conditional parameter y Predicted design parameters Prediction condition parameters Simulated software verification y Protective ring quantity Planting dosage Planting Energy 2710.2 12.83 3.6100868e+14 375.07077 2644.1624 2689.0 549.87567 (+174.8) 2725.855 Table 1
[0021] Table 1 above lists the values of the conditional parameter y, the prediction design parameter, the prediction conditional parameter, and the output design parameter Xout. Specifically, the conditional parameter y can be set to 2710.2 volts, and the prediction design parameter generated by the decoder 21 based on this conditional parameter y can include 12.83 guard rings, 3.6100868e+14 implantation dose, and 375.07077 implantation energy. The prediction conditional parameter calculated by the encoder 20 based on this prediction design parameter is 2644.1624 volts.
[0022] It can be observed that since the predicted condition parameter corresponding to the predicted design parameter is less than the predicted condition parameter, it means that the semiconductor device manufactured by the predicted design parameter does not meet the withstand voltage required by the condition parameter y. In this case, the design method can further multiply the difference between the predicted condition parameter and the condition parameter y by the gradient of the predicted design parameter.
[0023] The decoder will first recommend design parameters based on the value of the conditional parameter 2710.2. The y predicted by the encoder is 2644.1624, and the TCAD calculation is 2689.0. Both of these values are somewhat different from the target 2710.2. Therefore, we hope to use the encoder to calculate the gradient of each feature with respect to the target and shift it slightly in the gradient direction, hoping to adjust the BV generated by the design parameters to be closer to 2710.2.
[0024] Therefore, it is necessary to calculate the partial derivatives of the conditions and encoder-predicted y with respect to each of the three features: the fine-tuned design parameters:
[0025] In this embodiment, the design method can only correct the implantation energy (i.e., the term) in the predicted design parameters, as long as the λ used for the other three features are (0,0,1) respectively. Therefore, the implantation energy can be corrected to 549.87567, while keeping the other parameters in the predicted design parameters unchanged. That is to say, in the final calculated output design parameters Xout, the values of the number of guard rings, implantation dose, and implantation energy are 12.83, 3.6100868e+14, and 549.87567, respectively.
[0026] In some embodiments, although not explicitly stated in Table 1, the output design parameter Xout was verified using Technology Computer Aided Design (TCAD) software. The breakdown voltage of the output design parameter Xout was found to be withstand up to 2725.855 volts, demonstrating the reliability of the output design parameter generated by the design method. Furthermore, in other embodiments, the modified output design parameter Xout can be re-inputted to the encoder 20 of the CVAE model 2, allowing the encoder 20 to determine the prediction condition parameter corresponding to the output design parameter Xout. The advantage of re-inputting the output design parameter Xout to the encoder 20 is that the generation of the prediction condition parameter by the encoder 20 and the modification of the generated output design parameter Xout can form a loop that executes automatically until the prediction condition parameter generated by the encoder 20 meets the set condition parameter.
[0027] Figure 3 is a flowchart of the training method according to Embodiment 1 of the present invention. The training method in Figure 3 can be used, for example, to train the CVAE model 2 of Figure 2. The training method includes steps S30 to S32. Please refer to Figures 2 and 3 together to understand the training process of CVAE model 2.
[0028] In step S30, training setting parameters and training condition parameters are first obtained. These parameters can be obtained, for example, through simulation verification using TCAD software. The training setting parameters may include design parameters for the semiconductor device to be designed, and the training condition parameters may include the operating conditions satisfied by the semiconductor device designed and manufactured using the training setting parameters. Next, the training setting parameters can be provided to the encoder 20 of the CVAE model 2, causing the encoder 20 to generate prediction condition parameters and a model distribution (expressed as mean and standard deviation) corresponding to the setting parameters.
[0029] In step S31, the setting parameters obtained by sampling the setting parameter distribution and the training condition parameters corresponding to the training setting parameters can be input to the decoder 21 to generate the prediction setting parameters. In this step, in order to ensure that the input data is verified, the verified training condition parameters are input to the decoder 21 so that the decoder 21 can generate the prediction setting parameters accordingly.
[0030] In step S32, the CVAE model 2 is adjusted based on the training setting parameters, prediction setting parameters, training condition parameters, and prediction condition parameters. Specifically, the training objective of the CVAE model 2 is to make the predicted prediction condition parameters and prediction setting parameters as close as possible to the training condition parameters and the training setting parameters, respectively. Therefore, the CVAE model 2 will adjust the weights in the encoder 20 and decoder 21 based on the loss, so that the prediction results it produces can gradually converge to the training set. The loss mentioned here includes not only the difference between the prediction condition parameters and the training condition parameters, but also the fact that the distribution of the encoder mapping should be similar to the normal distribution, so the overall loss is calculated with the normal Gaussian distribution.
[0031] Figure 4 is a block diagram of the electronic device 4 according to an embodiment of the present invention. The electronic device 4 may, for example, store the CVAE model 2 shown in Figure 2 and be used to execute the design method of Figure 1 and / or the training method of Figure 3.
[0032] As shown in Figure 4, the electronic device 4 includes a processor 40 and a memory 41. The memory 41 stores instructions 410. The processor 40 is coupled to the memory 41 and can access and execute instructions 410 to: input conditional parameters to the decoder of the conditional variable autoencoder model to generate predictive design parameters; input the predictive design parameters to the encoder of the CVAE model to generate predictive conditional parameters corresponding to the predictive design parameters; and correct the predictive design parameters based on the predictive conditional parameters and the conditional parameters to generate output design parameters.
[0033] In some embodiments, the processor 40 may be, for example, a central processing unit (CPU), or other programmable general-purpose or special-purpose microcontroller (MCU), microprocessor, digital signal processor (DSP), programmable controller, application-specific integrated circuit (ASIC), graphics processing unit (GPU), neural processing unit (NPU), arithmetic logic unit (ALU), complex programmable logic device (CPLD), field programmable gate array (FPGA), any other type of integrated circuit, state machine, processor based on advanced reduced instruction set machine (ARM), or other similar elements or combinations thereof.
[0034] In some embodiments, memory 41 may be, for example, any type of fixed or removable random access memory (RAM), read-only memory (ROM), flash memory, hard disk drive (HDD), solid state drive (SSD) or similar elements or combinations thereof, for storing instructions 410, multiple modules or various applications that can be executed by processor 40.
[0035] Furthermore, the processor 40 in the electronic device 4 may be formed by a single circuit unit or by multiple circuit units. In an embodiment where the electronic device 4 has only a single processing unit, this processing unit can be used to perform steps S10-S11 of executing CVAE model 2 in FIG. 1, and can also be used to perform step S12 of correcting and generating output design parameters. Alternatively, when the electronic device 4 is formed by multiple processing units, the processor 40 may, for example, include a first processing unit implemented with a CPU and a second processing unit implemented with a GPU. Steps S10-S11 of executing CVAE model 2 in FIG. 1 can be performed by the second processing unit, while step S12 of correcting and generating output design parameters can be performed by the first processing unit.
[0036] In summary, the design method and electronic device of the present invention can generate predicted design parameters and corresponding predicted condition parameters through a modified CVAE model. By verifying the predicted condition parameters, the predicted design parameters can be corrected accordingly, thereby generating output design parameters that meet actual condition parameter requirements, effectively reducing the overall design complexity of the semiconductor device, and improving the design and / or manufacturing efficiency of the semiconductor device. [Simplified Explanation of the Diagram]
[0007] Figure 1 is a flowchart of the semiconductor parameter design method according to Embodiment 1 of the present invention. Figure 2 is a schematic diagram of the architecture of the conditional variable autoencoder model according to Embodiment 1 of the present invention. Figure 3 is a flowchart of the training method according to Embodiment 1 of the present invention. Figure 4 is a block diagram of the electronic device according to Embodiment 1 of the present invention.
Claims
1. A method for designing semiconductor parameters, comprising: A conditional parameter is input to a decoder of a conditional variational autoencoder (CVAE) model to generate a predictive design parameter; the predictive design parameter is input to an encoder of the CVAE model to generate a predictive conditional parameter corresponding to the predictive design parameter; and the predictive design parameter is corrected based on the predictive conditional parameter and the conditional parameter to generate an output design parameter.
2. The design method as described in claim 1, comprising correcting the predicted design parameters based on the predicted condition parameters and the difference between the condition parameters.
3. The design method as described in claim 2, comprising multiplying the predicted condition parameters and the difference between the condition parameters by a gradient of the predicted design parameters to calculate a product, and then adding the product to the predicted design parameters to calculate the output design parameters.
4. The design method as described in claim 1, wherein the predicted design parameters include at least one of the number of guard rings, the implantation dose, and the implantation energy, and the condition parameters include the breakdown voltage.
5. The design method as described in claim 1, wherein the decoder generates the predictive design parameters based on a sampling vector and the conditional parameters.
6. An electronic device comprising: A memory module stores one instruction; A processor, coupled to the memory, is configured to access and execute the following steps according to the instructions: inputting a conditional parameter to a decoder of a conditional variational autoencoder (CVAE) model to generate a predictive design parameter; inputting the predictive design parameter to an encoder of the CVAE model to generate a predictive conditional parameter corresponding to the predictive design parameter; and modifying the predictive design parameter based on the predictive conditional parameter and the conditional parameter to generate an output design parameter.
7. The electronic device of claim 6, wherein the processor is configured to perform: correcting the predictive design parameters based on the predictive condition parameters and the difference between the condition parameters.
8. The electronic device of claim 7, wherein the processor is configured to: calculate a product by multiplying the prediction condition parameters and the difference between the condition parameters by a gradient of the prediction design parameters, and then add the product to the prediction design parameters to calculate the output design parameters.
9. The electronic device of claim 6, wherein the predictive design parameters include at least one of the number of guard rings, the implantation dose, and the implantation energy, and the conditional parameters include the breakdown voltage.
10. The electronic device of claim 6, wherein the decoder generates the predictive design parameters based on a sampling vector and the conditional parameters.
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