Method of producing a photodiode

Abstract

This invention relates to a method for manufacturing an optical diode having a layer structure. The layer structure includes a first semiconductor layer of a first conductivity type on a front side, a second semiconductor layer of a second conductivity type embedded therein, and a third semiconductor layer of the second conductivity type adjacent to the first semiconductor layer on a back side having a higher doping concentration than the second semiconductor layer. The first and second semiconductor layers define a pn junction, and the third semiconductor layer defines a back electric field. The thickness of the third semiconductor layer is no greater than 0.25 compared to the thickness of the layer structure. The method includes: providing a substrate wafer made of a semiconductor material; fabricating a layer sequence having first, second, and third semiconductor regions on and / or in the substrate wafer, wherein the first and second semiconductor regions form the first and second semiconductor layers; and partially removing the layer sequence from the back side of the substrate wafer until the third semiconductor region is reduced to the thickness of the third semiconductor layer.

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing an optical diode having a layer structure, the layer structure including a first semiconductor layer of a first conductivity type on the front side, a second semiconductor layer of a second conductivity type embedded therein, and a third semiconductor layer of a second conductivity type adjacent to the second semiconductor layer having a higher doping concentration than the second semiconductor layer, wherein the first and second semiconductor layers define a pn junction and the third semiconductor layer defines a back surface field. [Previous Technology]

[0002] In common optical diodes, especially silicon optical diodes, the space charge region or depletion region of the pn junction typically extends only above a small portion of the optical diode structure near the surface. The deeper regions of the optical diode are not depleted of charge carriers and therefore have no electric field.

[0003] When light is absorbed by a photodiode, a charge carrier pair, namely an electron-hole pair, is generated. When such a charge carrier pair is generated in the electric field of the depletion region, the charge carriers will immediately separate from each other, thereby generating a current or photocurrent.

[0004] However, if light absorption and associated charge carrier generation occur in deeper regions of the photodiode and thus outside the depletion region, the charge carriers diffuse in any direction. Charge carrier generation and diffusion outside the depletion region occur particularly in infrared light, as the latter has a relatively higher penetration depth than visible light. Charge carriers generated outside the depletion region typically only contribute to the current when they enter the depletion region. However, lattice and / or surface defects on the back side of the layered structure act as recombination centers for the generated charge carriers; that is, charge carriers entering this region are lost due to recombination and cannot contribute to the photocurrent. This leads to reduced photosensitivity, especially in the infrared range.

[0005] To prevent this, the photodiode structure is provided with a third semiconductor layer having a high doping concentration, thereby defining a so-called back electric field. The higher doping concentration of the third semiconductor layer compared to the second semiconductor layer disposed above it causes a shift in the band structure and thus generates a back electric field. Depending on the doping type, one of the two charge carrier classes is repelled by the back electric field and is reflected or repelled in the direction of the depletion region, and can contribute to the photocurrent there. This prevents recombination of charge carriers on the back side of the photodiode.

[0006] The doping required to generate the back electric field is typically performed by diffusion into the back side of the semiconductor substrate or wafer used to fabricate the layer structure. In this respect, the penetration depth of the dopant material must be greater than the depth of the surface defects. Therefore, a doping depth of approximately 2 to 4 μm is common. To achieve this penetration depth, high temperatures are required for efficient diffusion. However, such high-temperature processes can only be performed at the beginning of the photodiode fabrication process; otherwise, they would damage the previously created semiconductor structure.

[0007] For different application areas, such as wearable devices, it is desirable to use photodiodes with relatively small thicknesses in layered structures. The desired semiconductor thickness is less than 185 μm to 150 μm or even smaller. However, for such small thicknesses, it is problematic at the beginning of the manufacturing process to use wafers whose thickness already corresponds to the final thickness required for the photodiode, for stability reasons.

[0008] Therefore, in conventional manufacturing processes, the layer structure is initially manufactured with a greater thickness, wherein the wafer thickness is not initially reduced. Backside removal, such as by backside grinding of the wafer, is only performed after at least most of the manufacturing steps have been completed, particularly after the pn junction has been manufactured. However, this backside removal process inevitably removes the semiconductor region used to define the back electric field, so it has not been possible to manufacture photodiodes with small thickness and back electric field until now. [Summary of the Invention]

[0009] Therefore, the object of the present invention is to provide a method for manufacturing an optical diode, wherein the optical diode has a layer structure with reduced thickness and simultaneously has a back electric field.

[0010] This objective is achieved by a method having the features of claim 1. A method for manufacturing an optical diode having the layered structure mentioned at the beginning according to the present invention comprises:

[0010] Provides a substrate wafer made of semiconductor material;

[0010] A layer sequence having first, second, and third semiconductor regions is fabricated on and / or in the substrate wafer, wherein the first semiconductor region and the second semiconductor region form the first semiconductor layer and the second semiconductor layer; and

[0010] The layer sequence is partially removed from the back side of the substrate wafer until the third semiconductor region is reduced to the thickness of the third semiconductor layer.

[0010] The ratio of the thickness of the third semiconductor layer to the thickness of the layer structure is not greater than 0.25.

[0011] In this respect, the term "front side" refers to the light-entry side of the photodiode or layer structure. Therefore, the term "back side" refers to the side of the photodiode or layer structure opposite to the light-entry side. This invention makes it possible to manufacture photodiodes with a small thickness that still have a third semiconductor layer defining the back electric field. The reduced third semiconductor region defines the third semiconductor layer. The substrate wafer is preferably made of silicon, and more preferably of silicon single crystal. The second semiconductor region typically has a low or normal doping level (weak or moderate doping), while the third semiconductor region has a high doping level (heavy doping). Low or normal doping level or weak or moderate doping level is generally understood to correspond to a doping concentration of at most one donor per 10⁷ semiconductor atoms or at most one acceptor per 10⁶ semiconductor atoms. Therefore, a high doping level or heavy doping can correspond to a doping concentration higher than said doping concentration, preferably at least an order of magnitude higher or at least 10 times higher than defined by the above limitations. The second semiconductor layer may have a doping concentration that has a stable, particularly constant or discontinuous course along the thickness of the second semiconductor layer.

[0012] The removal of the layer sequence is preferably performed by back-side grinding, wherein other methods may also be used alternatively or in combination with the back-side grinding process. Removal may also include etching and / or polishing steps. The substrate wafer may exist at its provided thickness when layer sequence removal begins.

[0013] The substrate wafer provided is preferably made with doping of a second conductivity type.

[0014] It should be understood that, in addition to the semiconductor layer, the photodiode may have more layers. These particularly include metal layers for electrically contacting different semiconductor layers. The method steps required to manufacture other layers may also be performed before or after the steps of the method according to the invention. Typically, additional method steps may also be provided between the various steps of the method according to the invention.

[0015] According to an advantageous embodiment of the method, the third semiconductor region is formed from a substrate wafer. Accordingly, a substrate wafer having a doping concentration corresponding to the doping concentration of the third semiconductor layer is provided or manufactured.

[0016] According to another advantageous embodiment of the method, the fabrication of the layer sequence includes creating a third semiconductor region by front-side introduction doping into the substrate wafer, preferably by diffusion or ion implantation. Thus, a third semiconductor region is created on the front side of the substrate wafer. After the third semiconductor region is created, two more semiconductor regions can then be fabricated on top of it using suitable methods. The substrate wafer is removed accordingly in such a manner that at least the portion not corresponding to the third semiconductor region is removed from the back side of the substrate wafer. To ensure that the remaining third semiconductor layer after this removal has the thickness and doping concentration required to form a back electric field, an additional portion of the third semiconductor region is typically removed.

[0017] According to another advantageous embodiment of the method, the fabrication of the layer sequence includes creating a second semiconductor region by epitaxial growth on a third semiconductor region. Preferably, the third semiconductor region has already been doped and grown. However, it is also generally possible to subsequently dope the grown semiconductor region.

[0018] In this embodiment, the removal of the layer sequence includes the complete removal of the substrate wafer. The epitaxially grown third semiconductor region thus forms the back side of the photodiode structure. To ensure that the substrate wafer is indeed completely removed even in the event of manufacturing inaccuracies, specific portions of the third semiconductor region may also be additionally removed.

[0019] According to another advantageous embodiment of the method, the fabrication of the layer sequence includes creating a second semiconductor region by epitaxial growth on a third semiconductor region. Preferably, the second semiconductor region has already been doped and grown. However, it is also generally possible to subsequently dope the grown semiconductor region.

[0020] In an alternative embodiment of the method according to the invention, the fabrication of the layer sequence includes creating a third semiconductor region by back-side introduction doping into a substrate wafer, preferably by diffusion. Here, the substrate wafer is preferably doped to such an extent that, given a doping gradient with doping concentrations removed from the back side to the front side, the substrate wafer has a doping concentration corresponding to the third semiconductor layer at a desired depth. The dopant introduced into the substrate wafer corresponds to a second conductivity type, and, if necessary, the doping concentration already present in the fabrication of the substrate wafer is increased.

[0021] In this respect, it is preferable that the doping is introduced only into a portion of the back side of the substrate wafer and the second semiconductor region is formed from the remaining portion of the substrate wafer. For this purpose, it is preferable to use a substrate wafer with a doping concentration on the manufacturing side corresponding to the second semiconductor layer. The doping or additional doping for the third semiconductor region is introduced only to a depth to which the doping material does not reach the remaining portion of the substrate wafer providing the second semiconductor region. In this embodiment of the method, the doping must be performed with a particularly large penetration depth.

[0022] According to an advantageous embodiment of the method, the fabrication of the layer sequence includes creating a first semiconductor region after a second semiconductor region and / or creating a second semiconductor region after a third semiconductor region.

[0023] According to another advantageous embodiment of the method, the fabrication of the layer sequence includes creating a first semiconductor region by means of ion implantation into the front doping of the second semiconductor region. Thus, the introduced front doping corresponds to a first conductivity type. Since the second semiconductor region is doped according to a second conductivity type, a certain amount of dopant material must first be introduced there to neutralize the doping in the opposite direction of the second conductivity type. Doping then continues until the required doping concentration for the first semiconductor layer is reached.

[0024] A second aspect of the present invention further relates to a method having the features of claim 11. This method for manufacturing an optical diode having the initially mentioned layer includes:

[0024] Providing substrate wafers made of semiconductor materials;

[0024] A layer sequence having first and second semiconductor regions is fabricated in the substrate wafer, wherein the first semiconductor region forms the first semiconductor layer;

[0024] Remove the layer sequence from the back side until the second semiconductor region is reduced to the total thickness of the second semiconductor layer and the third semiconductor layer;

[0024] Doping is introduced into the second semiconductor region from the back side, preferably by diffusion or ion implantation, to form the third semiconductor region of the third semiconductor layer; and

[0024] The third semiconductor region is locally heated.

[0024] The ratio of the thickness of the third semiconductor layer to the thickness of the layer structure is not greater than 0.25.

[0025] Preferably, local heating of the third semiconductor region is performed so that lattice defects in the boundary layer caused by the introduction of doping and / or the removal of layer sequences are solidified. Preferably, local heating is performed so that the pn junction, particularly formed between the first and second semiconductor layers, is not damaged by overheating. Where applicable, further developments of the originally mentioned method are also applicable to this method variant.

[0026] For localized heating of the third semiconductor region, a method that generates a rapid temperature rise in a short time is preferably considered. By providing a large amount of heat in a short time, the third semiconductor region is rapidly raised to the temperature required for curing, while the temperature of other regions of the layer structure (especially the pn junction region) does not increase to a harmless level due to the thermal conductivity.

[0027] According to a preferred embodiment of this method variant, local heating of the third semiconductor region is performed by laser annealing. It has been shown that laser annealing is particularly suitable for solidifying lattice defects without overheating the remaining semiconductor region.

[0028] According to an advantageous embodiment of the method, the first conductivity type is p-type and the second conductivity type is n-type. Therefore, the first semiconductor layer is p-type and the second and third semiconductor layers are n-type. Alternatively, the conductivity types can be reversed, i.e., the first semiconductor layer is n-type and the second and third semiconductor layers are p-type.

[0029] As described above, the substrate wafer is preferably formed of silicon. Silicon substrate wafers are widely used and therefore inexpensive. They have proven themselves in the manufacture of optical diodes.

[0030] According to an advantageous embodiment of the method, the thickness of the photodiode does not exceed 200 μm, preferably not exceeding 185 μm. The thickness of the photodiode specifically includes the layer structure, namely the first, second, and third semiconductor layers, and, if applicable, additional functional layers, such as front and / or back metal layers, which are provided for electrical contact. Housing assemblies, protective windows, etc., are not included in the thickness dimension.

[0031] The thickness of the provided substrate wafer is preferably not more than 300 μm, and preferably not less than 220 μm. It has been found that substrate wafers with thicknesses within the above range are sufficiently stable for the manufacturing method according to the invention and do not require the removal of excessive material. However, it is generally possible to provide thicker substrate wafers, thereby extending the removal steps accordingly. If a wafer with a greater manufacturing thickness is to be used, such as a manufacturing thickness of 600 μm, the wafer can preferably be removed to a desired substrate wafer thickness of not more than 300 μm, and preferably not less than 220 μm, by back-side grinding before providing the method according to the invention.

[0032] According to another advantageous embodiment of the method, the thickness of the third semiconductor layer (i.e., the back electric field) is no more than 20 μm, preferably no more than 10 μm, and more preferably no more than 5 μm.

[0033] The thickness of the third semiconductor layer is preferably no more than 0.20, more preferably no more than 0.15, more preferably no more than 0.10, more preferably no more than 0.05, and more preferably no more than 0.02.

[0034] Providing a substrate wafer may include providing a substrate wafer of a second conductivity type with a higher doping concentration. Alternatively, the second semiconductor layer of the second conductivity type may have a lower doping concentration compared to the third semiconductor layer, wherein providing a substrate wafer includes providing a substrate wafer of the second conductivity type with a lower doping concentration.

[0035] Other advantageous embodiments of the method according to the invention are derived from the appended claims, the specification and the drawings. [Simplified Explanation of the Diagram]

[0036] The present invention will now be explained with reference to embodiments and accompanying drawings. Wherein it is shown that:

[0037] Figure 1 is a flowchart of a method for manufacturing an optical diode according to the first embodiment;

[0038] Figures 2A and 2B are schematic cross-sectional views of the optical diode layer sequence fabricated according to the method of Figure 1 before and after the removal of the layer sequence;

[0039] Figure 3 is a flowchart of a method for manufacturing an optical diode according to the second embodiment;

[0040] Figures 4A and 4B are schematic cross-sectional views of the optical diode layer sequence fabricated according to the method in Figure 3 before and after the removal of the layer sequence;

[0041] Figure 5 is a flowchart of a method for manufacturing an optical diode according to the third embodiment;

[0042] Figures 6A and 6B are schematic cross-sectional views of the optical diode layer sequence fabricated according to the method in Figure 5 before and after the removal of the layer sequence;

[0043] Figure 7 is a flowchart of a method for manufacturing an optical diode according to the fourth embodiment; and

[0044] Figures 8A to 8C are schematic cross-sectional views of the optical diode layer sequence fabricated according to the method of Figure 7 before and after the removal of the layer sequence.

Implementation Method

[0045] In exemplary embodiments of the methods described below, only those method steps essential for understanding the invention are depicted in the flowcharts. Typically, additional method steps may also be provided, performed sequentially before, between, or during the method steps shown in the flowcharts.

[0046] The cross-sectional view of the photodiode layer sequence is schematic only and is not drawn to scale. Furthermore, the described method embodiments involve a single photodiode only by way of example in each case. It should be understood that multiple photodiodes are typically fabricated simultaneously on a single substrate wafer (typically separated from each other in a separation step, such as by sawing, near the end of the manufacturing process).

[0047] In the following text, for clarity, the same or similar features are represented by the same element symbols, even though they may differ from each other in their properties.

[0048] Embodiments are described below with reference to Figures 1 to 8C, each relating to a method of manufacturing a photodiode 30 having a layer structure comprising a first front semiconductor layer 22 of a first conductivity type, a second semiconductor layer 24 of a second conductivity type embedded therein, and an adjacent back third semiconductor layer 26 of the second conductivity type (i.e., adjacent to the second semiconductor layer 22) having a higher doping concentration than the second semiconductor layer 24. In all embodiments, the first semiconductor layer 22 is p-type and defines the anode. The second and third semiconductor layers 24, 26 are n-type and define the cathode. The first and second semiconductor layers 22, 24 thus form a pn junction, wherein a depletion region 18 is formed. The second semiconductor layer 22 has a low doping degree, while the third semiconductor layer 26 has a high doping degree and defines the back electric field. The association of conductivity type with semiconductor layers 22-26 is exemplary and can also occur in a complementary manner.

[0049] Referring to Figures 1, 2A and 2B, the first embodiment of the method according to the present invention will be explained below.

[0050] In step 101, a substrate wafer 10 made of semiconductor material (preferably monocrystalline silicon) is provided. The substrate wafer 10 is highly n-doped and forms a third semiconductor region 16.

[0051] In step 102, a lightly doped n-type layer is epitaxially grown on the substrate wafer 10 to form a second semiconductor region 14.

[0052] In step 103, a p-type, basin-shaped first semiconductor region 12 is provided by front-side doping with a p-type material in the second semiconductor region 14, which forms the anode of the photodiode 30. The boundary between the first and second semiconductor regions 12, 14 represents a pn junction, around which a depletion region 18 is formed.

[0053] In step 104, the substrate wafer 10 is finally removed from the back side, wherein a portion of the third semiconductor region 16 is also removed. The remaining residual region of the third semiconductor region 16 adjacent to the second semiconductor region 14 has a thickness of only a few micrometers and defines the back electric field in the photodiode 30.

[0054] Referring to Figures 3, 4A and 4B, a second embodiment of the method will be described below.

[0055] In step 201, an n-type substrate wafer 10 with a low doping degree is provided.

[0056] In step 202, an n-type semiconductor layer with a high degree of doping and forming a third semiconductor region 16 is epitaxially grown on the front side of the substrate wafer 10.

[0057] In step 203, an epitaxial growth is performed on another n-type semiconductor layer with a lower doping level compared to the third semiconductor region 16. This weakly doped n-type semiconductor layer forms the second semiconductor region 14.

[0058] In step 204, the same as step 104 in the first embodiment, a basin-shaped first semiconductor region 12 is finally formed by front-side doping with p-type material, which forms the anode of the first semiconductor layer 22 or the photodiode 30.

[0059] In step 205, the substrate wafer 10 is finally completely removed. In order to ensure that the third semiconductor layer 26 of the photodiode 30 (which is formed by a portion of the third semiconductor region 16) has the desired thickness and, in particular, that there are no longer any residues of the substrate wafer 10, a portion of the back side of the third semiconductor region 16 is also removed.

[0060] As an alternative to epitaxial growth of the third semiconductor region 16, according to step 202, the third semiconductor region 16 can also be created by front-side doping of the substrate wafer 10, particularly by diffusion or implantation.

[0061] Referring to Figures 5, 6A and 6B, a third embodiment of the method will be described below.

[0062] In step 301, an n-type substrate wafer 10 with a low doping degree is provided.

[0063] In step 302, the substrate wafer 10 is preferably doped with n-type material from the back side by diffusion. The doping direction is indicated by the arrow in FIG. 6A. Doping occurs with a large penetration depth, wherein the diffused or doped portion of the back side of the substrate wafer 10 forms a third semiconductor region 16 and the non-diffused or undoped portion of the front side of the substrate wafer 10 forms a second semiconductor region 14. Therefore, a boundary layer is formed within the substrate wafer 10 between the lightly doped n-type second semiconductor region 14 and the heavily doped n-type third semiconductor region 16.

[0064] By performing such deep doping on the substrate wafer 10 from the back side, a doping gradient with decreasing doping intensity can be formed within the substrate wafer 10. Therefore, doping step 302 must be designed so that the portion of the third semiconductor region 16 that is not removed during subsequent removal processes still has the desired doping concentration corresponding to the doping concentration of the third semiconductor layer 26. In this regard, a higher doping concentration than the doping concentration corresponding to the doping concentration of the third semiconductor layer 26 can certainly exist on the back side of the substrate wafer 10.

[0065] In step 303, the first semiconductor region 12, which forms the anode of the first semiconductor layer 22 or the photodiode 30, is formed again by front-side doping in the manner described above.

[0066] In step 304, the back portion of the third semiconductor region 16 is finally removed, so that the remaining portion of the third semiconductor region 16 forms the third semiconductor layer 26 of the photodiode 30.

[0067] Referring to Figures 7 and 8A to 8C, a fourth embodiment of the method will now be described.

[0068] In step 401, a substrate wafer 10 made of a weakly doped n-type semiconductor material is provided. The substrate wafer 10 first defines a second semiconductor region 14.

[0069] In step 402, the p-type first semiconductor region 12, which forms the anode of the first semiconductor layer 22 or the completed photodiode 30, is formed in the second semiconductor region 14 by front-side doping in a manner already described. FIG8A shows the layer structure after performing step 402.

[0070] In step 403, the substrate wafer 10 is now removed from the back side, wherein a portion of the second semiconductor region 24 is removed such that the thickness of the remaining portion of the substrate wafer 10 corresponds to the thickness of the photodiode 30.

[0071] In step 404, another n-type dopant material (donor) is introduced from the back side into the substrate wafer 10 or the second semiconductor region 14, such that an n-type third semiconductor region 16 is formed in a portion of the second semiconductor region 14, wherein the doping degree of the third semiconductor region 16 is higher than that of the second semiconductor region 14. In FIG8B, the introduction of the dopant material is indicated by arrows. Doping is preferably performed by diffusion or also by ion implantation.

[0072] In step 405, the third semiconductor region 16 is finally subjected to localized heat treatment from the back side, wherein a process called laser annealing is preferably used. In this regard, the layer structure is irradiated with high-energy laser light, thereby generating a temperature on the surface sufficient to solidify the lattice defects caused by the previous removal of substrate material and subsequent doping within a short time. Due to the high but time-limited energy supply, the heating of the layer structure is essentially limited to the third semiconductor region 16. The solidified third semiconductor region 16 thus forms a highly doped third semiconductor layer 26, which defines the back electric field in the photodiode 30. By solidifying the third semiconductor region 16 by localized heat treatment, particularly by laser annealing, damage to the higher layer structure of the photodiode 30 is prevented, especially the pn junction formed between the first and second semiconductor regions 12, 14. The localized heat treatment is indicated by the double arrows in FIG8C.

[0073] It has been shown that a photodiode 30 having a semiconductor thickness between 150 μm and 185 μm, or even thinner, can be manufactured using all embodiments of the method.

[0074] The growth or formation of epitaxial layers is carried out in a known manner, preferably by chemical vapor deposition (CVD). However, all other suitable epitaxial processes can generally be used. By adding the corresponding dopant material to the deposited layer, epitaxial layers can be fabricated at the desired doping concentration.

Claims

1. A method for manufacturing a photodiode (30), the photodiode (30) having a layer structure, the layer structure comprising a front first semiconductor layer (22) of a first conductivity type, a second semiconductor layer (24) of a second conductivity type embedded therein, and an adjacent back third semiconductor layer (26) of the second conductivity type having a higher doping concentration than the second semiconductor layer (24), wherein, The first semiconductor layer and the second semiconductor layer (22, 24) define a pn junction, and the third semiconductor layer (26) defines a back electric field, wherein the ratio of the thickness of the third semiconductor layer (26) to the thickness of the layer structure is not greater than 0.

25. The method includes: providing a substrate wafer (10) made of semiconductor material; and fabricating a layer sequence having first, second, and third semiconductor regions (12, 14, 16) on and / or in the substrate wafer (10), wherein the first semiconductor region and the second semiconductor region (12, 14) form the first semiconductor layer. and the second semiconductor layer (22, 24); and partially removing the layer sequence from the back side of the substrate wafer (10) until the third semiconductor region (16) is reduced to the thickness of the third semiconductor layer (26), wherein the fabrication of the layer sequence includes creating the second semiconductor region (14) by epitaxial growth on the third semiconductor region (16), wherein the third semiconductor region (16) is formed from the substrate wafer (10), wherein the provision of the substrate wafer (10) includes providing a substrate wafer (10) of the second conductivity type with a higher doping concentration.

2. The method as described in request item 1, wherein, The fabrication of this layer sequence includes introducing doping into the substrate wafer (10) from the front side and creating the third semiconductor region (16) by diffusion or ion implantation.

3. The method as described in request item 1, wherein, The fabrication of this layer sequence includes creating the third semiconductor region (16) by epitaxial growth on the substrate wafer (10).

4. The method as described in request item 3, wherein, The removal of this layer sequence includes the complete removal of the substrate wafer (10).

5. The method as described in request item 1, wherein, The fabrication of this layer sequence includes creating the third semiconductor region (16) by introducing doping into the substrate wafer (10) from the back side and by diffusion.

6. The method as described in claim 5, wherein, The doping is introduced only into the back portion of the substrate wafer (10) and the second semiconductor region (14) is formed from the remaining portion of the substrate wafer (10).

7. The method as described in any one of claims 1 to 3, wherein, The fabrication of this layer sequence includes creating the first semiconductor region (12) after the second semiconductor region (14) and / or creating the second semiconductor region (14) after the third semiconductor region (16).

8. The method as described in any one of claims 1 to 3, wherein, The fabrication of this layer sequence includes creating the first semiconductor region (12) by front-side doping into the second semiconductor region (14) via ion implantation.

9. The method as described in request item 1, wherein, The first conductivity type is p-type and the second conductivity type is n-type, and / or the substrate wafer (10) is formed of silicon.

10. The method as described in claim 1, wherein, The thickness of the photodiode is no more than 200 μm, and / or the thickness of the substrate wafer (10) provided is no more than 300 μm, and / or the thickness of the third semiconductor layer (26) is no more than 20 μm.

11. The method as described in claim 1, wherein, The ratio of the thickness of the third semiconductor layer (26) to the thickness of the layer structure does not exceed 0.

20.

12. The method as described in claim 1, wherein, The provision of the substrate wafer (10) includes providing a substrate wafer (10) of the second conductivity type with a lower doping concentration.

13. The method as described in claim 1, wherein, The removal of this layer sequence is performed by back-side grinding.

14. The method as described in claim 1, wherein, When the removal of the layer sequence begins, the substrate wafer (10) exists at the thickness provided by the substrate wafer (10).

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