High and low voltage detection methods and devices

Abstract

This invention relates to a high / low voltage detection method and apparatus. The high / low voltage detection apparatus includes: a control chip; and a connection circuit for receiving the terminal voltage of a synchronous rectifier transistor of a conversion device, wherein the control chip is configured to determine whether the input voltage of the conversion device is high or low based on the terminal voltage of the synchronous rectifier transistor.

Description

[Technical Field]

[0001] This invention relates to the field of circuit technology, and more specifically to high and low voltage detection methods and apparatus. [Previous Technology]

[0002] As mobile phone users demand increasingly faster charging speeds, while increasing charger power, the size of the charging head must also be small enough for easy portability. When the secondary-side charging protocol chip detects a low input voltage, the system output power switches to low power; when it detects a high input voltage, the system output power switches to high power. This power switching method offers many benefits, such as significantly reducing the system's input voltage capacitance, reducing the impedance of the primary-side main power transistors during conduction, reducing the wire diameter of the potential input common-mode inductor, and reducing the potential current of the input rectifier bridge. This allows for a reduction in charger system size and cost optimization. [Summary of the Invention]

[0003] In one aspect, an embodiment of the present invention provides a high / low voltage detection device, comprising: a control chip; and a connection circuit for receiving the terminal voltage of a synchronous rectifier transistor of a conversion device, wherein the control chip is configured to determine whether the input voltage of the conversion device is high or low based on the terminal voltage of the synchronous rectifier transistor of the conversion device.

[0004] In another aspect, an embodiment of the present invention provides a high / low voltage detection method, comprising: detecting the terminal voltage of the synchronous rectifier transistor of a conversion device during a detection period; and determining whether the input voltage of the conversion device is high or low based on the acquired terminal voltage of the synchronous rectifier transistor of the conversion device.

[0005] The high and low voltage detection method and apparatus provided according to the embodiments of the present invention can indirectly obtain information about the input voltage by detecting the terminal voltage of the synchronous rectifier transistor of the conversion device, thereby realizing the high and low voltage detection of the input voltage, and has a simpler structure and lower cost. [Simplified Explanation of the Diagram]

[0006] The various aspects of the invention can be best understood by reading the following detailed description in conjunction with the accompanying drawings. Note that, according to industry standard practice, the various features are not necessarily drawn to scale. In the various figures, similar numerical labels describe similar components. In the drawings:

[0006] Figure 1 shows a schematic diagram of a system in which a conventional high and low voltage detection device is connected to a conversion device that uses a low-end rectification method;

[0006] Figure 2 shows a circuit diagram of a high and low voltage detection device according to an embodiment of the present invention;

[0006] Figure 3 shows a schematic diagram of a system in which a high and low voltage detection device is connected to a conversion device employing a low-end rectification method according to an embodiment of the present invention;

[0006] Figure 4 shows a waveform diagram of the drain terminal of the synchronous rectifier transistor relative to ground in the system shown in Figure 3;

[0006] Figure 5 shows a schematic diagram of a system in which a high and low voltage detection device according to an embodiment of the present invention is connected to a conversion device employing a high-side rectification method;

[0006] Figure 6 shows a waveform diagram of the source terminal of the synchronous rectifier transistor relative to ground in the system shown in Figure 5;

[0006] Figure 7 shows a flowchart of a high and low pressure detection method according to an embodiment of the present invention;

[0006] Figure 8 shows a more detailed flowchart of the high and low pressure detection method according to an embodiment of the present invention.

Implementation Method

[0007] Features and exemplary embodiments of various aspects of the present invention will now be described in detail. Numerous specific details are set forth in the following detailed description to provide a thorough understanding of the invention. However, it will be apparent to those skilled in the art that the invention may be practiced without requiring some of these specific details. The following description of embodiments is merely intended to provide a better understanding of the invention by illustrating examples of the invention. The invention is by no means limited to any specific configurations and algorithms presented below, but covers any modifications, substitutions, and improvements to elements, components, and algorithms without departing from the spirit of the invention. Well-known structures and techniques are not shown in the drawings and the following description in order to avoid unnecessarily obscuring the invention.

[0008] Figure 1 shows a schematic diagram of a conventional high / low voltage detection device connected to a converter employing a low-side rectification method. As shown in Figure 1, the conventional system 100 includes a high / low voltage detection device 102 connected to the converter 101. The converter 101 includes a primary-side control chip U1, a primary-side power transistor Q1, and a first resistor R0 connected between the source terminal of the primary-side power transistor Q1 and ground. The primary-side control chip U1 has an input pin VIN, a power transistor connection pin MOS, an output pin OUTPUT, and a ground pin GND. The primary-side control chip U1 receives an input voltage Vin (such as the rectified mains voltage) received via the input pin VIN through a startup module (e.g., which may include a resistor or a current source), is connected to the gate terminal of the power transistor Q1 via the power transistor connection pin MOS, is connected to the high / low voltage detection device via the output pin OUTPUT, and is grounded via the ground pin GND.

[0009] The conversion device 101 also includes a transformer T1, a synchronous rectifier transistor Q2, a rectifier controller U2, a rectifier capacitor EC1, an output capacitor EC2, a load transistor Q3, and an output resistor Rsense. The drain terminal of the primary-side power transistor Q1 is connected to the primary side (primary winding Np) of the transformer T1, and the synchronous rectifier transistor Q2 is included on the low-side path of the secondary side (secondary winding Ns) of the transformer T1. The synchronous rectifier transistor Q2 is turned on and off under the control of the rectifier controller U2. The rectifier capacitor EC1 is connected across the high-side and low-side paths of the secondary side of the transformer T1, and the output capacitor EC2 is connected between the high-side path and the ground terminal. The load transistor Q3 is connected to the high-side path, and the output resistor Rsense is connected between the load LOAD and the ground terminal.

[0010] As shown in Figure 1, the high / low voltage detection device 102 includes a secondary-side control chip U3 (e.g., a fast charging protocol control chip) and a connection circuit connected to the conversion device. The connection circuit includes a first resistor R1, a second resistor R2, a third resistor R3, and an optocoupler U4. The first end of the third resistor R3 is connected to the output pin OUTPUT of the primary-side control chip U1, the second end is connected to the first end of the optocoupler U4, the second end of the optocoupler U4 is connected to the first end of the first resistor R1, the second end of the first resistor R1 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is grounded. The first end of the first resistor R1 is also connected to the detection terminal VD of the secondary-side control chip U3. As shown in Figure 1, the detection terminal VD of the secondary-side control chip U3 is also connected to a grounded capacitor C. The secondary-side control chip U3 detects the drain terminal of the load transistor Q3 via a wire.

[0011] The secondary-side control chip U3 includes a comparator Comp and a control processing unit Col. The positive input terminal of the comparator Comp (for example, it can be a general-purpose input / output (GPIO)) is connected to the connection point of the first resistor R1 and the second resistor R2, and the negative input terminal of the comparator Comp receives the reference voltage Vref.

[0012] In the conventional system 100 shown in Figure 1, when the primary-side control chip U1 receives the input voltage Vin, it sets the output pin OUTPUT of the primary-side control chip U1 high (i.e., the voltage signal of the output pin OUTPUT is at a high level). The voltage signal from the output pin OUTPUT is transmitted through the third resistor R3 and the optocoupler U4 to the first resistor R1 and the second resistor R2 for voltage division. The voltage after voltage division (i.e., the voltage on the second resistor R2) is connected to the positive input terminal of the comparator Comp and compared with the reference voltage Vref. The control processing unit Col determines whether the input voltage is high or low based on the comparison result of the comparator Comp.

[0013] In the conventional system 100 shown in Figure 1, in order to realize high and low voltage detection, at least one optocoupler and two resistors need to be added between the secondary control chip U3 and the conversion device 101, which increases the system cost.

[0014] In view of the above, embodiments of the present invention provide a high and low voltage detection device and method, which can indirectly obtain information about the input voltage by detecting the terminal voltage of the synchronous rectifier transistor of the conversion device, thereby realizing the detection of high and low voltage of the input voltage, and has a simpler structure and lower cost.

[0015] Figure 2 shows a circuit diagram of a high / low voltage detection device according to an embodiment of the present invention. As shown in Figure 2, the high / low voltage detection device 200 according to an embodiment of the present invention includes a control chip U3; and a connection circuit Conn for receiving the terminal voltage of a synchronous rectifier transistor of a conversion device (not shown in the figure), wherein the control chip U3 is configured to determine whether the input voltage of the conversion device is high or low based on the terminal voltage of the synchronous rectifier transistor of the conversion device. It should be understood that the high / low voltage detection device 200 can be a separate device, which can be used to realize the high / low voltage detection of the input voltage of the conversion device by being connected to the conversion device via the connection circuit Conn.

[0016] In some implementations, when the conversion device adopts high-side rectification, the terminal voltage is the voltage of the source terminal of the synchronous rectifier transistor, and when the conversion device adopts low-side rectification, the terminal voltage is the voltage of the drain terminal of the synchronous rectifier transistor.

[0017] In some implementations, the control chip U3 is configured to: scale the detected terminal voltage proportionally; compare the scaled voltage with a reference voltage; determine a count of the periods during which the scaled voltage is greater than the reference voltage based on the comparison result; and determine whether the input voltage of the conversion device is a high voltage or a low voltage based on the count.

[0018] In some implementations, the control chip U3 is further configured to: determine that the input voltage of the conversion device is high voltage when the count is greater than a predetermined number of times corresponding to the detection period; and determine that the input voltage of the conversion device is low voltage when the count is less than a predetermined number of times.

[0019] In some implementations, the control chip U3 is also configured to adjust the output power of the converter based on whether the input voltage of the converter is high or low. For example, when the control chip U3 detects that the input voltage of the converter is low, the system output power switches to low power; when the control chip U3 detects that the input voltage of the converter is high, the system output power switches to high power.

[0020] In some implementations, as shown in Figure 2, the connection circuit Conn includes a first resistor R1, and the control chip U3 includes: a first switch S1, a second switch S2, a third switch S3, a second resistor R2, a third resistor R3, a proportional current mirror PCM, a comparator Comp, and a control processing unit Col. The first switch S1 and the second resistor R2 are connected in series between the input terminal and the ground terminal of the proportional current mirror PCM, and the connection point between the input terminal of the proportional current mirror PCM and the first switch S1 is connected to the connection circuit Conn through the detection terminal VD of the control chip U3. The output terminal of the proportional current mirror PCM is grounded through the third resistor R3, and the output terminal of the proportional current mirror PCM is also connected to the positive input terminal of the comparator Comp through the second switch S2. The negative input terminal of the comparator Comp is used to receive the reference voltage Vref. The third switch S3 is connected between the input terminal of the proportional current mirror PCM and the positive input terminal of the comparator Comp. It should be understood that although the specific structure of the proportional current mirror PCM is shown in the figure, the structure of the proportional current mirror in this invention is not limited to that shown in the figure. For example, any other structure or similar functional elements can be used.

[0021] In some implementations, the proportional current mirror PCM is configured to perform proportional scaling of the measured terminal voltage; the comparator Comp is configured to perform a comparison of the proportionally scaled voltage with a reference voltage Vref; and the control processing unit Col is configured to perform a determination based on the comparison result of the count of the period when the proportionally scaled voltage is greater than the reference voltage Vref, and a determination based on the count of the period of the count of the period of the count of the input voltage of the conversion device as a high voltage or a low voltage.

[0022] In some implementations, when the conversion device uses high-side rectification, the first and third switches are open, and the second switch is closed; and when the conversion device uses low-side rectification, the first and third switches are closed, and the second switch is open. It should be understood that the high and low voltage detection device according to embodiments of the present invention can be adapted to be connected to a conversion device using high-side rectification, or it can be adapted to be connected to a conversion device using high-side rectification, thus providing application flexibility.

[0023] In some implementations, the conversion device is included in a charger system or a power adapter system.

[0024] Figure 3 shows a schematic diagram of a system in which a high and low voltage detection device according to an embodiment of the present invention is connected to a conversion device employing a low-end rectification method.

[0025] As shown in FIG3, the system 300 according to an embodiment of the present invention includes a conversion device 301 and a high / low voltage detection device 302. The conversion device 301 is the same as the conversion device 101 in the conventional system 100 shown in FIG1, both employing a low-end rectification method. The same reference numerals in FIG3 as those in FIG1 indicate the same elements as those in FIG1, and will not be described again here. The high / low voltage detection device 302 has the same configuration as the high / low voltage detection device 200 shown in FIG2, and the same reference numerals in FIG3 as those in FIG2 indicate the same elements as those in FIG2, and will not be described again here.

[0026] As shown in Figure 3, the connection circuit Coon of the high / low voltage detection device 302 is connected to the drain terminal of the synchronous rectifier transistor Q2 or the cathode terminal of the corresponding rectifier diode in the conversion device 301. The high / low voltage detection device 302 is also connected to the drain terminal of the load transistor Q3 via a wire. In the high / low voltage detection device 302, the second switch S2 is open, and the first switch S1 and the third switch S3 are closed.

[0027] Figure 4 shows a waveform diagram of the drain terminal of the synchronous rectifier transistor relative to ground in the system shown in Figure 3. In Figure 4, the vertical axis represents the drain terminal voltage Vdrain of the synchronous rectifier transistor Q2, and the horizontal axis represents time t. tONP, tdem, and tOFF represent the turn-on time of the primary-side transistor Q1, the demagnetization time of the transformer T1, and the turn-off time of the primary-side transistor Q1, respectively. tSW represents the switching cycle of the primary-side transistor Q1. Vout represents the output voltage of the system.

[0028] Referring to Figures 3 and 4, during the conduction time of the primary side transistor Q1, the drain voltage Vdrain of the synchronous rectifier transistor Q2 is Vin / Nps + Vd + Vout. The drain voltage Vdrain of the synchronous rectifier transistor Q2 is detected at the detection terminal VD of the control chip U3 via the first resistor R1. At this time, the current I1 passes through the proportional current mirror PCM to generate current I2. Thus, the proportional current mirror PCM proportionally scales the detected drain voltage of the synchronous rectifier transistor Q2. Since the second switch S2 is open, the first switch S1 and the third switch S3 are closed, and the proportionally scaled voltage is also the voltage across the second resistor R2. This voltage is input to the positive input terminal of the comparator Comp via the third switch S3 and is compared with the reference voltage Vref at the negative input terminal of the comparator Comp. The control processing unit Col performs a high / low voltage detection function based on the comparison result of the comparator Comp. Specifically, it counts the number of periods when the proportionally scaled voltage is greater than the reference voltage Vref, and compares this count with a preset number of times corresponding to the detection period to determine whether the input voltage of the conversion device is high or low. Specifically, if the count is greater than the preset number of times corresponding to the detection period, the input voltage of the conversion device 301 is determined to be high; if the count is less than the preset number of times corresponding to the detection period, the input voltage of the conversion device 301 is determined to be low.

[0029] The above describes an embodiment of a high and low voltage detection device combined with a conversion device using a low-end rectification method. However, in some cases, when designing the circuit of the conversion device, a high-end rectification method can also be used based on cost and electromagnetic coupling (EMC) considerations, i.e., the synchronous rectifier transistor Q2 is located in the high-end channel. The following will be described in detail with reference to Figures 5 and 6.

[0030] Figure 5 shows a schematic diagram of a system in which a high and low voltage detection device according to an embodiment of the present invention is connected to a conversion device employing a high-side rectification method.

[0031] As shown in FIG. 5, the system 500 according to an embodiment of the present invention includes a conversion device 501 and a high / low voltage detection device 502. The conversion device 501 differs from the conventional system 100 shown in FIG. 1, which includes a conversion device 101, in that the conversion device 501 adopts a high-side rectification method, that is, the synchronous rectifier transistor Q2 of the conversion device is located in the high-side path of the secondary side of the transformer T1. The same symbols in FIG. 5 as those in FIG. 1 indicate the same components as those in FIG. 1, and will not be described again here. The high / low voltage detection device 502 has the same configuration as the high / low voltage detection device 200 shown in FIG. 2. The same symbols in FIG. 5 as those in FIG. 2 indicate the same components as those in FIG. 2, and will not be described again here.

[0032] As shown in Figure 5, the connection circuit Conn of the high / low voltage detection device 502 is connected to the source terminal of the synchronous rectifier transistor Q2 or the anode terminal of the corresponding rectifier diode in the conversion device 501. The high / low voltage detection device 502 is also connected to the drain terminal of the load transistor Q3 via a wire. In the high / low voltage detection device 502, the second switch S2 is closed, and the first switch S1 and the third switch S3 are open.

[0033] Figure 6 shows a waveform diagram of the source terminal of the synchronous rectifier transistor relative to ground in the system shown in Figure 5. In Figure 6, the vertical axis represents the source terminal voltage -Vsource of the synchronous rectifier transistor Q2, and the horizontal axis represents time t. tONP, tdem, and tOFF represent the turn-on time of the primary-side transistor Q1, the demagnetization time of the transformer T1, and the turn-off time of the primary-side transistor Q1, respectively. tSW represents the switching period of the primary-side transistor Q1. Vout represents the output voltage of the system.

[0034] Referring to Figures 5 and 6, during the conduction time of the primary side transistor Q1, the source terminal voltage Vsource of the synchronous rectifier transistor Q2 is a negative voltage -Vin / Nps. The source terminal voltage -Vsource of the synchronous rectifier transistor Q2 is detected at the detection terminal VD of the control chip U3 via the first resistor R1. At this time, the current I1 passes through the proportional current mirror PCM to generate current I2. Thus, the proportional current mirror PCM proportionally scales the detected source terminal voltage of the synchronous rectifier transistor Q2. Since the second switch S2 is closed, the first switch S1 and the third switch S3 are open, and the proportionally scaled voltage, i.e., the voltage of current I2 across the third resistor R3, is input to the positive input terminal of the comparator Comp via the second switch S2 and compared with the reference voltage Vref at the negative input terminal of the comparator Comp. The control processing unit Col performs a high / low voltage detection function based on the comparison result of the comparator Comp. Specifically, it counts the number of periods when the proportionally scaled voltage is greater than the reference voltage Vref, and compares this count with a preset number of times corresponding to the detection period to determine whether the input voltage of the conversion device is high or low. Specifically, if the count is greater than the preset number of times corresponding to the detection period, the input voltage of the conversion device 501 is determined to be high; if the count is less than the preset number of times corresponding to the detection period, the input voltage of the conversion device 501 is determined to be low.

[0035] As described above, the high and low voltage detection device of the present invention is applicable not only to conversion devices employing low-end rectification but also to conversion devices employing high-end rectification. For different rectification methods, the high and low voltage conversion device can be applied to conversion devices of corresponding rectification methods by configuring the first switch S1, the second switch S2, and the third switch S3.

[0036] Figure 7 shows a flowchart of a high and low voltage detection method according to an embodiment of the present invention. As shown in Figure 7, the high and low voltage detection method 700 according to an embodiment of the present invention includes steps S701 and S702.

[0037] In step S701, the terminal voltage of the synchronous rectifier transistor of the conversion device is detected during the detection period.

[0038] In step S702, the input voltage of the conversion device is determined to be high voltage or low voltage based on the terminal voltage of the synchronous rectifier transistor of the conversion device.

[0039] In some implementations, when the conversion device adopts high-side rectification, the terminal voltage is the voltage of the source terminal of the synchronous rectifier transistor, and when the conversion device adopts low-side rectification, the terminal voltage is the voltage of the drain terminal of the synchronous rectifier transistor.

[0040] In some implementations, determining whether the input voltage of the conversion device is high or low based on the terminal voltage of the acquired synchronous rectifier transistor includes: scaling the detected terminal voltage; comparing the scaled voltage with a reference voltage; determining a count of the period during which the scaled voltage is greater than the reference voltage based on the comparison result; and determining whether the input voltage of the conversion device is high or low based on the count.

[0041] In some implementations, determining whether the input voltage of the conversion device is high voltage or low voltage based on the count also includes: determining that the input voltage of the conversion device is high voltage when the count is greater than a predetermined number of times corresponding to the detection period; and determining that the input voltage of the conversion device is low voltage when the count is less than the predetermined number of times.

[0042] In some implementations, the high and low voltage detection method 700 further includes: adjusting the output power of the conversion device based on the determination of whether the input voltage of the conversion device is high or low.

[0043] Figure 8 shows a more detailed flowchart of the high and low voltage detection method according to an embodiment of the present invention. As shown in Figure 8, the high and low voltage detection method 800 according to an embodiment of the present invention includes steps S801-S808.

[0044] In step S801, the control chip is powered on. Referring to Figures 3 and 5, the primary-side control chip U1 is powered on first, driving the primary-side transistor Q1 to conduct, and energy is transferred to the secondary side of the transformer T1, thereby providing the operating voltage for the control chip U3.

[0045] In step S802, a predetermined time is delayed. After the control chip U3 is powered on, a predetermined time, such as 10ms, is delayed to allow the control chip U3 to complete its own parameter configuration.

[0046] In step S803, the terminal voltage of the synchronous rectifier transistor Q2 of system 300 or 500 is detected during the detection period. As shown in Figure 3, system 300 adopts low-side rectification mode, and the drain terminal voltage of synchronous rectifier transistor Q2 is detected at this time. As shown in Figure 5, system 500 adopts high-side rectification mode, and the source terminal voltage of synchronous rectifier transistor Q2 is detected.

[0047] In step S804, the detected terminal voltage is scaled proportionally. Referring to Figures 3 and 5, the proportional current mirror PCM scales the terminal voltage proportionally.

[0048] In step S805, the scaled voltage is compared with a reference voltage. Referring to Figures 3 and 5, the comparator Comp compares the scaled voltage with the reference voltage Vref.

[0049] In step S806, the count of periods when the proportionally scaled voltage is greater than the reference voltage is determined based on the comparison result. In step S807, the input voltage of the conversion device is determined to be high or low based on the count. Referring to Figures 3 and 5, the counting and high / low voltage determination are handled by the control processing unit Col. It should also be understood that the comparator Comp outputs a pulse signal. Specifically, when the voltage at the positive input terminal of the comparator Comp is greater than the reference voltage, the comparator Comp outputs a pulse signal; when the voltage at the positive input terminal of the comparator Comp is less than the reference voltage, no pulse signal is output. Thus, the control processing unit Col determines whether the input voltage is high or low by counting the number of pulse periods and comparing it with a predetermined number of counts. It should be understood that the predetermined number of counts corresponds to a detection period. Different predetermined number of counts can be designed for different detection periods. In some implementations, when the count is greater than the predetermined number of counts, the input voltage of the conversion device is determined to be high; when the count is less than the predetermined number of counts, the input voltage of the conversion device is determined to be low.

[0050] In step S808, the output power of the converter is adjusted based on whether the input voltage of the converter is high or low. For example, when the control chip U3 detects that the input voltage of the converter is low, the system output power switches to low power; when the input voltage of the converter is high, the system output power switches to high power.

[0051] According to embodiments of the present invention, a high and low voltage detection device and method are provided, which can indirectly obtain information about the input voltage by detecting the terminal voltage of the synchronous rectifier transistor of the conversion device, thereby realizing the detection of high and low voltage of the input voltage, and has a simpler structure and lower cost.

[0052] The mechanism of the present invention has been described above with reference to the drawings and various embodiments. It should be understood that the present invention is not limited thereto, but may be implemented in other forms without departing from the spirit and essential characteristics of the invention. The present embodiments are to be regarded as exemplary and not limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and all changes falling within the meaning of the claims and their equivalents are included within the scope of the invention.

Claims

1. A high and low voltage detection device, comprising: Control chip; A connection circuit is provided for receiving the terminal voltage of the synchronous rectifier transistor of the conversion device, wherein the control chip is configured to determine whether the input voltage of the conversion device is high voltage or low voltage based on the terminal voltage of the synchronous rectifier transistor of the conversion device; wherein, when the conversion device adopts high-side rectification mode, the terminal voltage is the voltage of the source terminal of the synchronous rectifier transistor, and when the conversion device adopts low-side rectification mode, the terminal voltage is the voltage of the drain terminal of the synchronous rectifier transistor.

2. The high and low voltage detection device as described in claim 1, wherein, The control chip is configured to: scale the detected terminal voltage proportionally; compare the scaled voltage with a reference voltage; determine a count of the periods during which the scaled voltage is greater than the reference voltage based on the comparison result; and determine whether the input voltage of the conversion device is a high voltage or a low voltage based on the count.

3. The high and low voltage detection device as described in claim 2, wherein, The control chip is further configured to: determine that the input voltage of the conversion device is high voltage when the count is greater than a predetermined number of times corresponding to the detection period; and determine that the input voltage of the conversion device is low voltage when the count is less than the predetermined number of times.

4. The high and low voltage detection device as described in claim 1, wherein, The control chip is also configured to adjust the output power of the conversion device based on whether the input voltage of the conversion device is high or low.

5. The high and low voltage detection device as described in claim 2, wherein, The connection circuit includes a first resistor. The control chip includes a first switch, a second switch, a third switch, a second resistor, a third resistor, a proportional current mirror, a comparator, and a control processing unit. The first switch and the second resistor are connected in series between the input terminal and ground of the proportional current mirror, and the connection point between the input terminal of the proportional current mirror and the first switch is connected to the connection circuit. The output terminal of the proportional current mirror is grounded via the third resistor, and the output terminal of the proportional current mirror is also connected to the positive input terminal of the comparator via the second switch. The negative input terminal of the comparator is used to receive a reference voltage. The third switch is connected between the input terminal of the proportional current mirror and the positive input terminal of the comparator.

6. The high and low voltage detection device as described in claim 5, wherein, The proportional current mirror is configured to perform proportional scaling of the detected terminal voltage; the comparator is configured to perform a comparison of the proportionally scaled voltage with the reference voltage; the control processing unit is configured to perform a determination of a count of the periods during which the proportionally scaled voltage is greater than the reference voltage based on the result of the comparison, and a determination of whether the input voltage of the conversion device is high or low based on the count.

7. The high and low voltage detection device as described in claim 5, wherein, When the conversion device uses high-side rectification, the first switch and the third switch are open, and the second switch is closed; and when the conversion device uses low-side rectification, the first switch and the third switch are closed, and the second switch is open.

8. The high and low voltage detection device as described in claim 1, wherein, The conversion device is included in a charger system or a power adapter system.

9. A method for detecting high and low pressure, comprising: The terminal voltage of the synchronous rectifier transistor of the conversion device is detected during the detection period; And determine whether the input voltage of the conversion device is high voltage or low voltage based on the obtained terminal voltage of the synchronous rectifier transistor of the conversion device; wherein, when the conversion device adopts high-side rectification mode, the terminal voltage is the voltage of the source terminal of the synchronous rectifier transistor, and when the conversion device adopts low-side rectification mode, the terminal voltage is the voltage of the drain terminal of the synchronous rectifier transistor.

10. The high and low voltage detection method as described in claim 9, wherein, Determining whether the input voltage of the conversion device is high or low based on the acquired terminal voltage of the synchronous rectifier transistor includes: scaling the detected terminal voltage; comparing the scaled voltage with a reference voltage; determining a count of the number of periods during which the scaled voltage is greater than the reference voltage based on the comparison result; and determining whether the input voltage of the conversion device is high or low based on the count.

11. The high / low voltage detection method as described in claim 10, further comprising determining whether the input voltage of the conversion device is high or low based on the count: If the count is greater than a predetermined number of times corresponding to the detection period, it is determined that the input voltage of the conversion device is a high voltage; If the count is less than the predetermined number, the input voltage of the conversion device is determined to be low.

12. The high and low voltage detection method as described in claim 9 further includes: The output power of the converter is adjusted based on whether the input voltage of the converter is high or low.

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