Die bonding apparatus, mounting method and manufacturing method of semiconductor device

TWI938623BActive Publication Date: 2026-09-11FASFORD TECH
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Patent Information

Application Number
TW113126408
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2023-09-15
Filing Date
2024-07-15
Publication Date
2026-09-11
Estimated Expiration
2044-07-14

AI Technical Summary

Technical Problem

Existing technologies face challenges in performing surface activation bonding between a chip and a substrate effectively.

Method used

A chip bonding device equipped with a first bonding head, a first bonding platform, and a plasma irradiator is used to irradiate plasma on the chip and substrate surfaces, facilitating surface activation bonding.

Benefits of technology

Enables effective surface activation bonding, improving joining strength and reducing defects, allowing for increased integration density and compatibility with chiplet technology without requiring a vacuum chamber.

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Abstract

[Problem] To provide a technology capable of surface activation bonding of a die and a substrate. [Solution] A die bonding apparatus includes a first bonding head for picking up a die, a first bonding platform for holding a substrate, and a plasma irradiator for irradiating the surface of the die picked up by the first bonding head and the surface of the substrate held by the first bonding platform with plasma.
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Description

Chip Bonding Device, Mounting Method, and Manufacturing Method of Semiconductor Device The present disclosure relates to a chip bonding device, such as a flip-chip bonder capable of performing surface activation bonding. A chip bonding device (semiconductor manufacturing device, mounting device) has a flip-chip bonder (for example, Japanese Unexamined Patent Application Publication No. 2023-45346) that picks up chips having bumps on the surface divided from a wafer, and flips the picked-up chips so that the surface faces downward (face-down) and bonds them to a substrate. [Prior Art Documents] [Patent Documents] [Patent Document 1] Japanese Unexamined Patent Application Publication No. 2023-45346 [Problems to be Solved by the Invention] The problem of the present disclosure is to provide a technique capable of performing surface activation bonding between a chip and a substrate. Other problems and novel features will be apparent from the description of this specification and the attached drawings. [Means for Solving the Problems] Briefly explaining the outline represented in the present disclosure, it is as follows. That is, the chip bonding device includes a first bonding head that picks up a chip, a first bonding platform that holds a substrate, and a plasma irradiator that irradiates plasma on the surface of the chip picked up by the first bonding head and the surface of the substrate held by the first bonding platform. [Effects of the Invention] When using the present disclosure, surface activation bonding can be performed. Hereinafter, embodiments will be described with reference to the drawings. However, for clarity of explanation, the following description and drawings are appropriately omitted and simplified. Furthermore, the same reference numerals are assigned to the same components, and duplicate explanations are omitted. In addition, for more clarity of explanation, the drawings schematically show the widths, thicknesses, shapes, etc. of each part compared to the actual aspect. The configuration of a flip-chip bonder as an embodiment of the chip bonding device will be described with reference to FIGS. 1 to 5. FIG. 1 is a schematic top view showing a configuration example of the flip-chip bonder in the embodiment. FIG. 2 is a schematic cross-sectional view of the main part of the wafer supply unit shown in FIG. 1. FIG. 3 is a schematic front view around the pickup unit in the flip-chip bonder shown in FIG. 1. FIG. 4 is a schematic side view of the temporary crimping part of the bonding part in the flip-chip bonder shown in FIG. 1. FIG. 5 is a schematic side view of the formal crimping part of the bonding part in the flip-chip bonder shown in FIG. 1. As shown in FIG. 1, the flip chip bonder 1 generally includes a wafer supply unit 10, a pick-up unit 20, an intermediate stage unit 30, a bonding unit 40, a transfer unit 50, a substrate supply unit 60, a substrate discharge unit 70, and a control unit (control device) 80. The Y2-Y1 direction is the front-rear direction of the flip chip bonder 1, the X2-X1 direction is the left-right direction, and the Z1-Z2 direction is the up-down direction. The wafer supply unit 10 is arranged on the front side of the flip chip bonder 1, and the bonding unit 40 is arranged on the rear side. The wafer supply unit 10 includes a wafer cassette elevator 11, a wafer holding stage 12, and a peeling unit 13. The wafer cassette elevator 11 moves a wafer cassette (not shown) storing a plurality of wafer rings WR up and down to the wafer transfer height. A wafer alignment rail (not shown) aligns the wafer ring WR supplied to the wafer cassette elevator 11. A wafer extractor (not shown) takes out the wafer ring WR from the wafer cassette and supplies it to the wafer holding stage 12, or takes it out from the wafer holding stage 12 and stores it in the wafer cassette. The wafer W is bonded (stuck) to the dicing tape DT, and the wafer W is divided into a plurality of chips D. The dicing tape DT is held by the wafer ring WR. The wafer W is, for example, a semiconductor wafer or a glass wafer, and the chip D as a workpiece is a semiconductor wafer, a glass wafer, or a MEMS (Micro Electro Mechanical Systems). As shown in FIG. 2, the wafer holding stage 12 includes an expansion ring 15 that holds the wafer ring WR, and a support ring 17 that horizontally positions the dicing tape DT. The wafer holding stage 12 is moved in the X1-X2 direction and the Y1-Y2 direction by a drive unit (not shown) to move the picked-up chip D to the position of the peeling unit 13. Further, the wafer holding stage 12 rotates the wafer ring WR in the XY plane by a drive unit (not shown). The peeling unit 13 moves in the up-down direction by a drive unit (not shown). The peeling unit 13 peels the chip D from the dicing tape DT. As shown in FIGS. 1 and 3, the pick-up unit 20 includes a pick-up head 21 and a wafer identification camera 24. A chuck 22 for adsorbing and holding the peeled chip D is provided at the front end of the pick-up head 21. The pick-up head 21 picks up the chip D from the wafer supply unit 10, places the surface (the surface having the metal electrode De formed thereon) of the chip D facing upward on the intermediate stage 31. The pick-up head 21 moves in the Z1-Z2 direction, the X1-X2 direction, and the Y1-Y2 direction. The wafer identification camera 24 confirms the pick-up position of the picked-up chip D from the wafer W, or performs a surface inspection of the chip D. As shown in FIGS. 1 and 3, the intermediate platform portion 30 has an intermediate platform 31 for placing the die D and a platform identification camera 34 for identifying the die D on the intermediate platform 31. The intermediate platform 31 includes a flipping platform 31a and a picking platform 31b. The die D with its surface facing up is placed on the flipping platform 31a, and the flipping platform 31a flips to make the surface of the die D face down and places the die D on the picking platform 31b. The placed die D is temporarily held on the picking platform 31b. As shown in FIG. 1, the bonding portion 40 includes a temporary crimping portion 40a and a formal crimping portion 40b. As shown in FIG. 4, the temporary crimping portion 40a has a temporary crimping head 41a as a first bonding head, a substrate identification camera 44a, a temporary crimping platform 46a as a first bonding platform, and a plasma irradiator 90. The temporary crimping head 41a is the same as the picking head 21 and has a chuck 42a for adsorbing and holding the die D at the front end. The temporary crimping head 41a moves in the Y1 - Y2 direction. The substrate identification camera 44a images the position identification mark (not shown) of the substrate S to identify the bonding position. The temporary crimping platform 46a rises when the die D is placed on the substrate S and supports the substrate S from below. The temporary crimping platform 46a has a suction port (not shown) for vacuum-adsorbing the substrate S and can fix the substrate S. With such a configuration, the temporary crimping head 41a picks up the die D from the intermediate platform 31 and bonds the die D to the transported substrate S according to the imaging data of the substrate identification camera 44a. As shown in FIG. 5, the formal crimping portion 40b has a formal crimping head 41b as a second crimping head, a substrate identification camera 44b, and a formal crimping platform 46b as a second bonding platform. The formal crimping head 41b is provided with a chuck 42b for pushing the die D onto the substrate S. The formal crimping head 41b moves in the Y1 - Y2 direction. The formal crimping platform 46b rises when the die D is placed on the substrate S and supports the substrate S from below. The formal crimping platform 46b has a suction port (not shown) for vacuum-adsorbing the substrate S and can fix the substrate S. The formal crimping platform 46b heats the substrate S by a heating device 461. With such a configuration, the formal crimping head 41b formally crimps the die D temporarily crimped to the substrate S to the substrate S. The load or load application time of the formal crimping head 41b for formal crimping is greater than the load or load application time of the temporary crimping head 41a for temporary crimping. To confirm the crimping state of the die D, the substrate identification camera 44b images the die D and the substrate S. As shown in FIG. 1, the transfer unit 50 has transfer tracks 51 and 52 for moving the substrate S in the X1-X2 direction. The transfer tracks 51 and 52 are arranged in parallel. With such a configuration, the transfer unit 50 takes out the substrate S from the substrate supply unit 60, moves the substrate S along the transfer tracks 51 and 52 via the temporary bonding platform 46a and the formal bonding platform 46b to the substrate discharge unit 70, and transfers the substrate S to the substrate discharge unit 70. The substrate supply unit 60 takes out the substrate S stored in the transport device and transported into the transport device and supplies it to the transfer unit 50. The substrate discharge unit 70 stores the substrate S transported by the transfer unit 50 in the transport device. The control system of the flip chip bonder 10 will be described with reference to FIG. 6. FIG. 6 is a block diagram showing the schematic configuration of the control system of the flip chip bonder of FIG. 1. The control system 8 includes a control unit (control device) 80, a drive unit 86, a signal unit 87, and an optical system 88. The control unit 80 is mainly composed of a control arithmetic device 81 constituted by a CPU (Central Processor Unit), a memory device 82, an input / output device 83, a bus line 84, and a power supply unit 85. The memory device 82 has a main memory device 82a and an auxiliary memory device 82b. The main memory device 82a is constituted by a RAM (Random Access Memory) for storing processing programs. The auxiliary memory device 82b is constituted by an HDD (Hard Disk Drive), an SSD (Solid State Drive), etc. for storing control data, image data, etc. required for control. Furthermore, an external memory device can be connected to the control unit 80. The input / output device 83 has a screen 83a for the device status or information of the flip-chip bonder 1, a touch panel 83b for inputting the operator's instructions, a mouse 83c for operating the screen 83a, and an image capture device 83d for capturing image data from the optical system 88. The input / output device 83 further has a motor control device 83e and an I / O signal control device 83f. The motor control device 83e controls the drive units of the XY stage (not shown) of the wafer supply unit 10, the pick-up head stage, and the bonding head stage, and the drive unit of the peeling unit 13, etc. The I / O signal control device 83f extracts signals from the signal unit 87 and controls the signal unit 87. The signal unit 87 includes switches or regulators for controlling the brightness of various sensors or lighting devices, etc. The optical system 88 includes a wafer identification camera 24, a stage identification camera 34, and substrate identification cameras 44a and 44b. The wafer identification camera 24, the stage identification camera 34, and the substrate identification cameras 44a and 44b digitize the light intensity or color values. The control arithmetic device 81 extracts the required data via the bus line 84, performs arithmetic operations, controls the pick-up head 21, etc., or sends information to the screen 83a, etc. The control unit 80 stores the image data captured by the wafer identification camera 24, the stage identification camera 34, and the substrate identification cameras 44a and 44b in the memory device 82 via the image capture device 83d. Using the software programmed according to the stored image data, the control arithmetic device 81 performs the positioning of the die D and the substrate S, and the appearance inspection of the die D and the substrate S. Based on the positions of the die D and the substrate S calculated by the control arithmetic device 81, the drive unit 86 is actuated by the software via the motor control device 83e. Through this process, the die on the wafer is positioned, the pick-up head stage and the bonding head stage are actuated, and the die D is bonded to the substrate S. The control unit 80 can install the above program stored in the external memory device in the computer configuration. The external memory device includes, for example, an HDD, a USB memory, or an SSD, etc. The auxiliary memory device 82b or the external memory device is configured as a memory medium readable by the computer. Hereinafter, these will be abbreviated as recording media. In the case of using the term "recording medium" in this specification, there are cases where only the auxiliary memory device 82b alone is included, cases where only the external memory device alone is included, or cases where both are included. In addition, even when providing programs or data to the computer and providing programs or data from the computer to external devices, communication means such as a network or a dedicated line can be used instead of the external memory device. A part of the manufacturing process of a semiconductor device using the flip-chip bonder 1 (manufacturing method of a semiconductor device) will be described with reference to FIG. 7. FIG. 7 is a flowchart showing the manufacturing method of a semiconductor device using the flip-chip bonder shown in FIG. 1. In the following description, the operations of the respective parts constituting the flip-chip bonder 1 are controlled by the controller 80. (Wafer Loading Process: Step S1) A wafer cassette (not shown) storing a wafer ring WR is introduced into the wafer cassette elevator 11. A dicing tape DT to which chips D diced from the wafer W are adhered is mounted on the wafer ring WR. The wafer supply unit 10 takes out the wafer ring WR from the wafer cassette filled with the wafer ring WR and loads it into the wafer holder 12. The wafer W is, for example, a semiconductor wafer, and the chip D as the workpiece is a semiconductor chip. On the dicing tape DT, the surface of the chip D faces upward, and on the surface of the chip D, as shown in FIG. 2, metal electrodes De are provided in the openings of the insulating film Di and the insulating film Di, for example, on the surface of the chip D. (Substrate Loading Process: Step S2) A transport device storing the substrate S is introduced into the substrate supply unit 60. The substrate supply unit 60 takes out the substrate S from the transport device. The taken-out substrate S is loaded into the bonding unit 40 via the transport unit 50. On the surface of the substrate S, metal electrodes Se are provided in the openings of the insulating film Si and the insulating film Si (refer to FIG. 9). (Pickup Process: Step S3) After Step S1, the wafer holder 12 moves to a position where it can pick up a desired chip D from the dicing tape DT. The wafer identification camera 24 photographs the chip D. Based on the image data obtained by the photographing, the positioning and surface inspection of the chip D are performed. By image processing of the image data, the offset amounts (in the X, Y, and θ directions) of the chip D on the wafer holder 12 from the chip position reference point of the flip-chip bonder are calculated for positioning. In addition, the chip position reference point is set in advance by holding a specific position of the wafer holder 12 as the initial setting of the device. By image processing of the image data, the surface inspection of the chip D is performed. The peeling unit 13 moves upward in such a manner that the back surface of the dicing tape DT contacts the upper surface of the peeling unit 13. Then, the peeling unit 13 adsorbs the dicing tape DT. The pickup head 21 descends while evacuating the chuck 22 and lands on the chip D to be peeled, and adsorbs the chip D. The pickup head 21 raises the chuck 22 to peel the chip D from the dicing tape DT. Thus, the chip D is picked up by the pickup head 21. The pickup head 21 moves from the pickup position along the X1-X2 direction above the flipping platform 31a of the intermediate platform 31. The pickup head 21 descends to place the crystal grain D held by the chuck 22 on the flipping platform 31a. The flipping platform 31a rotates 180 degrees to reverse the surface (face) on which the metal electrode De of the crystal grain D is formed and face downward, and places the crystal grain D on the pickup platform 31b. The platform identification camera 34 photographs the crystal grain D on the pickup platform 31b. Based on the image data obtained by the photographing, the positioning and surface inspection of the crystal grain D are performed. By image processing of the image data, the offset amounts (in the X, Y, and θ directions) of the crystal grain D on the pickup platform 31b from the crystal grain position reference point of the flip chip bonder are calculated for positioning. In addition, the crystal grain position reference point is set in advance by holding a specific position of the pickup platform 31b as the initial setting of the device. By image processing of the image data, the surface inspection of the crystal grain D is performed. The pickup head 21 that transports the crystal grain D to the intermediate platform 31 returns to the wafer holding stage 12. According to the above sequence, the next crystal grain D is peeled off from the dicing tape DT, and then, in the same sequence, the crystal grains D are peeled off from the dicing tape DT one by one. (Bonding process: Process S4) The transport unit 50 transports the substrate S to the temporary crimping platform 46a. The substrate identification camera 44a photographs the substrate S placed on the temporary crimping platform 46a. Based on the image data obtained by the photographing, the positioning and surface inspection of the substrate S are performed. By image processing of the image data, the offset amounts (in the X, Y, and θ directions) of the substrate S from the substrate position reference point of the flip chip bonder 1 are calculated. In addition, the substrate position reference point is set in advance by holding a specific position of the bonding portion 40 as the initial setting of the device. By image processing of the image data, the surface inspection of the substrate S is performed. Correct the adsorption position of the temporary crimping head 41a from the offset amount of the crystal grain D on the intermediate platform 31 calculated in Process S3. The temporary crimping head 41a descends and adsorbs the crystal grain D by the chuck 42a. Moreover, the temporary crimping head 41a rises to pick up the crystal grain D from the intermediate platform 31. The temporary crimping head 41a holds the crystal grain D by the chuck 42a and moves from above the intermediate platform 31 to above the substrate S. The plasma irradiator 90 moves below the temporary crimping head 41a and above the substrate S. The plasma irradiator 90 irradiates the surface of the crystal grain D and the surface of a specific portion of the substrate S with plasma (plasma treatment) to activate each surface. After that, the plasma irradiator 90 retracts. The temporary crimping head 41a descends to temporarily crimp the crystal grain D held by the chuck 42a on a specific portion of the substrate S. Accordingly, the insulating film Di on the surface of the crystal grain D and the insulating film Si on the surface of the substrate S are bonded. The substrate identification camera 44a photographs the die D bonded to the substrate S. Based on the image data obtained by the photography, inspections such as whether the die D is bonded to the desired position (relative position inspection of the die D and the substrate S) are performed. The temporary bonding head 41a that temporarily bonds the die D to the substrate S returns to the intermediate stage 31. According to the above sequence, the next die D is picked up from the intermediate stage 31 and temporarily bonded to the substrate S. This operation is repeated so that the die D is temporarily bonded to the entire substrate S. The transfer unit 50 transfers the substrate S to the main bonding stage 46b. The heating device 461 heats the substrate S on the main bonding stage 46b. The main bonding head 41b moves from the retracted position above the die D temporarily bonded to the substrate S. The main bonding head 41b descends and the die D is main-bonded to the substrate S with the chuck 42b. By this heating and pressing, the metal electrode De on the surface of the die D and the metal electrode Se on the surface of the substrate S are bonded. The substrate identification camera 44b photographs the die D and the substrate S. Based on the image data obtained by the photography, a surface inspection (confirmation of the bonding state) is performed. (Substrate unloading process: Process S5) The substrate S to which the die D is bonded is transferred to the substrate unloading unit 70. The substrate unloading unit 70 stores the substrate S in the transfer device. The transfer device storing the substrate S is unloaded from the flip chip bonder 1. Next, the plasma irradiator 90 will be described with reference to FIG. 8. FIG. 8 is a diagram showing the configuration of the plasma irradiator shown in FIG. 1. The plasma irradiator 90 performs a remote atmospheric pressure plasma treatment (surface activation treatment) at room temperature. The plasma irradiator 90 includes a gas inlet 91, a gas introduction nozzle 92, a plasma generation unit 93, and a nozzle 94. The plasma generation unit 93 is connected to a high-frequency power supply 95. In this configuration, a processing gas is introduced from the gas inlet 91, passes through the inside of the gas introduction nozzle 92, and flows in the direction of the nozzle 94. In the middle of this flow, high-frequency power is applied by the high-frequency power supply 95 in the plasma generation unit 93, and the processing gas passing through is activated, generating active species AS of the processing gas. The active species AS generated inside the plasma generation unit 93 are transported by the gas flow to the inside of the nozzle 94 and ejected from the gas supply holes 96 provided in the nozzle 94. A plurality of gas supply holes 96 are provided on the side facing the die D (upper side) and the side facing the substrate S (lower side), respectively. The gas inlet 91 is connected to the supply source of the processing gas via a pipe 101, a valve body 102, and a flow controller 103. The plasma irradiator 90 may include the pipe 101, the valve body 102, and the flow controller 103. As the material of the gas introduction nozzle 92, materials with low conductivity such as glass, quartz glass, and aluminum, which are generally referred to as insulators, are used. However, even if it is inside the gas introduction nozzle 92, a part of the portion that does not contact the electrode in the plasma generation unit 93 can be a metal generally referred to as a conductor, such as stainless steel or aluminum (Al). The shape of the gas introduction nozzle 92 is tubular in the central part for introducing gas, and its cross-section can be circular or rectangular. As the processing gas, for example, nitrogen (N) gas can be applied. Accordingly, in the plasma generation unit 93, by applying high-frequency power, nitrogen plasma is generated. The active species AS released by the plasma is irradiated onto the surfaces of the crystal grains D and the substrate S to perform surface activation treatment. The surface activation treatment applies energy to the atomic bonds of the material, breaks the atomic bonds into an unstable state, and improves the chemical reactivity. The processing gas is not limited to nitrogen, and even rare gases such as argon (Ar) and helium (He) can be used. The method for surface activation treatment of the crystal grains D and the substrate S by the plasma irradiator 90 will be described with reference to FIGS. 9 and 10. FIGS. 9 and 10 are diagrams for explaining the plasma irradiation method in the first joint portion. As shown in FIG. 9, the temporary bonding head 41a picks up the crystal grain D from the intermediate platform 31 and transports it above the placement position of the substrate S. Here, on the surface of the crystal grain D, for example, a metal electrode De such as copper (Cu) or gold (Au) and an insulating film Di such as polyimide are formed. On the surface of the substrate S, for example, a metal electrode of Cu or Au and an insulating film such as polyimide are formed. As shown in FIG. 10, the plasma irradiator 90 moves between the crystal grain D and the substrate S. The plasma irradiator 90 irradiates the surface of the substrate S in parallel with irradiating the surface of the crystal grain D with plasma. More specifically, the plasma irradiator 90 irradiates plasma from a plurality of gas supply holes 96 provided above and below the nozzle 94. The plasma irradiation time is preferably 5 seconds or less, and more preferably about 1 second. Accordingly, the insulating film Di of the crystal grain D and the insulating film Si of the substrate S are activated. After that, the temporary bonding head 41a descends, and the crystal grain D is placed on the substrate S and pressed. Accordingly, the insulating film Di of the crystal grain D and the insulating film Si of the substrate S are joined. In the case of this embodiment, since the plasma is irradiated before the crystal grain D and the substrate S are to be joined, they do not contact the activated joint surface, and bonding (joining) can be performed. Furthermore, it is difficult for the joint surface to become inactive before joining. Accordingly, the joining strength between the crystal grain D and the substrate S is improved. Moreover, since they are joined in a state where the joint surface is activated, joining defects are reduced. In the case of this embodiment, since surface-activated bonding is possible, hybrid bonding (bonding) can be performed. Accordingly, since hybrid bonding enables narrow pitch of mounting positions, the integration density can be increased. Further, in hybrid bonding, mounting in chiplet technology can also be performed. Chiplet technology refers to a technology in which a CPU, GPU, acceleration card, etc. constituting an integrated circuit are divided into a plurality of chips for each function, the chips are respectively manufactured using an optimal process, and the chips are combined and packaged as one chip. In chiplet technology, for example, a silicon interposer provided with a redistribution layer (RDL) is used, and the redistribution layer forms electrodes of Cu or Au and an insulating film such as polyimide on its surface. In the case of this embodiment, since plasma treatment is performed in the atmosphere, a vacuum chamber or the like is not required. Accordingly, enlargement of the flip-chip bonder can be suppressed. Since this can be achieved by simply adding a plasma irradiator, an existing device can be modified and implemented. <Modification Example> Hereinafter, several representative modification examples of the embodiment will be exemplified. In the description of the following modification examples, parts having the same configuration and function as those described in the above embodiment are assumed to be able to use the same reference numerals as those in the above embodiment. Moreover, for the description of such parts, within the range without technical contradiction, the description in the above embodiment can be appropriately cited. Further, within the range without technical contradiction, a part of the above embodiment and all or part of a plurality of modification examples can be appropriately and comprehensively applied. (First Modification Example) The plasma irradiation method in the first modification example will be described with reference to FIGS. 11 and 12. FIGS. 11 and 12 are diagrams for explaining the plasma irradiation method in the first modification example. In the embodiment, although an example in which plasma is irradiated by one plasma irradiator 90 in the same timing as that of the die D and the substrate S has been described, plasma may be irradiated on the die D and the substrate S by two plasma irradiators in different timings. For example, the temporary bonding portion 40a includes a first plasma irradiator 90a and a second plasma irradiator 90b. The first plasma irradiator 90a is provided with a gas supply hole 96 only on the side facing the die D (upper side). The second plasma irradiator 90b is provided with a gas supply hole 96 only on the side facing the substrate S (lower side). First, as shown in FIG. 11, the first plasma irradiator 90a moves from the retracted position to below the die D. Then, the first plasma irradiator 90a irradiates plasma on the surface of the die D. Next, as shown in FIG. 12, while the first plasma irradiator 90a moves to the retracted position, the second plasma irradiator 90b moves between the die D and the substrate S. Then, the second plasma irradiator 90b irradiates plasma on the surface of the substrate S. After that, the second plasma irradiator 90b moves to the retracted position. (Second Modification Example) The plasma irradiation method in the second modification example will be described with reference to FIGS. 13 and 14. FIGS. 13 and 14 are diagrams for explaining the plasma irradiation method in the second modification example. In the embodiment, although an example in which a plasma irradiator 90 irradiates plasma in the same timing as the die D and the substrate S has been described, it is also possible to irradiate the die D and the substrate S with plasma by a single plasma irradiator in different timings. The plasma irradiator 90 is the same as in the embodiment, and has gas supply holes 96 on the side facing the die D (upper side) and the side facing the substrate S (lower side). Moreover, the upper gas supply hole 96 and the lower gas supply hole 96 are each configured to be capable of plasma irradiation. It is also possible to irradiate the surface of the die D first, and it is also possible to irradiate the surface of the substrate S first. First, as shown in FIG. 13, the plasma irradiator 90 moves from the retracted position to between the die D and the substrate S. Then, the plasma irradiator 90 irradiates plasma on the surface of the die D. Next, as shown in FIG. 14, the plasma irradiator 90 irradiates plasma on the surface of the substrate S. After that, the plasma irradiator 90 moves to the retracted position. In addition, even if the plasma irradiator 90 has gas supply holes 96 only on one side, that is, on the side facing the die D (upper side) or the side facing the substrate S (lower side), it is also possible. Moreover, the plasma irradiator 90 can be reversed or rotated to change the direction (irradiation direction) of the gas supply holes 96. Accordingly, as shown in FIGS. 13 and 14, it is possible to irradiate the die D and the substrate S with plasma by a single plasma irradiator in different timings. (Third Modification Example) The bonding process in the third modification example will be described with reference to FIGS. 15(a), 15(b), 16(a) and 16(b). FIG. 15(a) is a diagram showing the positions (initial position, pick-up position) of the respective elements when the first bonding head picks up a die from the intermediate stage. FIG. 15(b) is a diagram showing the positions (plasma irradiation positions) of the respective elements when the plasma irradiator irradiates plasma on the die and the substrate. FIG. 16(a) is a diagram showing the positions (bonding positions) of the respective elements when the first bonding head bonds the die to the substrate. FIG. 16(b) is a diagram showing the state in which the respective elements return to the initial positions. In the embodiment, an example in which the temporary crimping head 41a horizontally moves and lifts to pick up the die D, or places the die D on the substrate S has been described. However, it is not limited thereto. For example, even after the temporary crimping head 41a moves to the intermediate stage 31, only the lifting operation is performed, and it is also possible to move the wafer holding stage 12, the intermediate stage 31, the temporary crimping stage 46a and the plasma irradiator 90. As shown in FIG. 15(a), the wafer holding stage 12, the intermediate stage 31, the temporary bonding stage 46a, the first plasma irradiator 90a, and the second plasma irradiator 90b are also arranged along the Y1 - Y2 direction and can move along the Y1 - Y2 direction. After the temporary bonding head 41a picks up the chip D, as indicated by the arrow in FIG. 15(a), the wafer holding stage 12, the intermediate stage 31, the temporary bonding stage 46a, the first plasma irradiator 90a, and the second plasma irradiator 90b move in the Y2 direction. Moreover, at the position shown in FIG. 15(b), the wafer holding stage 12, the intermediate stage 31, the temporary bonding stage 46a, the first plasma irradiator 90a, and the second plasma irradiator 90b are arranged. In this state, the first plasma irradiator 90a and the second plasma irradiator 90b irradiate the chip D and the substrate S with plasma. After the plasma irradiation, the wafer holding stage 12, the intermediate stage 31, the temporary bonding stage 46a, and the first plasma irradiator 90a move in the Y2 direction. The second plasma irradiator 90b moves in the Y1 direction. Moreover, at the position shown in FIG. 16(a), the temporary bonding stage 46a, the first plasma irradiator 90a, and the second plasma irradiator 90b are arranged. In this state, the temporary bonding head 41a bonds the chip D to the substrate S. After the bonding, the wafer holding stage 12, the intermediate stage 31, the temporary bonding stage 46a, and the first plasma irradiator 90a move in the Y1 direction. Moreover, at the position shown in FIG. 16(b), the wafer holding stage 12, the intermediate stage 31, the temporary bonding stage 46a, the first plasma irradiator 90a, and the second plasma irradiator 90b are arranged. As described above, although the invention created by the inventor has been specifically described according to the embodiments and examples, the present invention is not limited to the above embodiments and modifications, and can of course be variously changed. In the embodiment, although the example of providing the formal bonding portion 40b in the bonding portion 40 has been described, the formal bonding portion 40b may be provided outside the flip chip bonder 1. In the embodiment, although the example of providing the reversing mechanism in the intermediate stage has been described, the reversing mechanism may be provided in the pickup head, and the chip may be picked up from the pickup flip head by the transfer head and placed on the intermediate stage. Furthermore, in the embodiment, although the example in which the intermediate stage portion and the bonding portion are each one has been described, they may be plural. Furthermore, in the embodiment, although the example in which the bonding head is one has been described, a plurality of bonding heads may be used. 1: Flip chip bonder (chip bonding device) 41a: Temporary bonding head (first bonding head) 46a: Temporary bonding stage (first bonding stage) 90: Plasma irradiator [Fig. 1] is a schematic top view showing a flip-chip bonder in an embodiment. [Fig. 2] is a schematic cross-sectional view of the main part of the wafer supply unit shown in Fig. 1. [Fig. 3] is a schematic front view of the periphery of the pickup unit in the flip-chip bonder shown in Fig. 1. [Fig. 4] is a schematic side view of the temporary crimping part of the bonding part in the flip-chip bonder shown in Fig. 1. [Fig. 5] is a schematic side view of the formal crimping part of the bonding part in the flip-chip bonder shown in Fig. 1. [Fig. 6] is a block diagram showing the schematic configuration of the control system of the flip-chip bonder of Fig. 1. [Fig. 7] is a flowchart showing the bonding method implemented by the flip-chip bonder shown in Fig. 1. [Fig. 8] is a diagram showing the configuration of the plasma irradiator shown in Fig. 1. [Fig. 9] is a diagram for explaining the plasma irradiation method in the first bonding part. [Fig. 10] is a diagram for explaining the plasma irradiation method in the first bonding part. [Fig. 11] is a diagram for explaining the plasma irradiation method in the first modification example. [Fig. 12] is a diagram for explaining the plasma irradiation method in the first modification example. [Fig. 13] is a diagram for explaining the plasma irradiation method in the second modification example. [Fig. 14] is a diagram for explaining the plasma irradiation method in the second modification example. [Fig. 15(a)] and [Fig. 15(b)] are diagrams for explaining the bonding process in the third modification example. [Fig. 16(a)] and [Fig. 16(b)] are diagrams for explaining the bonding process in the third modification example. 30: Intermediate platform part 31: Intermediate platform 34: Platform identification camera 40a: Temporary crimping part 41a: Temporary crimping head 42a: Chuck 44a: Substrate identification camera 46a: Temporary crimping platform 90: Plasma irradiator D: Chip S: Substrate

Claims

1. A die bonding apparatus comprising: a first bonding head for picking up a die; a first bonding platform for holding a substrate; and a plasma irradiator for irradiating plasma onto the surface of the die picked up by the first bonding head and the surface of the substrate held by the first bonding platform, wherein an insulating film and a metal electrode are disposed on the surface of the die, and an insulating film and a metal electrode are disposed on the surface of the substrate, wherein the insulating film of the die and the insulating film of the substrate are activated by irradiating the plasma.

2. The die bonding apparatus of claim 1, wherein the plasma irradiator has a gas supply port for ejecting plasma upwards and a gas supply port for ejecting plasma downwards.

3. The die bonding apparatus of claim 2, further comprising a control device configured to perform upward and downward plasma irradiation by the plasma irradiator in parallel.

4. The die bonding apparatus of claim 2, further comprising a control device configured to perform upward and downward plasma irradiation by the plasma irradiator at different times.

5. The die bonding apparatus of claim 1, wherein the plasma irradiator has a gas supply orifice for ejecting plasma in one direction, and further comprises a control device configured to irradiate plasma downward through the gas supply orifice after irradiating plasma upward through it.

6. The die bonding apparatus of claim 1, wherein the plasma irradiator has a first plasma irradiator and a second plasma irradiator, the first plasma irradiator having an upwardly ejecting plasma gas supply port, and the second plasma irradiator having a downwardly ejecting plasma gas supply port.

7. The die bonding apparatus of claim 6, wherein the apparatus includes a control device configured to perform upward irradiation of plasma by the first plasma irradiator and downward irradiation of plasma by the second plasma irradiator in parallel.

8. The die bonding apparatus of claim 6, further comprising a control device configured to perform upward plasma irradiation by the first plasma irradiator and downward plasma irradiation by the second plasma irradiator at different times.

9. The die bonding apparatus of claim 1, further comprising: a second bonding head for pressurizing a die placed on the substrate, and a second bonding platform having a heating device for heating the substrate on which the die is placed.

10. An installation method comprising: a process of picking up a workpiece; a process of holding a substrate; a process of irradiating the surface of the picked-up workpiece and the surface of the held substrate with plasma; a process of bonding the plasma-irradiated workpiece to the plasma-irradiated substrate; and a process of providing an insulating film and a metal electrode on the surface of the die and the insulating film and the metal electrode on the surface of the substrate, thereby activating the insulating film of the die and the insulating film of the substrate by irradiating the plasma.

11. A method for manufacturing a semiconductor device, comprising the mounting method as described in claim 10.

Citation Information

Patent Citations

  • Method for manufacturing semiconductor device

    TW201705321A

  • Die-to-wafer bonding utilizing micro-transfer printing

    TW202203406A

  • Dipping apparatus, die bonding apparatus, and manufacturing method for semiconductor device

    US20230090693A1