Multi-layer and multi-functional platform for semiconductor processing and method thereof

Abstract

This invention provides a multi-layered, multi-functional platform for semiconductor processing. The platform comprises a plurality of mechanical layers, including: a first layer, which is a processing head; a plurality of device layers, which are multi-directional moving fixtures; and a fourth layer containing an inspection head. The system provided by this invention is designed to work synergistically for precision semiconductor processing, real-time inspection, and alignment.

Description

Technical Field

[0001] Embodiments of the present invention generally relate to semiconductor processing platforms. More particularly, the present invention relates to a multi-layer platform that facilitates advanced processing and inspection of semiconductors. Prior Art

[0002] The subject matter discussed in this section should not be assumed to be prior art simply because it is mentioned in this section. Similarly, the issues mentioned in this section or related to the subject matter in this section should not be assumed to have been previously identified in the prior art. The subject matter in this section merely represents different approaches, some of which may also correspond to embodiments of the claimed technology.

[0003] As the semiconductor industry has grown and evolved, there has been an increasing emphasis on process efficiency, accuracy, and throughput. Traditional systems typically focus on performing a single task. Separate platforms are designated for handling, inspection, alignment, and other tasks. This approach results in a larger manufacturing cell footprint and increases the complexity of transferring wafers or die from one platform to another.

[0004] Incidentally, many of these traditional systems are static, offering limited movement or alignment capabilities. This static nature sometimes compromises efficiency, especially when processing wafers of varying sizes or when high-precision alignment is paramount. To address alignment challenges, external alignment mechanisms are often integrated. While these mechanisms do provide some degree of alignment, they are not always efficient, often increase processing time, and lack the ability to make real-time corrections.

[0005] A significant challenge with older systems is the separation of the inspection unit from the processing unit. While inspection is a critical stage for ensuring semiconductor quality, its separation from the processing unit means that any inconsistencies detected during inspection must be laboriously traced back to their respective processing stages. This not only makes the process lengthy but also prone to errors. These traditional methods raise several issues: Integration Challenges: The discrete nature of processing and inspection platforms creates significant obstacles to achieving seamless integration and synchronization. This separation often results in extended processing durations and the potential for mishandling during semiconductor transfer. Space inefficiency: Separate platforms for each function require substantial space, leading to higher infrastructure costs and reduced scalability opportunities. Precision considerations: The inherent static design of many platforms, combined with reliance on external alignment tools, introduces opportunities for misalignment, especially during high-volume operations. Such subtle misalignments can lead to significant quality challenges in the final semiconductor product. Operational delays: The need to manually transfer semiconductors between platforms, combined with manual intervention for alignment and inspection, contributes to operational delays that are of great concern to high-volume industries. Troubleshooting Complexity: Identifying defects during the inspection phase and subsequently tracing them back to the corrective phase or determining the root cause has always been complex. The lack of an immediate feedback loop often means that specific defects can remain undetected for long periods of time, causing considerable manufacturing frustration.

[0006] Therefore, there is an urgent need for evolved platforms that can blend multiple functions, ensure real-time alignment, and provide a streamlined path from processing to review. Summary of the Invention

[0007] According to one aspect of the present invention, a multi-layer, multifunctional platform for semiconductor processing is provided. The platform comprises, but is not limited to, a plurality of mechanical layers, including: a first layer comprising a processing head; a plurality of device layers comprising a multi-directional motion fixture; and a fourth layer comprising an inspection head. The mechanical layers are coaxially aligned, and hollow coaxial features spanning the device layers are configured to allow alignment of the mechanical layers through independent or synchronized movement. Furthermore, the inspection head is configured to provide real-time feedback to ensure the positional accuracy of the device and processing layers when they are working together.

[0008] According to a specific aspect of the present invention, the device layers include: a second layer, which is the upper clamping surface of the multi-directional movable fixture; and a third layer, which is the lower clamping surface of the multi-directional movable fixture.

[0009] According to an embodiment of the present invention, the platform further comprises individual compensation mechanisms for a plurality of device layers, allowing for individual parallelism adjustments to be made to the device layers.

[0010] According to an embodiment of the present invention, the compensation mechanism independently adopts and applies individual compensation values or modes to the device layer.

[0011] According to an embodiment of the present invention, the processing head includes one or more components selected from the group consisting of a laser head, a scanning lens, an objective lens, a mechanical pick-and-place working part, a needle, a sensor, a detector, and a camera.

[0012] According to an embodiment of the present invention, the inspection head includes a sensing system having a plurality of components selected from the group consisting of lighting, cameras, thermal sensors, and detectors.

[0013] According to an embodiment of the present invention, the hollow coaxial feature enables real-time alignment and feedback of positional accuracy during processing, thereby eliminating offset between the viewing axis and the processing axis.

[0014] According to another aspect of the present invention, a semiconductor processing method using a multi-layer platform is provided. The method includes the steps of: clamping one or more target materials on a plurality of device layers; coaxially aligning a plurality of mechanical layers of the platform; and using hollow coaxial features spanning the device layers to facilitate alignment of the mechanical layers through independent or synchronized movement.

[0015] According to an embodiment of the present invention, the method further comprises the following steps: using a processing head to process the target material; and using an inspection head to inspect the processed material.

[0016] According to an embodiment of the present invention, the method further comprises the steps of adjusting the parallelism of a plurality of device layers based on individual compensation mechanisms; and applying distinct compensation values or patterns to each device layer for optimal process alignment.

[0017] According to an embodiment of the present invention, the steps of using hollow coaxial features include: facilitating real-time alignment during processing; and obtaining real-time feedback of positional accuracy, thereby mitigating offsets between the viewing axis and the processing axis. Simple diagram description

[0018] In order to understand in detail the manner in which the above-described features of the present invention may be more fully described, the invention briefly summarized above may be described in greater detail by reference to specific embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings illustrate only typical embodiments of the invention and are not to be considered limiting of its scope, as the invention may admit to other equally effective embodiments. These and other features, benefits, and advantages of the present invention will become apparent with reference to the following text and drawings, wherein like reference numerals throughout the views designate similar structures, wherein:

[0019] [FIG. 1] An exemplary multi-layer multi-functional platform for semiconductor processing according to an embodiment of the present invention is shown.

[0020] FIG. 2 illustrates the configuration of multiple device layers of a multi-directional movable fixture according to an embodiment of the present invention.

[0021] [ FIG. 3 ] Represents the coaxial hollow structure of the device layers according to an embodiment of the present invention.

[0022] [Figure 4] Demonstrates placement of treatment material between the second and third layers according to an embodiment of the present invention.

[0023] FIG. 5 illustrates an architecture having a first layer and a fourth layer of a plurality of device layers according to an embodiment of the present invention.

[0024] FIG6 illustrates an embodiment of the present invention in which the second layer is misaligned in the Y-axis direction.

[0025] FIG. 7 illustrates a case where the first and fourth layers are not aligned in the Y-axis direction according to an embodiment of the present invention.

[0026] [Figure 8] Demonstration of possible movement of the second and third layers along the X, Y, and Z axes according to an embodiment of the present invention.

[0027] [Figure 9] Demonstrates the 360 degree movement possible for the second and third layers according to an embodiment of the present invention.

[0028] [FIG. 10] Demonstration of real-time alignment and inspection during material processing according to an embodiment of the present invention.

[0029] [FIG. 11] A flow chart illustrating process steps of a method for real-time alignment and inspection during material processing according to an embodiment of the present invention. Implementation Method

[0030] Although the present invention is described herein using specific aspects and exemplary drawings for illustrative purposes, those skilled in the art will recognize that the invention is not limited to the specific aspects of the drawings, and that the drawings are not intended to represent the various components to scale. Furthermore, certain components that may form part of the present invention may not be shown in a particular figure for ease of illustration, and such omission in no way limits the specific aspects listed. It should be understood that the drawings and detailed description thereof are not intended to limit the invention to the particular form disclosed; rather, the invention is intended to cover all modifications, equivalents, and alternatives falling within the scope of the invention as defined by the appended claims. As used throughout this specification, the word "may" is used in a permissive sense (meaning having the potential to), rather than a mandatory sense (meaning must). Furthermore, the indefinite article (a or an) means "at least one," and "plurality" means "one or more," unless otherwise specified. Furthermore, the terms and expressions used herein are for descriptive purposes only and should not be construed as limiting in scope. Language such as "including," "comprising," "having," "containing," or "involving," and variations thereof, is intended to be comprehensive and inclusive of the subject matter listed thereafter, equivalents, and additional subject matter not recited, and is not intended to exclude other additives, components, integers, or steps. Similarly, the word "comprising" is considered synonymous with "including" or "containing" for purposes of applicable law. Any discussion of documents, acts, materials, devices, articles, and the like is included in the specification solely to provide context for the invention. It is not suggested or represented that any or all of these matters form part of the prior art basis or are common general knowledge in the field relevant to the present invention.

[0031] In this disclosure, whenever a composition, element, or group of elements is preceded by the transition word "comprising," it is to be understood that we also contemplate the same composition, element, or group of elements being preceded by the transition words "consisting of," "consisting," "selected from the group consisting of," "including," or "is," and vice versa.

[0032] The present invention is described below with reference to various embodiments in the accompanying drawings, where reference numerals used in the accompanying drawings correspond to similar elements throughout the specification. However, the invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the scope of the invention to those skilled in the art. In the following detailed description, values and ranges are provided for various aspects of the described embodiments. These values and ranges are to be considered examples only and are not intended to limit the scope of the claims. Incidentally, various materials are identified as suitable for various aspects of the embodiments. These materials are to be considered examples and are not intended to limit the scope of the invention.

[0033] The present invention will now be described in detail with the help of the accompanying drawings.

[0034] This invention provides a groundbreaking platform for semiconductor processing, addressing prevalent challenges in the field. Its unique multi-layer design, combined with features such as a coaxial hollow structure and multi-directional movement, positions it as an advanced solution for semiconductor manufacturers who prioritize precision, flexibility, and efficiency.

[0035] FIG1 illustrates a multi-layer multi-function platform (100) for semiconductor processing. According to an embodiment of the present invention, the multi-layer multi-function platform (100) includes a plurality of mechanical layers designed to work in synergy to facilitate precision semiconductor processing, real-time inspection, and alignment. The mechanical layers include: a first layer, which is a processing head (110); a plurality of device layers, which are multi-directional movable fixtures (106); and a fourth layer, which includes an inspection head (112).

[0036] The first layer consists of a processing head (110) that houses various components required for basic material processing. Components may include, but are not limited to, laser heads, scanning lenses, objective lenses, mechanical pick-and-place workpieces, needles, sensors, detectors, and cameras. The first layer is the instrument that performs the actual processing tasks on the semiconductor material. Furthermore, multiple device layers are configured as multi-directional movable fixtures (106) and are constructed so that each device layer can perform its function independently. The device layer firmly holds and positions the semiconductor material for processing and is designed to move in multiple directions to allow precise alignment and positioning of the material. Furthermore, the fourth layer contains an inspection head (112) that includes a sensing mechanism and is equipped with multiple components such as lighting, cameras, thermal sensors, and detectors. The fourth layer is designed to provide real-time inspection and feedback on the positional accuracy of the device layer relative to the processing head to ensure precise processing and alignment. The mechanical layer is coaxially aligned, and hollow coaxial features across the device layer are constructed to allow alignment of the mechanical layer by independent or synchronous movement.

[0037] FIG2 illustrates the configuration of multiple device layers of a multi-directional movable fixture. The multi-layer multifunctional platform (100) incorporates a pair of specialized layers known as device layers, designed to hold and precisely position semiconductor materials for processing. The device layers primarily comprise a second and a third layer. The second layer is shown as the upper clamping surface (102) of the multi-directional movable fixture (106). On the other hand, the third layer is shown as the lower clamping surface (104) of the multi-directional movable fixture (106). These layers act as stable holding surfaces for semiconductor materials, ensuring they remain in precise positions during processing. The operational interaction between these two device layers is fundamental to accurate processing of semiconductor materials. They move synchronously or independently along multiple axes, allowing for precise alignment and positioning of materials. Their movement allows for a range of motion, including along the X, Y, and Z axes and potentially 360 degrees, ensuring that materials are precisely positioned for processing. The clamping surfaces are made of, but not limited to, ceramics, metals, or electrostatic materials, and are equipped with suction or vacuum mechanisms to securely hold the processed materials.

[0038] FIG3 illustrates a coaxial hollow structure in a multi-layer multifunctional platform (100) for semiconductor processing. The key role played by this structure is to facilitate real-time alignment and inspection during the processing stage. Coaxial alignment of the multi-layer platform is important for ensuring the precise positioning and parallelism required for accurate semiconductor processing. In addition to facilitating alignment, the coaxial hollow structure also provides real-time feedback on the position accuracy of the device layer relative to the processing head (110) and the inspection head (112). Real-time feedback ensures that any misalignment is immediately detected and corrected, thereby improving the precision of semiconductor processing. Conventional designs often have an offset between the inspection axis and the processing axis, which can introduce systematic errors. However, the coaxial hollow structure of the present invention eliminates this offset, ensuring that the inspection and processing of semiconductor materials occur along the same axis. By allowing real-time alignment and feedback, the coaxial hollow structure significantly improves the precision and efficiency of the semiconductor processing platform (100).

[0039] FIG4 illustrates a process material (108) securely positioned and placed between the second and third layers of the platform (100). These layers represent the upper clamping surface (102) and the lower clamping surface (104) of the multi-directional movable clamp (106). The process material may be securely clamped to the upper and lower clamping surfaces by a continuous and constant suction or vacuum pressure applied by a suction or vacuum mechanism.

[0040] FIG5 illustrates the configuration and interaction of a first layer of a processing head (110) and a fourth layer including an inspection head (112), with a plurality of device layers appearing above.

[0041] Figures 6 and 7 illustrate various scenarios of misalignment of various layers of the platform (100) from a predefined working parallelism or coplanarity, which may occur during semiconductor processing. In Figure 6, the scenario shown is that one end of the second layer representing the upper clamping surface (102) experiences a displacement in the Z-axis direction, which disrupts the predefined working parallelism or coplanarity of the platform. Similarly, such a misalignment condition may also be caused by the third layer and disrupt the predefined working parallelism or coplanarity of the platform on the third layer. Figure 7 illustrates a situation where both the first layer of the processing head (110) and the fourth layer containing the inspection head (112) are misaligned in the Z-axis direction. Misalignment of a multi-layer multi-functional platform for semiconductor processing may be caused by manufacturing tolerances, wear and tear, vibration and shock, improper installation or assembly, external forces, load changes, control system errors, calibration errors, etc.

[0042] Figures 8-9 illustrate all possible movements and adjustments of the second and third layers of a multi-layer multi-function platform (100) for semiconductor processing. These figures illustrate the range of motion that the second and third layers can take along the X, Y, and Z axes or rotate or move in a 360-degree manner. These multi-directional movements are controlled by individual compensation mechanisms (702) coupled to each layer to achieve precise alignment and positioning of semiconductor materials. Movement along these axes is facilitated by a multi-directional motion fixture (106) that allows accurate alignment with the processing head (110) and the inspection head (112). These figures demonstrate the flexibility and precision control provided by the platform in manipulating device layers to meet processing requirements.

[0043] Furthermore, the individual compensation mechanisms allow for individual parallelism adjustments to be made to the device layers by independently determining and applying individual compensation values or patterns to the device layers, thereby ensuring the precise alignment and parallelism essential for high-precision semiconductor processing.

[0044] FIG10 illustrates real-time alignment and inspection during material processing in a multi-layer multi-function platform (100). An inspection head (112) scrutinizes the alignment of the layers to detect any misalignment that could potentially hinder the accuracy of semiconductor processing. During inspection, the inspection head identifies the offset from the desired position of each misaligned layer. This offset, as detected by the inspection head, forms the basis for a subsequent realignment process. To correct errors in a predefined working parallelism or coplanarity, individual compensation mechanisms are activated to shift and move the displaced layers to their correct positions to achieve the predefined working parallelism or coplanarity. This realignment is important to ensure that each layer is accurately positioned for precise and efficient processing.

[0045] Furthermore, individual compensation mechanisms within semiconductor processing platforms are designed to maintain and adjust the parallelism of processing materials and various mechanical mechanisms. At its core, the mechanism utilizes piezoelectric cylinders, strategically chosen due to the unique property of these materials, which change shape under voltage. These cylinders are integrally embedded within the platform's device layers and ideally positioned to implement the adjustments necessary to maintain parallelism. Functionally, the mechanism operates through a series of carefully orchestrated steps. Initially, it involves acquiring data about the parallelism between the processing materials from real-time feedback. This data highlights deviations from the desired parallelism. Once acquired, this data is analyzed, perhaps by a computing unit within the platform, to determine the specific adjustments required. Following this analysis, the piezoelectric cylinders are activated. Applying a voltage causes these cylinders to expand or contract, thereby adjusting their length in a controlled manner. This expansion or contraction acts as an adjustment for the tilt or height of the device layers, effectively correcting any misalignment and ensuring that the layers remain parallel to one another. The mechanism's ability to make these adjustments in real time is a crucial feature for high-precision semiconductor processing tasks, where even minor deviations can significantly impact results. Additionally, the mechanism may be designed with a feedback loop that continuously monitors the adjusted data to ensure that the desired parallelism is consistently maintained.

[0046] FIG11 illustrates a semiconductor processing method (1200) using a multi-layer platform. The method includes the following steps:

[0047] Initially, one or more target materials (108) are securely clamped to a plurality of device layers in a platform at step 1202. The clamping mechanism ensures that the materials are held securely in place, avoiding any unwanted movement that could interfere with the accuracy of subsequent processing and inspection tasks.

[0048] After clamping, an alignment process is performed in step 1204 to ensure coaxial alignment of the multiple mechanical layers within the platform. This alignment ensures that the processing and inspection heads are correctly positioned relative to the device layers and target material. Coaxial alignment helps maintain the correct positional relationship between the layers, which is critical for accurate processing tasks.

[0049] At step 1206, if any parallelism errors are identified in any layer, the parallelism of the plurality of device layers (114) is adjusted based on a separate compensation mechanism. This mechanism allows for fine adjustment of the alignment of the device layers and the processing head to ensure they are coplanar and correctly positioned for any further processing tasks.

[0050] In step 1208, distinct compensation values or patterns are applied to each device layer to optimize process alignment. This step ensures that each layer is perfectly aligned and ready for any subsequent processing tasks. By applying distinct compensation values, the platform is fine-tuned to ensure the highest degree of precision and accuracy in the semiconductor processing workflow.

[0051] At step 1210, once the layers have been properly aligned, the processing phase begins. A processing head (110) is employed to perform the necessary processing tasks on the target material. The types of processing may include, but are not limited to, laser processing, etching, and deposition, depending on the specific requirements of the semiconductor process.

[0052] At step 1212, during processing, the inspection head (112) simultaneously inspects the processed material to ensure that the processing tasks have been performed accurately and to confirm the quality and integrity of the processed material. Any inconsistencies or misalignments identified during the inspection may be corrected in subsequent steps. If additional adjustments are required during the process, steps 1204, 1206, and 1208 may be repeated until the process is complete.

[0053] The present invention as claimed and described in the embodiments provides several clearly distinguished advantages: Improved Precision: The platform's design features coaxial alignment and individual compensation mechanisms, significantly improving semiconductor processing precision. Providing real-time alignment and feedback further enhances the accuracy of processing and inspection tasks. Real-time Inspection and Alignment: The hollow coaxial feature enables real-time alignment and inspection, a previously challenging feature to achieve. This real-time capability ensures any misalignment is immediately detected and corrected, thereby reducing the possibility of processing errors. Increased Efficiency: By allowing real-time adjustment and inspection, the platform minimizes the time traditionally required to stop and adjust alignment issues. This results in increased efficiency and throughput in semiconductor manufacturing processes. Independent Layer Tuning: The ability to independently adjust the parallelism of device layers enables more precise control of the processing environment. This feature is important for processing semiconductor materials that may have different processing requirements. Optimized Process Alignment: The platform allows for the application of distinct compensation values or patterns to each device layer, ensuring optimized process alignment. This feature is helpful in meeting the ultra-precision requirements of semiconductor processing. Improved coplanarity: Individual compensation mechanisms enable better coplanarity of device layers, overcoming the limitations imposed by traditional hardware in achieving micron-level precision. Reduced Systematic Errors: By eliminating the offset between the inspection and processing axes, the platform significantly reduces systematic errors, thereby improving the overall reliability and accuracy of semiconductor processing. Modular and Scalable Design: The platform is designed to be integrated into key features of semiconductor processing equipment or used independently as a test platform. This modular and scalable design makes it a flexible solution for diverse process evaluation and semiconductor manufacturing needs.

[0054] Those skilled in the art will appreciate from the description and accompanying drawings that these embodiments are susceptible to various modifications. The principles underlying the various embodiments described herein may be applied to other embodiments. Therefore, the description is not intended to be limited to the embodiments shown and the accompanying drawings, but rather to provide the widest scope of novel and advanced inventive features disclosed or suggested herein consistent with the principles. Accordingly, the present invention contemplates all other such alternatives, modifications, and variations that fall within the scope of the present invention and the appended claims.

[0055] 100: Multi-layer multifunctional platform 102: First device layer 104: Second device layer 106:Multi-directional fixture 108: Processing Materials 110: Processing header 112: Inspection Head 1200: Demonstration method 1202: Steps 1204: Steps 1206: Steps 1208: Steps 1210: Steps

Claims

1. A multilayer multifunctional platform for semiconductor processing, comprising: a plurality of mechanical layers, including: The first layer is the processing head; the multiple device layers are multi-directional moving fixtures; And the fourth layer, which contains the inspection head; The mechanical layers are coaxially aligned, and the hollow coaxial features spanning the device layers facilitate the alignment of the parallelism or coplanarity of the mechanical layers by means of independent or synchronous movement; the inspection head is configured to provide real-time feedback to ensure the positional accuracy of the device layers and processing layers when they are working together.

2. The platform as claimed in claim 1, wherein the device layers include a second layer, which is the upper clamping surface of the multi-directional moving fixture; and a third layer, which is the lower clamping surface of the multi-directional moving fixture.

3. The platform, as requested in item 1 or 2, further includes an individual compensation mechanism for the plurality of device layers, allowing individual parallelism adjustments to such device layers.

4. The platform as requested in item 3, wherein the compensation mechanism independently adopts and applies individual compensation values ​​or modes to such device layers.

5. The platform of claim 1, wherein the processing head comprises one or more components selected from the group consisting of a laser head, a scanning lens, an objective lens, a mechanical pickup / placement component, a needle, a sensor, a detector, and a camera.

6. The platform of claim 1, wherein the inspection head includes a sensing system having multiple components selected from a group consisting of lighting, a camera, a thermal sensor, and a detector.

7. The platform of claim 1, wherein the hollow coaxial feature is capable of instantaneous alignment and feedback of positional accuracy during processing, thereby eliminating offset between the inspection head and the processing head.

8. A semiconductor processing method using a multilayer multifunctional platform as claimed in any one of claims 1 to 7, the method comprising: clamping one or more target materials on the plurality of device layers; coaxially aligning the plurality of mechanical layers of the platform; and using hollow coaxial features across the device layers to align the mechanical layers by independent or synchronous movement.

9. The method of claim 8 further includes: using the processing header to process the subject material; and using the inspection header to inspect the processed subject material.

10. The method of claim 8 further includes: adjusting the parallelism of the plurality of device layers based on individual compensation mechanisms; and applying distinct compensation values ​​or patterns to each device layer for optimal processing alignment.

11. The method of claim 8, wherein the step of using the hollow coaxial feature spanning the device layers to align the mechanical layers by independent or synchronous movement includes: It facilitates real-time alignment during processing; And to obtain real-time feedback on positional accuracy, thereby mitigating the offset between the inspection head and the processing head.

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