Semiconductor device

Abstract

A semiconductor device includes a substrate, an outer detection line, and an inner detection line. The substrate has a peripheral side surface. The outer detection line is disposed on the substrate and adjacent to the peripheral side surface. The inner detection line is disposed on the substrate, adjacent to the peripheral side surface, and isolated from the outer detection line. The outer detection line is closer to the peripheral side surface than the inner detection line.

Description

Technical Field

[0001] The present invention relates to an apparatus, and more particularly, to a semiconductor apparatus. Prior Technology

[0002] Traditional semiconductor devices may develop cracks due to factors such as temperature and external forces. If these cracks continue to propagate, they will damage at least one component of the semiconductor device (conductive traces, vias, circuits, active wafers, passive components, layer structures, molding compounds, etc.). Therefore, detecting cracks in semiconductor devices has become an important task for the industry. Summary of the Invention

[0003] In one embodiment of the present invention, a semiconductor device is provided. The semiconductor device includes a substrate, an outer detection line, and an inner detection line. The substrate has a peripheral side surface. The outer detection line is disposed on the substrate and adjacent to the peripheral side surface. The inner detection line is disposed on the substrate, adjacent to the peripheral side surface, and isolated from the outer detection line. The outer detection line is closer to the peripheral side surface than the inner detection line.

[0004] The numerous objects, features, and advantages of the present invention will become readily apparent upon reading the following detailed description of embodiments of the invention. However, the drawings used herein are for illustrative purposes only and should not be considered limiting. Simple Explanation of the Diagram

[0005] The above-described objects and advantages of the present invention will become more readily apparent to those generally skilled in the art upon review of the following detailed description and accompanying drawings, wherein: Figure 1A depicts a schematic top view of a semiconductor device according to an embodiment of the present invention; Figure 1B depicts a cross-sectional view of the semiconductor device 100 in Figure 1A along the direction 1B-1B'; Figure 1C depicts a cross-sectional view of the semiconductor device in Figure 1A along the direction 1C-1C'; Figure 2A depicts a schematic top view of a semiconductor device according to another embodiment of the present invention; Figure 2B depicts a cross-sectional view of the semiconductor device in Figure 2A along the direction 2B-2B'; Figure 2C depicts a cross-sectional view of the semiconductor device in Figure 2A along the direction 2C-2C'; Figure 3 depicts a schematic top view of a semiconductor device according to another embodiment of the present invention; Figure 4 depicts a schematic top view of a semiconductor device according to another embodiment of the present invention; and Figure 5 depicts a schematic top view of a semiconductor device according to another embodiment of the present invention. Implementation

[0006] Referring to Figures 1A and 1B, Figure 1A shows a top view schematic diagram of a semiconductor device 100 according to an embodiment of the present invention, Figure 1B shows a cross-sectional view of the semiconductor device 100 in Figure 1A along the 1B-1B' direction, and Figure 1C shows a cross-sectional view of the semiconductor device 100 in Figure 1A along the 1C-1C' direction. The semiconductor device 100 may be, for example, a semiconductor wafer, a semiconductor die, a semiconductor package, etc.

[0007] As shown in Figures 1A to 1C, the semiconductor device 100 includes a substrate 110, an external detection line 120, an internal detection line 130, a first pad 140A, a second pad 140B, a third pad 150A, a fourth pad 150B, a first external interconnect line 160A, a second external interconnect line 160B, a first internal interconnect line 170A, and a second internal interconnect line 170B. The substrate 110 has a peripheral side surface 110s. The external detection line 120 is disposed on the substrate 110 and adjacent to the peripheral side surface 110s. The internal detection line 130 is disposed on the substrate 110, adjacent to the peripheral side surface 110s, and isolated from the external detection line 120. The external detection line 120 is closer to the peripheral side surface 110s than the internal detection line 130. Therefore, if a crack (if any) occurs in the semiconductor device 100, it can be detected through the external detection line 120 and / or the internal detection line 130. Since the crack can be detected early, the user may / can address the crack problem as quickly as possible.

[0008] As shown in Figure 1A, the peripheral side 110s has four secondary peripheral sides, for example, a primary peripheral side 110s1, a secondary peripheral side 110s2, a tertiary peripheral side 110s3, and a fourth secondary peripheral side 110s4. The primary peripheral side 110s1, the secondary peripheral side 110s2, the tertiary peripheral side 110s3, and the fourth secondary peripheral side 110s4 define the entire outer boundary of the substrate 110 or the semiconductor device 100. The outer detection line 120 and the inner detection line 130 extend adjacent to the four secondary peripheral sides 110s1 to 110s4.

[0009] As shown in Figure 1A, the first pad 140A is disposed on and exposed from the substrate 110. The first external connection line 160A connects the first pad 140A to a first end 121 of the external detection line 120. The second pad 140B is disposed on and exposed from the substrate 110. The second external connection line 160B connects the second pad 140B to a second end 122 of the external detection line 120. The first external connection line 160A and / or the second external connection line 160B may include the same or similar features as the external detection line 120.

[0010] As shown in Figure 1A, the third pad 150A is disposed on and exposed from the substrate 110. The first internal connection line 170A connects the third pad 150A to a first end 131 of the internal detection line 130. The fourth pad 150B is disposed on and exposed from the substrate 110. The second internal connection line 170B connects the fourth pad 150B to a second end 132 of the internal detection line 130. The first internal connection line 170A and / or the second internal connection line 170B may include the same or similar features as the internal detection line 130.

[0011] A detector (not shown) may detect the first gasket 140A and the second gasket 140B. If a crack breaks the outer detection line 120, the detector and the outer detection line 120 cannot form a circuit loop, and therefore the crack may be detected by the detector. Similarly, the detector may detect the third gasket 150A and the fourth gasket 150B. If a crack breaks the inner detection line 130, the detector and the inner detection line 130 cannot form a circuit loop, and therefore the crack may be detected by the detector.

[0012] Furthermore, if a crack occurs in the semiconductor device 100, the crack may damage the outer detection line 120, causing it to break. This broken outer detection line 120 may be detected by a detector (not shown) when it probes the first pad 140A and the second pad 140B. Similarly, if a crack occurs in the semiconductor device 100, the crack may damage the inner detection line 130, causing it to break. This broken inner detection line 130 may be detected by a detector when it probes the third pad 150A and the fourth pad 150B.

[0013] As shown in Figure 1B, the substrate 110 includes a base 111 and a plurality of dielectric layers 112 disposed on the base 111 and stacked on top of each other. The base 111 is, for example, part of a silicon wafer. The external detection line 120 includes a plurality of external conductive traces 123 and a plurality of conductive vias 124. Each external conductive trace 123 is disposed on a corresponding dielectric layer 112, and one of the conductive vias 124 connects two adjacent external conductive traces 123.

[0014] As shown in Figure 1B, in one embodiment, the outer detection line 120 may extend in a wavy pattern. Furthermore, the outer detection line 120 may include at least one outer rising segment 120A' and at least one outer falling segment 120D, wherein adjacent outer rising segments 120A' and outer falling segments 120D are connected to each other. Each outer rising segment 120A' rises along a first extension path that is generally parallel to the peripheral side 110s (e.g., first peripheral side 110s1, second peripheral side 110s2, third peripheral side 110s3, and fourth peripheral side 110s4), and each outer falling segment 120D falls along the first extension path that is generally parallel to the peripheral side 110s.

[0015] As shown in Figure 1B, the two directly connected adjacent segments are the outer rising segment 120A' and the outer falling segment 120D. Furthermore, in the adjacent outer falling segment 120D and outer rising segment 120A', the outer falling segment 120D is connected to the outer rising segment 120A' at the bottom layer of the dielectric layer 112. In the adjacent outer rising segment 120A' and outer falling segment 120D', the outer rising segment 120A' is connected to the outer falling segment 120D' at the top layer of the dielectric layer 112.

[0016] As shown in Figure 1B, each outer rising segment 120A' may pass through all dielectric layers 112, and each outer falling segment 120D may pass through all dielectric layers 112. Therefore, any cracks occurring in the dielectric layers 112 may be detected.

[0017] As shown in Figure 1C, the inner detection line 130 includes a plurality of inner conductive tracks 133 and a plurality of conductive vias 134. Each inner conductive track 133 is disposed on the corresponding dielectric layer 112, and one of the conductive vias 134 connects two adjacent inner conductive tracks 133.

[0018] As shown in Figure 1C, in one embodiment, the inner detection line 130 may extend in a wavy pattern. Furthermore, the inner detection line 130 may include at least one inner rising segment 130A and at least one inner falling segment 130D, wherein adjacent inner rising segments 130A and outer inner falling segments 130D are connected to each other. Each inner rising segment 130A rises along a first extension path that is generally parallel to the peripheral side 110s, and each inner falling segment 130D falls along a first extension path that is also generally parallel to the peripheral side 110s.

[0019] As shown in Figure 1C, the two directly connected adjacent segments are the inner rising segment 130A and the inner falling segment 130D. Furthermore, in the adjacent inner falling segment 130D' and inner rising segment 130A, the inner falling segment 130D' is connected to the inner rising segment 130A at the top layer of the dielectric layer 112. In the adjacent inner rising segment 130A' and inner falling segment 130D', the inner rising segment 130A' is connected to the inner falling segment 130D' at the bottom layer of the dielectric layer 112.

[0020] As shown in Figure 1C, each inner rising segment 130A may pass through all dielectric layers 112, and each inner falling segment 130D may pass through all dielectric layers 112. Therefore, any cracks occurring in dielectric layers 112 may be detected.

[0021] As shown in Figures 1B and 1C, the rising segment of the outer detection line corresponds to the falling segment of the inner detection line. Furthermore, in the same region from reference line L1 to reference line L2, the outer rising segment 120A' corresponds to the inner falling segment 130D', and the outer falling segment 120D' corresponds to the inner rising segment 130A'. Therefore, although the lower dielectric layer 112 (or "blank area BA") in Figure 1B lacks a segment of the outer detection line 120, the inner falling segment 130D and the inner rising segment 130A in Figure 1C may fill the blank area BA, since they correspond to the blank area BA in Figure 1B.

[0022] In another embodiment, the rising segment of the outer detection line 120 may correspond to the rising segment of the inner detection line 130. In other embodiments, the rising segment of the outer detection line 120 may correspond to a portion of the rising segment and a portion of the falling segment of the inner detection line 130.

[0023] Referring to Figures 2A to 2C, Figure 2A shows a top view schematic diagram of a semiconductor device 200 according to another embodiment of the present invention, Figure 2B shows a cross-sectional view of the semiconductor device 200 in Figure 2A along direction 2B-2B', and Figure 2C shows a cross-sectional view of the semiconductor device 200 in Figure 2A along direction 2C-2C'.

[0024] As shown in Figures 2A to 2C, the semiconductor device 200 includes a substrate 110, an external detection line 220, an internal detection line 230, a first pad 140A, a second pad 140B, a third pad 150A, a fourth pad 150B, a first external connection line 160A, a second external connection line 160B, a first internal connection line 170A, and a second internal connection line 170B.

[0025] As shown in Figures 2B and 2C, the outer detection line 220 is disposed on the substrate 110 and adjacent to the peripheral side surface 110s. The inner detection line 230 is disposed on the substrate 110, adjacent to the peripheral side surface 110s, and isolated from the outer detection line 220. The outer detection line 220 is closer to the peripheral side surface 110s than the inner detection line 230. Therefore, if a crack (if any) occurs in the semiconductor device 200, it can be detected by the outer detection line 220 and / or the inner detection line 230.

[0026] As shown in Figure 2A, a first pad 140A is disposed on and exposed from the substrate 110. A first external connection line 160A connects the first pad 140A to the first end 221 of the external detection line 220. A second pad 140B is disposed on and exposed from the substrate 110. A second external connection line 160B connects the second pad 140B to the second end 222 of the external detection line 220. The first external connection line 160A and / or the second external connection line 160B may contain the same or similar features as the external detection line 220.

[0027] As shown in Figure 2A, a third pad 150A is disposed on and exposed from the substrate 110. A first internal connection line 170A connects the third pad 150A to the first end 231 of the internal detection line 230. A fourth pad 150B is disposed on and exposed from the substrate 110. A second internal connection line 170B connects the fourth pad 150B to the second end 232 of the internal detection line 230. The first internal connection line 170A and / or the second internal connection line 170B may contain the same or similar features as the internal detection line 230.

[0028] A detector (not shown) may detect the first gasket 140A and the second gasket 140B. If the crack breaks the outer detection line 220, the detector and the outer detection line 220 cannot form a circuit loop, and therefore the crack may be detected by the detector. Similarly, the detector may detect the third gasket 150A and the fourth gasket 150B. If the crack breaks the inner detection line 230, the detector and the inner detection line 230 cannot form a circuit loop, and therefore the crack may be detected by the detector.

[0029] Furthermore, if a crack occurs in the semiconductor device 200, the crack may damage the outer detection line 220, causing it to break. The broken outer detection line 220 may be detected by a detector (not shown) when it probes the first pad 140A and the second pad 140B. Similarly, if a crack occurs in the semiconductor device 200, the crack may damage the inner detection line 230, causing it to break. The broken inner detection line 230 may be detected by a detector when it probes the third pad 150A and the fourth pad 150B.

[0030] As shown in Figure 2B, the substrate 110 includes a base 111 and a plurality of dielectric layers (112' and 112") disposed on the base 111 and stacked on top of each other.

[0031] Semiconductor device 200 includes the same or similar features as semiconductor device 100, at least one difference being that the outer detection line 220 and / or the inner detection line 230 do not pass through all dielectric layers. Furthermore, the outer detection line 220 and the inner detection line 230 pass through all dielectric layers together. For example, the outer detection line 220 may pass through the upper dielectric layer 112', while the inner detection line 230 may pass through the lower dielectric layer 112'.

[0032] As shown in Figure 2B, in one embodiment, the outer detection line 220 may extend in a wavy manner. Furthermore, the outer detection line 220 may include at least one outer rising segment 220A and at least one outer falling segment 220D, wherein adjacent outer rising segments 220A and outer falling segments 220D are connected to each other. Each outer rising segment 220A' rises approximately parallel to the peripheral side 110s along the first extension path, and each outer falling segment 220D falls approximately parallel to the peripheral side 110s along the first extension path.

[0033] As shown in Figure 2B, the two directly connected adjacent segments are the outer rising segment 220A and the outer falling segment 220D. Furthermore, in the adjacent outer rising segment 220A and outer falling segment 220D', the outer rising segment 220A and outer falling segment 220D' are connected at the top layer of the upper dielectric layer 112'. In the adjacent outer falling segment 220D' and outer rising segment 220A', the outer falling segment 220D' and outer rising segment 220A' are connected at the bottom layer of the upper dielectric layer 112'.

[0034] As shown in Figure 2C, in one embodiment, the inner detection line 230 may extend in a wavy manner. Furthermore, the inner detection line 230 may include at least one inner rising segment 230A and at least one inner falling segment 230D, wherein adjacent inner rising segments 230A and inner falling segments 230D are connected to each other. Each inner rising segment 230A rises approximately parallel to the peripheral side 110s along the first extension path, and each inner falling segment 230D falls approximately parallel to the peripheral side 110s along the first extension path.

[0035] As shown in Figure 2C, the two directly connected adjacent segments are the inner rising segment 230A and the inner falling segment 230D. Furthermore, in the adjacent inner rising segment 230A and inner falling segment 230D', the inner rising segment 230A is connected to the inner falling segment 230D' at the top of the lower dielectric layer 112". In the adjacent inner falling segment 230D' and inner rising segment 230A', the inner falling segment 230D' and inner rising segment 230A' are connected at the bottom of the lower dielectric layer 112".

[0036] As shown in Figures 2B and 2C, the rising segment of the outer detection line corresponds to the rising segment of the inner detection line. Furthermore, in the same region from reference line L1 to reference line L2, the outer falling segment 220D' corresponds to the inner falling segment 230D', and the outer rising segment 220A' corresponds to the inner rising segment 230A'. In another embodiment, in the same region from reference line L1 to reference line L2, the outer falling segment 220D' corresponds to the inner rising segment 230A', and the outer rising segment 220A' corresponds to the inner falling segment 230D'.

[0037] Referring to Figure 3, which shows a top view schematic diagram of a semiconductor device 300 according to another embodiment of the present invention, the semiconductor device 300 includes a substrate 110, a first detection group DS31, a second detection group DS32, a first pad 140A, a second pad 140B, a third pad 150A, and a fourth pad 150B. Each of the first detection group DS31 and the second detection group DS32 includes an outer detection line 320 and an inner detection line 330. The outer detection line 320 may include features identical or similar to those of outer detection line 120 or outer detection line 220. The inner detection line 330 may include features identical or similar to those of outer detection line 130 or outer detection line 230.

[0038] As shown in Figure 3, the first detection group DS31 includes an outer detection line 320, an inner detection line 330, a first inner connecting line 370A, a second inner connecting line 370B, a first inner-outer connecting line 335A, and a second inner-outer connecting line 335B. The inner detection line 330 includes a first inner detection line 330A and a second inner detection line 330B. The first inner connecting line 370A connects the first gasket 140A to the first end 331 of the first inner detection line 330A. The second inner connecting line 370B connects the second gasket 140B to the second end 332 of the second inner detection line 330B. The first inner-outer connecting line 335A connects the outer detection line 320 to the first inner detection line 330A of the inner detection line 330. The second internal / external connection line 335B connects the external detection line 320 and the second internal detection line 330B of the internal detection line 330.

[0039] In this embodiment, the first inner connection line 370A, the second inner connection line 370B, and / or the second inner and outer connection line 335B may include the same or similar features as the inner detection line 130 or the inner detection line 230. The first inner and outer connection line 335A may include the same or similar features as the detection line (outer detection line or inner detection line).

[0040] As shown in Figure 3, in the first detection group DS31, the outer detection line 320 extends adjacent to the first peripheral side 110s1, the second peripheral side 110s2, and the fourth peripheral side 110s4; the first inner detection line 330A extends adjacent to the first peripheral side 110s1 and the second peripheral side 110s2; and the second inner detection line 330B extends adjacent to the first peripheral side 110s1 and the fourth peripheral side 110s4. In the first detection group DS31, the outer detection line 320, the first inner detection line 330A, and the second inner detection line 330B may extend along a first extension path approximately parallel to the first peripheral side 110s1, the second peripheral side 110s2, and the fourth peripheral side 110s4. In the first detection group DS31, the first inner and outer connecting line 335A may extend along a second extension path approximately perpendicular to the second peripheral side 110s2, while the second inner and outer connecting line 335B may extend along a fourth extension path approximately perpendicular to the fourth peripheral side 110s4.

[0041] As shown in Figure 3, the second detection group DS32 includes an outer detection line 320, an inner detection line 330, a first inner connecting line 370A, a second inner connecting line 370B, a first inner-outer connecting line 335A, and a second inner-outer connecting line 335B. The inner detection line 330 includes a first inner detection line 330A and a second inner detection line 330B. The first inner connecting line 370A connects the third gasket 150A to the first end 331 of the first inner detection line 330A. The second inner connecting line 370B connects the fourth gasket 150B to the second end 332 of the second inner detection line 330B. The first inner-outer connecting line 335A connects the outer detection line 320 to the first inner detection line 330A of the inner detection line 330. The second inner-outer connecting line 335B connects the outer detection line 320 to the second inner detection line 330B of the inner detection line 330.

[0042] As shown in Figure 3, in the second detection group DS32, the outer detection line 320 extends adjacent to the second peripheral side 110s2, the third peripheral side 110s3, and the fourth peripheral side 110s4; the first inner detection line 330A extends adjacent to the second peripheral side 110s2 and the third peripheral side 110s3; and the second inner detection line 330B extends adjacent to the third peripheral side 110s3 and the fourth peripheral side 110s4. In the second detection group DS32, the outer detection line 320, the first inner detection line 330A, and the second inner detection line 330B may extend to the second peripheral side 110s2, the third peripheral side 110s3, and the fourth peripheral side 110s4. In the second detection group DS32, the first inner and outer connecting line 335A may extend along the second extension path approximately perpendicular to the second peripheral side 110s2, while the second inner and outer connecting line 335B may extend along the fourth extension path approximately perpendicular to the fourth peripheral side 110s4.

[0043] A detector (not shown) may detect the first gasket 140A and the second gasket 140B. If the crack breaks the outer detection line 320 and / or the inner detection line 330 in the first detection group DS31, the detector and the first detection group DS31 cannot form a circuit loop, and therefore the detector may detect the crack. Similarly, the detector may detect the third gasket 150A and the fourth gasket 150B. If the crack breaks the inner detection line 330 and / or the inner detection line 330 in the second detection group DS32, the detector and the second detection group DS32 cannot form a circuit loop, and therefore the detector may detect the crack.

[0044] Referring to Figure 4, which shows a top view schematic diagram of a semiconductor device 400 according to another embodiment of the present invention, the semiconductor device 400 includes a substrate 110, a first detection group DS41, a second detection group DS42, a third detection group DS43, a fourth detection group DS44, and a switch 490. Each of the first detection group DS41, the second detection group DS42, the third detection group DS43, and the fourth detection group DS44 includes an outer detection line 420 and an inner detection line 430. The outer detection line 420 may include features identical or similar to those of the outer detection line 120 or the outer detection line 220. The inner detection line 430 may include features identical or similar to those of the outer detection line 130 or the outer detection line 230.

[0045] In this embodiment, at least one first detection group DS41, a second detection group DS42, a third detection group DS43, a fourth detection group DS44, and a switch 490 may be formed within (or completely embedded in) the substrate 110, for example, the substrate base 111 (not shown) and / or the dielectric layer 112 (not shown). In other words, at least one first detection group DS41, a second detection group DS42, a third detection group DS43, a fourth detection group DS44, and a switch 490 are not exposed outside the semiconductor device 100.

[0046] As shown in Figure 4, the first detection group DS41 includes an outer detection line 420, an inner detection line 430, a first outer connecting line 460A, a first inner connecting line 470A, and a first inner-outer connecting line 435A. The first outer connecting line 460A connects the switch 490 to the first end 421 of the outer detection line 420. The first inner connecting line 470A connects the switching unit 491 of the switch 490 to the second end 431 of the inner detection line 430. The first inner-outer connecting line 435A connects the outer detection line 420 and the inner detection line 430.

[0047] As shown in Figure 4, in the first detection group DS41, the outer detection line 420 extends adjacent to the first peripheral side 110s1 and the second peripheral side 110s2, and the inner detection line 430 extends adjacent to the first peripheral side 110s1 and the second peripheral side 110s2. In the first detection group DS41, the outer detection line 420 and the inner detection line 430 may extend along a first extension path, generally parallel to the first peripheral side 110s1 and the second peripheral side 110s2. In the first detection group DS41, the first inner and outer connecting line 435A may extend along a second extension path, generally perpendicular to the second peripheral side 110s2.

[0048] As shown in Figure 4, the second detection group DS42 includes an outer detection line 420, an inner detection line 430, a first outer connecting line 460A, a first inner connecting line 470A, and a first inner-outer connecting line 435A. The first outer connecting line 460A connects the switch 490 to the first end 421 of the outer detection line 420. The first inner connecting line 470A connects the switching unit 492 of the switch 490 to the second end 431 of the inner detection line 430. The first inner-outer connecting line 435A connects the outer detection line 420 and the inner detection line 430.

[0049] As shown in Figure 4, in the second detection group DS42, the outer detection line 420 is adjacent to the second peripheral side 110s2 and the third peripheral side 110s3, and the inner detection line 430 is adjacent to the second peripheral side 110s2 and the third peripheral side 110s3. In the second detection group DS42, the outer detection line 420 and the inner detection line 430 may extend along a first extension path, approximately parallel to the second peripheral side 110s2 and the third peripheral side 110s3. In the second detection group DS42, the first inner and outer connecting line 435A may extend along a second extension path, approximately perpendicular to the second peripheral side 110s2.

[0050] As shown in Figure 4, the third detection group DS43 includes an outer detection line 420, an inner detection line 430, a first outer connecting line 460A, a first inner connecting line 470A, and a first inner-outer connecting line 435A. The first outer connecting line 460A connects the switch 490 to the first end 421 of the outer detection line 420. The first inner connecting line 470A connects the switching unit 493 of the switch 490 to the second end 431 of the inner detection line 430. The first inner-outer connecting line 435A connects the outer detection line 420 and the inner detection line 430.

[0051] As shown in Figure 4, in the third detection group DS43, the outer detection line 420 is adjacent to the third peripheral side 110s3 and the fourth peripheral side 110s4, and the inner detection line 430 is adjacent to the third peripheral side 110s3 and the fourth peripheral side 110s4. In the third detection group DS43, the outer detection line 420 and the inner detection line 430 may extend along a first extension path, approximately parallel to the third peripheral side 110s3 and the fourth peripheral side 110s4. In the third detection group DS43, the first inner and outer connecting line 435A may extend along a third extension path, approximately perpendicular to the third peripheral side 110s3.

[0052] As shown in Figure 4, the fourth detection group DS44 includes an outer detection line 420, an inner detection line 430, a first outer connecting line 460A, a first inner connecting line 470A, and a first inner-outer connecting line 435A. The first outer connecting line 460A connects the switch 490 to the first end 421 of the outer detection line 420. The first inner connecting line 470A connects the switching unit 494 of the switch 490 to the second end 431 of the inner detection line 430. The first inner-outer connecting line 435A connects the outer detection line 420 and the inner detection line 430.

[0053] As shown in Figure 4, in the fourth detection group DS44, the outer detection line 420 is adjacent to the first peripheral side 110s1 and the fourth peripheral side 110s4, and the inner detection line 430 is adjacent to the first peripheral side 110s1 and the fourth peripheral side 110s4. In the fourth detection group DS44, the outer detection line 420 and the inner detection line 430 may extend along a first extension path, approximately parallel to the first peripheral side 110s1 and the fourth peripheral side 110s4. In the fourth detection group DS44, the first inner and outer connecting line 435A may extend along a fourth extension path, approximately perpendicular to the fourth peripheral side 110s4.

[0054] Switch 490 may be disposed on or on substrate 110. In some embodiments, switch 490 may be part of a circuit board (not shown), such as a printed circuit board or the like. The circuit board is electrically connected to semiconductor device 400. Switch 490 may control one of switching units 491, 492, 493, and 494 to open to detect whether a corresponding detection line is broken.

[0055] Referring to Figure 5, which shows a top view schematic diagram of a semiconductor device 500 according to another embodiment of the present invention, the semiconductor device 500 includes a substrate 110, external detection lines 520, a first detection group DS51, a second detection group DS52, a third detection group DS53, a fourth detection group DS54, and a switch 590. Each of the first detection group DS51, the second detection group DS52, the third detection group DS53, and the fourth detection group DS54 includes an internal detection line 530. The internal detection line 530 may include the same or similar features as the external detection line 130 or the external detection line 230.

[0056] As shown in Figure 5, the outer detection line 520 is adjacent to the first peripheral side 110s1, the second peripheral side 110s2, the third peripheral side 110s3, and the fourth peripheral side 110s4. The outer detection line 520 may extend along a first extension path generally parallel to the first peripheral side 110s1, the second peripheral side 110s2, the third peripheral side 110s3, and the fourth peripheral side 110s4.

[0057] In this embodiment, at least one first detection group DS51, a second detection group DS52, a third detection group DS53, a fourth detection group DS54, and a switch 590 may be formed within (or fully embedded in) the substrate 110, such as the substrate 111 (not shown) and / or the dielectric layer 112 (not shown) of the substrate 110. In other words, at least one first detection group DS51, a second detection group DS52, a third detection group DS53, a fourth detection group DS54, and a switch 590 are not exposed from the semiconductor device 500.

[0058] As shown in Figure 5, the first detection group DS51 includes an inner detection line 530, a first inner connection line 570A, and a second inner connection line 570B. The first inner connection line 570A connects the switch 590 to a first end 531 of the inner detection line 530. The second inner connection line 570B connects the switching unit 591 of the switch 590 to a second end 532 of the inner detection line 530.

[0059] In this embodiment, the first inner connection line 570A and / or the second inner connection line 570B may include the same or similar features as the inner detection line 130 or the inner detection line 230.

[0060] As shown in Figure 5, in the first detection group DS51, the inner detection line 530 is adjacent to the first peripheral side 110s1 and the second peripheral side 110s2. In the first detection group DS51, the inner detection line 530 may extend along a first extension path approximately parallel to the first peripheral side 110s1 and the second peripheral side 110s2.

[0061] As shown in Figure 5, the second detection group DS52 includes an inner detection line 530, a first inner connection line 570A, and a second inner connection line 570B. The first inner connection line 570A connects the switch 590 to a first end 531 of the inner detection line 530. The second inner connection line 570B connects the switching unit 592 of the switch 590 to a second end 532 of the inner detection line 530.

[0062] As shown in Figure 5, in the second detection group DS52, the inner detection line 530 is adjacent to the second peripheral side 110s2 and the third peripheral side 110s3. In the second detection group DS52, the inner detection line 530 may extend along a first extension path approximately parallel to the second peripheral side 110s2 and the third peripheral side 110s3.

[0063] As shown in Figure 5, the third detection group DS53 includes an inner detection line 530, a first inner connection line 570A, and a second inner connection line 570B. The first inner connection line 570A connects the switch 590 to a first terminal 531 of the inner detection line 530. The second inner connection line 570B connects the switching unit 593 of the switch 590 to a second terminal 532 of the inner detection line 530.

[0064] As shown in Figure 5, in the third detection group DS53, the inner detection line 530 is adjacent to the third peripheral side 110s3 and the fourth peripheral side 110s4. In the third detection group DS53, the inner detection line 530 may extend along a first extension path approximately parallel to the third peripheral side 110s3 and the fourth peripheral side 110s4.

[0065] As shown in Figure 5, the fourth detection group DS54 includes an inner detection line 530, a first inner connection line 570A, and a second inner connection line 570B. The first inner connection line 570A connects the switch 590 to a first end 531 of the inner detection line 530. The second inner connection line 570B connects the switching unit 594 of the switch 590 to a second end 532 of the inner detection line 530.

[0066] As shown in Figure 5, in the fourth detection group DS54, the inner detection line 530 is adjacent to the first peripheral side 110s1 and the fourth peripheral side 110s4. In the fourth detection group DS54, the inner detection line 530 may extend along a first extension path approximately parallel to the first peripheral side 110s1 and the fourth peripheral side 110s4.

[0067] In some embodiments as shown in Figure 5, the semiconductor device 500 may additionally include a fifth detection group DS55, which includes an external detection line 520, a first external connection line 560A, and a second external connection line 560B. The first external connection line 560A connects the switch 590 to a first terminal 521 of the external detection line 520. The second external connection line 560B connects the switching unit 595 of the switch 590 to a second terminal 522 of the external detection line 520.

[0068] Switch 590 may control one of the switching units 591, 592, 593, 594 and 595 to open in order to detect whether the corresponding detection line is broken.

[0069] While the invention has been described with respect to what is now considered the most practical and preferred embodiment, it should be understood that the invention is not necessarily limited to the disclosed embodiments. Rather, the invention is intended to cover various modifications and similar arrangements that are contained within the spirit and scope of the appended claims and should be given the broadest interpretation to cover all such modifications and similar structures.

[0070] 100: Semiconductor devices 110:Substrate 110s: Surrounding side 110s1: First time on the perimeter side 110s2: Second peripheral side 110s3: Third peripheral side view 110s4: Fourth peripheral side view 111: Base 112: Dielectric layer 112': Dielectric layer 112”: Dielectric layer 120: External detection line 120A': Outer ascending segment 120D: Outer descending segment 120D': Outer descending segment 121: First End 122: Second End 123: External Conductive Trajectory 124: Conductive via 130: Internal Detection Line 130A: Inner Ascending Segment 130A': Inner Ascending Segment 130D': Inner descending segment 131: First End 132: Second End 133: Internal Conductive Trajectory 134: Conductive via 140A: First gasket 140B: Second gasket 150A: Third gasket 150B: Fourth gasket 160A: First external connection cable 160B: Second external connection cable 170A: First internal connection line 170B: Second internal connection cable 1B-1B': Direction 1C-1C': Direction 200: Semiconductor devices 220: External detection line 220A: Outer Ascending Section 220A': Outer ascending segment 220D: Outer descending segment 220D': Outer descending segment 221: First End 222: Second end 230: Internal Detection Line 230A: Inner Ascending Segment 230A': Inner Ascending Segment 230D: Inner descending segment 230D': Inner descending segment 231: First End 232: Second end 2B-2B': Direction 2C-2C': Direction 300: Semiconductor Devices 320: External detection line 330: Internal Detection Line 330A: First Internal Detection Line 330B: Second Internal Detection Line 331: First end 332: Second end 335A: First internal and external connection cable 335B: Second internal and external connection cable 370A: First internal connection line 370B: Second internal connection cable 400: Semiconductor Devices 420: External detection line 421: First end 430: Internal Detection Line 431: Second end 435A: First internal and external connection cable 460A: First external connection cable 470A: First internal connection line 490: Switch 491: Switching Unit 492: Switching Unit 493: Switching Unit 494: Switching Unit 500: Semiconductor Devices 520: External Detection Line 521: First end 522: Second end 530: Internal Detection Line 531: First end 532: Second end 560A: First external connection cable 560B: Second external connection cable 570A: First internal connection line 570B: Second internal connection cable 590: Switch 591: Switching Unit 592: Switching Unit 593: Switching Unit 594: Switching Unit 595: Switching Unit BA: Blank area DS31: First Detection Group DS32: Second Detection Group DS41: First Detection Group DS42: Second Detection Group DS43: Third Detection Group DS44: Fourth Detection Group DS51: First Detection Group DS52: Second Detection Group DS53: Third Detection Group DS54: Fourth Detection Group DS55: Fifth Detection Group L1: Reference Line L2: Reference Line X: Direction Y: direction Z: Direction

Claims

1. A semiconductor device, comprising: A substrate has a peripheral side surface; an external detection line is disposed on the substrate and adjacent to the peripheral side surface; An inner detection line is disposed on the substrate, adjacent to the peripheral side and isolated from the outer detection line; wherein the outer detection line is closer to the peripheral side than the inner detection line; wherein the outer detection line includes an outer rising segment and an outer falling segment connected to each other, the outer rising segment gradually rising in one direction until it connects to the outer falling segment, and the outer falling segment gradually falling from the outer rising segment in the same direction.

2. The semiconductor device as claimed in claim 1, wherein the external detection line extends substantially parallel to the peripheral side along a first extension path.

3. The semiconductor device as claimed in claim 1, further comprising: A first pad is disposed on and exposed from the substrate; A first external connection line connects the first pad to a first end of the external detection line; a second pad is disposed on and exposed from the substrate; and a second external connection line connects the second pad to a second end of the external detection line.

4. The semiconductor device of claim 3, wherein the peripheral side has a first peripheral side, a second peripheral side, a third peripheral side opposite to the first peripheral side, and a fourth peripheral side opposite to the second peripheral side; the first external connection line and the second external connection line extend along a second extension path substantially perpendicular to the second peripheral side.

5. The semiconductor device as claimed in claim 1, further comprising: A third pad is disposed on and exposed from the substrate; A first internal connection line connects the third pad to a first end of the internal detection line; a fourth pad is disposed on and exposed from the substrate; and a second internal connection line connects the fourth pad to a second end of the internal detection line.

6. The semiconductor device as claimed in claim 1, wherein the substrate comprises: A plurality of dielectric layers are stacked on top of each other; wherein, the external detection line includes a plurality of conductive traces and a plurality of conductive vias, each conductive trace is disposed on a corresponding dielectric layer, and one of the conductive vias connects two adjacent conductive traces.

7. The semiconductor device of claim 1, wherein the internal detection line includes an internal rising segment and an internal falling segment connected to the internal rising segment; wherein, The outer rising segment corresponds to the inner falling segment, and the outer falling segment corresponds to the inner rising segment.

8. The semiconductor device of claim 1, wherein the internal detection line includes an internal rising segment and an internal falling segment connected to the internal rising segment; wherein, The outer rising segment corresponds to the inner rising segment, and the outer falling segment corresponds to the inner falling segment.

9. The semiconductor device as claimed in claim 1, further comprising: A first detection group and a second detection group, wherein each first detection group and the second detection group includes the outer detection line and the inner detection line; wherein the peripheral side has a first peripheral side, a second peripheral side, a third peripheral side opposite to the first peripheral side and a fourth peripheral side opposite to the second peripheral side; the first detection group extends adjacent to the first peripheral side, the second peripheral side and the fourth peripheral side, and the second detection group extends adjacent to the second peripheral side, the third peripheral side and the fourth peripheral side.

10. The semiconductor device of claim 9, wherein each of the first detection group and the second detection group comprises: The outer detection line; the inner detection line includes a first inner detection line and a second inner detection line; A first internal connection line is connected to a first end of a first internal detection line and the internal detection line; a second internal connection line is connected to a second end of a second internal detection line and the internal detection line; a first internal-external connection line connects the external detection line with the first internal detection line and the internal detection line; and a second internal-external connection line connects the external detection line with the second internal detection line and the internal detection line.

11. The semiconductor device as claimed in claim 1, further comprising: A first detection group, a second detection group, a third detection group, and a fourth detection group, wherein each of the first, second, third, and fourth detection groups includes the outer detection line and the inner detection line; wherein the peripheral side has a first peripheral side, a second peripheral side, a third peripheral side opposite to the first peripheral side, and a fourth peripheral side opposite to the second peripheral side; the first detection group extends adjacent to the first and second peripheral sides, the second detection group extends adjacent to the second and third peripheral sides, the third detection group extends adjacent to the third and fourth peripheral sides, and the fourth detection group extends adjacent to the fourth peripheral side and the first peripheral side.

12. The semiconductor device as claimed in claim 11, further comprising: A switch is mounted on the substrate and electrically connected to the first detection group, the second detection group, the third detection group, and the fourth detection group.

13. The semiconductor device of claim 11, wherein the first detection group, the second detection group, the third detection group and the fourth detection group are completely embedded in the substrate.

14. The semiconductor device of claim 11, wherein each of the first detection group, the second detection group, the third detection group, and the fourth detection group comprises: External detection line; Internal testing lines; A first external connection line connects to the first end of an external detection line; The first internal connection line connects to the second end of the internal detection line; And a first internal and external connecting line connects the external detection line and the internal detection line.

15. The semiconductor device of claim 12, wherein each of the first detection group, the second detection group, the third detection group, and the fourth detection group comprises: External detection line; Internal testing lines; A first external connection line connects the switch to the first end of the external detection line; A first internal connection line connects the switch unit of the switch to the second end of the internal detection line; and a first internal and external connection line connects the external detection line to the internal detection line.

16. The semiconductor device as claimed in claim 1, further comprising: An external detection line; and a first detection group, a second detection group, a third detection group, and a fourth detection group, wherein each of the first, second, third, and fourth detection groups includes an internal detection line; wherein a first peripheral side, a second peripheral side, and a third peripheral side are opposite to the first peripheral side, and a fourth peripheral side is opposite to the second peripheral side; the external detection line extends adjacent to the first, second, third, and fourth peripheral sides; the first detection group extends adjacent to the first and second peripheral sides, the second detection group extends adjacent to the second and third peripheral sides, the third detection group extends adjacent to the third and fourth peripheral sides, and the fourth detection group extends adjacent to the fourth peripheral side and the first peripheral side.

17. The semiconductor device as claimed in claim 16, further comprising: A switch is mounted on the substrate and electrically connected to the first detection group, the second detection group, the third detection group, and the fourth detection group.

18. The semiconductor device of claim 16, wherein the first detection group, the second detection group, the third detection group and the fourth detection group are completely embedded in the substrate.

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