Paired capacitor and manufacturing method thereof

Abstract

The present invention provides a capacitor structure comprising a substrate on which a left region, a middle region, and a right region are defined, wherein the middle region is located between the left region and the right region; a first capacitor structure comprising a first lower electrode pattern and a first upper electrode pattern, wherein the first lower electrode pattern and the first upper electrode pattern are located within different regions and in different layers in a vertical direction; and a second capacitor structure comprising a second lower electrode pattern and a second upper electrode pattern, wherein the second lower electrode pattern and the second upper electrode pattern are located within different regions and in different layers in the vertical direction.

Claims

1. A paired capacitor, comprising: a substrate defining a left region, a middle region, and a right region on the substrate, wherein the middle region is located between the left region and the right region; a first capacitor structure including a first lower electrode pattern and a first upper electrode pattern, wherein the first lower electrode pattern and the first upper electrode pattern are located within different regions and in different layers in a vertical direction; and a second capacitor structure including a second lower electrode pattern and a second upper electrode pattern, wherein the second lower electrode pattern and the second upper electrode pattern are located within different regions and in different layers in the vertical direction, further comprising a plurality of first contact plugs and a plurality of second contact plugs located in the middle region, the first contact plugs being electrically connected to the first lower electrode pattern and the first upper electrode pattern, and the second contact plugs being electrically connected to the second lower electrode pattern and the second upper electrode pattern.

2. The paired capacitor as described in claim 1, wherein the first lower electrode pattern is located in the left region, the first upper electrode pattern is located in the right region, the second lower electrode pattern is located in the right region, and the second upper electrode pattern is located in the left region.

3. The paired capacitor as described in claim 1, wherein the first lower electrode pattern, the first upper electrode pattern, the second lower electrode pattern, and the second upper electrode pattern each include a plurality of main axis electrodes and a plurality of branch electrodes, wherein the plurality of branch electrodes included in the first lower electrode pattern, the first upper electrode pattern, the second lower electrode pattern, and the second upper electrode pattern are all arranged in the same direction.

4. The paired capacitors as described in claim 1, wherein the first contact plugs and the second contact plugs are not located in the left region and the right region.

5. The paired capacitor as described in claim 1, wherein the plurality of first contact plugs are electrically connected to the spindle electrode of the first lower electrode pattern and the spindle electrode of the first upper electrode pattern, and the plurality of second contact plugs are electrically connected to the spindle electrode of the second lower electrode pattern and the spindle electrode of the second upper electrode pattern.

6. The paired capacitor as described in claim 1, wherein, from a top view, the first lower electrode pattern partially overlaps with the second upper electrode pattern, and the second lower electrode pattern partially overlaps with the first upper electrode pattern.

7. The paired capacitor as described in claim 1, wherein the first capacitor structure further includes a third electrode pattern located above the second upper electrode pattern.

8. The paired capacitor as claimed in claim 7, wherein along the vertical direction, the third layer electrode pattern, the second upper layer electrode pattern, and the first lower layer electrode pattern of the first capacitor structure partially overlap each other.

9. The paired capacitor as described in claim 7, further comprising a plurality of third contact plugs electrically connecting the third layer electrode pattern and the first upper layer electrode pattern of the first capacitor structure.

10. A method of manufacturing a pair of capacitors, comprising: providing a substrate, defining a left region, a middle region, and a right region on the substrate, wherein the middle region is located between the left region and the right region; forming a first capacitor structure including a first lower electrode pattern and a first upper electrode pattern, wherein the first lower electrode pattern and the first upper electrode pattern are located in different regions and in different layers in a vertical direction; and forming a second capacitor structure including a second lower electrode pattern and a second upper electrode pattern, wherein the second lower electrode pattern and the second upper electrode pattern are located in different regions and in different layers in a vertical direction, further comprising forming a plurality of first contact plugs and a plurality of second contact plugs located in the middle region, the first contact plugs being electrically connected to the first lower electrode pattern and the first upper electrode pattern, and the second contact plugs being electrically connected to the second lower electrode pattern and the second upper electrode pattern.

11. The method for manufacturing a paired capacitor as described in claim 10, wherein the first lower electrode pattern is located in the left region, the first upper electrode pattern is located in the right region, the second lower electrode pattern is located in the right region, and the second upper electrode pattern is located in the left region.

12. The method for manufacturing a paired capacitor as described in claim 10, wherein the first lower electrode pattern, the first upper electrode pattern, the second lower electrode pattern, and the second upper electrode pattern each include a plurality of main axis electrodes and a plurality of branch electrodes, wherein the plurality of branch electrodes included in the first lower electrode pattern, the first upper electrode pattern, the second lower electrode pattern, and the second upper electrode pattern are all arranged in the same direction.

13. The method of manufacturing a pair of capacitors as described in claim 10, wherein the first contact plugs and the second contact plugs are not located in the left region and the right region.

14. The method for manufacturing a paired capacitor as described in claim 10, wherein the plurality of first contact plugs are electrically connected to the spindle electrode of the first lower electrode pattern and the spindle electrode of the first upper electrode pattern, and the plurality of second contact plugs are electrically connected to the spindle electrode of the second lower electrode pattern and the spindle electrode of the second upper electrode pattern.

15. The method for manufacturing a pair of capacitors as described in claim 10, wherein, from a top view, the first lower electrode pattern partially overlaps with the second upper electrode pattern, and the second lower electrode pattern partially overlaps with the first upper electrode pattern.

16. The method for manufacturing a paired capacitor as described in claim 10, wherein the first capacitor structure further includes forming a third electrode pattern, the third electrode pattern being located above the second upper electrode pattern.

17. The method of manufacturing a paired capacitor as described in claim 16, wherein along the vertical direction, the third layer electrode pattern, the second upper layer electrode pattern, and the first lower layer electrode pattern of the first capacitor structure partially overlap each other.

18. The method for manufacturing a paired capacitor as described in claim 16, further comprising forming a plurality of third contact plugs, electrically connecting the third layer electrode pattern and the first upper layer electrode pattern of the first capacitor structure.

Images