Semiconductor device strucure with reduced keep-out-zone and methods of making the same

Abstract

The semiconductor device structure includes a first region containing a semiconductor device, a second region containing a substrate via, and a deep trench isolation structure located between the substrate via and the first region. The deep trench isolation may have a vertical depth of at least 3 μm, for example, between about 5 μm and about 10 μm, which may help protect the semiconductor device in the first region from stress caused by the substrate via. Therefore, the substrate via may not negatively affect the performance of nearby semiconductor devices, and the substrate via and semiconductor device may be located closer to each other (e.g., <3 μm), which may help maximize the number of devices on the structure and improve cost-effectiveness. In some embodiments, the ratio of the depth of the deep trench isolation structure to the distance between the substrate via and the nearest semiconductor device may be greater than 1.

Claims

1. A semiconductor device structure, comprising: The device area includes multiple semiconductor devices; And the substrate perforation area, including: substrate perforation extending through the substrate; And a deep trench isolation structure located within the substrate, wherein at least a portion of the deep trench isolation structure is located between the substrate via and the device region, and the ratio of the depth of the deep trench isolation structure to the minimum distance between the substrate via and the semiconductor device in the device region is greater than 1.

2. The semiconductor device structure as claimed in claim 1, wherein the ratio of the depth of the deep trench isolation structure to the minimum distance between the substrate via and the semiconductor device in the device region is ≥6.

3. The semiconductor device structure as claimed in claim 1, wherein the side of the deep trench isolation structure contacts the side of the substrate through-hole.

4. A semiconductor device structure, comprising: The substrate includes a semiconductor material layer forming a first surface of the substrate; Multiple semiconductor devices are located on and / or in a semiconductor material layer of the substrate in the first region; At least one deep trench isolation structure located in a second region, the at least one deep trench isolation structure comprising a dielectric material extending from the first surface of the substrate into the substrate to a depth greater than 3 µm; and a substrate perforation comprising a conductive material extending between the first surface of the substrate and a second surface of the substrate opposite to the first surface, wherein the substrate perforation is located in the second region, and at least a portion of the at least one deep trench isolation structure is located between the substrate perforation and the first region.

5. The semiconductor device structure of claim 4, wherein the at least one deep trench isolation structure extends from the first surface of the substrate into the substrate to a depth ≥5µm, and the minimum distance between the substrate via and the first region is ≤0.5µm.

6. The semiconductor device structure as described in claim 4, wherein: The first region includes a plurality of oxide-defined regions separated by a first isolation feature, and the semiconductor device includes a field-effect transistor formed in the oxide-defined regions; and the second region includes a plurality of purported oxide-defined regions separated by a second isolation feature including the at least one deep trench isolation structure.

7. The semiconductor device structure of claim 6, wherein the at least one deep trench isolation structure comprises a grid surrounding each of the proposed oxide definition regions, and the substrate vias are formed within the grid.

8. The semiconductor device structure of claim 6, wherein the semiconductor device includes a fin field-effect transistor, the proposed oxide-defined region includes a fin structure surrounded by a shallow trench isolation structure comprising a dielectric material, and the at least one deep trench isolation structure is continuous with the shallow trench isolation structure.

9. A method for manufacturing a semiconductor device structure, comprising: Multiple semiconductor devices are formed in the first region of the substrate; A deep trench isolation structure is formed in the second zone of the substrate; And forming a substrate perforation in the second region of the substrate, such that at least a portion of the deep trench isolation structure is located between the substrate perforation and the first region, and the ratio of the depth of the deep trench isolation structure to the minimum distance between the substrate perforation and the semiconductor device in the first region is greater than 1.

10. The method of claim 9, wherein forming a plurality of deep trench isolation structures in the second region, and wherein forming the substrate perforation comprises: An etching process is performed by masking to form a substrate perforation opening by removing a portion of the substrate and at least one of the deep trench isolation structures. And depositing conductive material within the substrate perforation opening to form the substrate perforation, wherein at least a portion of the remaining deep trench isolation structure in the deep trench isolation structure is located between the substrate perforation and the first region.

Images