Semiconductor device and method for fabricating the same

Abstract

This invention discloses a method for fabricating a semiconductor device, which mainly involves first providing a first interposer layer containing a plurality of first passive components, providing a second interposer layer containing a plurality of first active components, bonding the first interposer layer to the second interposer layer to form a first stacked structure, and then bonding a plurality of dies with different functions onto the second interposer layer. The dies and the second interposer layer contain a plurality of microbumps, the first interposer layer and the second interposer layer contain a plurality of hybrid bonds, and the first passive components include deep trench capacitors.

Claims

1. A method of fabricating a semiconductor device, characterized in that it comprises: providing a first interposer layer comprising a plurality of first passive elements, wherein the first passive elements comprise deep trench capacitors; providing a second interposer layer comprising a plurality of first active elements, wherein the first active elements comprise static random access memory, medium-voltage elements, high-voltage elements, pixel circuitry, low-voltage elements of low-voltage drive circuitry, and a graphics processor; and bonding the first interposer layer to the second interposer layer to form a first stacked structure.

2. The method as described in claim 1 further comprises bonding a plurality of grains with different functions onto the second interposer.

3. The method as described in claim 2 further includes forming a plurality of microbumps between the grains and the second interposer.

4. The method as described in claim 1 further includes forming a plurality of direct bond interconnects between the first interposer and the second interposer.

5. The method as described in claim 1, further comprising: providing a third interposer layer comprising a plurality of second active elements; providing a fourth interposer layer comprising a plurality of second passive elements; and bonding the third interposer layer to the fourth interposer layer to form a second stacked structure.

6. The method as described in claim 5 further comprises: providing a carrier substrate; forming a plurality of through-holes in the carrier substrate; bonding the first stacked structure and the second stacked structure to the carrier substrate; and forming a sealing layer surrounding the first stacked structure and the second stacked structure.

7. The method as described in claim 1, wherein the first interposer comprises a silicon wafer.

8. A semiconductor device, characterized in that it comprises: a first stacked structure, comprising: a first interposer layer comprising a plurality of passive elements, wherein the passive elements comprise deep trench capacitors; and a second interposer layer bonded to the first interposer layer, wherein the second interposer layer comprises a plurality of active elements, wherein the active elements comprise static random access memory, medium-voltage elements, high-voltage elements, pixel circuitry, low-voltage elements of low-voltage drive circuitry, and a graphics processor.

9. The semiconductor device as described in claim 8 further comprises a plurality of dies with different functions disposed on the second interposer.

10. The semiconductor device as described in claim 9 further comprises a plurality of microbumps disposed between the dies and the second interposer.

11. The semiconductor element as described in claim 8 further includes a plurality of direct-bonded interconnects disposed between the first interposer and the second interposer.

12. The semiconductor device as described in claim 8 further comprises: a second stacked structure comprising: a third interposer comprising a plurality of second active elements; a fourth interposer bonded to the third interposer, wherein the fourth interposer comprises a plurality of second passive elements; and a plurality of direct bond interconnects connecting the third interposer and the fourth interposer.

13. The semiconductor device as described in claim 12 further comprises: a carrier substrate; a plurality of through-holes disposed within the carrier substrate; the first stacked structure and the second stacked structure disposed on the carrier substrate; and a sealing layer surrounding the first stacked structure and the second stacked structure.

14. The semiconductor device as described in claim 8, wherein the first interposer comprises a silicon wafer.

15. The semiconductor device as described in claim 8, wherein the second interposer comprises a silicon wafer.

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