Semiconductor structure and manufacturing method thereof

Abstract

A method of manufacturing a semiconductor device includes: providing a light-emitting diode (LED) driver wafer; providing an LED wafer; and bonding the LED driver wafer and the LED wafer through hybrid bonding. The LED driver wafer includes: a transistor device; a first intermetallic dielectric layer covering the transistor device; and a first bonding pad in the first intermetallic dielectric layer. The LED wafer includes: an LED; a second intermetallic dielectric layer covering the LED; and a second bonding pad in the second intermetallic dielectric layer. The first bonding pad is bonded to a corresponding second bonding pad, and the first intermetallic dielectric layer is bonded to the second intermetallic dielectric layer.

Claims

1. A method for manufacturing a semiconductor device, comprising: providing a light-emitting diode driver wafer, comprising: a plurality of transistor devices; a first intermetallic dielectric layer covering the transistor devices; and a plurality of first bonding pads located in the first intermetallic dielectric layer; and providing a light-emitting diode wafer, comprising: a plurality of light-emitting diodes; A second intermetallic dielectric layer covering the light-emitting diodes; and a plurality of second bonding pads located in the second intermetallic dielectric layer, wherein each second bonding pad includes a dummy bonding pad that overlaps in a vertical direction with a doped region in a ground region of the light-emitting diode driver wafer, and the dummy bonding pad is not electrically connected to any conductive element in the light-emitting diode wafer; and the light-emitting diode driver wafer and the light-emitting diode wafer are bonded by a hybrid bonding method, wherein the first bonding pads are bonded to the corresponding second bonding pads, and the first intermetallic dielectric layer is bonded to the second intermetallic dielectric layer.

2. The method of claim 1, wherein the light-emitting diode wafer further comprises a protective layer located above the second intermetallic dielectric layer, wherein the protective layer comprises a nitride layer and an oxide layer.

3. The method of claim 1, wherein: the light-emitting diode wafer includes an input / output terminal, wherein the input / output terminal is electrically connected to one of the second bonding pads, and the one of the second bonding pads has a size larger than the other second bonding pads.

4. The method of claim 1, wherein: the light-emitting diode wafer includes an input / output terminal, wherein the input / output terminal is electrically connected to two of the second bonding pads, and the two of the second bonding pads have a size substantially the same as the other second bonding pads.

5. The method of claim 1, wherein the light-emitting diode wafer further comprises: a plurality of microlenses covering the light-emitting diodes; or a quantum dot layer covering the light-emitting diodes.

6. A semiconductor device comprising: a light-emitting diode driver wafer including: a plurality of transistor devices; a first intermetallic dielectric layer covering the transistor devices; and a plurality of first bonding pads located in the first intermetallic dielectric layer; and a light-emitting diode wafer including: a plurality of light-emitting diodes; A second intermetallic dielectric layer covers the light-emitting diodes; and a plurality of second bonding pads are located in the second intermetallic dielectric layer, wherein each second bonding pad includes a dummy bonding pad that overlaps in a vertical direction with a doped region in a ground region of the light-emitting diode driver wafer, and the dummy bonding pad is not electrically connected to any conductive element in the light-emitting diode wafer, and wherein the light-emitting diode wafer is bonded to the light-emitting diode driver wafer by a hybrid bonding method, wherein the first bonding pads are bonded to the corresponding second bonding pads, and the first intermetallic dielectric layer is bonded to the second intermetallic dielectric layer.

7. The semiconductor device of claim 6, wherein the light-emitting diode wafer further comprises a protective layer located above the second intermetallic dielectric layer, wherein the protective layer comprises a nitride layer and an oxide layer.

8. The semiconductor element of claim 6, wherein: the light-emitting diode wafer includes an input / output terminal, wherein the input / output terminal is electrically connected to one of the second bonding pads, and wherein the second bonding pad has a size larger than the other second bonding pads.

9. The semiconductor element of claim 6, wherein: the light-emitting diode wafer includes an input / output terminal, wherein the input / output terminal is electrically connected to two of the second bonding pads, and the two of the second bonding pads have a size substantially the same as the other second bonding pads.

10. The semiconductor device of claim 6, wherein the light-emitting diode wafer further comprises: a plurality of microlenses covering the light-emitting diodes; or a quantum dot layer covering the light-emitting diodes.

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