Light-emitting diode packages with real-time processing and related methods

Abstract

Light-emitting diode (LED) packages, and more specifically, real-time digital communication and related methods for LED packages, are disclosed. Discrete LED packages are configured for cascaded communication. Each LED package is individually capable of receiving communication from a data stream, controlling the operation of one or more LED chips, and performing real-time processing on at least one variable data value of the data stream. The LED package may include a real-time processor capable of processing data from a data value of the data stream and redirecting the processed or modified data back into the data stream in the same data value. LED packages that can be assembled together in an array are disclosed, wherein each LED package can individually process data and transmit the processed data to the next downstream LED package. Such real-time processing can be performed while also providing various bit delays within each LED package.

Description

[Technical Field]

[0001] This disclosure relates to light-emitting diode (LED) packaging, and more specifically to on-the-spot processing of LED packaging and related methods. [Previous Technology]

[0002] A light-emitting diode (LED) is a solid-state device that converts electrical energy into light, and generally comprises one or more active layers (or active regions) of semiconductor material disposed between relatively doped n-type and p-type layers. When a bias voltage is applied across the doped layers, holes and electrons are injected into the one or more active layers, where they recombine to produce, for example, the emission of visible light or ultraviolet light.

[0003] LEDs have been widely used in various lighting environments, for backlighting of liquid crystal display (LCD) systems (e.g., as an alternative to cold cathode fluorescent lamps) and for direct-view LED displays. Applications utilizing LED arrays include vehicle headlights, street lighting, luminaires, and various indoor, outdoor, and professional environments. Desired characteristics of LED devices include high luminous efficiency and long lifespan.

[0004] Large-size multi-color direct-view LED displays (including full-color LED video screens) typically comprise a number of individual LED panels, packages, and / or components that provide image resolution determined by the distance between adjacent pixels, or "pixel pitch." Direct-view LED displays typically include tri-color displays with arranged red, green, and blue (RGB) LEDs, and dual-color displays with arranged red and green (RG) LEDs. Other colors and combinations of colors may also be used. For many LED display systems, it is desirable to form an LED color group for each pixel, such as the three primary colors of red, green, and blue (RGB), defined at the vertices of a triangle (or polygon) on a chromaticity diagram. This polygon defines the so-called color gamut of the display device, the area of ​​which describes all possible colors that the display device can produce. The driver printed circuit board used to control the LED display is typically densely packed with electrical components, including capacitors, field-effect transistors (FETs), decoders, microcontrollers, and the like, for driving the pixels of the display. As pixel pitch continues to decrease for higher resolution displays, the density of these electrical components becomes higher to correspond to the increased number of pixels for a given panel area. This often increases the complexity and cost of LED panels used in display applications.

[0005] The technology continuously seeks to improve LED array devices with small pixel pitch, while overcoming the limitations associated with conventional devices and manufacturing methods. [Summary of the Invention]

[0006] This disclosure relates to light-emitting diode (LED) packages, and more specifically to real-time digital communication and related methods for LED packages. Discrete LED packages are configured for cascaded communication. Each LED package contains one or more LED chips, and each LED package is individually capable of receiving communication from a data stream, controlling the operation of the one or more LED chips, and performing real-time processing on at least one variable data value of the data stream. The LED package may include a real-time processor capable of processing data from a data value of the data stream and redirecting the processed or modified data back into the data stream in the same data value. LED packages that can be assembled together in an array are disclosed, wherein each LED package can individually process data and transmit the processed data to the next downstream LED package. Such real-time processing can be performed while also providing various bit delays within each LED package.

[0007] In one embodiment, a method of digital communication includes: transmitting digital communication from at least one light-emitting diode (LED) package to at least one other element, the digital communication including a bit mode containing at least one variable data value; and performing real-time processing on the at least one variable data value within the at least one LED package. In some embodiments, the at least one variable data value includes at least 2 bits to at most 64 bits. In some embodiments, the at least one variable data value is a data position value within a data stream, the data position value being a position of a data value within a data stream segment of the data stream, the data value being for the at least one LED package. In some embodiments: the at least one LED package is a first LED package of a plurality of LED packages serially connected to receive the digital communication from the data stream, the first LED package being configured to receive the digital communication before the other LED packages of the plurality of LED packages; the data value is positioned before a first data segment of a plurality of data segments of the data stream, each of the plurality of data segments being for a different LED package of the plurality of LED packages; and the data stream segments are configured in reverse order such that the first data segment for the first LED package is received after the other data segments of the plurality of data segments for the other LED packages have been received by the first LED package. In some embodiments, the at least one variable data value is a delay value relating to a delay time when the at least one LED package performs one or more events. In some embodiments: the at least one LED package is a first LED package of a plurality of LED packages connected in series to receive the digital communication; and the delay value is changed such that two or more other LED packages among the plurality of LED packages have an event synchronized with the one or more events of the first LED package. In some embodiments, the real-time processing includes at least one of addition, subtraction, multiplication, division, increment, or decrement of the received value of the at least one variable data value.

[0008] In another embodiment, a method for timing the operation of at least one light-emitting diode (LED) package configured for cascaded serial communication includes: receiving one or more synchronization values ​​in the at least one LED package; providing a delayed response to the one or more synchronization values; and operating the at least one LED package according to the delayed response. In some embodiments, the one or more synchronization values ​​are modified for use by subsequent LED packages through real-time processing within the at least one LED package. In some embodiments, the delayed response is synchronized with a delayed response of another LED package configured to receive the cascaded serial communication. In some embodiments, the start of the delayed response is controlled by an initial timing value of a counter, which is a result of a calculation, wherein a counter rate of the counter is at least partially synchronized with a data rate of the cascaded serial communication. In some embodiments, the one or more synchronization values ​​are part of a variable data value, and the calculation is processed real-time such that one or more values ​​of the variable data value are changed and transmitted in the same time slot as the variable data value. In some embodiments, the calculation is at least partially based on other values ​​or states stored within the at least one LED package. In some embodiments: the delayed response includes at least one event; the at least one event is controlled by at least one event value; the at least one event value is an event type; and the event type includes one or more of turning on, turning off, and setting to a preset value for one or more LED chips present within the at least one LED package. In some embodiments, the at least one event is a sequence of synchronized events, including a first event turning off all of the one or more LED chips for a specified amount of time, followed by a second event turning on all of the one or more LED chips to a desired brightness for a related data frame. In some embodiments, the sequence of synchronized events further includes a third event and a fourth event occurring between the first event and the second event, wherein the third event includes turning on the one or more LED chips, and the fourth event includes turning off the one or more LED chips.

[0009] In another embodiment, a method of digital communication includes: transmitting digital communication serially along a plurality of light-emitting diode (LED) packages, the digital communication including data values ​​defined by a controller outside the plurality of LED packages, the data values ​​being specific to the plurality of LED packages and corresponding to a variable length of a data block of the digital communication. In some embodiments, the data values ​​are transmitted to the plurality of LED packages as variable data values ​​of the digital communication, wherein the variable data values ​​are part of a bit pattern of the digital communication, the bit pattern further including at least a portion of a preamble for each data block, the preamble including at least one of the data values ​​initially defined by the controller, the data values ​​being continuously modified by each of the plurality of LED packages. In some embodiments, at least one of the data values ​​corresponds to a data position within a data block of variable length, the data position representing a plurality of data segments within the data block of variable length, and each data segment being for a different LED package among the plurality of LED packages. In some embodiments: a first LED package of the plurality of LED packages is configured to receive the digital communication before the other LED packages of the plurality of LED packages; and a last data segment of the plurality of data segments is for the first LED package, such that the plurality of data segments are configured in reverse order, and the last data segment is received by the first LED package only after other data segments of the plurality of data segments for the other LED packages have been received by the first LED package.

[0010] In another embodiment, an LED package includes: at least one LED chip; a means for receiving digital communication configured to receive a communication signal from another LED package; and a real-time processor configured to modify a variable data value of at least two consecutive bits of the communication signal received by the means for receiving digital communication. In some embodiments, the variable data value is transmitted to a counter to provide a delayed response, and wherein the delayed response is at least one of a data rate associated with the communication signal, an internal clock of the LED package, or an external clock. In some embodiments, the real-time processor is configured to process and modify the variable data value such that the delayed response is synchronized with other LED chips in other LED packages configured to receive the communication signal. The LED package may further include an event processor configured to initiate a series of responses as responses to the delayed response. In some embodiments, the real-time processor includes a data selector and a counter configured to associate a location of target data of interest within the communication signal, and the target data is selected for data input to control logic within the LED package.

[0011] In another configuration, any one or together of the aforementioned configurations, and / or the various individual configurations and features as described herein, may be combined to obtain additional advantages. Unless otherwise stated herein, any of the various configurations and elements disclosed herein may be combined with one or more other disclosed configurations and elements.

[0012] Those skilled in the art will recognize the scope of this disclosure and its additional features upon reading the following detailed description of the preferred embodiments in relation to the accompanying drawings.

Implementation Method

[0023] The embodiments described below represent the necessary information to enable those skilled in the art to implement the embodiments, and depict the best mode for implementing the embodiments. After reading the following description with reference to the accompanying drawings, those skilled in the art will understand the concepts of this disclosure and will recognize the applications of these concepts not specifically mentioned herein. It should be understood that these concepts and applications fall within the scope of this disclosure and the appended claims.

[0024] It will be understood that although the terms first, second, etc., may be used herein to describe various elements, these elements should not be limited to these terms. These terms are only used to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of this disclosure. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0025] It will be understood that when an element, such as a layer, region, or substrate, is referred to as being "on" or extending "above" another element, it may be directly on or extending directly onto the other element, or an intermediate element may also exist. Conversely, when an element is referred to as being directly "on" or extending directly onto another element, there is no intermediate element. Similarly, it will be understood that when an element, such as a layer, region, or substrate, is referred to as being "on" or extending "above" another element, it may be directly on or extending directly onto the other element, or an intermediate element may also exist. Conversely, when an element is referred to as being directly "on" or extending directly onto another element, there is no intermediate element. It will also be understood that when an element is referred to as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or an intermediate element may exist. Conversely, when one element is referred to as "directly connected" or "directly coupled" to another element, there is no intermediate element.

[0026] Relative terms such as "below," "above," "over," "below," "horizontal," or "vertical" may be used herein to describe the relationship of one element, layer, or region relative to another element, layer, or region as depicted in the figures. It will be understood that these terms, as well as those discussed above, are intended to cover different orientations of the device other than those depicted in the figures.

[0027] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limited to the content of this disclosure. As used herein, unless the context clearly indicates otherwise, the singular forms "a," "an," and "the" are intended to also include the plural forms. It will further be understood that the terms "comprising" and / or "including," when used herein to indicate the presence of the displayed features, integers, steps, operations, elements, and / or components, do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0028] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that the terms used herein should be interpreted as having a meaning consistent with that in the context of this specification and in the relevant art, and therefore will not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0029] The embodiments are described herein with reference to schematic illustrations of embodiments of the present disclosure. In this regard, the actual dimensions of the layers and elements may vary and are expected to differ from the shapes illustrated, for example, due to manufacturing techniques and / or limitations. For example, an area depicted or described as square or rectangular may have circular or curved features, and an area shown as a straight line may have some irregularity. Therefore, the areas depicted in the figures are schematic, and their shapes are not intended to depict the precise shape of an area of ​​a device, nor are they intended to limit the scope of the present disclosure. Furthermore, the size of structures or areas may be exaggerated relative to other structures or areas for illustrative purposes, and thus they are provided to depict the general structure of the subject matter, and may or may not be drawn to scale. Common elements between the figures may be shown herein using common element symbols and therefore may not be repeated hereafter.

[0030] This disclosure relates to light-emitting diode (LED) packages, and more specifically to real-time digital communication and related methods for LED packages. Discrete LED packages are configured for cascaded communication. Each LED package contains one or more LED chips, and each LED package is individually capable of receiving communication from a data stream, controlling the operation of the one or more LED chips, and performing real-time processing on at least one variable data value of the data stream. The LED package may include a real-time processor capable of processing data from a data value of the data stream and redirecting the processed or modified data back into the data stream in the same data value. LED packages that can be assembled together in an array are disclosed, wherein each LED package can individually process data and transmit the processed data to the next downstream LED package. Such real-time processing can be performed while also providing various bit delays within each LED package.

[0031] In cascaded digital communication, multiple electronic devices are configured as repeaters to continuously receive serial communications for operation. In the context of a fine-pitch video display, multiple LED packages are cascaded as LED pixels to receive cascaded communications. The incoming signal for each LED pixel is generated by, for example, a master controller or another element of the preceding LED pixel, and the bit stream of the incoming signal is derived from the clock domain of one or more preceding devices. Properly distributing the communication signals to thousands of LED pixels presents challenges. Small size is required for LED packages to form pixels in high-resolution video displays; however, these size limitations present further challenges.

[0032] There is a need for synchronized updates of all LED pixels in a video display. One example is that screen updates can be synchronized with video recording or photographic equipment to eliminate unwanted effects from uneven exposure of a display, such as when photographing. Another example is that 3D shutter glasses need to be synchronized with display frames aimed at the left and right eyes. Common 3D display methods typically include a so-called "blinding period" at the beginning and / or end of each video frame, during which all LED pixels of a screen are simultaneously turned off for a period of time, such as 2 milliseconds (ms). Some 3D display methods also require a brief flash during this blinding period. This flash during the blinding period serves as a signal to a device, such as 3D shutter glasses, for left-right frame differentiation. Other 3D display methods use other communication media, such as radio, between the controller and the head-mounted device, but still require synchronization between the pixels and the blinding when the shutter glasses switch from one side to the other. For the purposes of this discussion, synchronization means coordinating the actions of LED packages or LED pixels simultaneously or within 1 ms of each other. Synchronization can further include the coordinated action of individual LED pixels, such that individual LED pixels or groups of LED pixels respond to their individual data with varying delays. Beyond all LED pixels operating simultaneously in the same manner, the above statement encompasses many other possibilities. For example, instead of flashing the screen, the flash could be a vertical line on the screen that flashes rapidly from left to right, or any other timing pattern involving a sequence of actions.

[0033] As used herein, the terms “data stream” and “communication channel” may sometimes be used interchangeably. However, a “data stream” generally refers to a non-physical representation of data over time that flows through a set of at least one communication channel and internal wiring and storage registers within various elements, such as controllers and active electrical components. A data stream may also be referred to as digital communication between two elements, such as a controller element transmitting digital communication and a receiver element receiving said digital communication. A “communication channel” generally refers to a physical medium through which the data stream is transmitted. For example, a communication channel may include a wire with associated electrical components, an optical fiber, or even air, as in the case of radio, light, or sound waves. A given physical channel may also be divided in time or frequency to allow multiple “communication channels” to exist simultaneously within a medium, for example, by switching to a different frequency band. In some cases, a communication channel may embody a serial digital communication channel. Some configurations relate to binary communication channels, which are single-wire references to a common conductor, such as ground, and typically hold only one value at a time, either a high or low voltage (e.g., a bit "0" or "1"), and are controlled by the output register of the preceding device. Two-wire differential signaling methods are also conceivable, but the preferred embodiment shown here primarily refers to the single-wire method, as providing more lines would increase the complexity of fine-pitch displays.

[0034] In some embodiments, this disclosure relates to a light-emitting device comprising LEDs, LED packages, and associated LED displays, and more specifically to the active control of LEDs within an LED display. An LED display may comprise columns and rows of LEDs forming an array of LED pixels. A particular LED pixel may comprise a cluster of LED chips of the same or multiple colors, wherein an example LED pixel comprises a red LED chip, a green LED chip, and a blue LED chip. In some embodiments, an LED package comprises a plurality of LED chips forming at least one LED pixel, and a plurality of such LED packages may be configured to form an array of LED pixels for an LED display. Each LED package may include its own active electrical element configured to receive a control signal and actively maintain an operating state, such as brightness or grayscale, or a color selection signal for the LED chips of the LED device, while other LED devices are being addressed. In some embodiments, the active electrical element may include active circuitry comprising one or more of a driver device, a signal conditioning or conversion device, a memory device, a decoder device, an electrostatic discharge (ESD) protection device, a thermal management device, and a detection device. The active electrical element further includes circuitry to facilitate communication with multiple unrelated clock domains, including an original clock domain from a controller and a local clock domain derived within the active electrical element. In this regard, each LED pixel of an LED display may be configured for active matrix addressing operation utilizing mixed clock domain communication. The active electrical element may be configured to receive one or more of an analog control signal, an encoded analog control signal, a digital control signal, and an encoded digital control signal. In this configuration, an LED package string, each LED package having its own active electrical element, may be configured for serial communication, wherein each active electrical element receives data from a data stream and transmits data to the next active electrical element in the LED package string.

[0035] For active matrix addressing, each LED pixel is configured to actively maintain an operating state or control the drive state, such as brightness, grayscale, or color selection, while other LED pixels are being addressed. This allows each LED pixel to maintain or independently control its drive state, and provides improved viewing and / or image recording by reducing or eliminating the effects caused by the lower frequency pulse jumps of the aforementioned devices (e.g., lighting sources, other pulsed displays, or image capture devices). Thus, each LED pixel can be configured to maintain its individual operating state using a continuous drive signal including pulse width modulation (PWM), rather than by the conventional method of scanning time-division multiplexing signals between pixel groups, which typically results in low-frequency components being added to the drive signal associated with passive matrix addressing. In this regard, each LED pixel may include an active electrical chip or an active electrical element, which may include a memory device and the ability to change a drive state of the LED pixel according to a state stored in the memory of the active electrical element. In some embodiments, the continuous drive signal is a fixed analog drive current, and in other embodiments where the brightness level can be controlled by a pulsed method such as PWM, the continuous drive signal may refer to a PWM signal that is not interrupted by time-division multiplexing scans of other LED pixels within the array or a subarray. In some embodiments, the active electrical element may include active circuitry comprising a driver device, a signal conditioning or conversion device, a memory device, a decoder device, an ESD protection device, a thermal management device, a detection device, and a voltage and / or current sensing device, a command processing device, and one or more other circuits. In various embodiments, an active electrical element includes an integrated circuit chip, an application-specific integrated circuit (ASIC), a microcontroller, or a field-programmable gate array (FPGA). In some embodiments, active electrical elements may be configured to be programmable or reprogrammable after they are manufactured through various memory elements and logic incorporated within the active electrical element.

[0036] As used herein, the terms "active electrical chip," "active electrical element," or "active electrical component" encompass any chip or component capable of changing a driving state of an LED based on memory or other information that can be stored within a chip or component. As used herein, the terms "active LED pixel" and "intelligent LED pixel" may be used interchangeably and may refer to a device comprising one or more LED devices or chips forming a pixel, and an active electrical element or chip as described above. In some embodiments, each LED pixel may comprise a single LED package configured to comprise a plurality of LED chips and an active LED package comprising an active electrical element as described above. In this way, the number of individual electrical components required for the LED display can be reduced, for example, individual electrical components located on the back side of the LED panel of the LED display as previously described. Furthermore, the overall operating power required for the operation of the LED panel can be reduced.

[0037] As used herein, the term "instantaneous" in the context of instantaneous processing generally refers to processing within a time limit that allows uninterrupted processing of a data stream flowing through an LED package. For cascaded serial communication of LED packages, a data stream continuously flows through a set of serially connected LED packages. As used herein, instantaneous processing can be defined such that data in a given block or time slot of a data stream is processed by an LED package, and new data can be introduced into the same block by replacing or modifying the original data as the data stream flows through an LED package. Instantaneous processing within an LED package occurs within a given time limit by changing the same data value of the data stream, without interruption of the data stream. This instantaneous processing can be performed within a time limit, typically less than 10 microseconds (µs). This provides instantaneous processing within the same time limit as for unprocessed data flowing through the LED package. In some of the forms disclosed herein, the LED package can be configured to perform instant processing with some bit delay, such as a 2-bit delay or a 4-bit delay, wherein some data values ​​are processed within the same time delay as the unprocessed block flowing through the LED package.

[0038] Figure 1 is a block diagram 10 depicting a system-level control design for a lighting device utilizing cascaded communication for serially connected LED packages 12. The lighting device may embody an LED display, and each LED package 12 may form an LED pixel of the display. For this application, the terms LED package and LED pixel may be used interchangeably, although it is understood that an LED package may consist of several LED pixels formed together in a single component. An example LED string 14 configured for serial communication is indicated in Figure 1 by a dashed block. Although only the single LED string 14 is shown in detail, one or more other LED strings may also be coupled to a controller 16. As illustrated, the controller 16 is configured to control one or more LED strings 14. The controller 16 may include an integrated circuit, such as an ASIC, a microcontroller, a programmable control element, and one or more FPGAs. In some embodiments, the controller 16 may be referred to as a master controller for the LED string 14. In other embodiments, controller 16 may be a sub-controller, with another master controller (not shown) delegating a set of tasks to it because it relates to a larger system. A data signal output (DOUT) of controller 16 can be transmitted serially along the LED string 14, and a return data signal input (DIN) can be received back by controller 16. As described above, the signal contains a raw clock domain provided by controller 16 or another master controller. In FIG. 1, each LED package 12 or LED pixel is labeled, for example, "Px 1,1", where the first number represents a column and the second number represents a row. Each LED package 12 includes its own active electrical element 18, which is labeled and housed therein, such that each LED package 12 includes logic for responding to received data signals.

[0039] For the cascaded serial communication of the LED packages 12, an important feature is the inclusion of addressing data for a specific LED package 12, enabling a specific LED package 12 to know its position within the LED string 14, and synchronizing the LED output in a manner coordinated with other LED packages 12 of the display. A prior art for addressing data to a specific LED package 12 involves stripping a data set from each LED package 12 and retransmitting the remainder of the data along the LED string 14. However, this does not allow data to be transmitted back in the data stream. Another prior art for addressing data to a specific LED package 12 involves providing a command protocol in which an executed bit is marked by an LED package 12 to signal downstream LED packages 12 to ignore the corresponding data. As will be described in further detail below, the aforementioned important features are provided by this disclosure with improved efficiency while effectively synchronizing the output of the serially connected LED packages 12. Enhanced mutual communication is provided between the LED packages 12 configured as LED pixels, including communication for directing specific data and synchronization of position and delay factors in each LED pixel.

[0040] Figure 2 is a block diagram of an LED package 12 from Figure 1 according to the principles of this disclosure, having some details of the active electrical element 18. According to the embodiment disclosed herein, the active electrical element 18 may include multiple ports, represented by a power supply voltage (Vdd), ground (GND or Vss), and bidirectional communication ports or digital input / output ports (DIO1 and DIO2). By making the DIO1 and DIO2 ports bidirectional communication ports, the active electrical element 18 can advantageously detect an input signal from a communication channel and then designate one of the DIO1 and DIO2 ports as an input port, and the other as an output port. This provides flexibility in layouts for displays, where multiple LED packages 12 are connected together for cascaded communication. For example, multiple LED packages 12 can be configured in multiple columns, where, as illustrated in Figure 1, data is cascaded along each column from package to package and column to column in a meandering manner. In this configuration, the bidirectional communication ports allow the LED packages 12 to be mounted in the same orientation and to receive and transmit digital communications from left to right or from right to left, depending on the column position. In addition to the four ports Vdd, GND, DIO1, and DIO2 on the left side of the block diagram, the active electrical element 18 includes four ports on the right side, which are coupled to the LEDs 20-1 to 20-3 of the LED package 12. In this respect, the LEDs 20-1 to 20-3 are packaged together with the active electrical element 18 in the common LED package 12 to form another pixel of a larger display. As used herein, the LEDs 20-1 to 20-3 may also be referred to as LED chips.

[0041] Certain elements of the active electrical element 18 are described below; however, it is understood that the active electrical element 18 may include many other components, including memory elements, signal conditioning elements, thermal management, electrostatic discharge elements, clock elements, and oscillators and others. In FIG. 2, control logic 22 is configured to receive input data, execute commands according to a command protocol, provide control signals for the operation of the LEDs 20-1 to 20-3, include in the output data to report various voltage levels and / or temperature levels, and send the output data to the next adjacent LED package via the DIO1 and DIO2 ports. The control logic 22 may operate in the digital domain and may include input / output buffers electrically coupled to the DIO1 and DIO2 ports, specifying the input and output configuration for the bidirectional DIO1 and DIO2 ports.

[0042] In some embodiments, the active electrical element 18 may be configured to provide forward bias and reverse bias states to the LEDs 20-1 to 20-3. In this regard, the control logic 22 may include a reverse bias control output signal, which is configured using appropriate active elements to supply a near-Vdd or near-GND voltage level to the LEDs 20-1 to 20-3. Since the term "reverse bias" signifies that a high-level output on the control logic 22 generates a reverse bias state, the output signal may simply be coupled to an inverter 24 disposed in a driver 26 of the active electrical element 18. In this respect, the LEDs 20-1 to 20-3 may be forward biased or reverse biased according to a specific operating state and / or command received by the control logic 22. The inverter 24 or inverter logic element may have sufficient output characteristics to drive the LEDs 20-1 to 20-3. The driver 26 may be substantially an analog interface of the active electrical element 18, electrically coupled to the control logic 22. The driver 26 may include controllable current sources 28-1 to 28-3, which may also be configured as LED sink current drivers. Pull-up resistors R1 to R3 may be incorporated to provide a path to Vdd for each of the LEDs 20-1 to 20-3, which facilitates voltage measurement when configured for reverse bias. Each of the current sources 28-1 to 28-3 may be electrically coupled to digital output signals LED1 to LED3 of the control logic 22. The output signals LED1 to LED3 may be provided along multiple lines coupled to each of the current sources 28-1 to 28-3 for current selection purposes. The output signals LED1 to LED3 may represent the PWM output of the control logic 22 for controlling the operation of the LEDs 20-1 to 20-3. The driver 26 may also include a multiplexer 30, which is electrically coupled to an analog-to-digital (ADC) converter and an ADC selector of the control logic 22. Furthermore, the driver 26 may include an on-chip temperature sensor, which is provided via the multiplexer 30. In some embodiments, the temperature sensor provides thermal compensation to the LEDs 20-1 to 20-3 via a thermal compensation profile and / or thermal shutdown.

[0043] The active electrical element 18 further includes a serial interface 32 embodying a module having circuitry configured to decode and convert incoming signals of the data stream into a bit stream in a local clock domain, the bit stream being further processed by the control logic 22. In this manner, the serial interface 32 may also be referred to as a device for receiving digital communications. The digital communications may be received from a controller (e.g., 16 of FIG. 1) and / or another LED package in a string of serial interfaces. The serial interface 32 is further configured to retransmit the decoded and converted bit stream and modified data to a communication channel to which another LED package or another external element is connected in a manner compatible with the overall LED display system. In some embodiments, the control logic 22 may include circuitry in the form of instantaneous logic 34 that, when enabled by other logic within the active electrical element 18, performs operations, such as mathematical operations, on the data values ​​received from the serial interface 32. The immediate logic 34 immediately feeds back the processed result to the serial interface 32 as described above, for use as a transfer of alternative data within the same data value. As used herein, the immediate logic 34 may also be referred to as an immediate processor. The control logic 22 may further include other circuitry, such as a finite state machine, which undergoes a series of states or steps to complete a set of required tasks. In this way, one or more portions of the control logic 22 may form an event processor configured to initiate a series of responses, such as a delayed response, based on the immediate processing.

[0044] Figure 3 is a block diagram of a portion of the control logic 22 of Figure 2, which includes the real-time logic 34. In Figure 3, the diagonal lines crossing various wires indicate that multiple lines or signals may also be configured. The real-time logic 34 is configured to receive data from the data stream as input from the serial interface 32 of Figure 2 for real-time processing. The processed result or processed data can be enabled or disabled by a multiplexer 36, which is different from the multiplexer 30 of Figure 2. The multiplexer 36 is configured to select a desired signal to output back to the serial interface 32 and on the data stream leaving the LED package 12 of Figure 2. The desired signal for output can be selected from several possible signals received by the multiplexer 36, including processed data from the real-time logic 34, other internal signals from the control logic 22, or unprocessed input data that passes through the real-time logic 34 for retransmission without modification. The other internal signals from the control logic 22 may include cyclic redundancy check (CRC) codes and internal status values, as well as other internal signals.

[0045] The instantaneous logic 34 can be configured to perform any number of operations on the input data for processing. Such operations include calculations with addition, subtraction, upscaling, downscaling, incrementing, decrementing, multiplication, and division, as well as simpler logical operations. As illustrated, the instantaneous logic 34 can also be configured to receive one or more control signals. Such control signals may include reset signals, clock signals, and various function selection signals. The various function selection signals may include signals for switching the instantaneous logic 34 on and off, signals for performing the calculations, or signals for performing other mathematical operations or processing. As further depicted, selection control signals may be provided to the multiplexer 36 along one or more selection lines.

[0046] Figure 4 is a block diagram of a portion of the control logic 22, similar to an embodiment of Figure 3 for the operation of a counter, such as a down-counter or decrementer, performed by the instantaneous logic 34 therein. In this configuration, the control signal lines of Figure 3 are depicted in Figure 4 as a reset line and a clock line. By counting down to zero, an event is triggered, which informs the control logic 22 to copy the next data value into memory, since that is the data value for a specific LED package or pixel in the string. All other data values ​​can be ignored and relayed to subsequent LED packages. In this way, the instantaneous logic 34 may include a data selector, which is configured together with the counter to associate a location of target data of interest within the communication signal, and the target data is selected for the data input of the control logic 22 within the corresponding LED package.

[0047] In Figure 4, the immediate logic 34 includes a register element 38, such as a flip-flop circuit, a data (D) flip-flop circuit, or a latching element, which can receive input from the serial interface 32 via an AND gate 40 and an inverter 42. For example, the following discussion of operation will be provided in the context of a D-type flip-flop circuit used for the register element 38. For correct operation, a reset signal is applied to the register element 38 via the reset line before the operation, setting the register element 38 to a logic level 1. This flip-flop maintains the borrow state of the register element 38 because it subtracts 1 from the input value to perform the function of a decrementer. The input data is first introduced into the least significant bit (LSB). An XOR gate 44 performs an operation between the input data value and the borrow. Once the first value of 1 is introduced into the input, the borrow is no longer needed, and the borrow state becomes zero until it is reset for another decrement operation. The calculation performed (in this example, down-counting) may be at least partially based on a data rate of the cascaded serial communication, such that a counter is synchronized with the data rate. The calculation may be at least partially based on a clock signal inside or outside the LED package, such that the counter is synchronized with the clock signal. In some embodiments, the start of a delayed response as described above may be controlled by an initial timing value of the counter, which is the result of the calculation, and a counter rate of the counter is at least partially synchronized with the data rate of the cascaded serial communication. Other values ​​or states stored within the LED package may also be included in the calculation. For example, a received control signal may instruct the immediate logic 34 to select increment or decrement. In another example, a separately stored value may be used such that the value (e.g., some value other than 1) is subtracted from the incoming data. As shown in Figure 4, the immediate logic 34, configured as a decrementer, can be used to associate a location of target data of interest within the communication signal, thus allowing the target data to be selected as a data input for control logic (e.g., 22 in Figure 2) within the LED package. An example of this process is illustrated below.

[0048] Figure 5A is a block diagram 46 depicting cascaded communication and processing of data bits for multiple LED packages 12-1 to 12-3 according to the principles of this disclosure. The LED packages 12-1 to 12-3 can be configured as a portion of the LED string 14 of Figure 1. Input communication from a data stream 48 of a communication channel is received by the LED package 12-1 and transferred from an input register 50 to an output register 52, which is graphically depicted as a box within the LED package 12-1. The input and output registers 50 and 52 represent memory locations within the active electrical element 18. The data stream can contain a one-bit pattern of data blocks of arbitrary length, where bits are depicted by numbers 1, 2, 3, 4…n. The data block may contain a command code, which is processed by the active electrical element 18 of each LED package 12-1 to 12-3, for controlling the operation of the corresponding active electrical element 18 and / or controlling the operation of the corresponding LED within the LED package 12-1 to 12-3.

[0049] During operation, each data bit of the data block is sequentially received and held by the input register 50 during a clock count, and then transferred to the output register 52 at the next clock count. In this way, the data stream 48 may be subject to a two-bit delay during processing. In other instances, other delays, such as a four-bit delay, can be provided by other registers within the active electrical element 18. In some instances, the bit data transferred to the output register 52 is changed or modified according to the real-time logic 34 of FIG2.

[0050] Figure 5B is similar to Figure 46 of Figure 5A, and further illustrates the progress of data bits through the LED packages 12-1 to 12-3. As illustrated, the bit positions of the data blocks can advance sequentially according to the clock cycle, shifting from left to right, through the input and output registers 50, 52 of the plurality of LED packages 12-1 to 12-3. In this way, a first bit position (i.e., "1") of a data block may have been held in the input register 50 of the third LED package 12-3, while bit positions "2" and "3" are in the second LED package 12-2, bit positions "4" and "5" are in the first LED package 12-1, and the remaining bit positions have not yet been received by the LED packages 12-1 to 12-3. In Figure 5B, overlapping boxes are depicted above the input and output registers 50, 52 to represent data blocks, where individual bit positions are now distributed across the plurality of LED packages 12-1 to 12-3. The internal logic of the active electrical element 18 may include the real-time logic 34 described above with respect to Figure 2, which performs real-time processing during the flow of the data stream 48. The next value for each output register 52 can then be determined based on the internal state of the logic and the value of the input register 50. This real-time processing involves processing a bit or a data value of the data block and changing the data stream in the same time slot as the processed bit or processed data value.

[0051] Figure 6 is a schematic diagram 56 illustrating an embodiment of a bit pattern that can be received and processed by the control logic 22 and real-time logic 34 of Figure 4. For simplicity, the data element or pixel data size is depicted as 8-bit bytes, but in a real system, the number of bytes and individual elements of individual pixel data blocks may require more bits. Pixel 1, Pixel 2, and Pixel 3 input columns represent the inputs of each of the three LED packages 12-1 to 12-3 depicted in Figures 5A and 5B. The alignment of the columns for the inputs of Pixel 1, Pixel 2, and Pixel 3 is not intended to represent the same time for each vertical row.

[0052] During the flow of the data stream, pixel 1 receives its input and produces an output that becomes the input for pixel 2, and so on. The output column of pixel 3 represents the output data from pixel 3, which can be the input for another downstream pixel or a portion of the data stream returning to, for example, the master controller of controller 16 in FIG1. ​​For simplicity, various "x" values ​​are depicted to represent values ​​in the data stream, which may be unrelated to the principles of real-time processing discussed herein. The bit pattern represented by the data or data block contains a command byte that tells pixels 1-3 what type of data set and other information to follow. This is followed by a 3-byte preamble, labeled "number of bytes - 1", "synchronization value", and "number of data units - 1", which represents one or more data values ​​of the bit pattern.

[0053] The byte count -1 provides information to pixels 1-3 about how many bytes follow the preamble, so that pixels 1-3 know when the end of a byte pattern is expected and any possible further commands. In Figure 6, this value is set to "2" for 3-byte counting starting from zero, and this value is not changed with each pixel. The synchronization value is a timing value used to provide information to pixels 1-3 about when an event or series of events begins. Pixel 1 receives the command first, but its corresponding data segment (i.e., pixel 1 data) is received last after pixel 3 data and then pixel 2 data segment. This configuration of the bit pattern can be referred to as the reverse order of the data segments (i.e., pixel 3 data, pixel 2 data, then pixel 1 data) relative to the order of the pixels in the string (e.g., pixel 1, pixel 2, and then pixel 3). Thus, pixel 1 requires a longer delay after receiving the command compared to subsequent downstream pixels 2 and 3. In this regard, pixel 1 receives a higher synchronization value, which is implemented by pixel 1 to set a timer to trigger an initial event signal. In many cases, this delay can be calculated locally by pixel 1 from the number of bytes - 1 and the number of data units - 1, or vice versa. In this regard, the synchronization value can be considered redundant. However, this data redundancy can be advantageous because it requires fewer computational resources within pixels 1-3. During the processing of pixel 1, the synchronization value is decremented by a value used for input to pixel 2, and so on for each additional pixel. In this example, the number of data units - 1 is another zero-based number indicating the number of pixel data units to be ignored before accepting the target data sub-block of the pixel. In other words, the number of data units - 1 is implemented to inform each of pixels 1-3 of the data it needs. In Figure 6, pixel 3 is the last pixel in a string of sequences, and thus the number of data units - 1 output by pixel 3 is transmitted back to the master controller with all values ​​of "1". This is because during real-time processing, the synchronization value is processed, and the value of the data unit number -1 is decremented as the data stream passes through each pixel. Once the value reaches zero, the next value (-1) is represented in binary as all 1s when the counter starts counting from the beginning.

[0054] The synchronization value portion and / or the data unit number - 1 portion of the bit pattern can all constitute a variable data value on which real-time processing is performed. The synchronization value portion and / or the data unit number - 1 portion can also be referred to as two variable data values ​​on which real-time processing is performed. In some embodiments, the variable data value may contain at least two data bits. In another embodiment, the variable data value may contain any number of bits, for example up to about 64 bits, which corresponds to the standard width of a double-precision floating-point number. Further embodiments may include a set of such numbers manipulated through the real-time logic 34. The variable data value "data unit number - 1" refers to a data position value within a data stream, the data position value being a position of a data value for a specific pixel 1-3 within a data stream segment of the data stream. The variable data value can be processed and modified as it flows through each of the pixels 1-3. Depending on the application, the length of the variable data value may be variable during cascading communication. In other words, the length of the synchronization value portion and / or the data unit number - 1 portion can vary during real-time processing based on the portion of the bit pattern preamble provided by the external controller (e.g., 16 in FIG. 1).

[0055] In this real-time processing, the variable data value "synchronization value" forms a delay value for pixels 1-3 to be synchronized and responds to data stream commands in a coordinated manner. In this way, the delay value provides an associated delay time or a delayed response for when each pixel 1-3 performs one or more events, such as turning on, turning off, or setting one or more LED chips within each pixel 1-3 to a preset value. The delay value is changed as it flows through each pixel 1-3, so that each downstream pixel can have substantially synchronized individual events.

[0056] To further illustrate how the synchronization value is used, Figure 7 is the same schematic diagram 58 as Figure 6, except that when each pixel 1-3 receives its individual data along a common time axis, the data for each pixel 1-3 is time-delayed by two bits for alignment. In this regard, the alignment of the columns input for pixels 1, 2, and 3 represents the same time position for each vertical row of all pixels 1-3. In Figure 7, as the data shifts to the right, the time increases in the left direction. As previously discussed, the synchronization value is introduced at an initial value and decremented by 1 for each pixel 1-3. The decremented value is passed to the next pixel 1-3, but the input value is loaded into an internal down-counter with a single-bit shift, resulting in twice the loaded value (i.e., 12 becomes 24 loaded into the down-counter for pixel 1). Each pixel 1-3 counts down from this number in each clock cycle of the received data, or in association with each bit. When the counter reaches zero, a synchronized event trigger is activated as illustrated in Figure 7. The internal logic within the active electrical element of each pixel 1-3 can utilize this event trigger to further delay and trigger a series of events, such as the corresponding LED chip's dimming, flashing, and initiation of a new brightness level. In one example, a sequence of synchronized events provides dimming, wherein a first event turns off all pixels 1-3 for a specified amount of time, followed by a second event turning all pixels 1-3 on to a desired brightness for a related data frame. In another example, the sequence of events may further include a third event and a fourth event occurring between the first and second events, wherein the third event includes turning on pixels 1-3, and the fourth event includes turning off pixels 1-3 to provide a pulse of light during the dimming period, which can be used for left-right synchronization in 3D glasses. As previously stated, the shift of the two bits shown in Figure 7 is a delay of the corresponding two bits.

[0057] The time series for each of the pixels 1-3 has vertical scale lines representing the start counting positions 60-1 to 60-3, 1x counting 62-1 to 62-3, and 2x counting 64-1 to 64-3. As illustrated, the 2x counting 64-1 to 64-3 occurs simultaneously for all three pixels. In particular, counting positions 64-1 to 64-3 trigger a synchronization event. At this point, all three pixels 1-3 have also received their target data segments, since pixel 1 was the last to receive its data. Triggering an event at this point can initiate processing within each pixel 1-3 to be executed synchronously. This may include outputting a new LED brightness value and other actions. Various event types relate to one of several possible actions, such as turning on, turning off, or setting one or more LED chips to a preset value.

[0058] Figure 7 depicts an exemplary embodiment for illustrating the format of this disclosure. Actual implementations may require wider word widths for the pixel data and the three values ​​in the preamble. The preamble values ​​typically require two bytes each. For color depths between 24 and 48 bits, each pixel 1-3 requires three, four, five, or six bytes. Many other embodiments are conceived. If there is a delay between pixels other than the two-bit delay shown in Figure 7, the calculation and / or values ​​will change. Instead of loading 4 times the data byte length in the initial synchronization value, 8 times the data byte length can be loaded, and the value can be counted down by 2 for each pixel, and this value can be used without shifting (e.g., 2x multiplication). As discussed earlier, the synchronization value can be omitted from the preamble and calculated internally from the other two values. As shown, many modifications of this method within the scope of this disclosure are conceived.

[0059] Figure 8 is a schematic diagram 66 similar to Figure 7, except that when each pixel 1-3 receives its individual data along a common time axis, the data segment for each pixel 1-3 is time-delayed by four bits for alignment. As in Figure 7, the alignment of the columns input for pixels 1, 2, and 3 represents the same time position for each vertical row of all pixels 1-3. As previously stated, the four-bit shift shown in Figure 8 corresponds to immediate processing under a four-bit delay. For Figure 8, the synchronization value is changed so that the synchronization event triggering for the counting positions 64-1 to 64-3 of all pixels 1-3 occurs simultaneously. This synchronization event triggering corresponds to when pixel 1 receives its data segment in a manner similar to the 2-bit delay example in Figure 7. In this example, a value of 6 for pixel 1 (i.e., 00000110) is loaded into a counter with a 2-bit shift (4-fold multiplication). In this way, pixel 1 still counts down twenty-four clock cycles to trigger the synchronization event, but pixel 2 counts twenty cycles, and pixel 3 counts sixteen cycles.

[0060] In some embodiments, the sequence depicted in Figures 6-8 represents a configuration and method of synchronization, which combines the use of a real-time processor (e.g., 34 in Figure 2) in each pixel 1-3 with the aforementioned technique to count from a given position, such as a command, to a synchronized trigger event. In this manner, the real-time processor is configured to perform real-time processing on the same variable data value during serial communication. In other embodiments, the above sequence may be executed without necessarily having a real-time processor within each pixel 1-3. Instead, values ​​may be loaded into the pixels 1-3 in any number of other ways, such as, for example, via a command in the same way as loading brightness values. In still other embodiments, values ​​may be loaded into the pixels 1-3 via data stream commands in conjunction with real-time processing by a real-time processor (e.g., 34 in Figure 2) within each pixel 1-3.

[0061] In some embodiments, the sequences depicted in Figures 6-8 may represent a synchronization configuration and method for data, without a preamble for the number of bytes -1, synchronization value, and number of data units -1. Individual commands and / or data may instead provide individual parameters for the pixels 1-3, such as data length and their individual data offsets. In other words, the method for synchronization and individual data offsets proposed herein can be employed without the aforementioned real-time processing, which counts by pre-storing values ​​for each pixel 1-3 using other means. Thus, the pixels 1-3 can count the data passing through using the preamble for the number of bytes -1, synchronization value, and number of data units -1 as described above. In some embodiments, an external data source (e.g., the controller 16 of Figure 1) may define variable-length data segments and the number of data segments to be provided to the various pixels 1-3. In some embodiments, variable-length data segments and variable numbers of data segments can be implemented by real-time processing of a real-time processor (e.g., 34 in FIG2) within each pixel 1-3.

[0062] According to the above embodiments, in LED arrays for various applications, discrete LED packages can be assembled together for cascaded communication. In one such application, the discrete LED packages form LED pixels of an LED display. Each LED package may contain one or more LED chips forming at least one other pixel, and an active electrical element capable of receiving serial communication from a data stream, controlling the operation of the one or more LED chips according to commands received in the data stream, and performing real-time processing of various data values ​​of the data stream. The active electrical element within each LED package may include circuitry in the form of a real-time processor capable of processing data from a data value or time slot of a data stream, and introducing the processed data or modified data back into the data stream in the same data value or time slot. In this way, each LED package in the LED display can individually process data and transmit the processed data to the next downstream LED package. In some embodiments, this real-time processing can be performed while also providing various bit delays within each active electrical element, such as a two-bit delay or a four-bit delay. Performing real-time processing individually for each LED package or LED pixel within a display offers various advantages, including the ability to synchronize and / or coordinate the operation of serially connected LED packages. Also according to the embodiments described above, a method for directing certain segments of a large data block to individual pixels is disclosed. Furthermore, a method for synchronizing the characteristics of multiple pixels is disclosed.

[0063] It is conceivable that any of the previously described states and / or various individual states and features as described herein can be combined to obtain additional advantages. Unless otherwise stated herein, any of the various embodiments disclosed herein can be combined with one or more other disclosed embodiments.

[0064] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of this disclosure. All such improvements and modifications are considered to be within the scope of the concepts disclosed herein and the following claims. [Simplified Explanation of the Diagram]

[0013] The accompanying drawings, which are incorporated in and form part of this specification, depict several aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.

[0014] [Figure 1] is a block diagram depicting a system-level control design for a lighting device that utilizes cascaded communication of serially connected light-emitting diode (LED) packages.

[0015] [Figure 2] is a block diagram of an LED package from Figure 1 based on the principles of this disclosure, which has some details of an active electrical element.

[0016] [Figure 3] is a block diagram of a part of the control logic of Figure 2, which contains immediate logic.

[0017] [Figure 4] is a block diagram similar to a portion of the control logic in Figure 3, which is used for an embodiment of the operation of a count counter or decrementer performed by the immediate logic therein.

[0018] [Figure 5A] is a block diagram depicting cascaded communication and data bit processing for multiple LED packages according to the principles of this disclosure.

[0019] [Figure 5B] is a diagram similar to Figure 5A, and further shows the progress of data bits through the LED package.

[0020] [Figure 6] is a schematic diagram of an embodiment, which depicts a bit pattern that can be received and processed by the control logic and real-time processor of Figure 4.

[0021] [Figure 7] is the same schematic diagram as Figure 6, except that when each pixel receives its individual data along a common time axis, the data for each pixel is delayed by two bits in time to align.

[0022] [Figure 8] is a schematic diagram similar to Figure 7, except that when each pixel receives its individual data along a common time axis, the data for each pixel is delayed by four bits in time to align.

Claims

1. A method for digital communication in a light-emitting diode (LED) display, the method comprising: The controller transmits digital communication to a plurality of serially connected light-emitting diode (LED) packages, the digital communication including a bit mode containing at least one variable data value in a time slot of the digital communication; and within at least one LED package of the plurality of serially connected LED packages, performs real-time processing on the at least one variable data value, such that one or more values ​​of the variable data value are changed and transmitted in the same time slot of the variable data value.

2. The method of claim 1, wherein the at least one variable data value comprises at least 2 bits to at most 64 bits.

3. The method of claim 1, wherein the at least one variable data value is a data position value within a data stream, the data position value being the position of a related data value within a data stream segment of the data stream, the data value being for the at least one light-emitting diode package.

4. As in request item 3, where: The at least one light-emitting diode (LED) package is a first LED package of the plurality of serially connected LED packages, the first LED package being configured to receive the digital communication before the other LED packages of the plurality of serially connected LED packages; the data value is located before the first data segment of the plurality of data segments of the data stream segments, each of the plurality of data segments being a different LED package for the plurality of serially connected LED packages; and the data stream segments are configured in reverse order such that the first data segment for the first LED package is received after the other data segments of the plurality of data segments for the other LED packages have been received by the first LED package.

5. The method of claim 1, wherein the at least one variable data value is a delay value relating to when the at least one light-emitting diode package performs one or more events.

6. As in request item 5, wherein: The at least one light-emitting diode package is a first light-emitting diode package consisting of a plurality of serially connected light-emitting diode packages that receive the digital communication; And the delay value is changed such that two or more other light-emitting diode packages in the plurality of serially connected light-emitting diode packages have events that are synchronized with the one or more events of the first light-emitting diode package.

7. The method of claim 1, wherein the real-time processing includes at least one of adding, subtracting, multiplying, dividing, incrementing, or decrementing a received value for the at least one variable data value.

8. A method for timing operation of a light-emitting diode (LED) display, the method comprising: From transmitting digital communication from the controller to multiple serially connected LED packages; At least one of the plurality of serially connected light-emitting diode (LED) packages receives one or more synchronization values; provides a response to a delay associated with the one or more synchronization values; and operates the at least one LED package according to the response to the delay; wherein the start of the response to the delay is controlled by an initial timing value of a counter, which is the result of calculation, wherein the counter rate is at least partially synchronized with the data rate of the digital communication.

9. The method of claim 8, wherein the one or more synchronization values ​​are modified by real-time processing within the at least one LED package for use in subsequent LED packages of the plurality of serially connected LED packages.

10. The method of claim 8, wherein the delayed response is synchronized with the delayed response of at least one other light-emitting diode package of the plurality of serially connected light-emitting diode packages configured to receive the digital communication.

11. The method of claim 8, wherein the one or more synchronization values ​​are part of a variable data value, and the calculation is processed in real time such that the one or more values ​​of the variable data value are changed and sent in the same time slot of the variable data value.

12. The method of claim 8, wherein the calculation is based at least in part on other values ​​or states stored within the at least one light-emitting diode package.

13. As in request item 8, wherein: The delayed response includes at least one event; the at least one event is controlled by at least one event value; the at least one event value is an event type; and the event type includes one or more of turning on, turning off, and setting to a preset value for one or more light-emitting diode chips present within the at least one light-emitting diode package.

14. The method of claim 13, wherein the at least one event is a sequence synchronization event, comprising a first event that shuts off all of the one or more light-emitting diode chips for a specified amount of time, followed by a second event that turns on all of the one or more light-emitting diode chips to the desired brightness for a related data frame.

15. The method of claim 14, wherein the synchronization event of the sequence further includes a third event and a fourth event occurring between the first event and the second event, wherein the third event includes turning on the one or more light-emitting diode chips, and the fourth event includes turning off the one or more light-emitting diode chips.

16. A method for digital communication in a light-emitting diode (LED) display, the method comprising: Digital communication is transmitted from a controller to a plurality of serially connected LED packages, the digital communication comprising data values ​​defined by the controller outside the plurality of serially connected LED packages, the data values ​​being for the plurality of serially connected LED packages and corresponding to variable lengths of data blocks of the digital communication; wherein the data values ​​are transmitted to the plurality of serially connected LED packages as variable data values ​​of the digital communication, wherein the variable data values ​​are part of a bit pattern of the digital communication, the bit pattern further including at least a portion of a preamble for each data block, the preamble including at least one of the data values ​​initially defined by the controller, the data values ​​being continuously modified by each of the plurality of serially connected LED packages.

17. The method of claim 16, wherein at least one of the data values ​​corresponds to a data location within the data block having a variable length, the data location representing a plurality of data segments within the data block having a variable length, and each data segment being for a different light-emitting diode package among the plurality of serially connected light-emitting diode packages.

18. As in request item 17, wherein: The first LED package of the plurality of serially connected LED packages is configured to receive the digital communication before the other LED packages of the plurality of serially connected LED packages; and the last data segment of the plurality of data segments is for the first LED package, such that the plurality of data segments are configured in reverse order, and the last data segment is received by the first LED package after the other data segments of the plurality of data segments for the other LED packages have been received by the first LED package.

19. A light-emitting diode (LED) display, comprising: Display panel; and at least one light-emitting diode package, comprising: at least one light-emitting diode chip; A device for receiving digital communication, configured to receive a communication signal from another light-emitting diode package; and an instantaneous processor configured to modify a variable data value of at least two consecutive bits of the communication signal received by the device for receiving digital communication; wherein the variable data value is transmitted to a counter to provide a delayed response, and wherein the delayed response is at least one of a data rate associated with the communication signal, an internal clock of the at least one light-emitting diode package, or an external clock.

20. The light-emitting diode display of claim 19, wherein the real-time processor is configured to process and modify the variable data values ​​such that the delayed response is synchronized with other light-emitting diode chips in other light-emitting diode packages configured to receive the communication signals.

21. The light-emitting diode display as claimed in claim 19, further comprising an event processor configured to initiate a series of responses as a response to the said delay.

22. The light-emitting diode display of claim 19, wherein the real-time processor includes a data selector and a counter configured to associate with the location of target data of interest within the communication signal, and the target data is selected for data input to control logic within the at least one light-emitting diode package.

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