Electronic device operating based on asynchronous clocks and its operation method

Abstract

This invention discloses an electronic device and its operating method. The electronic device includes a first clock generator, a second clock generator, a phase detection circuit, a signal delay circuit, a first functional circuit, and a second functional circuit. The first clock generator generates a first clock. The second clock generator generates a second clock. The phase detection circuit detects a phase difference between the first clock and the second clock to generate a control signal. The signal delay circuit delays the first clock when the control signal is a target logic value to generate a third clock. The first functional circuit operates according to the third clock, and the second functional circuit operates according to the second clock.

Claims

1. An electronic device comprising: a first clock generator for generating a first clock; a second clock generator for generating a second clock; a phase detection circuit coupled to the first clock generator and the second clock generator for detecting a phase difference between the first clock and the second clock to generate a control signal; a signal delay circuit coupled to the first clock generator and the phase detection circuit for delaying the first clock when the control signal is a target logic value to generate a third clock; a first functional circuit coupled to the signal delay circuit; and a second functional circuit coupled to the second clock generator and the first functional circuit; wherein... The first functional circuit operates according to the third clock, and the second functional circuit operates according to the second clock.

2. The electronic device as claimed in claim 1, wherein, The first cycle of the first clock is essentially equal to the second cycle of the second clock.

3. The electronic device as claimed in claim 2, wherein, When the phase difference is less than a threshold value, the phase detection circuit outputs the control signal with the target logic value.

4. The electronic device as described in claim 3, wherein, This threshold value is one-quarter of the value in the first cycle.

5. The electronic device as claimed in claim 2, wherein, The signal delay circuit delays the first clock by half of the first cycle.

6. The electronic device as claimed in claim 2, wherein, The signal delay circuit is an inverter.

7. The electronic device as claimed in claim 6, wherein, The inverter delays the first clock by half of the first cycle.

8. The electronic device as claimed in claim 2, wherein, When the control signal is the inverted phase of the target logic value, the signal delay circuit does not delay the first clock.

9. The electronic device as claimed in claim 2, wherein, The electronic device is part of a control circuit of a universal serial bus. The first functional circuit is used to process physical layer (PHY) signals, and the second functional circuit is used to process media access control (MAC) layer signals.

10. A method of operating an electronic device, the electronic device comprising a first clock generator, a second clock generator, a first functional circuit, and a second functional circuit, wherein the first clock generator and the second clock generator respectively generate a first clock and a second clock, the method comprising: calculating a phase difference between the first clock and the second clock; when the phase difference is less than a threshold value, delaying the first clock to generate a third clock; and the first functional circuit transmitting data to the second functional circuit according to the third clock.

Images