Overcurrent protection circuit

Abstract

This invention discloses an overcurrent protection circuit. The overcurrent protection circuit protects an output stage. The output stage includes a first transistor and a second transistor. The overcurrent protection circuit includes a first voltage regulation circuit and a second voltage regulation circuit. The first voltage regulation circuit is coupled to the output stage and is used to regulate a first drive voltage of the first transistor. The second voltage regulation circuit is coupled to the output stage and is used to regulate a second drive voltage of the second transistor. A first gate of the first transistor is coupled to the first drive voltage, and a second gate of the second transistor is coupled to the second drive voltage.

Claims

1. An overcurrent protection circuit for protecting an output stage, the output stage including a first transistor and a second transistor, the overcurrent protection circuit comprising: a first voltage regulation circuit coupled to the output stage for regulating a first drive voltage of the first transistor; and a second voltage regulation circuit coupled to the output stage for regulating a second drive voltage of the second transistor; wherein... The first transistor has a first gate coupled to the first driving voltage, and the second transistor has a second gate coupled to the second driving voltage; wherein the first voltage regulation circuit includes: a third transistor coupled to a first reference voltage and the first transistor; a fourth transistor coupled to the first reference voltage and a first node; a fifth transistor coupled to the first reference voltage, the first node, and the first transistor; a first current source coupled to the first reference voltage; a second current source coupled to the first reference voltage and the first node; a sixth transistor coupled to the first current source and a second node; a seventh transistor coupled to the third transistor, the second node, and a third node; an eighth transistor coupled to the first transistor, the second node, and a second reference voltage; a ninth transistor coupled to the third node and the second reference voltage; and a tenth transistor coupled to the first node, the third node, and the second reference voltage.

2. As in request item 1, the overcurrent protection circuit, wherein, The first transistor and the third transistor form a first current mirror; the fourth transistor and the fifth transistor form a second current mirror; and the ninth transistor and the tenth transistor form a third current mirror.

3. As in request item 1, the overcurrent protection circuit, wherein, The fourth transistor has a third gate and a first drain, and the third gate and the first drain are the first node; the fifth transistor has a fourth gate, and the fourth gate is the first node; the sixth transistor has a fifth gate and a second drain, and the fifth gate and the second drain are the second node; the seventh transistor has a sixth gate and a third drain, the sixth gate is the second node, and the third drain is the third node; the ninth transistor has a seventh gate and a fourth drain, and the seventh gate and the fourth drain are the third node; and the tenth transistor has an eighth gate and a fifth drain, the eighth gate is the third node, and the fifth drain is the first node.

4. As in request item 1, the overcurrent protection circuit, wherein, The third transistor has a first source, a third gate, and a first drain, the first source being coupled to the first reference voltage, and the third gate being coupled to the first gate; the fourth transistor has a second source, a fourth gate, and a second drain, the second source being coupled to the first reference voltage, the fourth gate being coupled to the first node, and the second drain being coupled to the first node; the fifth transistor has a third source, a fifth gate, and a third drain, the third source being coupled to the first reference voltage, the fifth gate being coupled to the first node, and the third drain being coupled to the first gate; the sixth transistor has a fourth source, a sixth gate, and a fourth drain, the fourth source being coupled to the first current source, the sixth gate being coupled to the second node, and the fourth drain being coupled to the second node; the seventh transistor has a fifth source and a seventh gate. The transistor has a fifth drain, a fifth source coupled to the first drain, a seventh gate coupled to the second node, and a fifth drain coupled to the third node; the eighth transistor has a sixth source, an eighth gate, and a sixth drain, the sixth source coupled to the second node, the eighth gate coupled to the first transistor, and the sixth drain coupled to the second reference voltage; the ninth transistor has a seventh source, a ninth gate, and a seventh drain, the seventh source coupled to the second reference voltage, the ninth gate coupled to the third node, and the seventh drain coupled to the third node; the tenth transistor has an eighth source, a tenth gate, and an eighth drain, the eighth source coupled to the second reference voltage, the tenth gate coupled to the third node, and the eighth drain coupled to the first node; the first current source is coupled between the first reference voltage and the fourth source; The second current source is coupled between the first reference voltage and the first node.

5. As in request item 1, the overcurrent protection circuit, wherein, The second voltage regulation circuit includes: an eleventh transistor coupled to the second reference voltage and the second transistor; a twelfth transistor coupled to the second reference voltage and a fourth node; a thirteenth transistor coupled to the second reference voltage, the fourth node, and the second transistor; a third current source coupled to the second reference voltage; a fourth current source coupled to the second reference voltage and the fourth node; and a fourteenth transistor coupled to the third current source and a fifth node. A fifteenth transistor, coupled to the eleventh transistor, the fifth node, and a sixth node; a sixteenth transistor, coupled to the second transistor, the fifth node, and the first reference voltage; A seventeenth transistor coupled to the sixth node and the first reference voltage; and an eighteenth transistor coupled to the fourth node, the sixth node and the first reference voltage.

6. As in request item 5, the overcurrent protection circuit, wherein, The second transistor and the eleventh transistor form a first current mirror; the twelfth transistor and the thirteenth transistor form a second current mirror; and the seventeenth transistor and the eighteenth transistor form a third current mirror.

7. As in request item 5, the overcurrent protection circuit, wherein, The twelfth transistor has a third gate and a first drain, and the third gate and the first drain are the fourth node; the thirteenth transistor has a fourth gate, and the fourth gate is the fourth node; the fourteenth transistor has a fifth gate and a second drain, and the fifth gate and the second drain are the fifth node; the fifteenth transistor has a sixth gate and a third drain, the sixth gate is the fifth node, and the third drain is the sixth node; The seventeenth transistor has a seventh gate and a fourth drain, and the seventh gate and the fourth drain are the sixth node; and the eighteenth transistor has an eighth gate and a fifth drain, the eighth gate is the sixth node, and the fifth drain is the fourth node.

8. As in request item 5, the overcurrent protection circuit, wherein, The eleventh transistor has a first source, a third gate, and a first drain. The first source is coupled to the first reference voltage, and the third gate is coupled to the first gate. The twelfth transistor has a second source, a fourth gate, and a second drain. The second source is coupled to the first reference voltage, the fourth gate is coupled to the fourth node, and the second drain is coupled to the fourth node. The thirteenth transistor has a third source, a fifth gate, and a third drain. The third source is coupled to the first reference voltage, the fifth gate is coupled to the fourth node, and the third drain is coupled to the second gate. The fourteenth transistor has a fourth source, a sixth gate, and a fourth drain. The fourth source is coupled to the first current source, the sixth gate is coupled to the fifth node, and the fourth drain is coupled to the fifth node. The fifteenth transistor has a fifth source, a seventh gate, and a fifth drain. The fifth source is coupled to the first drain, the seventh gate is coupled to the fifth node, and the fifth drain is coupled to the sixth node. The sixteenth transistor has a sixth source, an eighth gate, and a sixth drain. The sixth source is coupled to the fifth node, the eighth gate is coupled to the second transistor, and the sixth drain is coupled to the second reference voltage. The seventeenth transistor has a seventh source, a ninth gate, and a seventh drain. The seventh source is coupled to the second reference voltage, the ninth gate is coupled to the sixth node, and the seventh drain is coupled to the sixth node. The eighteenth transistor has an eighth source, a tenth gate, and an eighth drain. The eighth source is coupled to the second reference voltage, the tenth gate is coupled to the sixth node, and the eighth drain is coupled to the fourth node. The first current source is coupled between the first reference voltage and the fourth source. The second current source is coupled between the first reference voltage and the fourth node.

9. An overcurrent protection circuit for protecting an output stage, the output stage including a first transistor and a second transistor, the overcurrent protection circuit including: a third transistor coupled to a first reference voltage and the first transistor; and a fourth transistor coupled to the first reference voltage and a first node; A fifth transistor, coupled to the first reference voltage, the first node, and the first transistor; a first current source, coupled to the first reference voltage; A second current source is coupled to the first reference voltage and the first node; A sixth transistor is coupled to the first current source and a second node; A seventh transistor is coupled to the third transistor, the second node and a third node; An eighth transistor coupled to the first transistor, the second node, and a second reference voltage; a ninth transistor coupled to the third node and the second reference voltage; and a tenth transistor coupled to the first node, the third node, and the second reference voltage.

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