Pseudo-vertical flip-chip light-emitting diode structure and its fabrication method

Abstract

This invention discloses a pseudo-vertical flip-chip light-emitting diode (LED) structure and its fabrication method. The LED structure includes a first semiconductor layer, multiple quantum well layers, a second semiconductor layer, an insulating block, a conductive structure, an insulating ring, a current diffusion layer, the conductive block, and the insulating layer. The first semiconductor layer and the multiple quantum well layers have a groove, and the second semiconductor layer has a through-hole connecting the groove. The conductive structure is disposed through the insulating block in the groove and the through-hole, and protrudes from the through-hole. The insulating ring is disposed on the second semiconductor layer, covering the sidewalls of the conductive structure, and exposing the remaining area of ​​the second semiconductor layer. The current diffusion layer and the conductive block are disposed on the remaining area of ​​the second semiconductor layer, with the current diffusion layer located between the conductive block and the conductive structure. The insulating layer is disposed on the current diffusion layer.

Claims

1. A pseudo-vertical flip-chip light-emitting diode structure, comprising: a first semiconductor layer; a multiple quantum well layer disposed on the first semiconductor layer, wherein the first semiconductor layer and the multiple quantum well layer are provided with a groove; a second semiconductor layer disposed on the multiple quantum well layer, wherein the first semiconductor layer and the second semiconductor layer have opposite conductivity types, the second semiconductor layer has a through-hole penetrating through itself, the through-hole communicating with the groove, and the cross-sectional area of ​​the through-hole being larger than the cross-sectional area of ​​the groove; an insulating block disposed in the groove and the through-hole to cover the inner walls of the groove and the through-hole and the bottom of the through-hole, and exposing the bottom of the groove; a conductive structure disposed in the groove and the through-hole to cover the insulating block and the first semiconductor layer, wherein the top surface of the conductive structure is higher than the top surface of the second semiconductor layer; an insulating ring disposed on the second semiconductor layer, covering the sidewall of the conductive structure, and exposing the remaining area of ​​the second semiconductor layer; A current diffusion layer and a conductive block are disposed on the remaining area of ​​the second semiconductor layer, wherein the current diffusion layer is located between the conductive block and the conductive structure; and an insulating layer is disposed on the current diffusion layer.

2. The pseudo-vertical flip-chip light-emitting diode structure as described in claim 1, wherein when a voltage is applied to the conductive block and the conductive structure, the current path connects the conductive block and the conductive structure and is distributed radially.

3. The pseudo-vertical flip-chip light-emitting diode structure as described in claim 1, wherein the first semiconductor layer and the second semiconductor layer are a P-type semiconductor layer and an N-type semiconductor layer, respectively.

4. The pseudo-vertical flip-chip light-emitting diode structure as described in claim 1, wherein the first semiconductor layer and the second semiconductor layer are an N-type semiconductor layer and a P-type semiconductor layer, respectively.

5. A method for fabricating a pseudo-vertical flip-chip light-emitting diode structure, comprising the following steps: sequentially forming a first semiconductor layer, a multiple quantum well layer, and a second semiconductor layer on an epitaxial substrate, wherein the first semiconductor layer and the second semiconductor layer have opposite conductivity types; penetrating the multiple quantum well layer and removing a portion of the first semiconductor layer to form a plurality of grooves, and penetrating the second semiconductor layer to form a plurality of vias, wherein the vias respectively connect to the grooves, and the cross-sectional area of ​​each via is larger than the cross-sectional area of ​​each groove; forming a plurality of insulating blocks in the grooves and vias respectively to cover the inner walls of the grooves and vias and the bottom of the vias, and exposing the bottom of the grooves; forming a plurality of conductive structures in the grooves and vias respectively to cover the insulating blocks and the first semiconductor layer, wherein the top surface of the conductive structures is higher than the top surface of the second semiconductor layer; Multiple insulating rings are formed on the second semiconductor layer to cover the sidewalls of the conductive structures and expose the remaining areas of the second semiconductor layer; a current diffusion layer and an insulating layer are sequentially formed on the remaining areas of the second semiconductor layer; multiple areas of the insulating layer and the current diffusion layer below it are removed to expose multiple areas of the second semiconductor layer; multiple conductive blocks are formed on the areas of the second semiconductor layer; a temporary substrate is formed on the conductive structures, the conductive blocks, and the insulating layer through a removable double-sided adhesive layer; the epitaxial substrate is removed from the first semiconductor layer; the conductive blocks and the second semiconductor layer, the multiple quantum well layer, and the first semiconductor layer below them are cut to form multiple pseudo-vertical flip-chip light-emitting diode structures on the temporary substrate; and the removable double-sided adhesive layer and the temporary substrate are removed from the pseudo-vertical flip-chip light-emitting diode structures.

6. A method for fabricating a pseudo-vertical flip-chip light-emitting diode structure as described in claim 5, wherein the epitaxial substrate is removed from the first semiconductor layer by a laser lift-off process.

7. A method for fabricating a pseudo-vertical flip-chip light-emitting diode structure as described in claim 5, wherein the conductive blocks and the underlying second semiconductor layer, the multiple quantum well layer and the first semiconductor layer are cut by inductively coupled plasma etching (ICP).

8. A method for fabricating a pseudo-vertical flip-chip light-emitting diode structure as described in claim 5, wherein the first semiconductor layer and the second semiconductor layer are a P-type semiconductor layer and an N-type semiconductor layer, respectively.

9. A method for fabricating a pseudo-vertical flip-chip light-emitting diode structure as described in claim 5, wherein the first semiconductor layer and the second semiconductor layer are an N-type semiconductor layer and a P-type semiconductor layer, respectively.

10. A method for fabricating a pseudo-vertical flip-chip light-emitting diode structure as described in claim 5, wherein the removable double-sided adhesive layer is an ultraviolet photodegradable adhesive layer or a pyrolytic adhesive layer.

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