Method and composition for etching polysilicon

Abstract

This invention provides compositions suitable for etching polycrystalline silicon in the presence of silicon oxide and silicon nitride. These compositions contain choline hydroxide, an oxidizing agent such as periodic acid, and, where appropriate, a surfactant, and are generally suitable for etching polycrystalline silicon, and particularly suitable for polycrystalline silicon trimming and exhumation operations. It has been found that the addition of the oxidizing agent can reduce the selectivity of silicon etching based on silicon crystal orientation, which can reduce the roughness and residual silicon residues, such as silicon (111) residues, after the etching step.

Description

Technical Field

[0001] The present invention relates generally to compositions and methods for selectively etching polycrystalline silicon films in the presence of silicon nitride and silicon oxide films. Prior Technology

[0002] Processing semiconductor and microelectronic devices involves various steps of depositing and removing material layers through a chemical process called "etching." During etching, a thin mask layer is placed over the deposited material layer. Openings are then formed in the mask, exposing selected portions of the substrate. The substrate, now masked, is then brought into contact with an etchant that contacts the material of the underlying substrate through the openings in the mask and chemically degrades and removes the substrate material to create openings (in three-dimensional space) within the substrate.

[0003] One such sacrificial material is polycrystalline silicon. Typical removal methods for polycrystalline silicon include dry etching and wet etching. In the case of anisotropic wet etching, alkalis such as tetramethylammonium hydroxide (TMAH) and alkali metal hydroxides have been used. However, it is undesirable to have any residual alkali metal ions on the surface of the final device product, and TMAH is not preferred due to its neurotoxin nature. In addition, TMAH and KOH exhibit higher etching rates for n-doped polycrystalline silicon than for p-doped polycrystalline silicon; this is undesirable because the removal rate of all polycrystalline silicon species is crucial for certain applications where multiple polycrystalline silicon surfaces exist.

[0004] Therefore, there is a continued need for etching compositions for the selective removal of polysilicon materials from microelectronic device substrates, especially in such substrates that also contain silicon nitride and silicon oxide surfaces. Summary of the Invention

[0005] In general, the present invention provides compositions suitable for etching polycrystalline silicon in the presence of silicon oxide and silicon nitride. These compositions comprise choline hydroxide, an oxidizing agent such as periodic acid, and, where appropriate, a surfactant, and are generally suitable for etching polycrystalline silicon, and particularly suitable for polycrystalline silicon trimming and polycrystalline silicon ablation operations. It has been found that the use of the added oxidizing agent can reduce the selectivity of silicon etching based on silicon crystal orientation, which can reduce the roughness and residual silicon residues, such as silicon (111) residues, after the etching step. In some embodiments, the device substrate contains polycrystalline silicon, silicon nitride, and silicon oxide surfaces, and the etching selectivity of polycrystalline silicon relative to silicon nitride and silicon oxide is greater than about 1000:1.

[0006] In some applications, polycrystalline silicon ranging from 1 to 10 micrometers is completely removed from trenches. For these applications, high removal rates are required to complete the process within an acceptable timeframe. Temperatures between 30°C and 90°C can be used to achieve rates greater than 100 Å per minute and process times between 15 and 360 minutes.

[0007] In other applications, it is necessary to partially remove polysilicon from microelectronic devices. In this case, as little as 50 Å can be removed. Removal rates in the range of 10-100 Å per minute are necessary to facilitate control over the amount removed. These lower rates can be achieved by processing at lower temperatures and by controlling the etchant formulation composition.

[0008] The compositions of the present invention are also used to avoid the use of TMAH, which is known to be a neurotoxin, and the use of alkali metal hydroxides such as KOH, which can cause surface contamination by mobile ions. Simple Explanation of the Diagram

[0009] Figure 1 is a graph showing the etching rate of polycrystalline silicon relative to the process temperature of a composition consisting of 14.5% by weight choline hydroxide in water.

[0010] Figure 2 is a graph showing the etching rate of PETEOS composed of a composition of 14.5% wt% choline hydroxide in water.

[0011] Figure 3 shows the selectivity of a substrate composed of polycrystalline silicon and PETEOS surfaces relative to the process temperature.

[0012] Figure 4 is a contour plot of the time required to etch 90 Å polycrystalline silicon relative to choline hydroxide concentration and Triton™ X-100. It shows the shortest time required at low Triton™ X-100 (polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether; CAS No. 9002-93-1)(Dow) and high choline hydroxide concentration.

[0013] Figure 5 shows the contour plot of roughness (Ra), measured by elliptic polarization after etching 90 Å polycrystalline silicon, as a function of the periodic acid to choline hydroxide ratio and the concentration of surfactant (Triton™ X-100). It indicates that polycrystalline silicon exhibits lower roughness when a higher concentration of surfactant (Triton™ X-100) is present in the solution.

[0014] Figure 6 is a contour plot of roughness (Ra), measured by elliptic polarization as a function of choline hydroxide ratio and surfactant (Triton™ X-100) concentration after etching 90 Å polycrystalline silicon. It shows that the polycrystalline silicon has the lowest roughness after etching with a solution containing high choline hydroxide and high Triton™ X-100 concentration.

[0015] Figure 7a shows the required cross-section of the apparatus for a process that completely removes polysilicon (polysilicon erosion). Figure 7b shows the required cross-section for a process that partially removes polysilicon (polysilicon trimming). Implementation

[0016] This invention claims priority to U.S. Provisional Patent No. 63 / 352,917, filed June 16, 2022. The priority document is incorporated herein by reference.

[0017] As used in this specification and the accompanying claims, unless the context clearly indicates otherwise, the singular forms "a / an" and "the" include a plural of indicators. As used in this specification and the accompanying claims, unless the context clearly indicates otherwise, the term "or" is generally used in its meaning as including "and / or".

[0018] The term "about" generally refers to a range of values ​​that are considered equivalent to the listed values ​​(e.g., having the same function or result). In many cases, the term "about" may include numbers rounded to the nearest significant figure.

[0019] The numerical range represented by endpoints includes all numbers contained within that range (e.g., 1 to 5 includes 1, 1.5, 2, 2.75, 3, 3.80, 4, and 5). In a first embodiment, the present invention provides a composition comprising: a. Choline hydroxide; b. Water; [] c. Oxidizing agents; and other agents to be selected as appropriate. [] d. Surfactants. []

[0020] In some embodiments, the oxidizing agent is selected from oxidizing agents such as iodates and periodic acid, permanganates and persulfates. In one embodiment, the oxidizing agent is present in an amount not exceeding about 15% by weight. In another embodiment, the oxidizing agent is periodic acid and is present in an amount of about 0.1 to about 1% by weight based on the total weight of the composition.

[0021] In one embodiment, the iodine-containing oxidant is selected from H₅IO₆, HIO₄, or a mixture thereof.

[0022] In some embodiments, the composition further comprises at least one surfactant. As used herein, the term "surfactant" refers to an organic compound that reduces the surface tension (or interfacial tension) between two liquids or between a liquid and a solid, typically an amphiphilic organic compound containing a hydrophobic group (e.g., a hydrocarbon (e.g., an alkyl "tail")) and a hydrophilic group. When present, surfactants suitable for use in the compositions described herein include (but are not limited to) amphoteric salts, cationic surfactants, anionic surfactants, zwitterionic surfactants, nonionic surfactants, and combinations thereof. Exemplary surfactants include decylphosphonic acid, dodecylphosphonic acid (DDPA), dodecylbenzenesulfonic acid (DDBSA), other R1 benzenesulfonic acids or salts thereof (wherein R1 is a straight-chain or branched C8-C18 alkyl group). Nonionic surfactants include (but are not limited to) polyoxyethylene lauryl ether, dodecenyl succinic acid monodiethanolamine, ethylenediaminetetra(ethoxylate-terminated-propoxylate)tetraol, polyethylene glycol, polypropylene glycol, polyethylene glycol ether or polypropylene glycol ether, block copolymers based on ethylene oxide and propylene oxide, polyoxypropylene sucrose ether, tri-octylphenoxypolyethoxyethanol, 10-ethoxy-9,9-dimethyldecyl-1-amine, polyoxyethylene (9) nonylphenyl ether, branched polyoxyethylene (40) nonylphenyl ether, branched dinonyl... Phenyl polyoxyethylene, nonylphenol alkoxylate, polyoxyethylene sorbitan hexaoleate, polyoxyethylene sorbitan tetraoleate, polyethylene glycol dehydrated sorbitan monooleate, dehydrated sorbitan monooleate, alcohol alkoxylate, alkyl-polyglucosides, ethyl perfluorobutyrate, 1,1,3,3,5,5-hexamethyl-1,5-bis[2-(5-norbornene-2-yl)ethyl]trisiloxane, monomeric octadecyl silane derivatives, siloxane-modified polysilazane, silicone-polyether copolymers, and ethoxylated fluorinated surfactants.Cationic surfactants include (but are not limited to) cetyl trimethylammonium bromide (CTAB), heptadecanefluorooctane sulfonic acid, tetraethylammonium, octadecyltrimethylammonium chloride, 4-(4-diethylaminophenylazo)-1-(4-nitrobenzyl)pyridine bromide, cetylpyridinium chloride monohydrate, benzalkonium chloride, benzyl dimethyl dodecyl ammonium chloride, benzyl dimethyl hexadecyl ammonium chloride, hexadecyl trimethylammonium bromide, dimethyl di(octadecyl)ammonium chloride, dodecyl trimethylammonium chloride, hexadecyl trimethylammonium chloride, p-toluenesulfonate, di(dodecyl)dimethylammonium bromide, di(hydrogenated animal fat)dimethylammonium chloride, tetraheptylammonium bromide, tetra(decyl)ammonium bromide, and oxyphenonium bromide, guanidine hydrochloride (C(NH2)2). 3Cl) or trifluoromethanesulfonates such as tetrabutylammonium trifluoromethanesulfonate, dimethyl di(octadecyl)ammonium chloride, dimethyl di(hexadecyl)ammonium bromide, di(hydrogenated animal fat)dimethylammonium chloride and polyoxyethylene (16) animal fat ethylammonium ethosulfate. The anionic surfactants covered include, but are not limited to, sodium poly(acrylate), ammonium polyacrylate, sodium polyoxyethylene lauryl ether, sodium dihexyl sulfosuccinate, sodium dodecyl sulfate, dioctyl sulfosuccinate, 2-sulfosuccinate, 2,3-dimercapto-1-propanesulfonate, sodium dicyclohexyl sulfosuccinate, sodium 7-ethyl-2-methyl-4-undecyl sulfate, phosphate fluorinated surfactants, fluorinated surfactants and polyacrylates. Zwitterionic surfactants include (but are not limited to) alkynyl diols or modified alkynyl diols, ethylene oxide alkylamines, N,N-dimethyldodecylamine N-oxide, sodium cocoamine propionate, 3-(N,N-dimethyltetradecylammonium)propanesulfonate, and (3-(4-heptyl)phenyl-3-hydroxypropyl)dimethylammonium propanesulfonate. In one embodiment, the surfactant is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.

[0023] The amount of surfactant in the etching composition can be such that, when combined with other materials in the etching composition, it will provide the desired overall performance. For example, the composition may contain a surfactant in an amount ranging from about 0.001 to about 10% by weight.

[0024] In some embodiments, the composition further comprises one or more amines, particularly amines such as primary and secondary amines. Exemplary amines include diethylenetriamine (CAS No.: 111-40-0), triethylenetetramine (CAS No.: 112-24-3), tetramethylenepentamine (CAS No.: 112-57-2), piperidine (CAS No.: 110-85-0), and piperidine (CAS No.: 110-89-4).

[0025] As used herein, the term "microelectronic device" (or "microelectronic device substrate" or simply "substrate") is used in a manner consistent with its general understanding in electronics, microelectronics, and semiconductor manufacturing technology, for example, to refer to any wide variety of different types of: semiconductor substrates; integrated circuits; solid-state memory devices; hard memory disks; read, write, and read-write heads and their mechanical or electronic components; flat panel displays; phase-change memory devices; solar panels and other products, including one or more solar cell devices; photovoltaics; and the manufacture of microelectromechanical systems (MEMS) for microelectronic, integrated circuit, energy harvesting, or computer chip applications. It should be understood that the term "microelectronic device" can refer to any in-process microelectronic device or microelectronic device substrate containing or prepared to contain functional electronic (current-carrying) structures, functional semiconductor structures, and insulating structures for the final electronic use in a microelectronic device or microelectronic assembly.

[0026] As used herein, the term "silicon nitride" is given a meaning consistent with that used in the microelectronics and semiconductor manufacturing industries. Consistent with this, silicon nitride refers to materials comprising thin films of amorphous silicon nitride, which may contain commercially available low amounts of other materials or impurities and may vary around the nominal stoichiometry of Si₃N₄. Silicon nitride can be present as part of a substrate for a microelectronic device, as a functional component of the device (e.g., as a barrier layer or insulating layer), or as a material that facilitates multi-step manufacturing processes for fabricating microelectronic devices.

[0027] As used herein, the term "silicon oxide" is given the same meaning as used in the microelectronics and semiconductor manufacturing industries. Consistent with this, silicon oxide refers to a thin film made of silicon oxide (SiO₂x), where x is between 1 and 2. Silicon oxide can be placed on a substrate by any method, such as by chemical vapor deposition from TEOS or another source, or by oxidation of silicon. Silicon oxide can advantageously contain commercially available low amounts of other materials or impurities. Silicon oxide can be present as part of a substrate for a microelectronic device, as a component of a microelectronic device, for example, as an insulating layer.

[0028] As used herein, "polysilicon" or polycrystalline Si or multi-Si should be understood by those skilled in the art as a polycrystalline form of silicon composed of multiple small silicon crystals. It is typically deposited using low-pressure chemical vapor deposition (LPCVD) and is usually doped n-type or p-type polysilicon. As will be readily understood by those skilled in the art, the degree of doping can vary from lightly doped (e.g., in the range of 10¹³ cm⁻³ to 10¹⁸ cm⁻³) to heavily doped (e.g., greater than 10¹⁸ cm⁻³). Examples of p-doped materials include polysilicon doped with dopant species from Group IIIA of the periodic table (such as boron, aluminum, gallium, and / or indium). n-doped materials can be, for example, polysilicon doped with dopant species from Group IV (silicon, germanium, or tin) or Group V (phosphorus, arsenic, antimony, or bismuth) of the periodic table.

[0029] Examples of certain etching compositions include compositions in aqueous solution form comprising, substantially comprising, or substantially comprising: choline hydroxide; an oxidizing agent, in an amount that effectively increases the etching rate of polycrystalline silicon relative to silicon nitride or silicon oxide; and, where appropriate, a surfactant. These and other exemplary compositions may comprise, consist of, or substantially comprise the listed components and, where appropriate, other components. As is customary throughout this specification, a composition of substances such as an etching composition or its components or constituents, i.e., “substantially comprising a set of specified components or materials,” means a composition containing the specified components or materials having no more than a low or insignificant amount of other components or materials, such as no more than 5, 2, 1, 0.5, 0.1, or 0.05 parts by weight of other components or materials.

[0030] In some embodiments, the compositions of the present invention do not require and may not include other types of components typically not included in etching compositions, such as pH adjusters and solid materials such as abrasives.

[0031] The compositions of the present invention can be prepared by any method suitable for producing the etched compositions as described. By means of a method, aqueous or solid components can be combined, heated where appropriate, and mixed to achieve homogeneity.

[0032] In a second embodiment, the present invention provides a method for etching polycrystalline silicon on a microelectronic device having a silicon nitride and a polycrystalline silicon surface, the method comprising subjecting the device to a composition comprising: a. Choline hydroxide; [] b. Water; [] c. Oxidizing agents; and [] d. Surfactants to be selected as appropriate; Contact is made under conditions that allow for effective etching of polycrystalline silicon.

[0033] In some embodiments, the microelectronic device substrate will further contain an exposed silicon oxide surface.

[0034] As noted above, the described composition is applicable to methods for removing polycrystalline silicon from the surface of a microelectronic device substrate. The substrate may contain other materials suitable for microelectronic devices, such as one or more of the following: insulators, barrier layers, conductive materials, semiconductive materials, or materials suitable for processing microelectronic devices (e.g., photoresists, masks, and others). An exemplary substrate has a surface comprising silicon nitride, silicon oxide, and PETEOS (an oxide deposited using plasma-enhanced tetraethyl orthosilicate) and polycrystalline silicon.

[0035] When used, the compositions of the present invention can provide suitable etching performance based on commercial performance requirements and expectations, and can provide improved performance regarding the etching rate and selectivity of polycrystalline silicon relative to silicon dioxide and silicon nitride compared to comparative etching compositions.

[0036] This method can be performed on known and commercially available equipment. Generally, to etch a substrate to selectively remove material from the substrate surface, an etching composition can be applied to the surface and brought into contact with the surface structure to selectively remove certain structures chemically.

[0037] In the etching step, the composition can be applied to the surface in any suitable manner, such as by spraying the composition onto the surface; by immersing the substrate (in a static or dynamic volume of the composition) into the etching composition; by contacting the surface with another material (e.g., a pad or fiber absorbent applicator element) on which the etching composition has been absorbed; by contacting the substrate with a certain amount of the etching composition in a circulating pool; or by any other suitable means, method, or technique to remove contact between the etching composition and the surface of a microelectronic substrate containing silicon-germanium and silicon. Applications can be made in batch or single wafer equipment for dynamic or static cleaning.

[0038] The conditions applicable to the etching process (e.g., time and temperature) can be any conditions found to be effective or advantageous. Generally, the etching composition comes into contact with the surface, such as by immersion in a bath of the etching composition for a period of time sufficient to selectively remove silicon nitride. The exposure time to the etching composition and the temperature of the etching composition are effective for the desired amount of silicon nitride removed from the substrate surface. The etching step time should not be too short, as this means that the etching rate of polysilicon may be too high, which can lead to difficulties in process control and degrade the quality of the microelectronic device at the end of the etching step. Of course, the required etching step time is preferably not too long to ensure good efficiency and throughput of the etching process and semiconductor manufacturing line. Examples of suitable times for trimming operations can be in the range of about 1 minute to about 30 minutes, and for stripping operations, about 30 minutes to about 360 minutes within the temperature range described herein. Such contact times and temperatures are illustrative, and any other suitable time and temperature conditions effective for obtaining the desired removal selectivity can be used.

[0039] The etching steps described in this specification are applicable to etching polycrystalline silicon materials from the surface of any type of substrate. Exemplary etching processes can demonstrate significantly improved polycrystalline silicon etching rates and high selectivity relative to silicon oxide and silicon nitride, greater than about 150 and in some embodiments at least about 2000 or at least about 4000.

[0040] After selective etching of the required amount of polycrystalline silicon, the etching composition remaining on the surface of the etched microelectronic device can be removed from the surface by any desired and applicable method, such as rinsing, washing, or other removal steps. For example, after etching, the microelectronic device substrate can be rinsed with deionized water (e.g., at a temperature in the range of about 20°C to about 90°C), and then dried, for example, by spin drying, N2 drying, steam drying, etc. After rinsing, the substrate surface can be measured for the presence and amount of particles on the surface.

[0041] The compositions described herein can be readily formulated by simply adding the individual components and mixing to a homogeneous state. Furthermore, the compositions can be readily formulated as single-package formulations or multi-component formulations, preferably multi-component formulations, mixed at or before use. Individual components of a multi-component formulation can be mixed at the tool or in a mixing zone / area, such as an in-house mixer or in a reservoir upstream of the tool. Consideration is given that the various components of a multi-component formulation can contain any combination of ingredients / components, which, when mixed together, form the desired removal composition. The concentration of individual components can vary widely in a specific multiple of the hemi-aqueous composition, i.e., more dilute or more concentrated, and it should be understood that the hemi-aqueous composition may differently and alternatively contain, consist of, or substantially consist of any combination of ingredients consistent with those disclosed herein. Therefore, in a third embodiment, the invention provides a kit comprising two or more of choline hydroxide, an oxidant, a surfactant (optional), and an amine (optional), in two or more containers.

[0042] The containers of the kit must be suitable for storing and transporting the semi-aqueous composition components, such as NOWPak® containers (Entegris, Inc.). One or more containers containing the components of the composition preferably include means for fluid communication of the components in the one or more containers for blending and dispensing. For example, referring to NOWPak® containers, gas pressure can be applied to the exterior of the liner in the one or more containers to expel at least a portion of the contents of the liner and thus establish fluid communication for blending and dispensing. Alternatively, gas pressure can be applied to the top space of a conventional pressurized container or pump capable of achieving fluid communication. Additionally, the system preferably includes a dispensing port for dispensing the blended composition to process tools.

[0043] Essentially chemically inert, impurity-free, flexible, and elastic polymer membrane materials, such as high-density polyethylene, can be used to manufacture the liners for one or more containers. Typically, the required liner material does not require a co-extruded layer or barrier layer, and does not require any pigments, UV inhibitors, or treatment agents, which could adversely affect the purity requirements for the components to be placed in the liner. A list of suitable liner materials includes films comprising virgin (additive-free) polyethylene, virgin polytetrafluoroethylene (PTFE), polypropylene, polyurethane, polyvinylidene chloride, polyvinyl chloride, polyacetal, polystyrene, polyacrylonitrile, polybutene, etc. The preferred thickness of these liner materials is in the range of about 5 mils (0.005 inches) to about 30 mils (0.030 inches), for example, a thickness of 20 mils (0.020 inches).

[0044] Regarding containers for kits, the disclosures of the following patents and patent applications are incorporated herein by reference in their entirety: U.S. Patent No. 7,188,644 entitled “APPARATUS AND METHOD FOR MINIMIZING THE GENERATION OF PARTICLES IN ULTRAPURE LIQUIDS” and U.S. Patent No. 6,698,619 entitled “RETURNABLE AND REUSABLE, BAG-IN-DRUM FLUID STORAGE AND DISPENSING CONTAINER SYSTEM”.

[0045] [Example] []

[0046] [Example] [1] [。] Referring to the data presented in Figures 1 to 3, a solution of 12.5% ​​by weight of choline hydroxide and water was used. The etching rates of polycrystalline silicon, silicon oxide, and silicon nitride were measured on the blanket-coated films before and after exposure to the choline hydroxide solution using elliptic polarization spectroscopy. This data shows that the selectivity of silicon oxide and silicon nitride is satisfactory at all temperatures (silicon nitride etch rate <0.1 A / min up to 80°C). The polysilicon etch rate is sufficient for applications requiring large-volume polysilicon removal at T>25°C. For applications requiring small-volume polysilicon removal, lower temperatures are preferred to allow for better control of the removal amount. [Example] [2] Referring to the data presented in Figures 4 to 6, the composition of the present invention, comprising choline hydroxide, periodic acid, and the surfactant Triton™ X-100, was tested at ambient temperature for polycrystalline silicon trimming applications. The polycrystalline silicon etching rate was measured over a series of time periods to allow interpolation of the 90 Å removal etching time. Additionally, the treated film was subjected to 90 Å removal, and the roughness (Ra) was measured using elliptic polarization. This data shows that optimal results were obtained with 2–2.4 wt% choline hydroxide, 0.04–0.05 wt% Triton™ X-100, and 0.03–0.045 wt% periodic acid.

[0047] state

[0048] In the first embodiment, the present invention provides a composition comprising: [] a. Choline hydroxide; [] b. Water; [] c. Oxidizing agents; and [] d. Surfactants to be selected as appropriate. []

[0049] In the second state sample, the present invention provides a composition of the first state sample, wherein the oxidant is selected from iodine-containing oxidants, permanganates and persulfates. []

[0050] In the third state sample, the present invention provides a composition of the second state sample, wherein the iodine-containing oxidant is selected from H5IO6, HIO4, or a mixture thereof.

[0051] In the fourth state sample, the present invention provides a composition of any one of the first to third state samples, wherein a surfactant is present and is a nonionic surfactant.

[0052] In the fifth state sample, the present invention provides a composition of any one of the first to fourth state samples, wherein a surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.

[0053] In the sixth state sample, the present invention provides a composition of any one of the first to fifth state samples, wherein the oxidant is selected from H5IO6, HIO4 or a mixture thereof, and the surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.

[0054] In the seventh state sample, the present invention provides a composition of any one of the first to sixth states samples, wherein the composition further comprises one or more amines.

[0055] In the eighth state sample, the present invention provides a composition of the seventh state sample, wherein the amine is selected from diethyltriamine, triethyltetramine, tetramethylenepentamine, piperidine, and piperidine.

[0056] In the ninth state sample, the present invention provides a composition of any one of the first to sixth states samples, comprising about 2 to about 2.4 weight percent of choline hydroxide, about 0.04 to about 0.05 weight percent of polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether and about 0.03 to about 0.045 weight percent of periodic acid based on the total weight of the composition.

[0057] In the tenth embodiment, the present invention provides a method for etching polycrystalline silicon on a microelectronic device having a silicon nitride and a polycrystalline silicon surface, the method comprising having the device with a composition comprising: a. Choline hydroxide; [] b. Water; [] c. Oxidizing agents; and [] d. Surfactants to be selected as appropriate; Contact is made under conditions that allow for effective etching of polycrystalline silicon.

[0058] In the eleventh state, the present invention provides a method for the tenth state, wherein the oxidant is selected from H5IO6, HIO4 or a mixture thereof, and the surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.

[0059] In the twelfth state, the present invention provides a method of the tenth state, wherein the composition comprises about 2 to about 2.4 weight percent of choline hydroxide, about 0.04 to about 0.05 weight percent of polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether and about 0.03 to about 0.045 weight percent of periodic acid.

[0060] In the thirteenth state, the present invention provides a method for the tenth, eleventh, or twelfth state, wherein the composition further comprises one or more amines.

[0061] In the fourteenth state, the present invention provides a method for the thirteenth state, wherein the amine is selected from diethyltriamine, triethyltetramine, tetramethylenepentamine, piperidine, and piperidine.

[0062] In the fifteenth state, the present invention provides a method of any one of the tenth to thirteenth states, wherein the method is carried out at a temperature below about 30°C.

[0063] In the sixteenth state, the present invention provides a method of any one of the tenth to thirteenth states, wherein the method is carried out at a temperature about 30°C above to about 90°C.

[0064] In the seventeenth state, the present invention provides a method for any one of the tenth to thirteenth states, wherein the microelectronic device further comprises a silicon oxide surface, and the etch selectivity of polysilicon relative to silicon nitride and silicon oxide is greater than about 1000:1.

[0065] In the eighteenth state sample, the present invention provides a method for any one of the tenth to thirteenth states, wherein the polycrystalline silicon is doped with phosphorus.

[0066] In the nineteenth state, the present invention provides a method for any one of the tenth to thirteenth states, wherein only a portion of the polycrystalline silicon is removed, and the roughness (Ra) of the obtained polycrystalline silicon surface, as measured by atomic force microscopy (AFM), does not exceed about 1 nm.

[0067] In the twentieth embodiment, the present invention provides a kit comprising one or more of choline hydroxide, water, an oxidizing agent, a surfactant, and an amine in two or more containers.

[0068] In the twenty-first state sample, the present invention provides a kit of the twentieth state sample, wherein the oxidant is selected from H5IO6, HIO4 or a mixture thereof, and the surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.

[0069] Therefore, based on the illustrative embodiments of the invention described herein, it will be readily apparent to those skilled in the art that other embodiments can be made and used within the scope of the appended claims. Many advantages of the invention covered in this document have been set forth in the foregoing description. However, it should be understood that the invention is illustrative in many respects only. Of course, the scope of the invention is defined by the language used to state the appended claims.

Claims

1. A composition for selectively etching polycrystalline silicon films in the presence of silicon nitride and silicon oxide films, comprising: a. choline hydroxide; b. water; c. an oxidizing agent; d. one or more surfactants, wherein the one or more surfactants are polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether; and e. one or more amines, as appropriate.

2. The composition of claim 1, wherein the oxidant is selected from iodine-containing oxidants, permanganates and persulfates.

3. The composition of claim 2, wherein the iodine-containing oxidant is selected from H5IO6, HIO4, or a mixture thereof.

4. The composition of claim 1, wherein the oxidant is selected from H5IO6, HIO4, or a mixture thereof.

5. The composition of claim 1, wherein one or more amines are present.

6. The composition of claim 5, wherein the one or more amines are selected from diethyltriamine, triethyltetramine, tetramethylenepentamine, piperidine, and piperidine.

7. The composition of claim 4, comprising about 2 to about 2.4% by weight of choline hydroxide, about 0.04 to about 0.05% by weight of polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether and about 0.03 to about 0.045% by weight of periodic acid, based on the total weight of the composition.

8. A method for etching polysilicon on a microelectronic device having a silicon nitride and polysilicon surface, the method comprising contacting the microelectronic device with the composition of claim 1 under conditions of effectively selectively etching polysilicon.

9. The method of claim 8, wherein the method is performed at a temperature of about 30°C to about 90°C.

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