Cylindric decomposition for efficient mitigation of substrate deformation with film deposition and ion implantation

Abstract

The disclosed systems and techniques relate to correcting out-of-plane deformation (OPD) of a substrate. These techniques include: obtaining an OPD profile of the substrate using optical inspection data; and obtaining a polynomial representation of the OPD profile to determine complex polynomial coefficients characterizing the corresponding elemental deformation shape of the substrate. The techniques further include: identifying one or more cylindrical decompositions of the quadratic part of the OPD profile; and calculating one or more properties of a stress-compensating layer (SCL) for the substrate using a selected cylindrical decomposition from the one or more cylindrical decompositions. The techniques further include: depositing the SCL on the substrate and exposing the SCL to a stress-reducing beam.

Description

Cylindrical decomposition for efficiently mitigating substrate deformation in thin film deposition and ion implantation This disclosure relates to semiconductor manufacturing, including the fabrication of wafers. Modern semiconductor devices, such as processing circuits, memory devices, photodetectors, solar cells, light-emitting semiconductor devices, and the like, are typically fabricated on silicon wafers (or other suitable substrates). The wafers may undergo many processing operations, such as physical vapor deposition, chemical vapor deposition, etching, photomasking, polishing, and / or various other operations. To continuously reduce the cost of semiconductor devices, a multilayer stack of bare dies, insulating films, patterned and / or doped semiconductor films, and / or other features is typically deposited on a single wafer, thereby creating high aspect ratio devices, for example, for three-dimensional flash memory devices and other applications. The processes of depositing, patterning, etching, polishing, etc. of the multilayer structure stack typically result in significant stress being applied to the underlying wafer. This stress can cause both out-of-plane and in-plane distortions of the wafer-supported features. These distortions can cause misalignment of the deposited features and can significantly degrade the quality of the fabricated devices. In one embodiment, disclosed is a method for correcting out-of-plane deformation of a substrate, the method comprising the steps of: obtaining an OPD profile of the substrate using optical inspection data. The method further comprises the steps of: performing a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a corresponding one of a plurality of elemental deformation shapes of the substrate. The method further comprises the steps of: identifying one or more cylindrical decompositions of a quadratic portion of the OPD profile based at least on a subset of the plurality of polynomial coefficients, wherein each of the plurality of cylindrical decompositions comprises decomposing the OPD profile into at least a parabolic deformation of the substrate and a cylindrical deformation of the substrate. The method further comprises the steps of: calculating one or more characteristics of a stress compensation layer (SCL) for the substrate using a selected one of the one or more cylindrical decompositions. The method further comprises the steps of: depositing the SCL on the substrate; and exposing the SCL to a stress mitigation beam. In another embodiment, disclosed is a system that includes a memory and a processing device communicatively coupled to the memory to perform the following operations: obtaining an out-of-plane deformation profile (OPD profile) of a substrate using optical inspection data. The processing device is further configured to: perform a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a corresponding one of a plurality of element deformation shapes of the substrate. The processing device is further configured to: identify, at least based on a subset of the plurality of polynomial coefficients, one or more cylindrical decompositions of a quadratic portion of the OPD profile, wherein each of the one or more cylindrical decompositions includes decomposing the OPD profile into at least a parabolic deformation of the substrate and a cylindrical deformation of the substrate. The processing device is further configured to: calculate, using a selected one of the one or more cylindrical decompositions, one or more characteristics of a stress compensation layer (SCL) for the substrate. The processing device is further configured to: deposit the SCL on the substrate and expose the SCL to a stress-relieving beam. In another embodiment, disclosed is a semiconductor manufacturing system that includes one or more processing chambers for processing a substrate and a computing device. The computing device is configured to: obtain an OPD profile of the substrate using optical inspection data; and obtain a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a corresponding one of a plurality of element deformation shapes of the substrate. The computing device is configured to: identify, at least based on a subset of the plurality of polynomial coefficients, one or more cylindrical decompositions of a quadratic portion of the OPD profile, wherein each of the one or more cylindrical decompositions includes decomposing the OPD profile into at least a parabolic deformation of the substrate and a cylindrical deformation of the substrate. The computing device is configured to: calculate, using a selected one of the one or more cylindrical decompositions, one or more characteristics of a stress compensation layer (SCL) for the substrate; deposit the SCL on the substrate; and expose the SCL to a stress-relieving beam. In yet another embodiment, a non-transitory computer-readable memory is disclosed having instructions stored thereon that, when executed by a processing device, cause the processing device to perform operations including the steps of: obtaining an out-of-plane deformation profile (OPD profile) of a substrate using optical inspection data. The operations further include the steps of: performing a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a respective one of a plurality of element deformation shapes of the substrate. The operations further include the steps of: identifying, at least based on a subset of the plurality of polynomial coefficients, one or more cylindrical decompositions of a quadratic portion of the OPD profile, wherein each of the one or more cylindrical decompositions includes decomposing the OPD profile into at least a parabolic deformation of the substrate and a cylindrical deformation of the substrate. The operations further include the steps of: calculating, using a selected one of the one or more cylindrical decompositions, one or more characteristics of a stress compensation layer (SCL) for the substrate. The operations further include the steps of: depositing the SCL on the substrate; and exposing the SCL to a stress-relieving beam. The prior art includes various methods for solving wafer deformation. For example, a film that applies compressive or tensile stress to a wafer can be coated on the other side (referred to herein as the back side or bottom side) of a deformed (warped) wafer having various thin films and features deposited on one side (referred to herein as the front side, top side, or major side). Such a back-side deposited deformation correction film (also referred to herein as a stress compensation layer or stress compensation film) typically applies a uniform (or global) stress to the entire wafer and cannot compensate for local stress modulation and / or anisotropic stress. Additional correction can be achieved by implanting ions into the stress compensation layer (e.g., using an ion beam to bombard the stress compensation layer) to adjust the stress in the stress compensation layer, thereby further reducing the deformation of the underlying wafer. As used herein, "wafer" refers to any substrate or the surface of a material formed on a substrate, on which thin film processing is performed during the manufacturing process. For example, depending on the application, the wafer surface on which processing can be performed includes materials such as silicon, silicon oxide, silicon nitride, strained silicon, silicon-on-insulator structures, carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials (such as metals, metal nitrides, metal alloys, and other conductive materials). Wafers include, but are not limited to, semiconductor wafers. In some cases, a wafer can include a plastic substrate. A wafer can be exposed to a pre-treatment process to polish, etch, reduce, oxidize, hydroxylate, anneal, ultraviolet cure, electron beam cure, and / or bake the substrate surface. In addition to performing thin film processing directly on the surface of the wafer itself, any of the disclosed thin film processing steps can also be performed on an underlying layer formed on the wafer, as disclosed in more detail below, and the term "wafer surface" is intended to include such underlying layers as indicated by the context. Thus, for example, if a thin film / layer or a portion of a thin film / layer has been deposited onto the wafer surface, then the exposed surface of the newly deposited thin film / layer becomes the wafer surface. In some embodiments, the thickness of the wafer is in the range of 0.25 millimeters to 1.5 millimeters, or in the range of 0.5 millimeters to 1.25 millimeters, or in the range of 0.75 millimeters to 1.0 millimeters, or thicker. In some embodiments, the diameter of the wafer is about 10 centimeters, 20 centimeters, 30 centimeters, or larger. Combining ion implantation to deposit a stress compensation layer can be quite efficient in correcting uniform and isotropic stress ( ). On the other hand, alleviating stress ( ) that varies with position on the wafer ), anisotropic stress ( ), or both is a more challenging problem. Certain specific patterns may result in compressive stress along one direction (e.g., ) and tensile stress along the perpendicular direction ( ), thereby producing a saddle-shaped wafer, such as shown in FIG. 5. Such saddle-shaped features may occur, for example, in a material stack having directional patterning (such as patterning of word lines in flash memory elements). Correcting such anisotropic saddle-shaped deformations in a wafer remains a difficult task. Aspects and embodiments of the present disclosure address these and other challenges of modern semiconductor manufacturing technologies by providing systems and techniques that can efficiently alleviate non-uniform and / or anisotropic stress and deformation of a wafer. Wafer deformation can be represented (decomposed) into quadratic contributions and residual (non-quadratic) contributions The combination. The secondary deformation may include a parabolic (paraboloid) portion and a saddle portion The parabolic (paraboloid) portion has perfect axial symmetry, and the saddle portion has discrete symmetries, including 180-degree rotation and mirror symmetry related to reflection in two perpendicular planes. The parabolic deformation has a uniform (position-independent) axisymmetric strain tensor where is the vertical coordinate of the position of the specified stress inside the wafer. For the unpatterned back side of the wafer, the vertical coordinate is where is the thickness of the wafer. According to Hooke's law, the corresponding strain tensor for the parabolic deformation is the same, where and are the Young's modulus and Poisson's ratio of the wafer material, respectively. The uniform strain associated with the parabolic deformation can be compensated by depositing a stress-compensating film of uniform thickness The stress-compensating film applies an equal and opposite stress to the parabolic stress of the wafer on the back side of the film. The thickness of the film can be calculated (or determined empirically) to apply the required target stress to the back side of the wafer. For example, if then the parabolic bow of the wafer bends upward, resulting in compression on the top side of the wafer and tension on the back side of the wafer. Correspondingly, a film that applies a compressive stress to the wafer can be deposited on the back side of the wafer to reduce (or eliminate) the tension on the back side of the wafer. Conversely, if then the back side of the wafer is compressed, and a film that applies a tensile stress to the back side of the wafer can be used to reduce (or eliminate) the tension on the back side. The saddle deformation and stress are non-uniform and change sign four times around the perimeter of the wafer, for example , and thus cannot be eliminated solely by depositing a stress compensation film. In some embodiments, the thickness and material of the stress compensation film can not only eliminate the parabolic bowing, but also convert the saddle-shaped deformation into a cylindrical deformation with a definite sign throughout the entire area of the wafer. Then, the cylindrical deformation with a uniform sign (and the remaining higher-order non-quadratic deformation) can be alleviated by implanting ions into the film. As described in this disclosure, by decomposing the quadratic deformation into a parabolic component and a cylindrical component, a suitable stress compensation film can be identified. As will be disclosed in more detail below, this decomposition is not unique, since the resulting cylindrical deformation can be chosen to be positive (upward) or negative (downward). Identifying two such decompositions enables the selection of a more effective decomposition for subsequent film deposition and ion implantation. In one embodiment, the vertical profile of the wafer deformation can be measured using optical metrology techniques. For example, optical interferometry can be used to obtain an interferogram of the profile . The wafer profile can then be represented by a plurality of parameters that qualitatively and quantitatively characterize the geometry of the wafer deformation . In some embodiments, a set of Zernike (or a similar set of) polynomials can be used to represent the wafer profile, where is the radial coordinate, is the polar angle coordinate in the (average) plane of the wafer. The successive coefficients , , , … represent the weights of the specific geometric features (elemental deformations) of the wafer described by the corresponding Zernike polynomials , , , … The first three coefficients are less important because they describe the uniform translation of the wafer (coefficient , associated with the polynomial), a non-deforming tilt equivalent to a rotation about the axis (coefficient , associated with the polynomial), and a non-deforming tilt equivalent to a rotation about the axis (coefficient , associated with the polynomial), and these coefficients can be eliminated by realigning the coordinate axes. (The Noll indexing scheme for Zernike polynomials is used herein.) The fourth coefficient is associated with and characterizes an isotropic paraboloidal deformation ("bow"). The fifth coefficient and the sixth coefficient are respectively associated with and polynomials and characterize saddle - type deformations. The coefficient characterizes an upward bending ( ) or downward bending ( ) along the diagonal ) and a downward bending ( ) or upward bending ( ) along the diagonal ) of the saddle shape. The coefficient characterizes an upward bending ( ) or downward bending ( ) along the axis and a downward bending ( ) or upward bending ( ) along the axis of the saddle shape. Higher coefficients ,, etc. characterize the wafer deformation changing more and more rapidly along the radial direction, along the azimuthal direction, or both, and together represent the residual deformation . FIG. 2 shows an actual deformation (upper left) of a wafer, in arbitrary units, being example Zernike polynomial decomposed 200 into a paraboloidal bow deformation (upper right), a saddle deformation (lower left), and a residual deformation (lower right). In some embodiments, the thickness of the stress - compensating film can be selected based on the value of the paraboloidal bow coefficient . FIGS. 1A - 1E schematically show the process of stress correction of a back - side deposited film with additional ion implantation according to at least one embodiment. FIG. 1A depicts a wafer 102 with a deformation, which may include a paraboloidal bow deformation (with a negative coefficient ) and other deformations, such as saddle-shaped deformation and residual deformation (both are not shown in FIGS. 1A-1E for the sake of simplicity and easy viewing). The wafer 102 has a front side 104 and a back side 106. Any number of features (such as deposited and / or etched patterns), dies, photomasks, and / or any other structures can be deposited on or etched in the front side 104. In some embodiments, the back side 106 may have no deposited / etched features / structures. In some embodiments, the back side 106 may also have one or more deposited / etched features / structures. FIG. 1B schematically shows the deposition of a stress compensation layer on the back side of the wafer 102. In some embodiments, the stress compensation layer 108 may include one or more thin films of different materials. The thickness of an individual thin film may be in the range of 10 nanometers to 200 nanometers, or in the range of 20 nanometers to 180 nanometers, or in the range of 30 nanometers to 160 nanometers, or in the range of 40 nanometers to 140 nanometers, or greater. The total thickness of the stress compensation layer may be up to several micrometers or even thicker. In some embodiments, the stress compensation layer 108 is deposited at a temperature in the range of 100 °C to 500 °C or higher. The material (type) of the stress compensation layer 108 can be selected based on the sign of the coefficient . For example, for a negative bow, , and the stress compensation layer 108 can be selected to have tensile stress (as shown in FIGS. 1A-1E). For a silicon wafer, such a thin film can be silicon nitride (Si 3 N 4 ) thin film. Conversely, for a positive bow, , and the stress compensation layer 108 can be selected to have tensile stress (not shown in FIGS. 1A-1E). The stress compensation layer 108 can be deposited using any suitable deposition technique, including physical vapor deposition (such as sputtering), chemical vapor deposition (such as plasma-assisted deposition), epitaxy, lift-off, and / or similar techniques. The deposition can be performed at room temperature or at a temperature different from room temperature (such as high temperature). In some embodiments, the thickness of the stress compensation layer 108 can be selected to over-correct the deformation to some extent. For example, as shown in FIG. 1C, where a negative parabolic bow becomes a positive parabolic bow. Thickness-dependent parabolic bow correction changes the wafer deformation from to . Over-correction is selected in combination with the implant species, energy, and dose to ensure maximum benefit from stress compensation. Over-correction makes the combined structure of the wafer 102 and the stress compensation layer 108 vulnerable to further control of the stress (and thus vulnerable to control of the wafer deformation (further control). As shown in FIG. 1D, an ion beam implanter 110 can generate an ion beam 112 that impinges on the stress compensation layer 108 and deposits ions therein. The ion beam 112 can carry silicon ions, phosphorus ions, argon ions, neon ions, xenon ions, krypton ions, and / or similar ions. In some embodiments, the energy and type of ions in the ion beam 112 can be selected to confine the implanted ions within the volume of the stress compensation layer 108 without allowing the ions to reach the wafer 102. The ions trapped in the stress compensation layer 108 create substitutional defects therein. In addition, the ions also leave traces of vacancy defects along the propagation path in the stress compensation layer 108. The substitutional defects and / or vacancies modify (e.g., reduce) the stress in the stress compensation layer 108 and can reduce the degree of stress overcorrection caused by thin film deposition. This results in flattening of the combination of the wafer 102 and the stress compensation layer 108. Although, for the sake of concreteness, the stress-relieving beam used to modify the stress in the stress compensation layer 108 is referred to as an ion beam (such as ion beam 112), throughout this disclosure, the stress-relieving beam can include other material particles (such as electrons), electromagnetic waves (such as ultraviolet light, visible light, infrared light, etc.), and / or suitable combinations thereof. The stress-relieving beam impinges on the stress compensation layer 108 and changes the bonding network of the stress compensation layer 108. For example, a low-energy stress-relieving beam can interact with the surface atoms of the stress compensation layer 108, such as removing some surface atoms, thereby effectively etching the surface region of the stress compensation layer 108. The effectiveness of such etching can be controlled by selecting the ion species / free radicals / environmental gas. In another example, a high-energy stress-relieving beam can deposit ions within the stress compensation layer 108. The ions and / or photons can break the bonds of the bonding network (or lattice) of the stress compensation layer 108, thereby forming vacancies therein, and can further cause annealing due to local heating, ultraviolet curing, and / or other effects. In some embodiments, simulation (performed as described in more detail below) can be used to determine the number of ions deposited per small area of the wafer based on the locally corrected value of the deformation which can include saddle-shaped deformation, residual deformation, and the parabolic bowing deformation portion that has been overcorrected by the deposition of the stress compensation layer 108 The desired local density of ions can be delivered by controlling the scanning speed of the ion beam 112 In some embodiments, the profile of the ion beam 112 can be approximated by a Gaussian function, e.g., the ion flux where and and are Cartesian coordinates, is the maximum ion flux at the beam center, and are the characteristic spreads of the beam along the axis and axis, respectively. Correspondingly, a point located at a distance from the beam center path receives an ion dose including the following number of ions: Correspondingly, by reducing the scanning speed , the number of ions received by various regions of the stress compensation layer 108 can be increased, and vice versa. In addition, the ion beam 112 can perform multiple scans with different offsets such that various points of the stress compensation layer 108 receive multiple doses of ions with different coefficients , and these coefficients can be averaged to the target dose. For example, after the ion beam implanter 110 passes n times (each time at a different distance from the center of the ion beam 112 at a corresponding speed over an area ), the total ion dose received by this area will be As shown in FIG. 1E, the implanted layer 114 formed as part of the stress compensation layer 108 significantly reduces the deformation of the wafer 102, particularly its saddle-shaped and residual parts. FIG. 3 shows stress and deformation reduction 300 in an example wafer using the process disclosed in FIGS. 1A - 1E according to at least one embodiment. As shown in FIG. 3, first, a 30 cm silicon wafer 102 having with the maximum negative deformation is overcorrected to with the maximum deformation using a silicon nitride tensile stress compensation layer 108. Then, by forming the implanted layer 114 with an ion beam, the stress in the stress compensation layer 108 is reduced, resulting in with the final maximum deformation. FIG. 4 shows an example profile 400 of a Gaussian ion beam 112 that can be used for stress and deformation reduction in a wafer according to at least one embodiment. The techniques for strain and deformation reduction shown in FIGS. 1 - 3 can also be applied to wafers with complex deformations, where the stress tensor components and have different signs, resulting in the wafer having a saddle-shaped deformation. FIG. 5 shows an example wafer 500 with a saddle-shaped deformation (e.g., a silicon wafer with a silicon nitride thin film deposited thereon) according to at least one embodiment. As seen in the cross-sectional view 502, the stress components in the wafer (top layer) may be lower than the stress component in the thin film (bottom layer) deposited on the back side of the wafer . Conversely, as shown in the cross-sectional view 504, the stress component in the wafer may be higher than the stress component in the thin film . In some embodiments, the stress state in the wafer can be represented by a position-dependent stress tensor, which can be approximated as: This structure of the stress tensor is generally a good approximation because the wafer is generally in a state of pure bending and is independent of the shear stress represented by the off-diagonal terms in the stress tensor. Correcting the saddle shape requires special handling during dose map calculation and optimization to ensure that no additional residual terms are introduced into the wafer due to this. FIG. 6A shows an example circular cylinder decomposition 600 of the quadratic part of wafer deformation according to at least one embodiment. As described above, the deformation of the wafer can be decomposed via Zernike polynomials, for example, decomposed into (omitting the constant translation term in): where and higher-order terms are included in the residual contribution , and for the sake of brevity, this residual contribution is omitted hereafter. The deformation of the wafer can be represented in an equivalent form as: where . The value is the azimuth angle of the steepest upward or downward direction of the saddle-shaped part of, which rise or fall includes saddle and saddle combination. The angle can be between and . The shape of the cylindrical deformation is characterized by the following deformation: where the parameter 's sign determines whether the cylinder is upward ( ) or downward ( ), 's magnitude determines the radius of curvature of the cylinder, and (varying within the value range of ) determine the direction along which the wafer bends (in the plane); this direction is perpendicular to the axis of the cylinder (the angles and are calculated starting from the axis). Correspondingly, any quadratic wafer deformation can be decomposed into parabolic segments and a right circular cylinder ( ) deformation in combination: coefficients and are obtained by matching the Zernike decomposition with : Depending on the sign and magnitude of the coefficient , the coefficient can be positive or negative. Example 600 of FIG. 6A shows a wafer deformation 602 which, for simplicity and ease of viewing, has a saddle component with and no parabolic segment component ( ). A three-dimensional (3D) view 612 of the deformation 602 is also shown in FIG. 6A. As disclosed above, the deformation 602 can be decomposed into a negative parabolic deformation 604 (3D view 614) and a right circular cylinder deformation 606 (3D view 616). The right circular cylinder deformation 606 has a minimum along the axis. Alternatively, the same deformation can be decomposed into a combination of a parabolic segment deformation and a negative circular cylinder deformation: Then, the coefficients and are obtained as: Depending on the sign and magnitude of the coefficient , the coefficient can be positive or negative. FIG. 6B shows an example negative circular cylinder decomposition 601 of the quadratic part of a wafer deformation according to at least one embodiment. The decomposition 601 of FIG. 6B represents the decomposition 602 as the sum of a positive parabolic deformation 605 (3D view 615) and a negative circular cylinder deformation 607 (3D view 617). The absolute value of the negative circular cylinder deformation 607 has a maximum along the axis. In the case where the wafer has an arbitrary parabolic segment and an arbitrary saddle orientation, both a right circular cylinder decomposition (described by the parameters , and identified above) and a negative circular cylinder decomposition (parameters , and ) can be evaluated. Then, a better decomposition can be selected. Since for both decompositions, , the selection can include identifying the one with Decomposition of the smaller value. For example, once the decomposition with the smaller is selected, the sign can be evaluated. If (indicating a positive bow), a tensile stress compensation film for compressing the back surface of the wafer can be selected. Conversely, if (indicating a negative bow), a compressive stress compensation film for stretching the back surface of the wafer can be selected. In some embodiments, a certain type of film may be preferred. For example, a tensile film may be preferred over a compressive film (and vice versa). In such an instance, the decomposition of with the corresponding sign can be selected if the of this sign is available. (If and have the same sign, then the decomposition with the smaller value can be preferred.) In some embodiments, the strength of the stress compensation film can be selected based on both and . For the reasons described above, it may be advantageous to ensure that the signs of the film-corrected deformations of the wafer are the same. For example, if a film of a specific type and thickness causes the deformation of the wafer to be modified, then the total corrected deformation of the wafer after film deposition can be: In one example, if the wafer has a negative parabolic bow deformation , and it has been determined that the film is to be of a type that stretches the back surface of the wafer ( ), then the thickness of the film can be selected such that: to ensure that the film-corrected deformation of the entire area of the back surface of the wafer . Specifically, if the film is selected such that , then the deformation of the wafer will be corrected to zero along the axis ( ), and overcorrected by along other lines, where the maximum overcorrection occurs along the axis ( ). Then, the overcorrection can be addressed by targeted ion implantation to relax the strain in the stress compensation film. For example, where the maximum ion implantation occurs near the point ( ), and the minimum ion implantation occurs near the point , where is the radius of the wafer. In some embodiments, the secondary deformation of a wafer can be quantitatively characterized by the degree of coexistence of parabolic deformation and cylindrical deformation. In a non-limiting embodiment, a "cylindrical" polynomial (which has the same normalization as the Zernike polynomial) can be introduced: such that the secondary deformation can be expressed as: Correspondingly, the value can be referred to as the parabolicity of the wafer, and the value can be referred to as the cylindricality of the wafer. In some embodiments, the type and thickness of the stress compensation film can be directly determined based on the parabolicity , cylindricality and / or based on the ratio . FIG. 7 is a flowchart showing an example process 700 for reducing wafer deformation using cylindrical decomposition according to at least one embodiment. Process 700 can be performed using a semiconductor manufacturing system that includes one or more processing chambers, such as deposition chambers, plasma chambers, etching chambers, polishing chambers, thin film removal chambers, beam irradiation chambers, optical inspection chambers, and / or similar chambers. The processing chambers can be connected to one or more transfer chambers that can be equipped with robots to transport wafers, such as moving wafers into and out of the processing chambers. The transfer chambers can be further connected to a load-lock chamber (front end interface) that can be coupled to one or more front opening unified pod (FOUP) carriers that hold bare wafers, processed wafers, partially processed wafers, and / or similar wafers. Operations performed by the semiconductor manufacturing system (including any, part, or all of the operations of process 700) can be performed in response to instructions issued by a suitable computing device having processing logic and a memory for storing the instructions. At block 710, process 700 includes the steps of: measuring the shape of the wafer, such as the displacement of the surface of the wafer (e.g., top surface or back surface) as a function of any suitable in-plane coordinates (e.g., polar coordinates , Cartesian coordinates or some other coordinates). At block 720, process 700 includes the steps of: representing the determined shape via a suitable set of polynomials (e.g., Zernike polynomials) and obtaining a set of polynomial expansion coefficients, , each coefficient in the set characterizing the degree of presence of a particular elemental geometry in the wafer deformation. At block 730, the coefficients The decomposition of the wafer deformation is obtained as the sum of at least a parabolic deformation and a cylindrical deformation, for example, as disclosed in more detail above. The obtained cylindrical decomposition may include a positive cylindrical decomposition and a negative cylindrical decomposition. At block 740, the obtained cylindrical decomposition can be evaluated, and a preferred cylindrical decomposition can be selected for implementation via thin film deposition. The preferred cylindrical decomposition can be selected based on various metrics. For example, a cylindrical decomposition that requires the least corrective parabolic bow (which still keeps the stress having the same sign throughout the wafer area) can be selected; a cylindrical decomposition that requires a specific type of thin film (such as a tensile thin film or a compressive thin film) can be selected; a cylindrical decomposition that is most aligned (or misaligned) with specific features patterned on the top side of the wafer can be selected; and / or similar selections. At block 750, process 700 can continue to identify the properties (such as material type, thickness, etc.) of the target stress compensation layer (thin film) to be deposited on the wafer. At block 760, process 700 can include depositing a thin film made of the selected material and having the selected thickness on the wafer. The deposited thin film can make the stress tensor in the new wafer plus thin film structure have a specific sign (positive or negative). This is advantageous because subsequent ion implantation can reduce the stress amount in the thin film, and it may be difficult to reverse the sign of the stress in the thin film with ion implantation (for example, converting a tensile thin film into a compressive thin film). At block 780, process 700 can continue to determine the appropriate dosage of ion (electron, photon, etc.) implantation. In some embodiments, the ion implantation dosage can be determined based on the saddle component (and / or the remaining parabolic component) of the wafer deformation that has not been eliminated by the thin film deposition (for example, the saddle component given by the coefficients of the selected and applied cylindrical decomposition, a suitable combination of Zernike coefficients (such as ) and / or similar coefficients). In some embodiments, the ion implantation dosage can be further selected to eliminate (or reduce) higher-order residual deformations. In some embodiments, the operation of block 780 can be performed based on the wafer deformation data obtained at block 710 before the thin film deposition. In some embodiments, the operation of block 780 can be performed based on the new data obtained by re-measuring (block 770) the corrected (by the thin film) deformation of the wafer after the thin film deposition. At block 790, ion implantation is performed, for example, by exposing the thin film to a stress-relieving beam (such as an ion beam), as disclosed below in connection with FIGS. 8A - 8B. As indicated by the dashed arrow in FIG. 7, the blocks 770 - 790 of process 700 can be iteratively repeated until the stress or deformation of the wafer is reduced below the target tolerance. FIG. 8A schematically shows an ion implantation system 800 capable of performing ion implantation into a stress compensation layer according to at least one embodiment. The ion implantation system 800 may be or include the ion beam implanter 110 of FIG. 1. Although for the sake of specificity, the stress-relieving beam for modifying the stress in the stress compensation layer 108 is referred to as an ion beam (such as ion beam 112), in some embodiments, the stress-relieving beam may include other material particles (such as electrons), electromagnetic waves (such as ultraviolet light, visible light, infrared light, etc.), and / or suitable combinations thereof. The ion implantation system 800 may include an ion source 802 for generating an ion beam 804. The ion source 802 may include a chamber (such as a plasma chamber) for generating ions. The ion source 802 may be powered by a power supply 806 and may include an extraction electrode assembly (not shown). The ion implantation system 800 may include a mass spectrometer 808 and a collimation and focusing column 810. The collimation and focusing column 810 may direct the ion beam 112 to the wafer 102. The wafer 102 may be supported by a support stage 812. In some embodiments, during the scanning of the wafer 102 by the ion beam 112, the support stage 812 and the wafer 102 may remain stationary while the components of the ion implantation system 800 may be repositioned relative to the wafer 102. In some embodiments, the ion implantation system 800 may remain stationary while the support stage 812 may reposition the wafer 102. The ion beam 112 may be scanned in multiple directions, for example, along the axis and along the axis, for example, scanning back and forth along the axis, scanning in a spiral pattern, etc. In various embodiments, the ion beam 112 may be scanned at a frequency of several hertz, several tens of hertz, several hundreds of hertz, several kilohertz, or higher.The operation of the ion implantation system 800 can be controlled by a controller 814, which can include any suitable computing device, microcontroller, or any other processing device having a processor (such as a central processing unit (CPU), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), and / or similar components) and memory elements (such as random access memory (RAM), read only memory (ROM), flash memory, and / or similar components) or any combination thereof. The controller 814 can control the operation of the power supply 806, the support stage 812, and / or various other components and modules of the ion implantation system 800. The controller 814 can include an ion beam simulation module 816 that is capable of performing simulations to determine the target intensity of the ion beam 112 to be used to mitigate various wafer deformations. In some embodiments, the support stage 812 can apply a tilt (e.g., in one or two spatial directions) to the wafer 102 to change the angle of incidence of the ion beam 112 relative to the wafer 102. In some embodiments, the controller 814 can tilt the ion implantation system 800 relative to the wafer 102 instead of tilting the wafer 102. In some embodiments, for example, as shown in FIG. 8B, the support stage 812 can apply a tilt (e.g., in one or two spatial directions) to the wafer 102 to change the angle of incidence of the ion beam 112 relative to the wafer 102. In some embodiments, the controller 814 can tilt the ion implantation system 800 relative to the wafer 102 instead of tilting the wafer 102. FIG. 9 depicts a block diagram of an example computer system 900 capable of supporting the operations of the present disclosure in accordance with at least one embodiment. In various illustrative examples, the example computer system 900 can be or include the controller 814 of FIG. 8. The example computer system 900 can be connected to other computer systems in a LAN, an intranet, an extranet, and / or the Internet. The computer system 900 can operate as a server in a client-server network environment. The computer system 900 can be a personal computer (PC), a set-top box (STB), a server, a network router, a switch, or a bridge, or any device capable of executing a set of instructions (sequentially or otherwise) that specify actions to be taken by that device. Further, although only a single example computer system is illustrated, the term "computer" shall also be deemed to include any collection of computers that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methods discussed herein. Example computer system 900 may include a processing device 902 (also referred to as a processor or CPU) that can communicate with each other via a bus 930 (the processing device may include processing logic 926), a main memory 904 (such as read-only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous dynamic random access memory (SDRAM), etc.), a static memory 906 (such as flash memory, static random access memory (SRAM), etc.), and an auxiliary memory (such as a data storage device 918). The processing device 902 represents one or more general-purpose processing devices, such as a microprocessor, a central processing unit, or the like. More specifically, the processing device 902 may be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing other instruction sets, or a processor implementing a combination of instruction sets. The processing device 902 may also be one or more special-purpose processing devices, such as an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a digital signal processor (DSP), a network processor, or the like. According to one or more aspects of the present disclosure, the processing device 902 may be configured to execute instructions implementing the example process 700 of reducing wafer deformation using cylindrical decomposition. Example computer system 900 may further include a network interface device 908, which may be communicatively coupled to a network 920. Example computer system 900 may further include a video display 910 (such as a liquid crystal display (LCD), a touch screen, or a cathode ray tube (CRT)), an alphanumeric input device 912 (such as a keyboard), a cursor control device 914 (such as a mouse), and an acoustic signal generating device 916 (such as a speaker). The data storage device 918 may include a computer-readable storage medium (or more specifically, a non-transitory computer-readable storage medium) 924, on which one or more sets of executable instructions 922 are stored. According to one or more aspects of the present disclosure, the executable instructions 922 may include executable instructions for implementing the example process 700 of reducing wafer deformation using cylindrical decomposition. The executable instructions 922 may also reside entirely or at least partially in the main memory 904 and / or the processing device 902 during the execution of these instructions by the example computer system 900, and the main memory 904 and the processing device 902 also constitute a computer-readable storage medium. The executable instructions 922 may further be transmitted or received over the network via the network interface device 908. Although the computer-readable storage medium 924 is shown as a single medium in FIG. 9, the term "computer-readable storage medium" should also be regarded as including a single medium or multiple media (such as a centralized or distributed database and / or associated cache memory and servers) that store one or more sets of operation instructions. The term "computer-readable storage medium" should also be regarded as including any medium that is capable of storing or encoding a set of instructions for execution by a machine, which causes the machine to perform any one or more of the methods described herein. Thus, the term "computer-readable storage medium" should be regarded as including (but not limited to) solid-state memory and optical and magnetic media. Some portions of the detailed description above are presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means used by those skilled in the data processing art to most effectively convey the substance of their work to others skilled in the art. Here, in general, an algorithm is considered to be a self-consistent sequence of steps that leads to a desired result. These steps are those requiring physical manipulation of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like. However, it should be borne in mind that all of these and similar terms are to be associated with appropriate physical quantities and are merely convenient labels applied to these quantities. Unless otherwise specifically stated, it should be understood from the following discussion that, throughout the description, discussions using terms such as "identifying," "determining," "storing," "adjusting," "causing," "returning," "comparing," "creating," "stopping," "loading," "copying," "throwing," "replacing," "executing," or similar terms, refer to the actions and processes of a computer system or similar electronic computing device that manipulates and transforms data represented as physical (electronic) quantities within the registers and memory of the computer system into other data similarly represented as physical quantities within the memory or registers of the computer system or other such information storage, transmission, or display devices. Examples of the present disclosure are also related to an apparatus for performing the methods described herein. This apparatus may be specifically constructed for the required use, or it may be a general-purpose computer system selectively programmed by a computer program stored in the computer system. Such a computer program may be stored in a computer-readable storage medium, such as but not limited to any type of disk (including optical disks, CD-ROMs, and magneto-optical disks), read-only memory (ROM), random access memory (RAM), EPROM, EEPROM, magnetic disk storage media, optical storage media, flash memory components, other types of machine-accessible storage media, or any type of medium suitable for storing electronic instructions, each of which is coupled to the computer system bus. The methods and displays presented herein have no inherent association with any particular computer or other device. A variety of general-purpose systems may be used with programs in accordance with the teachings herein, or it may prove convenient to construct a more specialized device to perform the required method steps. The structure required for various such systems will appear in the elucidation in the following description. Additionally, the scope of the present disclosure is not limited to any particular programming language. It will be understood that various programming languages may be used to implement the teachings of the present disclosure. It is to be understood that the above description is intended to be illustrative, not restrictive. After reading and understanding the above description, many other example embodiments will be apparent to those skilled in the art. Although the present disclosure describes specific examples, it will be recognized that the systems and methods of the present disclosure are not limited to the examples described herein, but may be practiced with modifications within the scope of the appended claims. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense. Thus, the scope of the present disclosure should be determined with reference to the appended claims and the entire scope of equivalents to such claims. 102: Wafer 104: Front side 106: Rear side 108: Stress compensation layer 110: Ion beam implanter 112: Ion beam 114: Implanted layer 200: Zernike polynomial decomposition 300: Stress and deformation reduction 500: Wafer 502: View 504: View 600: Decomposition 601: Decomposition 602: Decomposition 604: Negative parabolic deformation 605: Positive parabolic deformation 606: Positive cylindrical deformation 607: Negative cylindrical deformation 612: 3D view 614: 3D view 615: 3D view 616: 3D view 617: 3D view 700: Process 710: Block 720: Block 730: Block 740: Block 750: Block 760: Block 770: Block 780: Block 790: Block 800: Ion implantation system 802: Ion source 804: Ion beam 806: Power supply 808: Mass spectrometer 810: Collimation and focusing column 812: Support stage 814: Controller 816: Ion beam simulation module 900: Computer system 902: Processing device 904: Main memory 906: Static memory 908: Network interface device 910: Video display 912: Alphanumeric input device 914: Cursor control device 916: Signal generation device 918: Data storage device 920: Network 922: Instruction 924: Computer-readable storage medium 926: Processing logic 930: Bus d: Thickness The present disclosure can be more fully understood from the following detailed description and the accompanying drawings of various embodiments of the present disclosure. FIGS. 1A-1E schematically illustrate a process for stress correction of a rear-side deposited thin film by additional ion implantation according to at least one embodiment. FIG. 2 shows an example Zernike polynomial decomposition of an actual deformation (upper left) of a wafer into a parabolic bow deformation (upper right), a saddle deformation (lower left), and a residual deformation (lower right) in arbitrary units according to at least one embodiment. FIG. 3 shows stress and deformation reduction in an example wafer using the process disclosed in FIGS. 1A-1E according to at least one embodiment. FIG. 4 shows an example profile of a Gaussian ion beam that can be used for stress and deformation reduction in a wafer according to at least one embodiment. FIG. 5 shows an example silicon wafer having a silicon nitride thin film deposited thereon and having a saddle-shaped deformation according to at least one embodiment. FIG. 6A shows an example positive cylindrical decomposition of the quadratic part of a wafer deformation according to at least one embodiment. FIG. 6B shows an example negative cylindrical decomposition of the quadratic part of a wafer deformation according to at least one embodiment. FIG. 7 is a flowchart showing an example process of using cylindrical decomposition to mitigate wafer deformation in accordance with at least one embodiment. FIG. 8A schematically shows an ion implantation system capable of performing ion implantation into a stress compensation layer in accordance with at least one embodiment. FIG. 8B shows ions being delivered to a wafer at an arbitrary incident angle by the ion implantation system of FIG. 8A in accordance with at least one embodiment. FIG. 9 depicts a block diagram of an example computer system capable of supporting the operations of the present disclosure in accordance with at least one embodiment. Domestic deposit information (please note in the order of depository, date, number) None Foreign deposit information (please note in the order of depositing country, institution, date, number) None 600: Decomposition 602: Decomposition 604: Negative parabolic deformation 606: Positive cylindrical deformation 612: 3D drawing 614: 3D drawing 616: 3D drawing

Claims

1. A method for correcting an out-of-plane deformation (OPD) of a substrate, the method comprising the steps of: obtaining an OPD profile of the substrate using optical inspection data; obtaining a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a corresponding element deformation shape among a plurality of element deformation shapes of the substrate; identifying one or more cylindrical decompositions of a quadratic portion of the OPD profile based at least on a subset of the plurality of polynomial coefficients, wherein each of the one or more cylindrical decompositions includes decomposing the OPD profile into at least a parabolic deformation and a cylindrical deformation of the substrate; calculating one or more properties for a stress compensation layer (SCL) for the substrate using a selected cylindrical decomposition of the one or more cylindrical decompositions; depositing the SCL on the substrate; and exposing the SCL to a stress-reducing beam.

2. The method of claim 1, wherein the polynomial representation of the OPD profile includes an expansion of the OPD profile via a Zernike polynomial.

3. The method as described in claim 1, wherein the one or more cylindrical decompositions comprise: A first cylindrical decomposition includes an upward cylindrical contribution of the OPD to the substrate; And a second cylindrical decomposition, including a downward cylindrical contribution of the OPD to the substrate.

4. The method of claim 3, wherein the selected cylindrical decomposition includes a parabolic contribution of the OPD to the substrate, the parabolic contribution having a lower magnitude among the parabolic contributions of the OPD to the one or more cylindrical decompositions.

5. The method of claim 3, wherein the selected cylindrical decomposition is associated with a patterning direction of the substrate.

6. The method of claim 1, wherein the one or more characteristics of the SCL are calculated to give a stress in the substrate the same sign over the entire area of ​​the substrate.

7. The method as described in claim 1, wherein the one or more characteristics of the SCL include one or more of the following: a material of the SCL; or a thickness of the SCL.

8. The method of claim 1, wherein the setting of the stress-reducing beam includes one or more of the following: a particle type of the stress-reducing beam; an energy of the particles of the stress-reducing beam; or an angle of incidence of the particles of the stress-reducing beam on the SCL.

9. The method of claim 1, further comprising the steps of: obtaining an updated OPD profile of the substrate in response to exposing the SCL to the stress-reducing beam; mapping a residual stress in the substrate based on the updated OPD profile; identifying a setting of an additional stress-reducing beam based on the mapped residual stress; and exposing one or more regions of the SCL to the additional stress-reducing beam.

10. The method of claim 1, wherein the substrate includes a front side and a rear side, wherein the front side includes one or more manufactured features, and wherein the SCL is deposited on the rear side of the substrate.

11. A substrate processing system, comprising: One memory; And a processing device communicatively coupled to the memory, the processing device being configured to: obtain an OPD profile of a substrate using optical inspection data; obtain a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a corresponding element deformation shape among a plurality of element deformation shapes of the substrate; identify one or more cylindrical decompositions of a quadratic portion of the OPD profile based on at least a subset of the plurality of polynomial coefficients, wherein each of the one or more cylindrical decompositions includes decomposing the OPD profile at least into a parabolic deformation of the substrate and the based cylindrical deformation; calculate one or more properties for a stress compensation layer (SCL) for the substrate using a selected cylindrical decomposition of the one or more cylindrical decompositions; deposit the SCL on the substrate; and expose the SCL to a stress-reducing beam.

12. The system as claimed in claim 11, wherein the polynomial representation of the OPD profile includes an expansion of the OPD profile via a Zernike polynomial.

13. The system as claimed in claim 11, wherein the one or more cylindrical decompositions include: A first cylindrical decomposition includes an upward cylindrical contribution of the OPD to the substrate; And a second cylindrical decomposition, including a downward cylindrical contribution of the OPD to the substrate.

14. The system of claim 13, wherein the selected cylindrical decomposition includes a parabolic contribution of the OPD to the substrate, the parabolic contribution having a lower magnitude among the parabolic contributions of the OPD to the one or more cylindrical decompositions.

15. The system as claimed in claim 13, wherein the selected cylindrical decomposition is associated with a patterning direction of the substrate.

16. The system of claim 11, wherein one or more characteristics of the SCL are calculated to give a stress in the substrate the same sign over the entire area of ​​the substrate.

17. The system of claim 11, wherein one or more characteristics of the SCL include one or more of the following: a material of the SCL; or a thickness of the SCL; and wherein the setting of the stress-reducing beam includes one or more of the following: a particle type of the stress-reducing beam; an energy of the particles of the stress-reducing beam; or an angle of incidence of the particles of the stress-reducing beam on the SCL.

18. The system of claim 11, wherein the processing apparatus is further configured to: obtain an updated OPD profile of the substrate in response to exposing the SCL to the stress-reducing beam; map a residual stress in the substrate based on the updated OPD profile; identify a setting of an additional stress-reducing beam based on the mapped residual stress; and expose one or more regions of the SCL to the additional stress-reducing beam.

19. The system of claim 11, wherein the substrate includes a front side and a rear side, wherein the front side includes one or more manufactured features, and wherein the SCL is deposited on the rear side of the substrate.

20. A semiconductor manufacturing system, comprising: One or more processing chambers for processing a substrate; And a computing device for: obtaining an OPD profile of the substrate using optical inspection data; obtaining a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a corresponding element deformation shape among a plurality of element deformation shapes of the substrate; identifying one or more cylindrical decompositions of a quadratic portion of the OPD profile based on at least a subset of the plurality of polynomial coefficients, wherein each of the one or more cylindrical decompositions includes decomposing the OPD profile at least into a parabolic deformation of the substrate and the based cylindrical deformation; calculating one or more properties for a stress compensation layer (SCL) for the substrate using a selected cylindrical decomposition of the one or more cylindrical decompositions; depositing the SCL on the substrate; and exposing the SCL to a stress-reducing beam.

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