Method for making radio frequency silicon-on-insulator (RFSOI) structure including a superlattice

Abstract

A semiconductor fabrication method may include forming a superlattice layer on a donor semiconductor wafer, the superlattice layer comprising a plurality of stacked layer groups, each layer group comprising a plurality of stacked substrate semiconductor monolayers defining a substrate semiconductor portion, and at least one non-semiconductor monolayer confined within a lattice of an adjacent substrate semiconductor portion. The method may further include performing ion implantation on the donor semiconductor wafer to create a separation layer below the superlattice layer, forming an oxide layer on a substrate semiconductor wafer, performing an ion beam treatment on the oxide layer, bonding the donor semiconductor wafer to the substrate semiconductor wafer such that the superlattice layer is adjacent to the oxide layer, removing the donor semiconductor wafer portion at the separation layer from the donor semiconductor wafer to define an active semiconductor layer above the superlattice layer, and forming an electronic component in the active semiconductor layer.

Claims

1. A semiconductor processing method, comprising: A superlattice layer is formed on a donor semiconductor wafer. The superlattice layer includes a plurality of stacked layer groups, each layer group comprising a plurality of stacked substrate semiconductor monolayers defining a substrate semiconductor portion and at least one non-semiconductor monolayer confined within a lattice of an adjacent substrate semiconductor portion. Not all available semiconductor bonding sites are occupied by bonds with non-semiconductor atoms, so at least some semiconductor atoms from the opposing substrate semiconductor portion are chemically bonded together through the non-semiconductor monolayers between the opposing substrate semiconductor portions. Ion implantation is performed on the donor semiconductor wafer to create a separation layer beneath the superlattice layer. An oxide layer is formed on a substrate semiconductor wafer; an ion beam treatment is performed on the oxide layer to liquefy it, and a donor semiconductor wafer is bonded to the substrate semiconductor wafer at a temperature that does not decompose the superlattice layer; the donor semiconductor wafer is bonded to the substrate semiconductor wafer such that the superlattice layer and the oxide layer are separated by a semiconductor material of a thickness less than 10 nanometers; a portion of the donor semiconductor wafer at the separation layer is removed from the donor semiconductor wafer to define an active semiconductor layer above the superlattice layer; and at least one electronic component is formed in the active semiconductor layer.

2. The method of claim 1, wherein the superlattice layer is less than 5 nanometers away from the oxide layer.

3. The method of claim 1, wherein the ion implantation includes hydrogen ion implantation.

4. The method of claim 1, wherein the ion beam treatment includes an argon ion beam treatment.

5. The method of claim 1, further comprising performing a heat treatment after removing a portion of the donor semiconductor wafer at the separation layer.

6. The method of claim 1, further comprising performing a surface smoothing process on the active semiconductor layer after removing a portion of the donor semiconductor wafer at the separation layer.

7. The method of claim 1, wherein the ion implantation is performed at a dose ranging from 5 x 10¹⁶ / cm² to 2 x 10¹⁷ / cm².

8. The method of claim 1, wherein the ion implantation is performed at an accelerating voltage in the range of 36 to 49 keV.

9. The method of claim 1, wherein the ion beam treatment is performed at a dose ranging from 5 x 10¹³ / cm² to 5 x 10¹⁴ / cm².

10. The method of claim 1, wherein the ion beam treatment is performed at an accelerating voltage in the range of 7 to 12 keV.

11. A semiconductor processing method, comprising: A superlattice layer is formed on a donor semiconductor wafer. The superlattice layer includes a plurality of stacked layer groups, each layer group comprising a plurality of stacked substrate semiconductor monolayers defining a substrate semiconductor portion and at least one non-semiconductor monolayer confined within a lattice of an adjacent substrate semiconductor portion. Not all available semiconductor bonding sites are occupied by bonds with non-semiconductor atoms, so at least some semiconductor atoms from the opposing substrate semiconductor portion are chemically bonded together through the non-semiconductor monolayers between the opposing substrate semiconductor portions. Ion implantation is performed on the donor semiconductor wafer to create a separation layer beneath the superlattice layer. An oxide layer is formed on a substrate semiconductor wafer; an ion beam treatment is performed on the oxide layer to liquefy it, and a donor semiconductor wafer is bonded to the substrate semiconductor wafer at a temperature that does not decompose the superlattice layer; the donor semiconductor wafer is bonded to the substrate semiconductor wafer such that the superlattice layer and the oxide layer are separated by a semiconductor material of a thickness less than 10 nanometers; a portion of the donor semiconductor wafer at the separation layer is removed from the donor semiconductor wafer to define an active semiconductor layer above the superlattice layer; after removing the portion of the donor semiconductor wafer at the separation layer, a surface smoothing process and a thermal process are performed on the active semiconductor layer; and at least one electronic component is formed in the active semiconductor layer.

12. The method of claim 11, wherein the superlattice layer is less than 5 nanometers away from the oxide layer.

13. The method of claim 11, wherein the ion implantation includes hydrogen ion implantation.

14. The method of claim 11, wherein the ion beam treatment includes an argon ion beam treatment.

15. The method of claim 11, wherein the ion implantation is performed at a dose ranging from 5 x 10¹⁶ / cm² to 2 x 10¹⁷ / cm² and an accelerating voltage ranging from 36 to 49 keV.

16. The method of claim 11, wherein the ion beam treatment is performed at a dose ranging from 5 x 10¹³ / cm² to 5 x 10¹⁴ / cm² and an accelerating voltage ranging from 7 to 12 keV.

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