Power supply filter circuit, power supply arrangement, automated test equipment and method for actively filtering a supply voltage

Abstract

This invention provides a power filter circuit (100) comprising a transistor (120), a control capacitor (130), and a stabilizing capacitor (140). A load path of the transistor is coupled between an input terminal (110) and an output terminal (112) of the power filter circuit. The control capacitor is coupled between a control terminal of the transistor and a reference potential conductor (GND). The stabilizing capacitor is coupled between a source terminal of the transistor and the reference potential conductor. The power filter circuit is configured to regulate a voltage on the load path of the transistor or a voltage between an input terminal and an output terminal of the power filter circuit. Also described are a power supply configuration, an automatic test apparatus, and a method for actively filtering a supply voltage.

Description

Technical Field

[0001] Field of the Invention An embodiment according to the present invention relates to a power filter circuit.

[0002] Other embodiments according to the present invention relate to a power supply arrangement.

[0003] Other embodiments according to the present invention relate to an automatic testing equipment.

[0004] Other embodiments according to the present invention relate to a method for actively filtering a supply voltage including ripple using a power filter circuit.

[0005] Some embodiments according to the present invention relate to an active power filter for higher voltages. Prior Art

[0006] Background of the Invention In many applications, a supply voltage with low ripple is required. However, high-efficiency switching power converters usually introduce a lot of ripple noise, partly due to the switching nature of power conversion.

[0007] For example, in automatic test equipment, accurate voltage and current measurements are required. There are also special requirements for the associated power supplies. For example, in some cases, DC / DC converters require adequate filtering to provide rail voltages with very low noise to the measurement circuitry.

[0008] It has been recognized that filter circuitry for higher currents at high voltages via passive components typically becomes very large because the density of devices (eg, capacitors) decreases as the voltage rating increases.

[0009] Furthermore, it has been recognized that standard linear regulators are not suitable for filtering at higher voltages because their limited voltage accuracy and the voltage tolerance of the DC / DC converter result in the need for a larger voltage margin, resulting in higher power dissipation within the filter circuitry.

[0010] Therefore, there is a need for a concept which provides an improved compromise between the quality of the provided voltage, power dissipation and implementation complexity. Summary of the invention

[0011] SUMMARY OF THE INVENTION According to an embodiment of the present invention, a power filter circuit is created, wherein the power filter circuit includes a transistor (e.g., a power MOSFET or a bipolar transistor), a control capacitor and a stabilizing capacitor. The load path (e.g., a drain-source path or a collector-emitter path) of the transistor is coupled between the input end of the power filter circuit and the output end of the power filter circuit. The control capacitor is coupled between the control terminal of the transistor (e.g., the gate terminal in the case of a field effect transistor, and the base terminal in the case of a bipolar transistor) and a reference potential conductor (e.g., a ground line). For example, the load is coupled (or to be coupled) between the output end of the power filter circuit and the reference potential conductor, or wherein for example the load is coupled (or to be coupled) between the source terminal of the transistor and the reference potential conductor. The stabilizing capacitor is coupled between the source terminal of the transistor (e.g., the source terminal in the case of a field effect transistor, or the emitter terminal in the case of a bipolar transistor) and the reference potential conductor. The power filter circuit is configured to regulate the voltage on the load path of the transistor (e.g., the drain-source voltage of the transistor in the case of a field effect transistor, or the collector-emitter voltage in the case of a bipolar transistor) or the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit.

[0012] This embodiment is based on the discovery that a good compromise between the quality of the output voltage, power dissipation and implementation complexity can be achieved by such a circuit. In particular, by having a load path of a transistor between the input of the power filter circuit and the output of the power filter circuit, the effects of voltage fluctuations (e.g., noise) on the voltage applied to the input of the power filter circuit can be compensated, because the current flowing through the load path of the transistor is generally relatively insensitive to fluctuations in the voltage on the load path (e.g., collector-emitter path or drain-source path) of the transistor (at least if the transistor is operated at a "reasonable" operating point). However, it has been recognized that by regulating the voltage on the load path of the transistor (which generally implies some delay and low-pass characteristics), it is possible to have a well-defined voltage at the output of the power filter circuit (at least assuming that the average value of the voltage at the input of the power filter circuit is well-defined, e.g., well-regulated).

[0013] However, it has also been recognized that such power supply filter circuits can be implemented with a relatively small voltage drop in the load path of the transistor, which means relatively small power consumption.

[0014] Furthermore, it should be noted that both the control capacitor and the stabilizing capacitor contribute to the quality of the output voltage present at the output of the power filter circuit. For example, a control capacitor coupled between the control terminal of a transistor and a reference potential conductor (e.g., ground) keeps the potential at the control terminal of the transistor fairly stable (at least on a short or medium time scale).

[0015] Since in many cases the output voltage at the output of the power filter circuit may be closely related to the voltage present at the control terminal of the transistor, stabilizing the voltage at the control terminal of the transistor by means of a control capacitor helps stabilize the output voltage at the output of the power filter circuit.

[0016] The regulation of the voltage on the load path of the transistor (or the voltage between the input and output of the power filter circuit) can have a finite bandwidth (or a certain regulation time constant), which helps to at least partially suppress noise that may be present in the voltage supplied to the input of the power filter circuit.

[0017] In summary, the power filter circuit allows providing a high quality output voltage, wherein noise and other distortions that may be included in the input voltage supplied to the input of the power filter circuit can be reduced or attenuated or even substantially suppressed. In addition, a relatively low voltage drop between the input and output of the power filter circuit can be achieved by its configuration, wherein good accuracy of the output voltage and low power dissipation can be achieved by regulating the voltage on the load path of the transistor (or by regulating the voltage between the input and output of the power filter circuit, for example in the case where there are multiple transistors coupled in series between the input and output or in the case where there are any additional components coupled in series with the transistor).

[0018] In a preferred embodiment, the capacitance of the control capacitor is greater than or equal to 10 times the internal capacitance of the transistor between the control terminal of the transistor (e.g., the gate terminal in the case of a field effect transistor, or the base terminal in the case of a bipolar transistor) and the source terminal of the transistor (e.g., the source terminal in the case of a field effect transistor, or the emitter terminal in the case of a bipolar transistor), for example greater than or equal to 10 times the gate-source capacitance of the transistor]. Alternatively, the capacitance of the control capacitor is greater than or equal to 20 times the internal capacitance of the transistor between the control terminal of the transistor (e.g., the gate terminal in the case of a field effect transistor, or the base terminal in the case of a bipolar transistor) and the source terminal of the transistor (e.g., the source terminal in the case of a field effect transistor, or the emitter terminal in the case of a bipolar transistor), for example greater than or equal to 20 times the gate-source capacitance of the transistor. Alternatively, the capacitance of the control capacitor is greater than or equal to 50 times the internal capacitance of the transistor between the control terminal of the transistor (e.g., the gate terminal in the case of a field effect transistor, or the base terminal in the case of a bipolar transistor) and the source terminal of the transistor (e.g., the source terminal in the case of a field effect transistor, or the emitter terminal in the case of a bipolar transistor), for example greater than or equal to 50 times the gate-source capacitance of the transistor. Alternatively, the capacitance of the control capacitor is greater than or equal to 100 times the internal capacitance of the transistor between the control terminal of the transistor (e.g., the gate terminal in the case of a field effect transistor, or the base terminal in the case of a bipolar transistor) and the source terminal of the transistor (e.g., the source terminal in the case of a field effect transistor, or the emitter terminal in the case of a bipolar transistor), for example greater than or equal to 100 times the gate-source capacitance of the transistor.

[0019] It has been recognized that with such a size of the control capacitor, a particularly good quality of the output voltage at the output of the power filter circuit can be achieved. In particular, it has been recognized that the control capacitor is effective for suppressing distortions on the output voltage of the power filter circuit if the control capacitor is sufficiently large, for example significantly larger than the capacitance between the internal capacitance of the transistor between the control terminal of the transistor and the source terminal of the transistor, wherein this source terminal of the transistor is usually but not necessarily coupled to the output of the power filter circuit.

[0020] In a preferred embodiment, the power filter circuit comprises [Resistor], the resistor being coupled between the output of a regulator (e.g., the output of an operational amplifier implementing the regulator) and a control terminal of a transistor, the regulator being used to regulate the voltage on the load path of the transistor (e.g., the drain-source voltage of the transistor in the case of a field effect transistor, or the collector-emitter voltage in the case of a bipolar transistor) or for regulating the voltage between the input of a power filter circuit and the output of the power filter circuit. The resistor coupled between the output of the regulator and the control terminal of the transistor is configured to form a low pass filter (e.g., a low pass filter having a cutoff frequency less than or equal to 10 kHz) together with a control capacitor.

[0021] The use of such a resistor coupled between the output of the regulator and the control terminal of the transistor can help limit the bandwidth of the regulation loop, which in turn allows noise with a frequency greater than the bandwidth of the regulation loop to be reduced or suppressed. In addition, the use of a resistor between the output of the regulator and the control terminal of the transistor may also limit the current and thus damage to the transistor and / or the regulator must be avoided.

[0022] In a preferred embodiment, the power filter circuit (e.g., a regulator of the power filter circuit) is configured with [Regulation] transistor [Voltage on the load path] or the voltage between the input end of the power filter circuit and the output end of the power filter circuit, which makes the transistor in (its output characteristic field) [Saturation region] operation.

[0023] By adjusting the voltage on the load path of the transistor or the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit so that the transistor operates in the saturation region, there is the effect that the current flowing through the load path of the transistor is relatively insensitive to changes in the voltage on the load path of the transistor. Therefore, noise or other distortions on the input voltage of the power filter circuit can be decoupled from the output of the power filter circuit. In other words, by adjusting the voltage on the load path of the transistor in such a way that the transistor operates in the saturation region, it can be ensured that the transistor includes a relatively high output impedance (that is, it essentially operates as a current source). Therefore, the high output impedance of the transistor obtained by operating the transistor in the saturation region has the effect that noise and other distortions on the input voltage of the power filter circuit are not transferred to the output terminal of the power filter circuit (or are transferred only in a significantly attenuated form).

[0024] In addition, by using a control capacitor to stabilize the potential at the control terminal of the transistor, the distortion of the output voltage of the power filter circuit can be further reduced. In other words, by adjusting the voltage on the load path of the transistor (or the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit) so that the transistor operates in the saturation region, it is ensured that the voltage on the load path of the transistor is prevented from becoming too small. This is advantageous because the extremely small voltage on the load path of the transistor will significantly reduce the suppression of noise and other distortions on the output voltage of the power filter circuit. Therefore, the good quality of the output voltage of the power filter circuit can be ensured.

[0025] In a preferred embodiment, the power filter circuit (eg, a regulator of the power filter circuit) is configured to regulate the voltage in the load path of the transistor to a target value less than or equal to 1 V (eg, to a predetermined or fixed target value).

[0026] Alternatively, the power filter circuit (e.g., a regulator of the power filter circuit) is configured to regulate the voltage on the load path of the transistor to a target value within a range between 0.3 V and 0.8 V (e.g., to a predetermined or fixed target value).

[0027] Alternatively, the power filter circuit (e.g., a regulator of the power filter circuit) is configured to regulate the voltage on the load path of the transistor to a target value within a range between 0.4 V and 0.6 V (e.g., to a predetermined or fixed target value).

[0028] Alternatively, the power filter circuit (e.g., a regulator of the power filter circuit) is configured to regulate the voltage difference between the input terminal of the power filter circuit and the output terminal of the power filter circuit to a target value less than or equal to 1 V (e.g., to a predetermined or fixed target value).

[0029] Alternatively, the power filter circuit (e.g., a regulator of the power filter circuit) is configured to regulate the voltage difference between the input terminal of the power filter circuit and the output terminal of the power filter circuit to a target value within a range between 0.3 V and 0.8 V (e.g., to a predetermined or fixed target value).

[0030] Alternatively, the power filter circuit (e.g., a regulator of the power filter circuit) is configured to regulate the voltage difference between the input terminal of the power filter circuit and the output terminal of the power filter circuit to a target value within a range between 0.4 V and 0.6 V (e.g., to a predetermined or fixed target value).

[0031] Using such regulation of the voltage on the load path of the transistor or of the voltage difference between the input of the power supply filter circuit and the output of the power supply filter circuit, low power dissipation can be achieved. Furthermore, by ensuring that the transistor is operated in the saturation region, but still has a relatively small voltage on its load path, a particularly good compromise between the quality of the output voltage and the power dissipation can be achieved. For example, by regulating the voltage on the load path of the transistor, it can be achieved that the transistor always operates in the "lower" part of the saturation region, where the power dissipation is relatively small, but where the output impedance of the transistor is still large enough to achieve a good reduction in distortion.

[0032] Furthermore, it should be noted that the same effect can be achieved by adjusting the voltage difference between the input of the power filter circuit and the output of the power filter circuit, and such adjustment may be reasonable if there is another circuit component coupled in series with the load path of the transistor between the input of the power filter circuit and the output of the power filter circuit.

[0033] In other words, in general, it is advantageous to adjust the voltage on the load path of the transistor or the voltage difference between the input terminal of the power supply filter circuit and the output terminal of the power supply filter circuit in such a way that the transistor operates reliably in the saturation region but has a relatively small voltage on its load path.

[0034] However, it has been recognized that the values mentioned above provide good results for many typical types of transistors.

[0035] In a preferred embodiment, the power filter circuit is configured so that the bandwidth of a control loop for regulating the voltage on the load path of the transistor or for regulating the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit is limited to a value not exceeding 10 kHz, or not exceeding 5 kHz, or not exceeding 1000 Hz, or not exceeding 500 Hz, or not exceeding 200 Hz, or not exceeding 100 Hz, or not exceeding 50 Hz.

[0036] By adapting the power supply filter circuit in such a way that the bandwidth of the control loop is limited to a certain frequency, it can be achieved that distortion on the input voltage of the power supply filter circuit having a frequency higher than the bandwidth of the control loop will be attenuated, while the output voltage follows the changes of the input voltage having a frequency lower (or significantly lower) than the bandwidth of the control loop. Therefore, the output voltage can follow the expected (relatively slow) changes of the input voltage, while the unintended (relatively fast) changes of the input voltage (for example, due to noise or other distortion) will not significantly affect the output voltage.

[0037] Furthermore, it has been found that, depending on the application, the above-mentioned values for limiting the bandwidth of the control loop provide good characteristics of the power supply filter circuit, for example with regard to the attenuation of noise and distortion.

[0038] In a preferred embodiment, a control loop for regulating the voltage on the load path of the transistor or for regulating the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit (e.g., the control loop for regulating the voltage on the load path of the transistor or for regulating the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit mentioned above) comprises (e.g., in the feedback path between the inflow terminal of the transistor and the input terminal of the regulator) a low-pass filter, wherein the low-pass filter comprises a cut-off frequency less than or equal to 10 kHz, or wherein the low-pass filter comprises a cut-off frequency less than or equal to 5 kHz, or wherein the low-pass filter comprises a cut-off frequency less than or equal to 1000 Hz, or wherein the low-pass filter comprises a cut-off frequency less than or equal to 500 Hz, or wherein the low-pass filter comprises a cut-off frequency less than or equal to 200 Hz, or wherein the low-pass filter comprises a cut-off frequency less than or equal to 100 Hz. The low-pass filter may, for example, comprise a low-pass filter resistor and a low-pass filter capacitor. The low pass filter may, for example, include a bypass configuration, such as a diode, which is configured to selectively bypass the low pass filter resistor if the voltage across the low pass resistor exceeds a threshold value or if the magnitude (absolute value) of the voltage across the low pass resistor exceeds a threshold value.

[0039] By introducing a low-pass filter into the control loop, the bandwidth of the control loop can be adjusted in a well-controlled manner, which in turn allows defining at which frequency there is a transition from a state in which the output voltage of the power filter circuit substantially follows changes in the input voltage of the power filter circuit to a state in which changes in the input voltage (e.g. due to noise or other distortions) are attenuated in the output voltage. It can thus be achieved that in static or quasi-static conditions (i.e. for a constant input voltage or for slow changes in the input voltage) the output voltage of the power filter circuit is in a predetermined and well-controlled relationship with the input voltage of the power filter circuit, whereas for faster (e.g. noise-like) changes in the input voltage the output voltage does not follow these changes (or only in a strongly attenuated manner). It can thus be achieved a well-defined and well-defined behavior of the power filter circuit.

[0040] In a preferred embodiment, the power filter circuit is configured to provide (e.g., using a floating reference voltage source) a floating reference potential that is shifted by a predetermined value relative to the potential at the output of the power filter circuit, and The power filter circuit is configured to perform regulation so that the potential at the inflow terminal (e.g., the drain terminal) of the transistor or the potential at the input terminal of the power filter circuit is consistent with the floating reference potential (e.g., to achieve that the potential at the inflow (e.g., drain) terminal of the transistor or the potential at the input terminal of the power supply circuit is at least approximately equal to the floating reference potential).

[0041] Alternatively, the power filter circuit may be configured to provide (e.g., using a floating reference voltage source) a floating reference potential that is shifted by a predetermined value relative to the potential at the source terminal of the transistor, and the power filter circuit may be configured to perform regulation so that the potential at the sink terminal of the transistor (e.g., at the drain terminal in the case of a field effect transistor, or at the collector terminal in the case of a bipolar transistor) or the potential at the input of the power filter circuit is consistent with the floating reference potential (e.g., to achieve that the potential at the sink terminal of the transistor or the potential at the input of the power filter circuit is at least approximately equal to the floating reference potential).

[0042] Alternatively, the power filter circuit may be configured to provide (e.g., using a floating reference voltage source) a floating reference potential that is shifted by a predetermined value relative to the potential at the input of the power filter circuit, and the power filter circuit may be configured to perform regulation so that the potential at the source terminal of the transistor or the potential at the output of the power filter circuit is consistent with the floating reference potential (e.g., to achieve that the potential at the source terminal of the transistor or the potential at the output of the power filter circuit is at least approximately equal to the floating reference potential).

[0043] Alternatively, the power filter circuit may be configured to provide (e.g., using a floating reference voltage source) a floating reference potential that is shifted by a predetermined value relative to the potential at the sink terminal of the transistor, and the power filter circuit may be configured to perform regulation so that the potential at the source terminal of the transistor (e.g., at the source terminal in the case of a field effect transistor, or at the emitter terminal in the case of a bipolar transistor) or the potential at the output of the power filter circuit is consistent with the floating reference potential (e.g., to achieve that the potential at the source terminal of the transistor or the potential at the output of the power filter circuit is at least approximately equal to the floating reference potential).

[0044] It has been found that using such a configuration, the voltage difference on the load path of a transistor or the voltage difference between the input and output of a power filter circuit can be regulated in an efficient manner. It has been found that a floating reference potential is advantageous in the present application because both the voltage at the input of the power filter circuit and the voltage at the output of the power filter circuit can vary during circuit operation. In addition, it has been recognized that aligning two potentials, one of which is a floating reference potential, can be efficiently achieved using a regulating circuit, which can, for example, use a differential amplifier (e.g., an operational amplifier).

[0045] Thus, it has been realized that the above-mentioned implementation provides good accuracy and can be implemented with a moderate amount of effort.

[0046] In a preferred embodiment, the power filter circuit includes a bypass path (e.g., formed by CR3 and CR4) connected in parallel with the load path of the transistor, wherein the bypass path is configured to conduct when the voltage on the load path of the transistor exceeds a predetermined threshold voltage (e.g., the threshold voltage of a diode, or the combined threshold voltage of a series circuit of multiple diodes), and not conduct otherwise.

[0047] The bypass path may, for example, be configured to conduct in a current direction parallel to the current direction through the load path of the transistor in an operating state of the power filter circuit. The bypass path may, for example, include a diode coupled in parallel with the load path of the transistor, or the bypass path may, for example, include a series connection of a plurality of diodes coupled in parallel with the load path of the transistor.

[0048] The bypass path may, for example, be configured to be non-conductive when the voltage on the load path of the transistor is less than 1.5 times the regulation target voltage to which the voltage on the load path of the transistor is regulated, and the bypass path may, for example, be configured to be conductive when the voltage on the load path of the transistor is greater than 6 times the regulation target voltage to which the voltage on the load path of the transistor is regulated.

[0049] Alternatively or additionally, the bypass path may be configured to transition from a non-conducting state to a conducting state within a voltage range between 0.6 V and 3 V or within a voltage range between 1 V and 2 V.

[0050] It has been recognized that such a bypass path in parallel with the load path of the transistor allows for a fast start-up of the circuit and also allows for a fast change in the output voltage, which may be desirable, for example, in a test application when the output voltage of the power filter circuit must be changed quickly. In addition, it has been recognized that the bypass path helps to reduce the power dissipation of the transistor and also protects the transistor to some extent from overvoltages on the load path. In addition, it has been recognized that such a bypass path is reasonable due to the specific functionality of the circuit, which is intended to regulate the voltage on the load path of the transistor to a desired and relatively small value (for example, so that the transistor operates in the saturation region). Since in typical applications, the fluctuations of the input voltage are relatively small, the "normal" fluctuations of the input voltage to be attenuated will not be sufficient to cause a significant current on the bypass path, so that the bypass path will not significantly reduce the effectiveness of the power filter circuit in suppressing distortion of the input voltage at the output terminal of the power filter circuit. In other words, assuming that the bypass path is appropriately sized, for example in such a way that if the voltage on the bypass path or the voltage between the input and output ends of the power filter circuit is greater than the voltage on the load path of the transistor or the voltage between the input and output ends of the power filter circuit is regulated to a regulation target, current only flows through the bypass path, and so that under conditions of normal fluctuations in the input voltage (for example, due to noise or other distortion), no current flows through the bypass path, the bypass path does not degrade the normal operation of the power filter circuit, but is helpful under conditions where a rapid change (for example, an increase) in the output voltage is required.

[0051] In summary, it has been found that the use of a bypass path significantly improves some characteristics of the circuit without having a significant negative impact on the suppression of noise and other distortions on the output voltage of the power supply filter circuit.

[0052] In a preferred embodiment, the power supply filter circuit includes a low-pass resistor (e.g., R2), a low-pass capacitor (e.g., C2), an operational amplifier (e.g., U1), an integrating capacitor (e.g., C3), and an output resistor (e.g., R8). The low-pass resistor is coupled between the sink terminal (e.g., drain terminal) of the transistor (e.g., Q1) and the first terminal of the low-pass capacitor (e.g., C2). The second terminal of the low-pass capacitor (e.g., C2) is coupled to a reference potential conductor (e.g., ground). The first input terminal (e.g., non-inverting input terminal; e.g., "+") of the operational amplifier is coupled to the first terminal of the low-pass capacitor (e.g., directly via one or more resistors, e.g., via R7). The second terminal of the operational amplifier (e.g., the inverting input terminal; e.g., "-") is coupled to the source terminal of the transistor via one or more resistors (e.g., via R5 and R6, or only via resistor R6), e.g., coupled to a floating reference voltage source, e.g., including R3, R4, R5 and U2 between the source terminal of the transistor and the voltage-to-current conversion resistor R6, or e.g., without any other circuitry between the source terminal of the transistor and the voltage-to-current conversion resistor R6. The second terminal of the operational amplifier is coupled to the output terminal of the operational amplifier via a capacitor (e.g., C3), which acts as an integrating capacitor, for example. The output terminal of the operational amplifier is coupled to the first terminal of a control capacitor (e.g., C1) via an output resistor (e.g., R8). The first terminal of the control capacitor (e.g., C1) is coupled to the control terminal (e.g., gate terminal) of the transistor (e.g., Q1), e.g., directly or with another resistor, e.g., R9 in between. The second terminal of the control capacitor is coupled to a reference potential conductor (e.g., GND). For example, a series connection of two diodes (e.g., CR3, CR4) is coupled in parallel with the load path of the transistor, for example in such a way that the anode is located on one side of a positive power supply (positive relative to the reference potential conductor) coupled to the input of the power filter circuit, or such that the cathode is located on one side of a negative power supply (negative relative to the reference potential conductor) coupled to the input of the power filter circuit. For example, a diode such as CR2 is coupled between a first terminal of the control capacitor and a potential increased by a predetermined value relative to the potential at the sink terminal of the transistor (e.g., wherein the anode is coupled to the first terminal of the control capacitor). For example, a diode such as CR2 is coupled between a source terminal of the transistor and a first terminal of the control capacitor (e.g., wherein the cathode is coupled to the first terminal of the control capacitor). For example, an anti-parallel circuit of two diodes is coupled in parallel with a low-pass resistor. For example, the diode is coupled between the first terminal of the control capacitor and a positive supply voltage terminal of an operational amplifier (e.g., wherein the anode is coupled to the first terminal of the control capacitor). For example, the diode is coupled between the first terminal of the control capacitor and the negative supply voltage terminal of the operational amplifier (eg, with the cathode coupled to the first terminal of the control capacitor).For example, the negative supply voltage terminal of the operational amplifier is coupled to the source terminal of the transistor. For example, the positive supply voltage terminal of the operational amplifier is coupled to a potential that is shifted by a predetermined value relative to the potential at the drain terminal of the transistor in a static state (e.g., in the case of an active power filter circuit for a positive voltage). For example, the negative supply voltage terminal of the operational amplifier is coupled to a potential that is shifted by a predetermined value relative to the potential at the drain terminal of the transistor in a static state (and, for example, follows the potential at the drain terminal of the transistor with a predetermined time constant). For example, the positive supply voltage terminal of the operational amplifier is coupled to a potential that is shifted by a predetermined value relative to the potential at the drain terminal of the transistor in a static state (and, for example, follows the potential at the drain terminal of the transistor with a predetermined time constant) (e.g., in the case of an active power filter circuit for a negative voltage). .

[0053] It has been found that such a circuit brings about the desired result, namely good attenuation (or suppression) of noise and distortion on the input voltage of the power supply circuit, while keeping the implementation effort relatively small.

[0054] According to an embodiment of the present invention, a power supply arrangement is created, wherein the power supply arrangement includes a switching power converter (e.g., a DC / DC converter), and wherein the power supply arrangement includes the power filter circuit described above. The output terminal of the switching power converter is coupled to the input terminal of the power filter circuit.

[0055] It has been recognized that power filter circuits are well suited for reducing noise and distortion caused by the operation of switching power converters. Therefore, high power efficiency can be achieved by using a switching power converter to provide the input voltage of the power filter circuit, and the power filter circuit is well suited for reducing noise and distortion caused by the switching power converter. For example, the power filter circuit can be dimensioned in such a way that the output voltage of the power filter circuit can follow relatively slow changes in the input voltage of the power filter circuit (i.e., the output voltage of the switching power converter) with high accuracy, while relatively fast (unwanted) changes in the input voltage of the power filter circuit caused by noise and / or other distortion generated by the switching power converter can be efficiently attenuated (or suppressed) (e.g., with low power dissipation and relatively small circuitry).

[0056] For example, the regulation of the power filter circuit may be dimensioned in such a way that the regulation does not follow relatively fast noise-like changes of the input voltage, but follows relatively slow changes of the input voltage that may be caused by intentional adjustment or regulation of the input voltage. Thus, relatively fast (e.g., noise-like) changes of the input voltage of the power filter circuit result in changes of the voltage on the load path of the transistor, but do not result in significant changes of the output voltage of the power filter circuit. Conversely, slow changes of the input voltage of the power filter circuit do not result in significant changes of the voltage on the load path of the transistor due to the regulation, and thus in corresponding changes of the voltage at the output of the power filter circuit. This functionality may be achieved by an appropriate choice of the time constant of the regulation (or equivalently, by an appropriate choice of the bandwidth of the control loop for regulating the voltage on the load path of the transistor or for regulating the voltage between the input and output of the power filter circuit).

[0057] In summary, by appropriately adapting the characteristics of the power filter circuit to the characteristics of the switching power converter, such as the characteristics of the noise and distortion generated by the switching power converter, a high quality of voltage (with low noise and distortion) can be achieved at the output end of the power filter circuit.

[0058] In a preferred embodiment of the power supply arrangement, the regulation time constant (e.g., defined by the amount of time after which the change in voltage on the load path caused by a step change in the output voltage of the switching power converter decreases to 1 / e of the initial value due to the regulation effect) of a regulation loop for regulating the voltage on the load path of the transistor (e.g., the drain-source voltage of the transistor in the case of a field effect transistor, or the collector-emitter voltage in the case of a bipolar transistor) or the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit is at least 2 times, or at least 5 times, or at least 10 times, or at least 20 times, or at least 50 times, or at least 100 times, or at least 200 times, or at least 500 times, or at least 1000 times greater than the cycle duration of the switching power converter.

[0059] It has been recognized that such a selection of the regulation time constant of the power filter circuit can bring about the following effect: noise or other distortion of the input voltage caused by the operation of the switching power converter can be effectively attenuated. It has been recognized that in many cases, the distortion has a frequency equal to the switching frequency of the switching power converter or a multiple of the switching frequency of the switching power converter. Therefore, by using the above-mentioned selection of the regulation time constant, it can be achieved that the regulation is intentionally too slow to follow the noise or distortion of the input voltage of the power filter circuit originating from the switching operation of the switching power supply. Therefore, the output voltage does not follow such noise and distortion caused by the switching operation of the switching power supply, where in many cases, this type of noise and distortion can be dominant.

[0060] In a preferred embodiment of the power supply arrangement, regulation of the voltage on the load path of the transistor (e.g., the drain-source voltage of the transistor in the case of a field effect transistor, or the collector-emitter voltage in the case of a bipolar transistor) or the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit is configured so that the regulation does not regulate the change of the voltage on the load path of the transistor caused by the ripple voltage of the switching power converter or the change of the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit caused by the ripple voltage of the switching power converter by more than 50% (e.g., so that the voltage on the load path of the transistor follows at least 50% of the ripple voltage), or does not regulate the change of the voltage on the load path of the transistor caused by the ripple voltage of the switching power converter or the change of the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit caused by the ripple voltage of the switching power converter by more than 20%. (for example, making the voltage on the load path of the transistor follow at least 80% of the ripple voltage), or not adjusting the change in the voltage on the load path of the transistor caused by the ripple voltage of the switching power converter or the change in the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit caused by the ripple voltage of the switching power converter by more than 10% (for example, making the voltage on the load path of the transistor follow at least 90% of the ripple voltage).

[0061] By dimensioning the power filter circuit in such a way that the voltage on the load path of the transistor or the change of the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit caused by the ripple voltage of the switching power converter is not regulated to a great extent, it can be achieved that this ripple voltage of the switching power supply does not significantly affect the output voltage of the power filter circuit. Therefore, a good quality of the output voltage of the power filter circuit can be achieved.

[0062] In other words, the ripple voltage of the switching power converter is largely "absorbed" by changes in the voltage on the load path of the transistor, wherein such changes in the voltage on the load path of the transistor generally do not result in significant changes in the current flowing through the load path of the transistor because the transistor operates in the saturation region, as described above. Therefore, a good quality output voltage can be obtained using a power-efficient switching power supply by combining the power-efficient switching power supply with a power filter circuit and by appropriately sizing the exposure of the power filter circuit.

[0063] An automatic test device is created according to an embodiment of the present invention, wherein the automatic test device includes a power supply configuration as outlined above (or generally, as outlined herein). The automatic test device is configured to programmably (e.g., under the control of a test program) vary the voltage provided by the switching power converter to thereby set the voltage at the output of the power filter circuit to a desired value. The power filter circuit includes a fast change mechanism that is configured to selectively bypass the load path of the transistor (e.g., using diodes CR3 and CR4) and / or bypass a low pass filter in a regulation loop (e.g., using diode CR1), the regulation loop being used to regulate the voltage on the load path of the transistor or for regulating the voltage between the input of the power filter circuit and the output of the power filter circuit.

[0064] It has been found that the power filter circuit is well suited for use in automatic test equipment because the power filter circuit allows the use of compact and power-efficient circuitry to provide a high-quality (e.g., low-noise and / or low-ripple) output voltage. As mentioned above, a power-efficient switching power converter can be used to provide the input voltage of the power filter circuit, and the power filter circuit can provide a good-quality output voltage without requiring very space-consuming passive filter components, such as large capacitors and / or inductors or the like. However, the power filter circuit still allows relatively fast changes in the output voltage, which in some cases may be desirable in automatic test equipment for testing the characteristics of a device under test under varying supply voltage conditions. For example, a fast charging mechanism of the power filter circuit can support such functionality. Therefore, it has been recognized that the advantageous characteristics of the power filter circuit make it well suited for use in automatic test equipment, where even a fast change mechanism can be used, for example, to have good timing characteristics of the power filter circuit, thereby allowing fast test cycles.

[0065] In summary, it has been recognized that power supply filter circuits are a good choice for application in automatic test equipment.

[0066] According to an embodiment of the present invention, a method for actively filtering a supply voltage containing (e.g., periodic) ripples using a power filter circuit is created, wherein the power filter circuit comprises a transistor (e.g., a power MOSFET or a bipolar transistor), a control capacitor and a stabilizing capacitor, wherein a load path (e.g., a drain-source path, or a collector-emitter path) of the transistor is coupled between an input terminal of the power filter circuit and an output terminal of the power filter circuit, wherein the control capacitor is coupled between a control terminal of the transistor (e.g., a gate terminal in the case of a field effect transistor, and a base terminal in the case of a bipolar transistor) and a reference potential conductor (e.g., a ground line), wherein, for example, the load is coupled (or is to be coupled) between the output terminal of the power filter circuit and the reference potential conductor, or wherein, for example, the load is coupled (or is to be coupled) between the source terminal of the transistor and the reference potential conductor, wherein the stabilizing capacitor is coupled between the source terminal of the transistor (e.g., the source terminal in the case of a field effect transistor, or the emitter terminal in the case of a bipolar transistor) and the reference potential conductor. The method comprises stabilizing the potential difference between the control terminal of the transistor and the reference potential conductor using a control capacitor so as to suppress (at least partially) the generation of fluctuations in the potential at the control terminal of the transistor caused by ripples on the supply voltage applied at the input of the power filter circuit. The method comprises regulating the voltage on the load path of the transistor (e.g., the drain-source voltage of the transistor in the case of a field effect transistor, or the collector-emitter voltage in the case of a bipolar transistor) or the voltage between the input of the power filter circuit and the output of the power filter circuit with a regulating time constant, the regulating time constant being at least 10 times, or at least 20 times, or at least 50 times, or at least 100 times longer than the period duration of the ripples on the supply voltage applied at the input of the power filter circuit. An output voltage is obtained at the output of the power filter circuit.

[0067] This method is based on the same considerations as the power supply filter circuit described above. In addition, the method can be optionally supplemented by any of the features, functionalities and details also disclosed in this article about the device. Simple diagram description

[0068] Embodiments according to the present invention will be described below with reference to the accompanying drawings, in which: Figure 1 shows a schematic block diagram of a power filter circuit according to an embodiment of the present invention; Figure 2 shows a schematic block diagram of a power supply configuration according to an embodiment of the present invention; Figure 3 shows a schematic block diagram of an automatic test equipment according to an embodiment of the present invention; Figure 4 shows a schematic block diagram of a power filter circuit according to an embodiment of the present invention; Figure 5a shows a graphical representation of a characteristic curve of a power MOSFET that can be used in an embodiment according to the present invention; Figure 5b shows a graphical representation of the LTSpice simulation model used to plot the characteristic curve; FIG6a shows a graphical representation of a signal at the input of a power filter circuit according to an embodiment of the present invention, for example at the input of an active filter; FIG6b shows a graphical representation of a signal at the output of a power filter circuit according to an embodiment of the present invention, for example, at the output of an active filter; Figure 7 shows a schematic block diagram of an active power filter for positive voltage according to an embodiment of the present invention; Figure 8 shows a schematic block diagram of an active power filter for negative voltage according to an embodiment of the present invention; FIG9 shows a schematic diagram of a power supply filter for positive voltage according to an embodiment of the present invention; and FIG. 10 shows a schematic diagram of an active power filter for negative voltage according to an embodiment of the present invention. Implementation

[0069] Detailed description of preferred embodiments 1. According to the power filter circuit in Figure 1 1 shows a schematic block diagram of a power filter circuit 100 according to an embodiment of the present invention. The power filter circuit 100 is configured to receive an input voltage at an input terminal 110 and to provide an output voltage at an output terminal 112. Furthermore, it should be noted that the power filter circuit can be coupled, for example, to a reference potential conductor, for example to a ground line, wherein the input voltage at the input terminal 110 and the output voltage at the output terminal 112 can be referenced to the potential of the reference potential conductor.

[0070] The power filter circuit 100 includes a transistor 120, which may be, for example, a MOSFET transistor, a bipolar transistor, or any other type of transistor. In many cases, a power MOSFET transistor may be a good choice. The power filter circuit 100 also includes a control capacitor 130 and a stabilizing capacitor 140. The load path of the transistor (e.g., the drain-source path of the transistor in the case of a field effect transistor, or the collector-emitter path of the transistor in the case of a bipolar transistor) is coupled between an input terminal 110 of the power filter circuit 100 and an output terminal 112 of the power filter circuit 100. The control capacitor 130 is coupled between a control terminal of the transistor (e.g., the gate terminal of the transistor in the case of a field effect transistor, or the base terminal of the transistor in the case of a bipolar transistor) and a reference potential conductor 150. The reference potential conductor may be, for example, a ground line. For example, the load (not shown in FIG. 1 ) is coupled (or is to be coupled) between the output terminal 112 of the power filter circuit 110 and the reference potential conductor 150. Alternatively, for example, the load (not shown in FIG. 1 ) is coupled (or is to be coupled) between the source terminal of the transistor and the reference potential conductor 150. The stabilizing capacitor 140 is coupled between the source terminal of the transistor (for example, the source terminal in the case of a field effect transistor, or the emitter terminal in the case of a bipolar transistor) and the reference potential conductor 150.

[0071] The power filter circuit is configured to regulate the voltage on the load path of the transistor (e.g., the drain-source voltage of the transistor in the case of a field effect transistor, or the collector-emitter voltage in the case of a bipolar transistor) or the voltage between the input terminal 110 of the power filter circuit and the output terminal 112 of the power filter circuit. For example, such regulation of the voltage on the load path of the transistor or the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit can be achieved by a regulating element 160, wherein such regulating element 160 can, for example, be coupled to the input terminal 110 and the output terminal 112 of the power filter circuit, or coupled to the load path terminal of the transistor 120, and wherein such regulating element 160 can, for example, provide a control signal (e.g., a control voltage) applied to the control terminal of the transistor 120.

[0072] In this regard, it should be noted that in many cases, the voltage at the input terminal 110 of the power filter circuit may be the same as the voltage at the first load path terminal of the transistor 120, and the voltage at the output terminal 112 of the power filter circuit may be the same as the voltage at the second load path terminal of the transistor 120. However, in other embodiments, multiple transistors may be coupled in series, or some components (such as, for example, shunt resistors for current measurement) may be coupled between the input terminal 110 of the power filter circuit and the first load path terminal of the transistor 120 and / or between the second load path terminal of the transistor and the output terminal 112 of the power filter circuit 110.

[0073] With regard to the functionality of the power filter circuit 100, it should be noted that the regulation of the voltage on the load path of the transistor or the regulation of the voltage between the input terminal 110 and the output terminal 112 of the power filter circuit brings about the effect that the voltage at the output terminal 112 of the power filter circuit at least follows sufficiently slow changes of the voltage at the input terminal 110 of the power filter circuit. However, the fact that the load path of the transistor 120 is connected between the input terminal 110 of the power filter circuit and the output terminal 112 of the power filter circuit brings about an attenuation (or even suppression) of the noise and distortion present on the input voltage at the input terminal 110 of the power filter circuit 100. Furthermore, the fact that the regulation generally includes the regulation of the time constant brings about the advantageous effect that the voltage at the output terminal 112 of the power filter circuit generally does not follow fast, noise-like fluctuations of the voltage at the input terminal 110 of the power filter circuit, so that the power filter circuit brings about a significant reduction of noise and distortion.

[0074] Furthermore, it should be noted that the power filter circuit 100 can be designed in a very power efficient manner, which means that the power dissipation of the power filter circuit can be kept quite small. Furthermore, it has been found that the (physical) size of the components of the power filter circuit can be kept quite small without significantly compromising the quality of the output voltage at the output terminal 110 of the power filter circuit. In other words, the power filter circuit 100 generally does not require overly large passive components, such as very large capacitors or inductors. However, it has been found that both the control capacitor 130 and the stabilization capacitor 140 provide a significant contribution to the quality of the output voltage at the output terminal of the power filter circuit, wherein the control capacitor 130 helps to reduce the fluctuations of the voltage at the control terminal of the transistor 120, which in turn results in a particularly good quality of the voltage at the output terminal 112 of the power filter circuit.

[0075] It thus becomes apparent that the power supply filter circuit 100 provides a particularly good compromise between the quality of the output voltage at the output terminal 112, power dissipation, implementation effort and space consumption.

[0076] In the following, some optional aspects that should be preferred but not necessarily considered when implementing a power filter circuit will be described.

[0077] For example, it is preferred to select the capacitance of the control capacitor 130 to be sufficiently large. It has been found that it is advantageous for the capacitance of the control capacitor to be greater than or equal to 10 times the internal capacitance of the transistor between the control terminal of the transistor (e.g., the gate terminal in the case of a field effect transistor, or the base terminal in the case of a bipolar transistor) and the source terminal of the transistor (e.g., the source terminal in the case of a field effect transistor, or the emitter terminal in the case of a bipolar transistor). For example, it has been recognized that it is advantageous for the capacitance of the control capacitor 130 to be greater than or equal to ten times the gate-source capacitance of the transistor 120. However, a larger selection of the control capacitor 130 may further improve the quality of the output voltage at the output terminal 112 of the power supply filter circuit (wherein a larger capacitance of the control capacitor 130 would slow down the regulation and increase the implementation effort). However, it has been found that it is generally advantageous to select a sufficiently large capacitance of the control capacitor 130.

[0078] Furthermore, it has been recognized that in some embodiments, it is advantageous to couple a resistor between the output of a regulator (e.g., regulator 160 that regulates the voltage on the load path of a transistor or the voltage between the input 110 and the output 120 of a power filter circuit) and the control terminal of a transistor. It has been recognized that such a transistor can contribute to the low-pass characteristics of the regulation loop and can also help prevent excessive current from flowing through the control terminal of the transistor.

[0079] Furthermore, it has been recognized that operating the transistor 120 in the saturation region is particularly advantageous, and this can be achieved by appropriately adjusting the voltage on the load path of the transistor or by appropriately adjusting the voltage between the input terminal 110 and the output terminal 112 of the power filter circuit. Operating the transistor 120 in the saturation region results in a high output impedance (load path impedance) of the transistor 120, which brings about good attenuation (or suppression) of distortion in the voltage at the output terminal 112 of the power filter circuit.

[0080] It has been found that it is advantageous to adjust the voltage on the load path of the transistor or the voltage difference between the input terminal of the power filter circuit and the output terminal of the power filter circuit to a target value less than or equal to 1 V. Using such an adjustment, the power dissipation of the power filter circuit can be kept quite small. In addition, it has been recognized that for many types of transistors, it is particularly advantageous to make the target voltage of the voltage on the load path of the transistor or the voltage between the input terminal 110 and the output terminal 112 of the power filter circuit between 0.3 V and 0.8 V or between 0.4 V and 0.6 V. For many types of transistors, such a target value ensures that the transistor operates in the saturation region and the power dissipation of the power filter circuit is kept at a maximum value. Therefore, the selection of such a target value for the adjustment brings a particularly good compromise between the quality of the output voltage at the output terminal 112 of the power filter circuit and the power dissipation.

[0081] It has also been recognized that it is advantageous to design the power filter circuit in such a way that the bandwidth of the control group used to adjust the voltage on the load path of the transistor or for adjusting the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit is limited. By limiting the bandwidth of the control loop, it can be achieved that the output voltage at the output terminal 112 of the power filter circuit 100 does not follow changes in the input voltage at the input terminal 110 having a frequency higher than the bandwidth of the control loop (or only follows such changes in the voltage at the input terminal 110 in a substantially attenuated manner). Therefore, the frequency to which the bandwidth of the control loop is limited determines which part of the noise and distortion on the input voltage at the input terminal 110 is attenuated in the voltage at the output terminal 112. It has been recognized that, depending on the specific application and also on the quality of the voltage at the input terminal 110, it is reasonable to limit the bandwidth of the control loop to a value not exceeding 10 kHz, or not exceeding 5 kHz, or not exceeding 1 kHz, or not exceeding 500 Hz, or not exceeding 200 Hz, or not exceeding 100 Hz, or not exceeding 50 Hz.

[0082] Furthermore, it has been recognized that it is advantageous to limit the bandwidth of the control loop using a low-pass filter, since the use of a low-pass filter results in a well-defined limit on the bandwidth. For example, it has been recognized that, depending on the application and on the characteristics of the input voltage at the input terminal 110, it is appropriate to use a low-pass filter with a cut-off frequency less than or equal to 10 kHz or with a cut-off frequency less than or equal to 5 kHz or with a cut-off frequency less than or equal to 1 kHz or with a cut-off frequency less than or equal to 500 Hz or with a cut-off frequency less than or equal to 200 Hz or with a cut-off frequency less than or equal to 100 Hz.

[0083] By using a dedicated low-pass filter, well-defined characteristics of the control loop (for regulating the voltage on the load path of the transistor or for regulating the voltage between the input terminal 110 and the output terminal 112 of the power supply filter circuit 100) can be achieved, which in turn leads to well-defined characteristics that reduce noise and distortion in the voltage at the output terminal 112 of the power supply filter circuit.

[0084] However, it should be noted that the power filter circuit 100 according to FIG. 1 may be optionally supplemented by any of the features, functionalities and details discussed herein, both individually and in combination. 2. According to the power supply configuration in Figure 2

[0085] FIG. 2 shows a schematic block diagram of a power supply arrangement 200 according to an embodiment of the present invention.

[0086] The power supply arrangement 200 comprises a switching power converter 210 and a power filter circuit 220. For example, the output terminal 212 of the switching power converter 210 can be coupled to the input terminal 222 of the power filter circuit 220. The output terminal 224 of the power filter circuit 220 can, for example, be coupled to the output terminal 214 of the power supply arrangement and can thus provide the output voltage of the power supply arrangement. For example, the reference potential conductor of the power filter circuit 220 can be coupled to the reference potential conductor of the switching power converter 210 and can also be coupled to the reference potential conductor 216 of the power supply arrangement 200.

[0087] In particular, it should be noted that the mains filter circuit 220 may, for example, correspond to the mains filter circuit 100 according to FIG. 1 .

[0088] Furthermore, it should be noted that the power supply filter circuit 220 can, for example, be adapted to the characteristics of the switching power converter 210 and also to the characteristics of a load which can, for example, be coupled between the output terminal 214 of the power supply arrangement and the reference potential conductor 216 of the power supply arrangement 200 .

[0089] For example, the power filter circuit 220 can be adapted to attenuate or suppress noise and distortion present in the output voltage of the switching power converter 210, such that the voltage at the output terminal 224 of the power filter circuit 220 includes a reduced amount of noise and distortion compared to the voltage at the input terminal 222 of the power filter circuit. Thus, the power supply arrangement 200 allows the use of a switching power converter 210 including high efficiency, wherein noise and / or distortion present in the output voltage of the switching power converter 210 at the output terminal 212 of the switching power converter 210 is attenuated or even suppressed by the power filter circuit 220, such that a high quality output voltage is provided at the output terminal 214 of the power supply arrangement.

[0090] The use of the active power filter circuit 220 reduces the requirements on the output voltage quality of the switching power converter 210, which allows the switching power converter 210 to be implemented with low implementation effort and high efficiency, wherein the required space (or volume) of the switching power converter 210 can be kept relatively low. In addition, the power filter circuit 220 corresponding to the power filter circuit 100 allows to react to noise and / or distortion with low power dissipation and usually also with low implementation effort and small space (or volume) consumption.

[0091] In particular, the power filter circuit 220 may be designed in such a way that it attenuates or suppresses the most relevant parts of the noise and distortion provided by the switching power converter 210, while still allowing the output voltage 214 of the power supply arrangement to follow changes in the output voltage at the output terminal 212 of the switching power converter 210. Thus, by the combination of the switching power converter 210 and the power filter circuit 220, a good quality of the output voltage at the output terminal 214 of the power supply arrangement 200 may be achieved, wherein high efficiency, low power dissipation and low implementation effort are provided at the same time.

[0092] As an example, a graphical representation of the output voltage of a switching power converter is shown with reference numeral 270, and a graphical representation of the output voltage of a power filter circuit is shown with reference numeral 272. In both cases, the abscissa describes time and the ordinate describes voltage. It can be seen that the output voltage of the switching power converter includes a large amount of distortion, while the output voltage of the power filter circuit includes only a small amount of distortion, the amplitude of which is significantly smaller than the amplitude of the distortion on the output voltage of the switching power converter.

[0093] Furthermore, it should be noted that it is advantageous to select the regulation time constant for regulation within the power filter circuit 220 in a manner adapted to the characteristics of the switching power converter 210 and / or the characteristics of the output voltage at the output terminal 212 of the switching power converter 210 Adjustment of the regulation time constant of the voltage between the input terminal of the filter circuit and the output terminal of the power filter circuit to be greater than the cycle duration of the switching power converter may, for example, be at least 2 times, or at least 5 times, or at least 10 times, or at least 20 times, or at least 50 times greater than the cycle duration of the switching power converter , or at least 100 times, or at least 200 times, or at least 500 times, or at least 1000 times may be advantageous, for example, because in many cases some distortion at the output 212 of the switching power converter 210 is caused by switching and may have periodicity related to the switching cycle duration of the switching power converter 210 The regulation time constant of the regulation within the circuit can be advantageous by selecting the regulation time constant of the power filter circuit 220 to be significantly greater than the switching cycle duration of the switching power converter 210 .

[0094] In short, the good adaptation of the power filter circuit to the characteristics of the switching power converter permits to obtain high quality of the output voltage at the output 214 of the power configuration.

[0095] Furthermore, it should be noted that the power configuration 200 may optionally be supplemented in two ways individually and in combination by resorting to any of the features, functionality, and details disclosed herein. 3. Automatic test equipment according to Figure 3

[0096] FIG3 shows a schematic block diagram of an automatic test equipment 300 according to an embodiment of the present invention. The automatic test equipment 300 comprises a power supply configuration 310 which may correspond, for example, to the power supply configuration 200 according to FIG2 . For example, the power supply configuration 300 may receive a control signal for a switching power converter, wherein this control signal may define a desired voltage setting and / or a defined voltage change and may, for example, originate from a test processor of the automatic test equipment or any other control unit of the automatic test equipment. Furthermore, an output voltage at an output terminal 312 of the power supply configuration may, for example, be provided at an output port 320 of the automatic test equipment. The output voltage at the output port 320 of the automatic test equipment may, for example, be routed to a device under test, for example, attached to a load board of the automatic test equipment.

[0097] For example, the automatic test equipment is configured to programmably set or vary the voltage provided by the switching power converter of the power supply arrangement 310 to thereby set the voltage at the output of the power filter circuit to a desired value. This voltage at the output of the power filter circuit can then be transferred to the output port 320 of the automatic test equipment and can constitute the supply voltage for the device under test.

[0098] The power filter circuit may, for example, include a fast changing mechanism configured to selectively bypass the load path of the transistor and / or bypass a low pass filter in a regulation loop for regulating the voltage on the load path of the transistor or for regulating the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit. Thus, even if the power filter circuit "normally" counteracts fast changes in the output voltage at the output port 320, the desired voltage can be quickly reached at the output port 320 of the automatic test equipment. Thus, a good quality output voltage can be provided at the output port of the automatic test equipment while still having a fast (short) test cycle.

[0099] Furthermore, it should be noted that the automatic test equipment 300 can be optionally supplemented by any of the features, functionalities and details disclosed herein, both individually and in combination. 4. According to the power filter circuit in Figure 4

[0100] FIG. 4 shows a schematic block diagram of a power filter circuit according to an embodiment of the present invention. The power filter circuit is designated by 400 and includes an input terminal (or voltage input terminal) 410, and includes an output terminal or voltage output terminal 412. FIG. 4 shows a high current high voltage source 480 as an example, wherein an output terminal 482 of the high current high voltage source 480 is coupled to the input terminal 410 of the power filter circuit 400. For example, the high current high voltage source may be or may include a DC / DC converter. It may be assumed that the high current high voltage source 480 provides a DC supply voltage V DC, onto which the noise voltage V NOISE is superimposed. Therefore, it may be assumed that the voltage at the input terminal 410 of the power filter circuit 400 may be, for example, a high noise supply voltage.

[0101] Furthermore, it can be assumed that the load 490 is coupled to the output terminal 412 of the power filter circuit 400 , for example, coupled between the output terminal 412 of the power filter circuit 400 and a reference potential conductor.

[0102] The power filter circuit 400 includes a MOSFET 420, wherein a drain terminal of the MOSFET 420 is coupled to an input terminal 410 of the power filter circuit, and wherein a source terminal of the MOSFET 420 is coupled to an output terminal 412 of the power filter circuit 400. Therefore, a load path (drain-source path) of the MOSFET is between the input terminal 410 and the output terminal 412 of the power filter circuit 400. It should be noted that in the present embodiment, the MOSFET 420 is an N-channel MOSFET.

[0103] The power filter circuit 400 further comprises a control capacitor 430, wherein a first terminal of the control capacitor 430 is coupled to the gate terminal of the MOSFET 420, and wherein a second terminal of the control capacitor 430 is coupled to a reference potential conductor, for example, to a ground conductor GND. The power filter circuit 400 further comprises a stabilizing capacitor 440, wherein a first terminal of the stabilizing capacitor 440 is coupled to the source terminal of the MOSFET 420, and wherein a second terminal of the stabilizing capacitor is coupled to a reference potential conductor (for example, to a ground conductor GND).

[0104] The power filter circuit 400 also includes a regulator 460, wherein the regulator 460 is configured to regulate the difference between a low pass filtered version 470 of the input voltage at the input terminal 410 (or the voltage at the drain terminal of the MOSFET 420) and a reference voltage 472. For example, the regulator 460 may be configured to perform regulation so that the difference between the low pass filtered version 470 of the input voltage and the reference voltage 472 tends to zero (or is zero). For example, the low pass filtered version 470 of the input voltage is derived from the input voltage at the input terminal 410 of the power filter circuit 400 or from the voltage at the drain terminal of the MOSFET 420 using a low pass filter 474, wherein the low pass filter 474 may, for example, include a low pass filter resistor 474a and a low pass filter capacitor 474b. For example, the low pass filter resistor 474a may be coupled in series between an input terminal 474c of the low pass filter and an output terminal 474d of the low pass filter. The low pass filter capacitor 474b may be coupled, for example, between the output terminal 474d of the low pass filter 474 and the ground conductor GND. For example, the reference voltage 472 may be derived from the output voltage at the output terminal 412 of the power filter circuit 420 or from the voltage at the source terminal of the MOSFET 420 using a potential shift, wherein this potential shift may be achieved, for example, by a floating voltage reference 476. For example, the floating voltage reference 476 may function as a voltage source coupled between the output terminal 412 of the power filter circuit (or the source terminal of the MOSFET 420) and the input terminal of the regulator 460. The power filter circuit 400 may include a subtraction functionality 478 that allows the difference between the low pass filtered version 470 of the input voltage and the reference voltage 472 to be adjusted towards or to a desired target value (e.g., towards zero). The output terminal of the regulator 460 is coupled to the gate terminal of the MOSFET 420.

[0105] In the following, the functionality of the power supply circuit 400 which can be considered as an active power supply filter will be described. However, it should be noted that the MOSFET 420 can correspond to the transistor 120, the control capacitor 430 can correspond to the control capacitor 130, the stabilization capacitor 440 can correspond to the stabilization capacitor 140, and the regulator 460, the low-pass filter 474 and the floating voltage reference 476 and the (optional) subtraction functionality 478 can correspond to the regulator 160.

[0106] As can be seen from FIG. 4 , the output voltage of the high current high voltage source 480 is applied to the input terminal 410 of the power filter circuit 400, and the load 490 is coupled to the output terminal 412 of the power filter circuit 400. The supply current provided by the high current high voltage source 480 flows to the load 490 through the drain-source path of the MOSFET 420. In addition, it should be noted that the current flowing through the drain-source path of the MOSFET 420 is generally relatively insensitive to the drain-source voltage of the MOSFET 420, with the limitation that the MOSFET 420 is operated in the active region of its output characteristic field. Due to the effects of the control capacitor 430 and the stabilization capacitor 440 and also due to the limited bandwidth of the regulation loop, relatively fast fluctuations of the voltage at the input terminal 410 of the power filter circuit 400 caused by noise and / or distortion of the supply voltage provided by the high current high voltage source 480 do not significantly affect the voltage at the output terminal 412 of the power filter circuit, but only result in changes in the drain-source voltage of the MOSFET 420. In other words, the high output impedance of MOSFET 420 causes noise and distortion present on the input voltage of the power filter circuit 400 to be decoupled from the output terminal 412 of the power filter circuit. Control capacitor 430 and stabilizing capacitor 440 help maintain the gate-source voltage of MOSFET 420 substantially constant in the presence of such noise and / or distortion on the voltage at the input terminal 410 of the power filter circuit, which helps provide a low noise / low distortion voltage at the output terminal 412 of the power filter circuit.

[0107] However, it should also be noted that the regulator 460 is used to regulate the (average) drain-source voltage of the MOSFET 420, wherein the target drain-source voltage is determined, for example, by the floating voltage reference 476. Therefore, the regulator 460 can effectively provide the gate voltage of the MOSFET 420 so that the (average) drain-source voltage of the MOSFET 420 tends to the target drain-source voltage. This target drain-source voltage is usually selected so that the MOSFET 420 operates in the active region of its output characteristic field and so that the voltage drop on the drain-source path of the MOSFET 420 is relatively low. Therefore, the voltage at the output terminal 412 of the power filter 400 follows the (average) voltage at the input terminal 410 of the power filter circuit (e.g., with good steady-state accuracy). However, due to the limited bandwidth of the regulation loop for regulating the drain-source voltage of the MOSFET 420, which is determined, for example, mainly by the low-pass filter 474, the drain-source voltage of the MOSFET 420 is intentionally not kept constant in the case of rapid fluctuations of the voltage at the input terminal 410 of the power supply filter circuit (such rapid fluctuations of the voltage at the input terminal 410 of the power supply filter circuit can be caused, for example, by noise and distortion).

[0108] In other words, the regulation of the drain-source voltage of the MOSFET 420 to the desired value is intentionally too slow to follow the rapid fluctuations of the input voltage at the input terminal 410 of the power filter circuit, wherein such rapid fluctuations of the input voltage at the input terminal 410 of the power filter circuit only result in a change in the drain-source voltage of the MOSFET 420, but do not substantially affect the voltage at the output terminal 412 of the power filter circuit.

[0109] In the following, the functionality of the circuit will be further explained with reference to Figures 5a, 5b, 6a and 6b. For example, Figure 5a shows a graphical representation of the characteristic curve of a power MOSFET (e.g., model BSC320N20NS3) simulated by LTSpice.

[0110] A graphical representation of a characteristic curve of a power MOSFET, such as power MOSFET 420, is indicated at 500. Abscissa 510 describes the drain-source voltage and ordinate 512 describes the drain current. Graphical representation 500 shows output curves 520, 522, 524 for different gate-source voltages. As can be seen, for a drain-source voltage of 0.5 volts, the power MOSFET operates in the saturation region (with high output impedance) over a wide range of gate-source voltages.

[0111] For example, a drain-source voltage of 0.5 volts may be selected as a regulation target (e.g., for the regulator 460), wherein such regulation of the (average) drain-source voltage has the effect that over a wide range of gate-source voltages (and therefore over a wide range of gate-source currents), the power MOSFET operates in the saturation region. Furthermore, it may be assumed that due to fluctuations in the input voltage at the input 410 of the power filter circuit caused by noise or other distortions, the drain-source voltage of the MOSFET 420 varies around the average value of 0.5 volts defined by the regulation target. However, the regulation target (e.g., 0.5 V) is preferably selected in such a way that for any "normal" fluctuations in the input voltage at the input 410 of the power filter circuit, the transistor 420 remains in the saturation region with a high output impedance (i.e., where the slope of the drain current relative to the drain-source voltage is small). Due to such dimensioning, fast (high frequency) fluctuations in the input voltage do not significantly affect the output voltage at the output 412 of the power filter circuit, but only result in fluctuations in the drain-source voltage of the MOSFET 420.

[0112] Thus, a good attenuation of noise and distortion on the input voltage of the power filter circuit can be achieved, in particular for noise and distortion having a frequency higher than the bandwidth of the regulation loop. In contrast, relatively slow changes of the average input voltage of the power filter circuit will have the effect that the output voltage of the power filter circuit follows these slow changes of the average input voltage with a voltage shift, for example, defined by the floating voltage reference 476. Thus, in such conditions, the operating point, in particular the average drain-source voltage of the MOSFET, will remain constant.

[0113] As an additional remark, it should be noted that the characteristic curve of the power MOSFET shown in Figure 5a has been determined using the LTSpice simulation model shown in Figure 5b with component symbol 550. In other words, the output characteristic curve of the power MOSFET shown in Figure 5a has been created using the variation of the drain-source voltage of the power MOSFET, wherein the gate-source voltage is set to a plurality of discrete values, such as three discrete values.

[0114] However, it should be noted that different power MOSFETs contain similar characteristics, but some details may vary.

[0115] In the following, the effectiveness of the power supply filter circuit 400 will be explained with reference to FIG. 6a and FIG. 6b. For example, FIG. 6a and FIG. 6b show a graphical representation of the noise on the input voltage (FIG. 6a) and the output voltage (FIG. 6b) of the power supply filter circuit 400. The noise is measured by an oscilloscope having a resolution of 5 mV / division at a time resolution of 500 μs / division. A 20 MHz filter bandwidth is used.

[0116] For example, FIG. 6a shows a graphical representation of the noise at the active filter input. The horizontal axis 610 describes time and the vertical axis 612 describes voltage. As can be seen, the peak-to-peak voltage of the distortion at the active filter input is approximately 32 mV. FIG. 6b shows a graphical representation of the noise measured at the active filter output. The horizontal axis 620 describes time and the vertical axis 622 describes voltage. As can be seen in FIG. 6b, the peak-to-peak voltage of the noise is approximately 6 mV. Therefore, it can be appreciated that the power filter circuit 400 can attenuate the noise at the active filter output by approximately five times (in terms of peak-to-peak voltage) compared to the noise at the active filter input.

[0117] However, it is obvious that different effects (and effectiveness) can be achieved with different dimensioning of the power supply filter circuit. Furthermore, the attenuation of noise and / or other distortions will naturally also depend on the frequency content of the noise and / or distortion.

[0118] Furthermore, it should be noted that the power filter circuit 400 according to FIG. 4 may optionally be modified in different ways.

[0119] For example, the MOSFET may be optionally replaced by a bipolar transistor. Also, the polarity of the voltage may naturally be reversed, where the transistor type may be changed from an N-channel transistor to a P-channel transistor. Furthermore, the structure of the regulator may be modified, where it should be noted that the structure shown in FIG. 4 should be considered only as an abstract example.

[0120] Furthermore, any of the features, functionalities and details described herein may be optionally introduced into the power filter circuit 400 according to FIG. 4 .

[0121] Furthermore, the features discussed with respect to the power filter circuit 400 may be optionally introduced into any other embodiments both individually and in combination. 5. According to the power filter circuit in Figure 7

[0122] 7 shows a schematic block diagram of a power supply filter circuit according to another embodiment of the present invention.

[0123] The power filter circuit 700 is similar to the power filter circuit 400. For example, the power filter circuit 700 includes an input terminal 710 corresponding to the input terminal 410 and an output terminal 712 corresponding to the output terminal 412. The power filter circuit 700 also includes a MOSFET 720 corresponding to the MOSFET 420. The power filter circuit 700 further includes a control capacitor 730 corresponding to the control capacitor 430 and a stabilizing capacitor 740 corresponding to the stabilizing capacitor 440.

[0124] It should be noted that the input voltage at the input terminal 710 of the power filter circuit 700 is assumed to be positive relative to the reference potential at the reference potential conductor (or ground conductor) GND. Therefore, the MOSFET 720 is preferably an N-channel MOSFET (NMOS).

[0125] In addition, it should be noted that the actual implementation of the regulator 760 that provides the gate voltage for the MOSFET 720 is slightly different from the regulator 460, but the basic functionality remains the same. The regulator that provides the gate voltage for the MOSFET 720 includes, for example, an integrating regulator that is formed using a differential amplifier (e.g., an operational amplifier) 762, an integrating capacitor 764, and a resistor 766. For example, a reference voltage 772 is provided that is shifted by a predetermined value, such as VREF, relative to the voltage at the source terminal of the MOSFET 720 (or equivalently, relative to the voltage at the output terminal 712 of the power filter circuit). For example, a floating voltage reference 776 may be used, wherein a first terminal (e.g., a positive terminal) of the floating voltage reference 776 may be coupled to an input terminal (e.g., an inverting input terminal) of the differential amplifier 762 via the resistor 766. The second terminal (e.g., negative terminal) of the floating voltage reference 776 may be coupled, for example, to the source terminal of the MOSFET 720 (or equivalently, to the output terminal 712 of the power filter circuit 700). The integrating capacitor 762 may be coupled, for example, between the second input terminal (e.g., inverting input terminal) of the differential amplifier 762 and the output terminal of the differential amplifier 762, wherein the output terminal of the differential amplifier 762 is also coupled to the gate terminal of the MOSFET 720.

[0126] The low-pass filter 774 may, for example, be coupled between the drain terminal of the MOSFET 720 (or equivalently, the input terminal 710 of the power filter circuit 700) and the first input terminal (e.g., the non-inverting input terminal) of the differential amplifier 762. The low-pass filter 774 may, for example, include a low-pass filter resistor 774a and a low-pass filter capacitor 774b. For example, the low-pass filter resistor 774a is coupled between the drain terminal of the MOSFET 720 and the first (e.g., non-inverting) input terminal of the differential amplifier 762, and the low-pass filter capacitor 774b is coupled between the first (e.g., non-inverting) input terminal of the differential amplifier 762 and the reference potential conductor (or ground conductor) GND.

[0127] Thus, the voltage at the first (e.g., non-inverting) input of the differential amplifier 762 is a low pass filtered version of the voltage at the input of the power filter circuit 700 (or equivalently, the voltage at the drain terminal of the MOSFET), and the voltage at the first terminal of the resistor 766 is a voltage shifted version of the voltage at the output 712 of the power filter circuit 700 (or equivalently, the voltage at the source terminal of the MOSFET 720). Thus, the regulation performed using the differential amplifier 762 (and supported by the integrating capacitor 764) is operable to bring the potential at the drain terminal of the MOSFET 720 into line with the voltage shifted potential at the first terminal of the floating voltage reference 776. Thus, as a result, the regulation is operable to bring the voltage between the drain terminal of the MOSFET 720 and the source terminal of the MOSFET 720 into line with the voltage of the floating voltage reference 776. Thus, as a result, the drain-source voltage is regulated to be equal to the reference voltage V REF, at least under steady-state conditions. The low pass filter 774 intentionally prevents rapid regulation, which helps to suppress noise in the supply voltage applied to the input terminal 710 of the power filter circuit.

[0128] However, it should be noted that the power filter circuit 700 according to FIG. 7 may be optionally supplemented by any of the features, functionalities and details disclosed herein, both individually and in combination. 6. According to the power filter circuit in Figure 8

[0129] FIG8 shows a schematic block diagram of a power supply filter circuit 800 according to an embodiment of the present invention. The power supply filter circuit 800 according to FIG8 is similar to the power supply filter circuit 700 according to FIG7. The power supply filter circuit 800 comprises an input terminal 810 corresponding to the input terminal 710 and an output terminal 812 corresponding to the output terminal 712. In addition, the power supply filter circuit 800 comprises a MOSFET 820 having a functionality similar to that of the MOSFET 720, but of the opposite type (P-channel MOSFET or "PMOS"). The power supply filter circuit 800 also comprises a control capacitor 830 corresponding to the control capacitor 730 and a stabilizing capacitor 840 corresponding to the stabilizing capacitor 740. The power supply filter circuit 800 also comprises a regulator 860, which is similar to the regulator 760, but comprises a different circuit structure.

[0130] It should be noted that the power supply filter circuit 800 is configured to filter input voltages that are negative relative to a reference potential at a reference potential conductor (or ground conductor) GND. Therefore, a P-channel MOSFET 820 is used instead of an N-channel MOSFET.

[0131] The regulator includes a differential amplifier (e.g., an operational amplifier) 862, wherein the output of the differential amplifier (e.g., an operational amplifier) is coupled to the gate of the MOSFET 820. An integrating capacitor 864 is coupled between the second (e.g., inverting) input of the differential amplifier 862 and the output of the differential amplifier 862. In addition, it should be noted that the source terminal of the MOSFET 820 is coupled to the second (e.g., inverting) input of the differential amplifier 862 via a resistor 866, wherein the resistor 866 converts the voltage difference between the source terminal of the MOSFET 820 and the second (e.g., inverting) input of the differential amplifier 862 into a current that is integrated on the integrating capacitor 864.

[0132] The use of the floating voltage reference 876 shifts the voltage at the drain terminal of the MOSFET 820, for example, in the positive direction. Thus, a shifted version of the voltage at the drain terminal of the MOSFET 820 is present at a first terminal 872 of the floating voltage reference 876. The first terminal of the floating voltage reference 876 is coupled to a first input (e.g., non-inverting input) of the differential amplifier 862 via a low pass filter 874, wherein a low pass filter resistor 874a is coupled between the first terminal of the floating voltage reference 876 and the first input (e.g., non-inverting) input of the differential amplifier 862. A low pass filter capacitor 874b is coupled between the first input (e.g., non-inverting input) of the differential amplifier 862 and a reference potential conductor or ground conductor GND. A second terminal of the floating voltage reference 876 is coupled to the drain terminal of the MOSFET 820 (or equivalently, to the input 810 of the power supply filter circuit). Thus, a shifted and low pass filtered version of the voltage at the drain terminal of MOSFET 820 is applied to the first input of differential amplifier 862.

[0133] When combined with the integrating capacitor 864, the differential amplifier performs a regulation functionality. The regulation functionality is operable to bring the potential at the first input of the differential amplifier 862 into line with the potential at the second input of the differential amplifier, which effectively means regulating the gate-source voltage of the MOSFET 820 toward (or to) the voltage defined by the floating voltage reference 876. Thus, a basic functionality similar to that of the power supply filter circuit 700 is achieved.

[0134] However, it should be noted that the power filter circuit 800 may be optionally supplemented by any of the features, functionalities and details disclosed herein, both individually and in combination. 7. According to the power filter circuit in Figure 9

[0135] 9 shows a schematic diagram of a power filter circuit according to an embodiment of the present invention. The power filter circuit 900 according to FIG9 includes an input terminal 910 that may correspond to the input terminals 410, 710, and 810. The power filter circuit 900 also includes an output terminal 912 that may correspond to the output terminals 412, 712, and 812.

[0136] For example, the output terminal 910 is intended for applying a positive voltage (positive with respect to a reference potential at a reference potential conductor or ground conductor GND), wherein this positive voltage may be provided, for example, by a DC / DC converter. The load is to be coupled between the output terminal 912 and the reference potential conductor or ground conductor GND. An N-channel MOSFET 920 is coupled between the input terminal 910 and the output terminal 912, wherein the drain terminal of the MOSFET 920 is coupled to the input terminal and wherein the source terminal of the MOSFET 920 is coupled to the output terminal 912. A bypass circuit 922 is coupled in parallel with the drain-source path of the MOSFET 920, wherein this bypass circuit 920 may, for example, comprise a series circuit of two (or more) diodes. For example, the anode of the first diode 922a is coupled to the drain terminal of the MOSFET 920, the cathode of the first diode 922a is coupled to the anode of the second diode 922b, and the cathode of the second diode 922b is coupled to the source terminal of the MOSFET 920. Therefore, the diodes are directed to conduct in the "normal" current direction through the drain-source path of the MOSFET 920 (from the drain terminal to the source terminal). Therefore, when the drain-source voltage of the MOSFET 920 exceeds the sum of the threshold voltages of the diodes 922a, 922b, the bypass circuit 922 becomes conductive. In other words, when the voltage at the input terminal 910 of the power filter circuit exceeds the voltage at the output terminal 912 of the power filter circuit 900 by more than the sum of the threshold voltages of the diodes 922a, 922b, current will flow through the bypass circuit 922, thereby bypassing the drain-source path of the MOSFET 920. Therefore, the drain-source voltage of MOSFET 920 will generally not significantly exceed the sum of the threshold voltages of diodes 922a, 922b of bypass circuit 922. However, it should be noted that the bypass circuit may, for example, include only a single diode, or may include a series circuit of more than two diodes.

[0137] The power supply filter circuit 900 also includes a control capacitor 930 and a stabilizing capacitor 940, wherein the control capacitor 930 corresponds to the control capacitor 430, 730, 830, and wherein the stabilizing capacitor 940 corresponds to the stabilizing capacitor 440, 740, 840. However, it should be noted that the gate resistor 932 is coupled between the first terminal of the control capacitor 930 and the gate terminal of the MOSFET 920. The power supply filter circuit 900 also includes a regulator 960, which includes a differential amplifier or operational amplifier 962 as a core component. An integrating capacitor 964 is coupled between the second inverting input terminal of the differential amplifier 972 and the output terminal of the differential amplifier 972. Another resistor 965 is coupled between the output terminal of the differential amplifier 962 and the first terminal of the control capacitor 930 (wherein the second terminal of the control capacitor 930 is coupled to the reference potential conductor or ground conductor GND).

[0138] The power supply filter circuit 900 comprises a low pass filter 974, wherein the input of the low pass filter is coupled to the drain terminal of the MOSFET 920, and wherein the output of the low pass filter is coupled to the first (non-inverting) input of the differential amplifier 962 via a resistor 975. The low pass filter comprises a low pass filter resistor 974a coupled between the drain terminal of the MOSFET 920 and the output of the low pass filter. The low pass filter 974 further comprises a low pass filter capacitor 974b coupled between the output of the low pass filter 974 and a reference potential conductor or ground conductor GND. Thus, the low pass filter 974 comprises a first order RC low pass filter.

[0139] However, the low-pass filter 974 also includes a bypass circuit 974c, wherein the bypass circuit 974c includes an anti-parallel circuit of two diodes coupled in parallel with the low-pass filter resistor 974a. Therefore, if the voltage across the low-pass filter resistor 974a becomes greater than the threshold voltage of the respective diode, the bypass circuit 974c becomes conductive and bypasses the low-pass filter resistor 974a. Thus, it is achieved that if the voltage at the drain terminal of the MOSFET 920 changes rapidly beyond the threshold voltage of the respective diode of the bypass circuit 974c, the low-pass filter capacitor 974 is quickly reloaded. However, when the difference between the voltage at the drain terminal of the MOSFET 920 and the voltage at the first terminal of the low-pass filter capacitor 974 becomes less than the threshold voltage of the respective diode of the bypass circuit 974c, the bypass circuit 974c becomes substantially non-conductive and the low-pass filter resistor 974a becomes effective again. Thus, for conditions where large, rapid changes in the drain voltage of the MOSFET 920 occur, the reload time constant for reloading the low-pass filter capacitor 974b is significantly reduced by the bypass circuit 974c, but once the voltage at the first terminal of the low-pass filter capacitor 974b is sufficiently close to the voltage at the drain terminal of the MOSFET 920, the low-pass filter becomes effective with a time constant defined by the resistance of the low-pass filter resistor 974a and by the capacitance of the low-pass filter capacitor 974b. In other words, the bypass circuit 974c becomes effective only under conditions where the voltage at the drain terminal of the MOSFET 920 changes rapidly and greatly (greater than the threshold voltage of the diode of the bypass circuit 974c).

[0140] The power supply filter circuit 900 further includes a floating voltage reference 976. The floating voltage reference 976 includes a Zener diode 976a and a bias resistor 976b, wherein the bias resistor 976b and the Zener diode 976a are coupled in series between the positive supply voltage of the differential amplifier 962a and the source terminal of the MOSFET 920 (wherein the source terminal of the MOSFET 920 is coupled to the (negative) supply voltage terminal of the differential amplifier 962 and to the anode of the Zener diode 976a). Therefore, the potential at the first terminal (e.g., cathode) of the Zener diode 976a is shifted (e.g., in the positive direction) relative to the potential at the source terminal of the MOSFET 920 by a value defined by the Zener voltage of the Zener diode. The series circuit of two resistors 976c, 976d is coupled in parallel with the Zener diode 976a, and the tap between the resistors 976c, 976d is coupled to the second (inverting) input of the differential amplifier 962 via the resistor 964. Therefore, the voltage at the tap between the resistors 976c, 976d is shifted relative to the voltage at the source terminal of the MOSFET 920 by a portion of the Zener voltage of the Zener diode 976a, wherein this portion is (primarily) defined by the values of the resistors 976c, 976d.

[0141] Thus, regulation operates to bring the voltage at the tap between resistors 976c, 976d into line with the voltage at the output of low pass filter 974. Thus, in quiescent conditions, the drain-source voltage of transistor 920 is regulated to a value determined by the Zener voltage of Zener diode 976a and by the values of resistors 976c, 976d.

[0142] As a further remark, it should be noted that the power filter circuit 900 includes a voltage source 990 that provides a supply voltage to the differential amplifier 962 that is greater than the voltage at the drain terminal of the MOSFET 920. The power filter circuit 900 also includes a capacitor 992 that is coupled between the positive supply voltage terminal and the negative supply voltage terminal of the differential amplifier 962 and helps stabilize the supply voltage of the differential amplifier 962. In addition, there are diodes 994, 996 that limit the voltage at the first terminal of the control capacitor 930 to a range that is approximately between the negative supply voltage of the differential amplifier 962 and the positive supply voltage of the differential amplifier 962.

[0143] In summary, the power supply filter circuit 900 according to FIG. 9 includes similar functionality compared to other supply voltage filter circuits disclosed herein, but additionally includes bypass circuit 922 and bypass circuit 974 c. Thus, the startup of the circuit system is accelerated and the change of the voltage at the output terminal 912 of the power supply filter circuit is also accelerated (e.g., by bypassing the low-pass filter resistor 974 a).

[0144] Furthermore, it should be noted that the power filter circuit 900 may be optionally supplemented by any of the features, functionalities, and details disclosed herein, both individually and in combination. 8. According to the power filter circuit in Figure 10

[0145] FIG. 10 shows a schematic diagram of a power filter circuit 1000 according to an embodiment of the present invention.

[0146] The power filter circuit 1000 is similar to other power filter circuits disclosed herein and includes an input terminal 1010 and an output terminal 1012. The power filter circuit 1000 is intended for applying a negative voltage (e.g., negative relative to a reference potential at a reference potential conductor or ground conductor GND) at the input terminal 1010. For this reason, the power filter circuit 1000 includes a P-channel MOSFET 1020, wherein the source terminal of the MOSFET 1020 is coupled to the output terminal 1012 and wherein the drain terminal of the MOSFET 1020 is coupled to the input terminal 1010.

[0147] The power filter circuit 1000 also includes a bypass circuit 1022, which includes a series connection of two diodes 1022a, 1022b. For example, the cathode of the first diode 1022a can be coupled to the drain terminal of the MOSFET, the anode of the first diode 1022a can be coupled to the cathode of the second diode 1022b and the anode of the second diode 1022b can be coupled to the source terminal of the MOSFET 1020. Therefore, the direction of current through the bypass circuit 1022 can be the same as the "normal" current direction through the drain-source path of the MOSFET 1020. Therefore, the bypass circuit 1022 can substantially limit the source-drain voltage of the MOSFET 1020 to the sum of the threshold voltages of the diodes 1022a, 1022b.

[0148] The power filter circuit 1000 also includes a control capacitor 1030 and a stabilizing capacitor 1040, wherein the control capacitor 1030 corresponds to the control capacitor 930, and wherein the stabilizing capacitor 1040 corresponds to the stabilizing capacitor 940. In addition, the power filter circuit 1000 includes a resistor 1032 corresponding to the resistor 932. The power filter circuit 1000 also includes a regulator 1060, which includes a differential amplifier 1062. An integrating capacitor 1064 is coupled between a second (e.g., inverting) input terminal of the differential amplifier (e.g., operational amplifier) 1062 and an output terminal of the differential amplifier 1062. In addition, a resistor 1065 is coupled between the output terminal of the differential amplifier 1062 and a first terminal of the control capacitor 1030, wherein the resistor 1065 may correspond to the resistor 965.

[0149] A "floating voltage reference" 1076 is coupled between the drain terminal of the MOSFET 1020 and the input of the low pass filter 1074. For example, the floating voltage reference 1076 comprises a series connection of two resistors coupled between the drain terminal of the MOSFET 1020 and a potential that is increased by a predetermined value (e.g., by 10 V) relative to the potential at the drain terminal of the MOSFET 1020 (e.g., by means of a floating voltage source). Thus, the voltage at the tap between the resistors 1076a, 1076b is shifted (e.g., in a positive direction) by a predetermined voltage (at least in a quiescent situation) compared to the voltage at the drain terminal of the MOSFET 1020. The tap between the resistors 1076a, 1076b is coupled to a first terminal of a low pass filter resistor 1074a, wherein a second terminal of the low pass filter resistor 1074a is coupled to a first terminal of a low pass filter capacitor 1074b. A second terminal of the low pass filter capacitor is coupled to a reference potential conductor or a ground conductor GND. The first terminal of the low-pass filter capacitor also constitutes the output of the low-pass filter and is coupled to the first (non-inverting) input of the differential amplifier 1062 .

[0150] The second input terminal (e.g., the inverting input terminal) of the differential amplifier 1062 is coupled to the source terminal of the MOSFET via a resistor. In addition, it should be noted that the anti-parallel circuit of diodes is coupled between the source terminal of the MOSFET 1020 and the first (non-inverting) input terminal of the differential amplifier 1062, which substantially limits the deviation of the voltage at the first (non-inverting) input terminal of the differential amplifier 1062 and the voltage at the source terminal of the MOSFET 1020 to the threshold voltage of the diodes 1074c, 1074d.

[0151] As an additional remark, it should be noted that there are capacitors 1092, 1093 that stabilize the supply voltage of differential amplifier 1062 and diodes 1094, 1096 that substantially limit the voltage at the first terminal of control capacitor 1030 to a range between the negative supply voltage of differential amplifier 1062 and the positive supply voltage of differential amplifier 1062.

[0152] The voltage at the input of the low pass filter 1074 is shifted by a predetermined value relative to the voltage at the drain terminal of the MOSFET 1020, which is approximately 0.5 V. The low pass filter 1074 is coupled between the tap for this shifted voltage and the first input terminal (the non-inverting input terminal of the differential amplifier 1062). The voltage at the first input terminal (the non-inverting input terminal of the differential amplifier 1062) is limited to a range around the voltage at the source terminal of the MOSFET 1020. Thus, regulation is operable to bring the drain-source voltage of the MOSFET to a value defined by the shift between the voltage at the drain terminal of the MOSFET and the voltage at the input of the low pass filter 1074 (at least in quiescent conditions).

[0153] Regarding the functionality of the power filter circuit 1000, reference is also made to the discussion of the above power filter circuit disclosed in this article.

[0154] Furthermore, it should be noted that the power filter circuit 1000 may be optionally supplemented by any of the features, functionalities and details disclosed herein. 9. Conclusion

[0155] Embodiments according to the present invention create an active power filter for higher voltages. In other words, embodiments according to the present invention create an active filter circuit system for high voltage power applications where extremely low noise is required and standard passive filtering methods require excessive board space.

[0156] It may also be said that the present invention describes an alternative method for actively filtering a noisy DC supply voltage, which is of interest for higher voltages where a high density of circuitry on a printed circuit board (PCB) is desired or required.

[0157] A block diagram of the circuit can be seen, for example, in FIG. 4 .

[0158] In the following, a functional description will be provided. The block diagram of FIG4 gives an overview of the principle of this power filter and load circuit system. The filtering itself is mainly accomplished by these three components: a power MOSFET (e.g., N-MOS for positive supply voltage, e.g., P-MOS for negative supply voltage) between input (IN) and output (OUT), and two capacitors C CTRL and C STAB.

[0159] The MOSFET is preferably operated in the saturation region at a certain V DS. The characteristic diagram of a power MOSFET (shown in FIG. 5 a) shows typical MOSFET behavior. The typical operating region of the active filter is marked by box 530. In this region, the MOSFET acts almost like a current source (a V DS change of about 10 mV causes a small change of I DS or V GS, respectively) at a certain V GS (where V GS is the gate-source voltage, and where V DS is the drain-source voltage, and where I DS is the drain current).

[0160] V DS (drain source voltage) is determined, for example, by a floating reference (V DS equals VREF), and should, for example, be chosen to be as low as possible to minimize power dissipation in the MOSFET, but high enough to filter out noise. V GS equals 0.5 V (or V DS equals 0.5 V) may be a good choice as a starting point.

[0161] The gate-to-GND voltage V CTRL should preferably be kept very stable (or in some cases must be kept very stable) by C CTRL. From a filtering perspective, this voltage can, for example, be assumed to be static (it is, for example, adjusted very slowly by the regulation circuitry). A C CTRL of a few microfarads is preferred (or in some embodiments, even required) to stabilize the output voltage.

[0162] The regulation of V DS is done by the regulator. Both V IN and V OUT (e.g., input voltage and output voltage) should be monitored (or in some embodiments, even need to be monitored) as inputs for regulating V DS (drain-source voltage). V IN should preferably be filtered (or in some embodiments, need to be filtered), for example by a low-pass filter with as low a bandwidth as possible (preferably less than 100 Hz) to obtain a very clean reference signal.

[0163] As regulator, an OpAmp (eg, operational amplifier) is usually used, which can be minimized, for example, with regard to bandwidth and power consumption.

[0164] In the following, a typical application is described. The filtering method described above was tested on a DC / DC converter test board used in the project. The DC / DC converter generates -65 V and -2 A, and V DS in the filter circuit is adjusted to 0.5 V. Figure 6a shows the voltage at the input of the active filter. Figure 6b shows the voltage at the output of the active filter. In both cases, the noise was measured by an oscilloscope with a resolution of 5 mV / DIV, a time resolution of 500 ms / DIV, and a filter bandwidth of 20 MHz.

[0165] Figures 7 and 8 show more detailed block diagrams, wherein Figure 7 shows a block diagram of an active power filter for positive voltages, and wherein Figure 8 shows a block diagram of an active power filter for negative voltages. Figures 9 and 10 show other implementation details. Specifically, Figure 9 shows a schematic diagram of an active power filter for positive voltages, and Figure 10 shows a schematic diagram of an active power filter for negative voltages.

[0166] In summary, a concept has been disclosed that provides a good compromise between voltage quality, implemented workload and power dissipation.

[0167] 100,220,400,700,800,900,1000: Power filter circuit 110,222,410,474c,710,810,910,1010: Input 112,212,214,224,312,474d,482,712,812,912,1012: Output 120: Transistor 130,430,730,830,930,1030: Control capacitor 140,440,740,840,940,1040: Stabilizing capacitors 150,216: Reference potential conductor 160:Adjustment / adjuster 200,310: Power supply configuration 210: Switching Power Converter 270: Graphical representation of the output voltage of a switching power converter 272: Graphical representation of output voltage of power filter circuit 300:Automatic testing equipment 320: Output port 412: output terminal or voltage output terminal 420,720,820:MOSFET 460,760,860,960,1060: Regulator 470: Low pass filtered version 472,772: Reference voltage 474,774,874,974,1074: Low pass filter 474a,774a,874a,974a,1074a: Low pass filter resistor 474b,774b,874b,974b,1074b: Low pass filter capacitors 476,776,876,976,1076: Floating voltage reference 478: Subtraction functionality 480: High current and high voltage source 490: Load 500: Graphical representation of the characteristic curve of power MOSFET 510,610,620: horizontal coordinate 512,612,622: vertical coordinate 520,522,524: output curve 530: Box 550:LTSpice Simulation Model 762,862,1062: Differential amplifier (e.g., operational amplifier) 764,864,964,1064: Integrating capacitors 766,866,965,966,975,976c,976d,1032,1065,1076a,1076b: Resistors 872: First terminal 920:N-channel MOSFET 922,974c,1022:Bypass circuit 922a, 1022a: first diode 922b, 1022b: Second diode 932: Gate resistor 962: Differential amplifier or operational amplifier 976a: Zener diode 976b: Bias resistor 990: Voltage Source 992,1092,1093:Capacitor 994,996,1074c,1074d,1094,1096: Diode 1020: P-channel MOSFET 1066: Control / regulation loop C CTRL: Capacitance C STAB: Capacitor GND: Reference potential conductor / ground conductor V CTRL: Gate to GND voltage V DC: DC supply voltage V DS: Drain-source voltage V GS: Gate-Source Voltage V IN: Input voltage V NOISE: Noise voltage V OUT: Output voltage V REF: Reference voltage

Claims

1. A power filter circuit (100; 220; 400; 700; 800; 900; 1000), wherein the power filter circuit includes a transistor (120; 420; 720; 820; 920; 1020), a control capacitor (130; 430; 730; 830; 930; 1030) and a stabilizing capacitor (140; 440; 740; 840; 940; 1040), wherein a load path of the transistor is coupled between an input terminal (110; 410; 710; 810; 910; 1010) of the power filter circuit and an output terminal (112; 412; 712; 812; 912; 1012) of the power filter circuit, wherein the control capacitor is coupled between a control terminal of the transistor and a reference potential conductor (GND); The stabilizing capacitor is coupled between one source terminal of the transistor and the reference potential conductor; the power filter circuit is configured to adjust a voltage on the load path of the transistor or a voltage between the input terminal and the output terminal of the power filter circuit; the power filter circuit is configured to adjust the voltage on the load path of the transistor (120; 420; 720; 820; 920; 1020) or the voltage between the input terminal (110; 410; 710; 810; 910; 1010) and the output terminal (112; 412; 712; 812; 912; 1012) of the power filter circuit, so that the transistor operates in a saturation region.

2. The power filter circuit (100; 220; 400; 700; 800; 900; 1000) of claim 1, wherein one of the control capacitors (130; 430; 730; 830; 930; 1030) has a capacitance greater than or equal to 10 times the internal capacitance of a transistor between the control terminal of the transistor (120; 420; 720; 820; 920; 1020) and the source terminal of the transistor.

3. The power filter circuit (100; 220; 400; 700; 800; 900; 1000) of claim 1, wherein the power filter circuit includes a resistor (932, 965; 1032, 1065) coupled between an output terminal of a regulator (960; 1060) and a control terminal of the transistor, the regulator being used to regulate the voltage on the load path of the transistor or to regulate the voltage between the input terminal and the output terminal of the power filter circuit, wherein the resistor coupled between the output terminal of the regulator and the control terminal of the transistor is configured together with the control capacitor to form a low-pass filter.

4. The power filter circuit (100; 220; 400; 700; 800; 900; 1000) of claim 1, wherein the power filter circuit is configured to regulate the voltage on the load path of the transistor (120; 420; 720; 820; 920; 1020) to a target of less than or equal to 1 V.

5. The power filter circuit (100; 220; 400; 700; 800; 900; 1000) of claim 1, wherein the power filter circuit is configured to regulate a voltage difference between the input terminal (110; 410; 710; 810; 910; 1010) and the output terminal (112; 412; 712; 812; 912; 1012) of the power filter circuit to a target value less than or equal to 1 V.

6. The power filter circuit (100; 220; 400; 700; 800; 900; 1000) of claim 1, wherein the power filter circuit is configured such that the bandwidth of a control loop (474, 476, 478, 460; 774, 776, 762, 764, 766; 876, 874, 862, 864, 866; 974, 976, 962, 964, 966, 975; 1074, 1076, 1062, 1064, 1066) is limited to a value not exceeding 10 kHz, the control loop being used to regulate the voltage on the load path of the transistor (120; 420; 720; 820; 920; 1020).

7. The power filter circuit (100; 220; 400; 700; 800; 900; 1000) of claim 1, wherein the power filter circuit is configured such that the bandwidth of one of the control loops (474, 476, 478, 460; 774, 776, 762, 764, 766; 876, 874, 862, 864, 866; 974, 976, 962, 964, 966, 975; 1074, 1076, 1062, 1064, 1066) is limited to no more than 10 GHz. The control loop is used to adjust the voltage between the input terminal (110; 410; 710; 810; 910; 1010) and the output terminal (112; 412; 712; 812; 912; 1012) of the power filter circuit, which is a value of kHz.

8. The power filter circuit (100; 220; 400; 700; 800; 900; 1000) of claim 1, wherein a control for adjusting the voltage on the load path of the transistor (120; 420; 720; 820; 920; 1020) or for adjusting the voltage between the input terminal (110; 410; 710; 810; 910; 1010) of the power filter circuit and the output terminal (112; 412; 712; 812; 912; 1012) of the power filter circuit. The control loop (474, 476, 478, 460; 774, 776, 762, 764, 766; 876, 874, 862, 864, 866; 974, 976, 962, 964, 966, 975; 1074, 1076, 1062, 1064, 1066) includes a low-pass filter (474; 774; 874; 974; 1074), wherein the low-pass filter contains a cutoff frequency less than or equal to 10 kHz.

9. A power filter circuit (100; 220; 400; 700; 800; 900; 1000) as claimed in claim 1, wherein the power filter circuit is configured to provide a floating reference potential, the floating reference potential being shifted by a predetermined value relative to an output terminal (112; 412; 712; 812; 912; 1012) of the power filter circuit, and wherein the power filter circuit is configured to perform an adjustment to cause a potential at a terminal of one of the transistors (120; 420; 720; 820; 920; 1020) or at an input terminal (110; 410; 710; 812; 912; 1012) of the power filter circuit. A potential at (0; 910; 1010) is consistent with the floating reference potential; or the power filter circuit is configured to provide a floating reference potential that is shifted by a predetermined value relative to a source terminal of the transistor (120; 420; 720; 820; 920; 1020), and the power filter circuit is configured to perform an adjustment so that a potential at a flow terminal of the transistor or at the input terminal (110; 410; 710; 810) of the power filter circuit is consistent with the floating reference potential; or the power filter circuit is configured to perform an adjustment so that a potential at a flow terminal of the transistor or at the input terminal (110; 410; 710; 810) of the power filter circuit is consistent with the floating reference potential; or the power filter circuit is configured to provide a floating reference potential that is shifted by a predetermined value relative to a source terminal of the transistor (120; 420; 720; 820; 920; 1020), and ...) of the power filter circuit ( A potential at (110; 410; 710; 810; 910; 1010) is consistent with the floating reference potential; or the power filter circuit is configured to provide a floating reference potential that is shifted by a predetermined value relative to a potential at the input terminal (110; 410; 710; 810; 910; 1010) of the power filter circuit, and the power filter circuit is configured to perform an adjustment so that a potential at a source terminal of the transistor or at the output terminal (112; 412; 712; 810; 910; 1010) of the power filter circuit ...2; 412; 712; 810; 910; 1010) of the power filter circuit is consistent with the floating reference potential; or the power filter circuit is configured to provide a floating reference potential that is shifted by a predetermined value relative to a potential at the input terminal (112; 412; 712; 810; 910; 1010) of the power filter circuit is consistent with the floating reference potential; or the power filter circuit is configured to provide a floating reference potential that is shifted by a predetermined value relative to a potential at the input terminal (112; 412; 712; 810; A potential at (112; 912; 1012) is consistent with the floating reference potential; or the power filter circuit is configured to provide a floating reference potential that is shifted by a predetermined value relative to a potential at one of the transistor's inflow terminals, and the power filter circuit is configured to perform an adjustment so that a potential at one of the transistor's source terminals or a potential at the output terminal (112; 412; 712; 812; 912; 1012) of the power filter circuit is consistent with the floating reference potential.

10. The power filter circuit (100; 220; 400; 700; 800; 900; 1000) of claim 1, wherein the power filter circuit includes a bypass path (922, 1022) connected in parallel with the load path of the transistor (120; 420; 720; 820; 920; 1020), wherein the bypass path is configured to conduct when a voltage on the load path of the transistor exceeds a predetermined threshold voltage, and otherwise not conduct.

11. A power filter circuit (100; 220; 400; 700; 800; 900; 1000) as claimed in claim 1, wherein the power filter circuit comprises a low-pass resistor (974a), a low-pass capacitor (974b), an operational amplifier (962), an integrating capacitor (964), and an output resistor (965), wherein the low-pass resistor is coupled between an input terminal of the transistor (920) and a first terminal of the low-pass capacitor (974b), wherein a second terminal of the low-pass capacitor (974b) is coupled to the reference potential conductor (GND), wherein a first input terminal of the operational amplifier is coupled to the first terminal of the low-pass capacitor, wherein a second terminal of the operational amplifier is coupled to a source terminal of the transistor via one or more resistors (966, 976d); wherein the second terminal of the operational amplifier is coupled to an output terminal of the operational amplifier via the capacitor (964); The output terminal of the operational amplifier is coupled to a first terminal of the control capacitor (930) via the output resistor (965), the first terminal of the control capacitor (930) is coupled to a control terminal of the transistor (920), and the second terminal of the control capacitor (930) is coupled to the reference potential conductor.

12. A power supply configuration (200) comprising a switching power converter (210) and comprising a power filter circuit (100; 220; 400; 700; 800; 900; 1000) as claimed in claim 1, wherein an output (212) of the switching power converter (210) is coupled to an input (222) of the power filter circuit.

13. The power supply configuration (200) of claim 12, wherein the adjustment time constant of one of the adjustment loops is at least 20 times greater than the cycle duration of one of the switching power converters, the adjustment loop being used to adjust the voltage on the load path of the transistor or the voltage between the input terminal and the output terminal of the power filter circuit.

14. The power supply configuration (200) of claim 12, wherein the regulation of the voltage on the load path of the transistor or the voltage between an input terminal of the power filter circuit and the output terminal of the power filter circuit is configured such that the regulation does not regulate the change in the voltage on the load path of the transistor caused by the ripple voltage of the switching power converter or the change in the voltage between the input terminal of the power filter circuit and the output terminal of the power filter circuit caused by the ripple voltage of the switching power converter by more than 50% [e.g., such that the voltage on the load path of the transistor follows at least 50% of the ripple voltage].

15. An automatic test apparatus (300) comprising a power supply configuration (200) as claimed in claim 12, wherein the automatic test apparatus is configured to programmably vary a voltage provided by the switching power converter (210) to set a voltage at the output (224) of the power filter circuit (220) to a desired value. The power filter circuit includes a fast-changing mechanism (922, 974c; 1022, 1074c, 1074d) configured to selectively bypass one load path of the transistor (920; 1020) and / or bypass one low-pass filter (974; 1074) in a regulating circuit (974, 976, 962, 964, 966, 975; 1074, 1076, 1062, 1064, 1066). The regulating circuit is used to regulate the voltage on the load path of the transistor (920; 1020) or to regulate the voltage between the input terminal (910; 1010) and the output terminal (912; 1012) of the power filter circuit.

16. A method for actively filtering a supply voltage containing a ripple using a power filter circuit, wherein the power filter circuit includes a transistor, a control capacitor and a stabilizing capacitor, wherein a load path of the transistor is coupled between an input terminal and an output terminal of the power filter circuit, wherein the control capacitor is coupled between a control terminal of the transistor and a reference potential conductor, and wherein the stabilizing capacitor is coupled between a source terminal of the transistor and the reference potential conductor; The method includes using a control capacitor to stabilize a potential difference between the control terminal of the transistor and the reference potential conductor to suppress potential fluctuations at the control terminal of the transistor caused by ripple on the supply voltage applied at the input of the power filter circuit; and the method includes adjusting a voltage on the load path of the transistor or a voltage between the input and output of the power filter circuit with an adjustment time constant that is at least twice as long as a period duration of the ripple on the supply voltage applied at the input of the power filter circuit; and an output voltage is obtained at the output of the power filter circuit.

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