Methods, apparatus, equipment and media for predicting wafers and their surface nanomorphology

Abstract

This application provides a method, apparatus, device, and medium for predicting the nanomorphology of a wafer and its surface, belonging to the field of semiconductor manufacturing technology. The method includes: during wafer fabrication, using a step-type filter to filter and process the acquired surface morphology measurement data of the wafer to obtain a measured nanomorphology value nt; and based on a prediction function, predicting a predicted nanomorphology value NT of the wafer after subsequent processing steps based on the measured nanomorphology value nt.

Description

Technical Field

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Chinese patent application No. 202410895811.6 filed in China on July 5, 2024, the entire contents of which are incorporated herein by reference.

[0003] The present application relates to the field of semiconductor manufacturing technology, and more particularly to a method, device, equipment and medium for predicting wafer and surface nano-morphology thereof. Prior Art

[0004] In the wafer manufacturing process, after a single crystal silicon rod is prepared by the Czochralski method, the single crystal silicon rod is sequentially subjected to wire cutting, grinding, etching, grinding, and chemical mechanical polishing (CMP) and other processing processes to finally obtain a single crystal silicon wafer. For a single crystal silicon wafer, its surface morphology is a key parameter to measure its quality. The surface nanotopography (NT) of the wafer is an important quality parameter among the wafer surface morphology parameters.

[0005] In the relevant scheme, the NT detection of wafers is usually set after the last surface processing process, that is, the CMP process. However, the short-wave-related quality parameters such as nano-morphology are largely determined by the processing process before chemical mechanical polishing. In other words, during the implementation of the relevant scheme, when there is a problem in the processing process before CMP, it can only be discovered after the CMP process. In this way, the wafers that have problems in the processing before CMP still undergo the complete wafer manufacturing process, which is a waste of production resources. Summary of the invention

[0006] In view of this, the present application hopes to provide a method, device, equipment and medium for predicting the nano-morphology of a wafer and its surface, which can predict the predicted nano-morphology value of the wafer after completing the subsequent process based on the measured nano-morphology value of the wafer after completing the current processing process.

[0007] The technical solution of this application is achieved as follows:

[0008] In a first aspect, the present application provides a method for predicting wafer surface nanomorphology, comprising:

[0009] During the processing of the wafer, the surface morphology measurement data of the wafer is filtered and processed using a step-design filter to obtain the measured nano-morphology value nt of the wafer;

[0010] Based on the prediction function , based on the measured nano-topography value nt of the wafer, the predicted nano-topography value NT of the wafer after the subsequent processing flow is predicted.

[0011] In a second aspect, the present application provides a device for predicting wafer surface nano-morphology, the device comprising: a filtering part and a prediction part; wherein:

[0012] The filtering part is configured to filter and process the acquired surface morphology measurement data of the wafer using a step-design filter during the wafer processing process to obtain the measured nano-morphology value nt of the wafer;

[0013] The prediction part is configured to be based on a prediction function , based on the measured nano-topography value nt of the wafer, the predicted nano-topography value NT of the wafer after the subsequent processing flow is predicted.

[0014] In a third aspect, the present application provides a computing device, comprising: a processor and a storage device; the processor is used to execute instructions stored in the storage device to implement the method for predicting wafer surface nanomorphology as described in the first aspect.

[0015] In a fourth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores at least one instruction, and the at least one instruction is used to be executed by a processor to implement the method for predicting wafer surface nanomorphology as described in the first aspect.

[0016] In a fifth aspect, the present application provides a wafer, wherein the predicted nano-morphology value of the wafer is less than 5 nm at a specification of 2 mm*2 mm, and / or less than 10 nm at a specification of 10 mm*10 mm, and the nano-morphology value of the wafer finally obtained is less than 5 nm at a specification of 2 mm*2 mm, and less than 10 nm at a specification of 10 mm*10 mm.

[0017] The present application provides a method, device, equipment and medium for predicting the nano-morphology of a wafer and its surface, and uses a prediction function and the measured nano-morphology value of the wafer after completing the current processing flow to predict the predicted nano-morphology value of the wafer after completing the subsequent process. The predicted nano-morphology value can not only monitor each processing flow to ensure the stability and consistency of the processing equipment used in the processing flow, but also monitor the products of each processing flow to ensure that qualified products enter the next processing flow, improve the micro-morphology quality of the wafer surface, and avoid the subsequent processing flow from processing products with low future qualified possibilities, thereby reducing the processing cost, and can also be used to determine whether there are problems in the process of the completed process to assist in process adjustment. Simple diagram description

[0018] Figure 1 is a flowchart of a method for predicting wafer surface nanomorphology provided by the present application;

[0019] Figure 2 is a schematic diagram of the linear correlation between the predicted NT value and the actual measured NT value obtained based on the sampling data of 100 wafers provided in this application;

[0020] Figure 3 is a schematic diagram of a wafer surface nano-morphology prediction device provided by the present application;

[0021] Figure 4 is a schematic diagram of another wafer surface nano-morphology prediction device provided by the present application;

[0022] FIG5 is a schematic diagram of the structure of a computing device provided by the present application. Implementation

[0023] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention.

[0024] In a related scheme, after the surface of the wafer that has undergone the CMP process is divided into analysis areas according to a set size, the peak and valley values in the filtered measurement data at each sampling point in each analysis area are arranged in ascending order, and the value at the corresponding position in the ascending order is selected according to a set percentile (for example, 99.5%) as the nanotopography (NT) value of the wafer.

[0025] From the perspective of the wafer surface, the filtered measurement data at each sampling point in each area will show the fluctuation phenomenon of the measurement data of each sampling point as a whole. The present invention regards this fluctuation phenomenon as caused by the superposition of wave signals of different wavelengths from the perspective of waves. Different wavelengths can correspond to the size of the area where the waveform phenomenon occurs, that is, the smaller the wavelength of the wave signal, the smaller the size of the area where the fluctuation phenomenon of the measurement data occurs; the larger the wavelength of the wave signal, the larger the size of the area where the fluctuation phenomenon of the measurement data occurs. In the fluctuation phenomenon presented by the measurement data, the signal data with a longer wavelength can include parameters such as bow and warp. These parameters are roughly finalized after the line cutting process, and the subsequent processing process has little effect on them. For the signal data with a shorter wavelength, such as the nano-morphology value, all the front-end processing processes before the CMP process will have an impact on them. The NT value of the wafer obtained by the relevant scheme is the NT value of the wafer after the CMP process. This data can only represent the performance of the entire wafer processing process, and cannot evaluate the performance of each processing process in the processing process. Moreover, as advanced processes place increasingly stringent demands on the surface micromorphology of wafers, each processing flow needs to be monitored to ensure the stability and consistency of the processing equipment used in the processing flow, and the products of each processing flow need to be monitored to ensure that qualified products enter the next processing flow, thereby improving the micromorphology quality of the wafer surface.

[0026] Based on this, the present invention provides a method for predicting wafer surface nano-morphology, the method comprising steps S101 to S102.

[0027] In step S101, during the processing of the wafer, the surface morphology measurement data of the wafer is filtered and processed using a step-design filter to obtain the measured nano-morphology value nt of the wafer.

[0028] In the present invention, the measured nano-topography value of the wafer is obtained after completing any process in the wafer processing. In some examples, after completing any processing process (such as wire cutting), the surface height of the sampling point on the surface of the wafer that has completed wire cutting can be measured by a single-point measurement scheme to obtain the surface topography measurement data of the wafer.

[0029] In the above example, a single measurement scheme is a scheme that can only measure the measurement data at one sampling point in one measurement process. For example, a contact measurement scheme can be used, such as using a probe to contact the surface of the wafer to be measured and move horizontally on the wafer surface. With the horizontal movement, the height difference of the surface of the wafer to be measured will cause the probe to produce a longitudinal displacement, which is sensed by a displacement sensor and the sensed longitudinal displacement value is converted into the height data of the surface of the wafer to be measured, that is, the historical measurement data of the historical wafer surface height. For example, a non-contact measurement scheme using capacitance measurement, laser focusing measurement, etc. can also be used.

[0030] Of course, in some examples, it is also possible to obtain the surface morphology measurement data of the wafer after completing the current processing flow through only one measurement process, such as using optical means (such as Fizeau interferometry, differential interference, etc.) for measurement. The present invention does not elaborate on this.

[0031] Specifically, the sampling spacing used during measurement can be determined by the accuracy of the equipment being measured and the specific recipe. For example, for optical measurement equipment, the sampling spacing can be as low as 0.2 mm. For some capacitive measurement equipment with low accuracy, the sampling spacing can be increased to 4 mm.

[0032] In the present invention, the surface topography measurement data of all sampling points can be viewed as a three-dimensional wave phenomenon from the entire wafer surface. The wave phenomenon can be formed by the superposition of wave signals of different wavelengths. For the NT value, the corresponding wavelength range is 22 microns to 20 millimeters. In some examples, the surface topography measurement data is filtered by a filter to obtain a filter value with a wavelength range from 22 microns to 20 millimeters.

[0033] In some examples, the present invention does not use a fixed-size filter to filter the surface topography measurement data of all sampling points on the wafer surface. The size of the filter changes with the position of the sampling point. For example, the filter is a step-design filter, and the size of the step-design filter can be designed based on the target wavelength range, the sampling interval, and the sampling point position of the wafer surface topography measurement data.

[0034] In the present invention, taking the target wavelength range of 22 microns to 20 millimeters as an example, after obtaining the filter value of the wavelength range from 22 microns to 20 millimeters, the wafer surface can be divided into multiple areas to be analyzed, and the peak to valley (PV) value of the filter value in each area to be analyzed is obtained. After the PV values of all the areas to be analyzed are arranged in ascending power, the PV value is selected according to the set percentile as the measured nano-morphology value of the wafer after the wire cutting is completed.

[0035] In step S102, based on the prediction function , based on the measured nano-topography value nt of the wafer, the predicted nano-topography value NT of the wafer after the subsequent processing flow is predicted.

[0036] In the present invention, the subsequent processing flow refers to the processing flow after the process of obtaining the surface morphology measurement data of the wafer in step S101 during the wafer processing process. For example, it is assumed that step S101 obtains the surface morphology measurement data of the wafer after the wire cutting process, and the subsequent processing flow in step S102 can be the process after the wire cutting process in the wafer processing process, such as a grinding process, an etching process, a grinding process, a CMP process, etc.

[0037] Taking the wire cutting process as an example, the processing process after the wire cutting process is set to form a normal distribution of the NT value of the wafer. Based on this setting, it can be considered that there is a fixed functional relationship between the nano-morphology value of the wafer after completing the wire cutting process and the nano-morphology value of the wafer after completing the subsequent processing process. where NT represents the predicted nano-topography value of the wafer after the subsequent processing flow is completed, and nt represents the measured nano-topography value of the wafer obtained in step S101. This is the calculation expression of the prediction function.

[0038] In the present invention, after the predicted nano-morphology value of the wafer is obtained, the currently completed processing flow can be evaluated.

[0039] In some examples, the working status of the equipment executing the currently completed processing flow can be determined based on the statistics of the predicted nano-morphology values of the wafer to ensure the stability and consistency of the equipment and avoid machine errors. For example, the NT predicted values of all products processed by each equipment every day are monitored. If the NT predicted values are discrete, there are too many outliers, the mean is too large, etc., it indicates that the equipment is unstable and needs to be shut down for maintenance.

[0040] In some examples, whether the wafer should continue to undergo a subsequent processing flow can be determined based on a comparison result between the predicted nanomorphology value of the wafer and a set evaluation index, thereby screening qualified products for release, avoiding the subsequent processing flow from processing products with a low probability of future qualification, thereby reducing processing costs.

[0041] In some examples, the process parameters of the currently completed process flow are adjusted according to the predicted nanotopography value of the wafer. For example, the predicted nanotopography value of the product of each process flow is used to determine whether there is a problem in the process of the completed process flow, so as to assist in process adjustment and be more targeted. In the process adjustment, the predicted nanotopography value can also be used to provide feedback and adjust the process parameters of the process flow.

[0042] By using the technical solution shown in FIG1 , the predicted nanotopography value of the wafer after completing the subsequent process is predicted using the prediction function and the measured nanotopography value of the wafer after completing the current process. The predicted nanotopography value can not only monitor each process to ensure the stability and consistency of the processing equipment used in the process, but also monitor the product of each process to ensure that qualified products enter the next process, improve the microscopic morphology quality of the wafer surface, and avoid the subsequent process from processing products with low future qualified possibilities, thereby reducing the processing cost. It can also be used to determine whether there are problems in the process of the completed process to assist in process adjustment.

[0043] For the technical solution shown in FIG. 1 , in some possible implementations, the size of the step-type design filter described in step S101 can be designed based on the target wavelength range, the sampling interval, and the sampling point position of the surface topography measurement data of the wafer. The specific design process may include:

[0044] Based on the target wavelength range, a filter is determined using a double Gaussian low-pass filter function;

[0045] Determining a critical dimension of the filter according to an upper wavelength limit of the target wavelength range;

[0046] Perform edge shrinkage processing according to the sampling point position;

[0047] When the distance between the sampling point position and the center of the wafer surface is less than or equal to the critical size, determining the radius of the step-type design filter to be the first radius; or

[0048] When the distance between the sampling point position and the center of the wafer surface is greater than the critical size, the radius of the step-type design filter is determined to be a second radius; wherein the first radius is greater than the second radius.

[0049] For the above example, the target wavelength range may be a wavelength of 22 microns to 20 millimeters corresponding to the NT value. In the present invention, the filter may be a circular filter and is composed of a double Gaussian low-pass filter function. Specifically, the filter is determined based on the target wavelength range using a double Gaussian low-pass filter function, including:

[0050] Determine a first Gaussian low-pass filter function whose low-pass filter range covers an upper limit of the target wavelength range;

[0051] Determine a second Gaussian low-pass filter function whose low-pass filter range covers the lower limit of the target wavelength range;

[0052] According to the first Gaussian low-pass filter function G LP1 and the second Gaussian low-pass filter function G LP2, a function G DHP for describing the filter is obtained according to the following formula:

[0053] G DHP = G LP1 (1 - G LP2).

[0054] For example, the relationship between the cutoff wavelength and the standard deviation is defined as , the Gaussian low-pass filter functions are , where λ indicates that the function parameter is wavelength. It should be noted that for the first Gaussian low-pass filter function and the second Gaussian low-pass filter function, the standard deviation of the two is are different, thus being able to retain signals in different wavelength ranges.

[0055] After obtaining the circular filter by the above specific scheme, the range of action of the filter needs to be set according to the position of the sampling point for filtering calculation. Specifically, since the closer the wafer surface is to the edge, the more dramatic its morphological changes are, in order to accurately capture the dramatic morphological changes and effectively capture the surface morphological features of different scales, when the sampling point is close to the edge of the wafer surface, the range of action of the circular filter corresponding to it should be smaller than the range of action of the circular filter corresponding to the sampling point close to the center of the wafer surface, that is, as the sampling point gradually moves away from the center of the wafer surface, the range of action of the corresponding filter should be reduced, or it is called edge shrinkage. In the present invention, the edge shrinkage method is step-type, that is, a critical size is set to judge whether the sampling point is close to the center of the wafer surface or close to the edge of the wafer surface. Compared with being close to the center of the wafer surface, when the sampling point is close to the edge of the wafer surface, the range of action of the filter should be shrunk (k is the edge processing coefficient when shrinking), and when the distance between the sampling point and the center of the wafer surface is greater than the critical size, the second radius is fixedly set to a value smaller than the first radius. Take a 12-inch wafer as an example, its radius R = 150 mm. When measuring, the edge removal (EE, exclude edge) is usually 3 mm, and the upper limit w of the target wavelength range is 20 mm. The critical dimension a can be calculated according to the following formula:

[0056] a=R-EE-0.5*w

[0057] In the present invention, the step radius of the filter is set according to the critical size as shown in Table 1 below. Sampling point location Step radius 0 0.5*w … 0.5*w a 0.5*w a+m k*w(k=0.2) a+2m k*w(k=0.2) … k*w(k=0.2) R k*w(k=0.2) Table 1

[0058] In some examples, when the distance between the sampling point and the center of the wafer surface is greater than the critical size, the second radius is not only smaller than the first radius, but is also set to decrease as the distance between the sampling point and the center of the wafer surface increases, such as linearly decreasing, without having to be set to a fixed value.

[0059] Based on the above implementation, after the circular filter and the radius of its action range are obtained according to the above solution, the filter can be used to filter the surface topography measurement data of the wafer to obtain the measured nanotopography value of the wafer. Specifically, obtaining the measured nanotopography value of the wafer may include:

[0060] After filtering the surface topography measurement data of the wafer using the step-type design filter, a filtering value at each sampling point position is obtained;

[0061] Divide all sampling points into at least one area to be analyzed according to the set size;

[0062] The maximum filter value and the minimum filter value in each area to be analyzed are used to obtain the peak-to-valley (PV) value of each area to be analyzed;

[0063] After PV values of all the areas to be analyzed are arranged in ascending order, PV values are selected according to a set percentile as the measured nano-morphology value of the wafer.

[0064] In the above example, when the sampling point is near the edge of the wafer and the filter's range of action exceeds the edge range of the wafer surface, during the filtering process, the part of the filter's range of action that exceeds the edge range of the wafer surface can be supplemented with data by interpolation filling, or it can be left unfilled. The interpolation filling method can be linear extrapolation, symmetric interpolation, cubic spline interpolation, etc., which will not be described in detail in the present invention.

[0065] In the above example, the division of the area to be analyzed can be determined according to specific surface morphology measurement and analysis requirements. In the present invention, the area to be analyzed is obtained by dividing it according to a uniform grid, that is, on the wafer surface, the data is divided into a number of uniform small grids, each grid is used as an area to be analyzed, and the size of each grid is a square of 10*10 microns or 20*20 microns.

[0066] In the above example, after the PV values of each area to be analyzed are arranged in ascending order, the Nth to last PV value can be selected as the measured nano-morphology value of the wafer according to a specific percentile, such as 99%, 99.5%, etc.

[0067] For the technical solution shown in FIG. 1 , in some possible implementations, the method further includes a process of obtaining a prediction function. Specifically, the process may include:

[0068] Mathematical modeling and fitting are performed based on the nano-morphology values measured by the historical wafer after completing the current processing flow and the nano-morphology values measured by the historical wafer after completing the subsequent processing flow, and the prediction function is obtained by linear fitting or polynomial fitting.

[0069] For the above implementation, in detail, whether it is the measured nano-topography value after completing the current processing flow or the measured nano-topography value after completing the subsequent processing flow, the measured nano-topography value of the historical wafer can be obtained by filtering the surface topography measurement data of the historical wafer using the step-design filter and processing the data. In the specific implementation process, the specific acquisition process of the measured nano-topography value of the wafer is the same as in the above scheme, and the present invention does not elaborate on this.

[0070] For this implementation, in some examples, the specific implementation details of obtaining the prediction function by linear fitting or polynomial fitting may include:

[0071] First, the nano-morphology values of the historical wafer after completing the current processing flow and the nano-morphology values of the historical wafer after completing the subsequent processing flow are organized into a data set, for example, stored in the form of a matrix, where each row in the matrix corresponds to a sample.

[0072] Next, select the appropriate prediction function according to the actual situation. , such as linear function, polynomial function, exponential function, logarithmic function, etc. Taking polynomial fitting as an example, for polynomial fitting, the least squares method is usually used to fit the data, that is, by minimizing the actual observed value NT value and the fitted value ( The residual sum of squares between the values) is used to determine the prediction function Finally, a prediction function that can be applied in actual production is obtained.

[0073] Based on the above technical solution, the present invention is described with a specific embodiment. In this embodiment, 100 bare wafers with a radius of 150 mm after wire cutting are taken as an example. After removing the edge of each bare wafer according to the edge removal amount (EE) of 4 mm, the height data of the surface is sampled and measured by the capacitance method to obtain the surface morphology measurement data of each bare wafer. For example, according to the polar coordinate system with the center of the wafer surface as the pole, uniform sampling is performed, that is, a diameter direction is measured every 45°, and the sampling interval in each diameter direction is 4 mm. In this polar coordinate system, the surface morphology measurement data of 8*37 sampling points can be obtained. From the perspective of the entire wafer surface, each sampling point can be regarded as a pixel point.

[0074] Next, after filtering the surface morphology measurement data of each sampling point by the filter of the aforementioned technical solution, the filtered values of all sampling points are divided into the area to be analyzed according to the size of 10 mm*10 mm, and the PV value of the area to be analyzed is determined according to the filter value of each pixel point (sampling point) in each area to be analyzed. After the PV values of all the areas to be analyzed are arranged in ascending power, the Nth-to-last PV value is selected according to a specific percentile, such as 99%, 99.5%, etc. as the measured nano-morphology value of the bare wafer after the wire cutting is completed.

[0075] Then, the measured nanotopography values of all 100 bare wafers after wire cutting are calculated by fitting functions to obtain the predicted nanotopography values of 100 bare wafers. In this embodiment, the fitting function is obtained by linear fitting based on the data of historical wafers, as shown by the dotted straight line in FIG. 2. In this embodiment, the prediction function is NT=1.9785*nt+5.9023. Among them, nt represents the measured nanotopography value after wire cutting, and NT represents the predicted nanotopography value.

[0076] Finally, taking CMP as an example of the subsequent processing flow, the actual nanomorphology values of the 100 bare wafers after CMP are analyzed to see whether they are correlated with the predicted nanomorphology values. Referring to FIG2 , the predicted nanomorphology values after wire cutting and the actual nanomorphology values after CMP are used as coordinates. The predicted nanomorphology values and the actual nanomorphology values of the 100 wafers selected by the present invention are shown as points in FIG2 . In order to verify whether the predicted nanomorphology value (predicted NT value) and the actual nanomorphology value (actual NT value) are correlated, the residual between the fitting curve and the actual data or the R 2 value of the fitting curve is calculated based on the predicted NT value and the actually measured NT value. For the 100 wafers selected in this embodiment, the correlation between the predicted NT value and the actual NT value is shown in Table 2. Data volume ~100pcs (Predicted NT - Actual NT) R 2 0.485 Table 2

[0077] As can be seen from Table 2, there is a correlation between the predicted NT value and the actual NT value.

[0078] Based on the method for predicting the nano-morphology of the wafer surface provided by the aforementioned technical solution, the predicted nano-morphology value of the wafer is less than 5 nm when the specification is 2 mm*2 mm, and / or less than 10 nm when the specification is 10 mm*10 mm. The nano-morphology value of the wafer is less than 5 nm when the specification is 2 mm*2 mm, and less than 10 nm when the specification is 10 mm*10 mm.

[0079] It should be noted that the process of obtaining the predicted nano-morphology value is before obtaining the nano-morphology value of the wafer. For example, the predicted nano-morphology value can be obtained after the online cutting process, and the nano-morphology value in the wafer can be obtained after the CMP process. Alternatively, the predicted nano-morphology value can be obtained after the CMP process, and the nano-morphology value in the wafer can be obtained when the wafer flows into the back-end semiconductor manufacturing process, which is not described in detail in the present invention.

[0080] Based on the same inventive concept as the above technical solution, referring to FIG. 3 , a wafer surface nano-morphology prediction device 30 provided by the present invention is shown, wherein the device 30 comprises: a filtering part 301 and a prediction part 302; wherein,

[0081] The filtering part 301 is configured to filter and process the acquired surface morphology measurement data of the wafer using a step-design filter during the wafer processing process to obtain the measured nano-morphology value nt of the wafer;

[0082] The prediction part 302 is configured to be based on the prediction function , based on the measured nano-topography value nt of the wafer, the predicted nano-topography value NT of the wafer after the subsequent processing flow is predicted.

[0083] In some examples, the step-design filter size is designed according to the target wavelength range, the sampling interval, and the sampling point position of the surface topography measurement data of the wafer. Accordingly, the filtering part 301 is configured as follows:

[0084] Based on the target wavelength range, a filter is determined using a double Gaussian low-pass filter function;

[0085] Determining the filter critical size according to the upper wavelength limit of the target wavelength range;

[0086] Perform edge shrinkage processing according to the sampling point position;

[0087] When the distance between the sampling point position and the center of the wafer surface is less than or equal to the critical size, determining the radius of the step-type design filter to be the first radius; or

[0088] When the distance between the sampling point position and the center of the wafer surface is greater than the critical size, the radius of the step-type design filter is determined to be a second radius; wherein the first radius is greater than the second radius.

[0089] In some examples, the filtering part 301 is configured as follows:

[0090] Determine the first Gaussian low-pass filter function whose low-pass filter range covers the upper limit of the target wavelength range;

[0091] Determining a low-pass filtering range covering the second Gaussian low-pass filtering function according to the lower limit of the target wavelength range;

[0092] According to the first Gaussian low-pass filter function G LP1 and the second Gaussian low-pass filter function G LP2, a function G DHP for describing the filter is obtained according to the following formula:

[0093] G DHP = G LP1 (1 - G LP2).

[0094] In some examples, the filtering part 301 is configured as follows:

[0095] After filtering the surface topography measurement data of the wafer using the step-type design filter, a filtering value at each sampling point position is obtained;

[0096] Divide all sampling points into at least one area to be analyzed according to the set size;

[0097] The maximum filter value and the minimum filter value in each area to be analyzed are used to obtain the peak-to-valley PV value of each area to be analyzed;

[0098] After PV values of all the areas to be analyzed are arranged in ascending order, PV values are selected according to a set percentile as the measured nano-morphology value of the wafer.

[0099] 4 , the device 30 further includes: the fitting part 303, which is configured to: perform mathematical modeling fitting based on the nano-morphology values measured by the historical wafer after completing the current processing flow and the nano-morphology values measured by the historical wafer after completing the subsequent processing flow, and obtain the prediction function by linear fitting or polynomial fitting.

[0100] In some examples, the filtering part 301 is further configured to obtain the measured nano-topography value of the historical wafer by filtering and processing the surface topography measurement data of the historical wafer using the step-design filter.

[0101] In some examples, referring to FIG. 4 , the device 30 further includes a feedback portion 304 configured as follows:

[0102] Determine the working state of the equipment executing the currently completed front-end processing flow according to the statistics of the predicted nano-topography value of the wafer; or,

[0103] Determining whether the wafer should continue to undergo a subsequent processing flow according to a comparison result between the predicted nano-morphology value of the wafer and a set evaluation index; or,

[0104] The process parameters of the currently completed processing flow are adjusted according to the predicted nano-topography value of the wafer.

[0105] It should be noted that, for the specific implementation of the functions configured by each "part" in the above-mentioned device, reference can be made to the implementation methods and examples of the corresponding steps in the aforementioned method for predicting the nano-morphology of the wafer surface, and no further details will be given here.

[0106] Please refer to FIG. 5, which illustrates a block diagram of a computing device provided by an exemplary embodiment of the present invention. In some examples, the computing device 50 may be at least one of a smart phone, a smart watch, a desktop computer, a laptop computer, a virtual reality terminal, an augmented reality terminal, a wireless terminal, and a portable laptop computer. The computing device 50 has a communication function and can be connected to a wired network or a wireless network. The computing device 50 may generally refer to one of a plurality of terminals. A person with ordinary knowledge in the field to which the present invention belongs may know that the number of the above terminals may be more or less. In some examples, the computing device 50 may receive data based on the wired network or wireless network to which it is connected. It can be understood that the computing device 50 undertakes the calculation and processing work of the technical solution of the present invention, and the present invention does not limit this.

[0107] As shown in FIG. 5 , the computing device in the present invention may include one or more of the following components: a processor 510 and a storage 520 .

[0108] Preferably, the processor 510 uses various interfaces and lines to connect various parts of the entire computing device, and executes various functions of the computing device and processes data by operating or executing instructions, programs, code sets or instruction sets stored in the storage 520, and calling data stored in the storage 520. Preferably, the processor 510 can be implemented in at least one hardware form of digital signal processing (DSP), field-programmable gate array (FPGA), and programmable logic array (PLA). The processor 510 can integrate one or a combination of a central processing unit (CPU), a graphics processing unit (GPU), a neural-network processing unit (NPU), and a baseband chip. The CPU mainly processes the operating system, user interface, and application programs; the GPU is responsible for rendering and drawing the content to be displayed on the touch display screen; the NPU is used to implement artificial intelligence (AI) functions; and the baseband chip is used to process wireless communications. It is understandable that the above-mentioned baseband chip may not be integrated into the processor 510, but may be implemented by a separate chip.

[0109] The storage 520 may include a random access memory (RAM) or a read-only memory (ROM). Preferably, the storage 520 includes a non-transitory computer-readable storage medium. The storage 520 may be used to store instructions, programs, codes, code sets or instruction sets. The storage 520 may include a storage program area and a storage data area, wherein the storage program area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the above various method embodiments, etc.; the storage data area may store data created according to the use of the computing device, etc.

[0110] In addition, a person with ordinary knowledge in the technical field of the present invention can understand that the structure of the computing device illustrated in the above figure does not constitute a limitation on the computing device, and the computing device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently. For example, the computing device further includes a display screen, a camera element, a microphone, a speaker, a radio frequency circuit, an input unit, a sensor (such as an acceleration sensor, an angular velocity sensor, a light sensor, etc.), an audio circuit, a WiFi module, a power supply, a Bluetooth module, and other components, which will not be described in detail here.

[0111] The present invention also provides a computer-readable storage medium storing at least one instruction, wherein the at least one instruction is used to be executed by a processor to implement the wafer surface nano-morphology prediction method described in the above embodiments.

[0112] The present invention also provides a computer program product, which includes computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computing device executes to implement the wafer surface nanomorphology prediction method described in each of the above embodiments.

[0113] The present invention also provides a wafer, wherein the predicted nanomorphology value of the wafer obtained by the wafer surface nanomorphology prediction method described in each of the above embodiments is less than 5 nm in a size of 2 mm*2 mm and / or less than 10 nm in a size of 10 mm*10 mm, and the nanomorphology value of the wafer finally obtained is less than 5 nm in a size of 2 mm*2 mm and less than 10 nm in a size of 10 mm*10 mm.

[0114] A person with ordinary knowledge in the technical field to which the present invention belongs should be aware that in one or more of the above examples, the functions described in the embodiments of the present invention can be implemented by hardware, software, solid or any combination thereof. When implemented by software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or codes on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media includes any media that facilitates the transmission of computer programs from one place to another. Storage media can be any available media that can be accessed by general or special computers.

[0115] It should be noted that the technical solutions described in the present invention can be combined arbitrarily without conflict.

[0116] The above is only a specific implementation of the present invention, but the protection scope of the present invention is not limited thereto. Any person with ordinary knowledge who is familiar with the technical field to which the present invention belongs can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the patent application.

[0117] 30: Prediction device for wafer surface nanomorphology 301: Filtering part 302: Prediction part 303: Fitting part 304: Feedback 50: Computing Devices 510: Processor 520: Storage

Claims

1. A method for predicting the nanomorphic morphology of a wafer surface, the prediction method comprising: During wafer fabrication, a step-type design filter is used to filter and process the acquired surface topography measurement data of the wafer to obtain the measured nano-topography value nt of the wafer. Based on a prediction function, the predicted nano-topography value NT of the wafer after subsequent processing is predicted based on the measured nano-topography value nt of the wafer. The size of the step-type design filter is designed according to the target wavelength range, sampling interval, and sampling point positions of the surface topography measurement data of the wafer. Accordingly, the method includes: determining the filter using a double Gaussian low-pass filter function based on the target wavelength range; determining the critical size of the filter based on the upper wavelength limit of the target wavelength range; performing edge shrinkage processing based on the sampling point positions; determining the radius of the step-type design filter as a first radius when the distance between the sampling point position and the center of the wafer surface is less than or equal to the critical size; or determining the radius of the step-type design filter as a second radius when the distance between the sampling point position and the center of the wafer surface is greater than the critical size; wherein the first radius is greater than the second radius.

2. The prediction method as described in claim 1, wherein, The step of determining the filter based on the target wavelength range using a dual Gaussian low-pass filter function includes: determining a first Gaussian low-pass filter function whose low-pass filtering range covers the upper limit of the target wavelength range; determining a second Gaussian low-pass filter function whose low-pass filtering range covers the lower limit of the target wavelength range; and obtaining a function GDHP to describe the filter according to the following formula based on the first Gaussian low-pass filter function GLP1 and the second Gaussian low-pass filter function GLP2: GDHP = GLP1(1-GLP2).

3. The prediction method as described in claim 1, wherein, The step-filter design is used to filter and process the surface topography measurement data of the wafer to obtain the measured nano-topography value of the wafer. This includes: filtering the surface topography measurement data of the wafer using the step-filter design to obtain the filter value at each sampling point; dividing all sampling points into at least one region to be analyzed according to a set size; obtaining the peak-valley PV value of each region to be analyzed by the maximum and minimum filter values ​​within each region; arranging the PV values ​​of all regions to be analyzed in ascending order, and selecting the PV value based on a set percentile as the measured nano-topography value of the wafer.

4. The prediction method as described in claim 1, wherein the prediction method comprises: Mathematical modeling and fitting are performed based on the measured nanomorphic values ​​of the historical wafer after completing the current processing flow and the measured nanomorphic values ​​of the historical wafer after completing the subsequent processing flow, and the prediction function is obtained by linear fitting or polynomial fitting.

5. The prediction method as described in claim 4, wherein the prediction method comprises: By using the step-type design filter to filter and process the surface morphology measurement data of the historical wafer, the measured nanomorphology values ​​of the historical wafer are obtained.

6. A device for predicting the nanomorphology of a wafer surface, the device comprising: The wafer fabrication process includes a filtering section and a prediction section. The filtering section is configured to use a step-type design filter to filter and process the acquired surface topography measurement data of the wafer during wafer fabrication, obtaining the measured nano-topography value nt of the wafer. The prediction section is configured to predict the predicted nano-topography value NT of the wafer after subsequent processing steps based on the measured nano-topography value nt using a prediction function. The step-type design filter size is designed based on the target wavelength range, sampling interval, and sampling point positions of the wafer's surface topography measurement data. Correspondingly, the filtering section is configured to: determine the filter using a double Gaussian low-pass filter function based on the target wavelength range; determine the critical size of the filter based on the upper wavelength limit of the target wavelength range; and perform edge shrinkage processing based on the sampling point positions. When the distance between the sampling point and the center of the wafer surface is less than or equal to the critical dimension, the radius of the step filter is determined to be a first radius; or when the distance between the sampling point and the center of the wafer surface is greater than the critical dimension, the radius of the step filter is determined to be a second radius; wherein the first radius is greater than the second radius.

7. A computing device, the computing device comprising: Processor and storage; The processor is configured to execute instructions stored in the memory to implement the method for predicting the nanomorphology of a wafer surface as described in any one of claims 1 to 5.

8. A computer-readable storage medium storing at least one instruction, the at least one instruction being executed by a processor to implement a method for predicting the nanomorphology of a wafer surface as described in any one of claims 1 to 5.

9. A wafer, wherein the predicted nanomorphic value NT of the wafer is less than 5 nm for a 2 mm * 2 mm size and less than 10 nm for a 10 mm * 10 mm size, and the nanomorphic value of the wafer is less than 5 nm for a 2 mm * 2 mm size and less than 10 nm for a 10 mm * 10 mm size.

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