Semiconductor device manufacturing system and manufacturing method

Abstract

The purpose of this invention is to provide a technology that can improve the yield of processing. One aspect of the semiconductor device manufacturing apparatus of this invention includes a semiconductor manufacturing apparatus and a wafer temperature calculation system. The semiconductor manufacturing apparatus includes N heaters disposed in N regions within a platform arranged inside a processing chamber, and P temperature sensors disposed in specific measurement locations within the platform. The wafer temperature calculation system includes a memory device that stores a plurality of first correlation data and a plurality of second correlation data. The plurality of first correlation data represents a correlation function between the operating states of the N heaters and the temperatures of L locations on the wafer on the platform, for each of a plurality of pre-obtained temperature distribution conditions. The plurality of second correlation data represents a correlation function between the operating states of the N heaters and the temperatures of the P locations measured by the P temperature sensors, and is paired with each of the plurality of first correlation data.

Description

[Technical Field]

[0001] This invention relates to a manufacturing system and method for semiconductor devices. [Previous Technology]

[0002] With the increasing 3D fabrication of semiconductor devices, the demand for manufacturing technologies that can uniformly fabricate complex device structures within the wafer plane is growing. In the manufacturing of semiconductor devices, a series of semiconductor manufacturing processes, including exposure equipment, thermal processing equipment, dry etching equipment, wet cleaning equipment, film deposition equipment, and CMP (Chemical Mechanical Polishing) equipment, are repeatedly used to form the desired pattern on the entire wafer and fabricate the chip.

[0003] Furthermore, in order to confirm that the manufactured wafer is a good wafer that meets the requirements of the purpose, semiconductor inspection devices such as CD-SEM (Critical Dimension Scanning Electron Microscope), OCD (Optical Critical Dimension), STEM (Scanning Transmission Electron Microscope), TEM (Transmission Electron Microscope), optical film thickness gauge, and ellipsometry are used to measure specific physical quantities such as the size or thickness of the pattern of multiple layers of film formed on the surface of the wafer.

[0004] In measurements using semiconductor inspection equipment, to inspect the number of good wafers obtainable from the wafer surface, measurements are generally performed not on a single location within the wafer surface but on multiple locations. Furthermore, the results of these measurements, such as dimensions or film thickness, are fed back or fed forward to each semiconductor manufacturing apparatus, influencing the wafer processing conditions (process conditions). For example, the operation of the semiconductor manufacturing apparatus is adjusted to achieve processing conditions that result in the desired wafer surface shape, thereby increasing the number of good wafers obtainable from a single wafer surface and improving processing yield. Thus, each semiconductor manufacturing apparatus employs a control method that uses feedback or feedforward control based on data measured by the semiconductor inspection equipment, and possesses a device that "sets the distribution of specific physical quantities within the wafer surface to a desired distribution with uniformity."

[0005] As one method for controlling the in-plane distribution of specific physical quantities such as pattern size or film thickness to a desired distribution, it is well known in the prior art that "when processing a wafer by a semiconductor manufacturing apparatus, the temperature distribution in the in-plane direction of the wafer is controlled." As an example of such prior art, Patent Document 1 addresses the issue of "setting the temperature of the hot plate in a manner that uniformly forms the line width of the resist pattern within the wafer plane," and discloses the following as "a method for setting the temperature of a heat treatment plate, a device for setting the temperature of a heat treatment plate, a program, and a computer-readable recording medium containing the program": "The hot plate of the post-exposure baking apparatus is divided into a plurality of hot plate areas, and the temperature can be set separately for each hot plate area." The method disclosed in Patent Document 1 involves a temperature correction value set for each hot plate region of the hot plate to adjust the temperature within the wafer surface placed on the hot plate. This temperature correction value for each hot plate region is calculated and set using a calculation model based on the correlation between the linewidth of the resist pattern formed by heat treatment on the hot plate and the temperature correction value. The calculation model is based on the measured linewidth of the resist pattern to calculate a temperature correction value that makes the linewidth within the wafer surface uniform. In the post-exposure baking process, which involves "promoting a chemical reaction within the resist film after the resist pattern has been exposed by an exposure apparatus," the in-plane temperature of the heat treatment plate, which is divided into multiple regions and heated individually, is controlled, and the pattern size in the in-plane direction of the wafer held above the heat treatment plate is controlled. Furthermore, the document also discloses a method in which the temperature of the heat treatment plate is calculated based on a pre-obtained formula relating the temperature to the pattern size of the heat treatment plate, which is used to uniformly form the pattern size in the in-plane direction of the wafer. The temperature of each region of the heat treatment plate is then set in a manner that results in this uniform pattern formation within the wafer surface. Additionally, Patent Document 2 discloses a method for adjusting the substrate temperature to improve the uniformity of the CD (Crystal Disc Removal). The method includes a plasma etching system comprising a substrate support assembly having multiple heater regions that can be independently controlled. The plasma etching system is configured to control the etching temperature at specific locations in a manner that compensates for non-uniformity of critical component parameters before and / or after etching. Patent document 2 discloses the following technology: that is, in a plasma etching apparatus, the in-plane temperature distribution that will form a uniform pattern in the wafer surface is calculated based on a pre-obtained relationship between wafer temperature and pattern size, and the output of heater power is controlled in a manner that will be the target in-plane temperature distribution.Furthermore, Patent Document 3 discloses the following regarding dynamic temperature control of a substrate support in a substrate processing system: "The temperature-controlled substrate support used in the substrate processing system comprises a substrate support disposed in a processing cavity. The substrate support comprises N regions and N resistive heating elements, wherein N is an integer greater than 1. A temperature sensor is disposed at one of the N regions. The controller is configured to calculate the resistance of the N resistive heating elements during operation, and in response to the temperature at one of the N regions measured by the temperature sensor, the resistance of the N resistive heating elements, and the resistance ratio of N-1, adjust the power of the N-1 resistive heating elements during the operation of the substrate processing system." Patent Document 3 discloses a method in which the resistance value of a heater in one region is calculated from the resistance value of a single temperature sensor. The relative temperature of this region to the other N-1 regions is then calculated based on the ratio of the heater resistance values ​​of each region. The detection value of the single temperature sensor is used as an indicator to control the heaters in the N regions. Patent Document 4 discloses the following as a plasma processing apparatus and method. "To provide a plasma processing apparatus or method for improving the yield of wafer processing, the apparatus comprises: a processing chamber disposed inside a vacuum container, on which a wafer to be processed is disposed and plasma is formed; a sample stage having a cylindrical shape and disposed within the processing chamber, on which the aforementioned wafer is placed; and a plurality of heaters disposed at each of three or more radial regions, wherein the three or more radial regions include a region disposed inside the sample stage and arranged concentrically around the aforementioned center at a plurality of radii in the radial directions from the center outwards, and a region surrounding the outer periphery of this region." The annular region comprises a plurality of heaters, each of which is disposed in a plurality of arc-shaped regions divided circumferentially around the aforementioned center within at least one of the aforementioned annular regions; and a plurality of temperature sensors disposed below each of the aforementioned plurality of radial regions within the aforementioned sample stage, the number of which is less than the number of the aforementioned plurality of heaters; and a control unit that, after adjusting the output of the aforementioned plurality of heaters in response to the output from the aforementioned temperature sensors in order to bring the temperature of the aforementioned sample stage close to a target value, adjusts the output of each of the aforementioned plurality of heaters to a predetermined value.In Patent Document 4, a plasma etching apparatus is disclosed that "by having a plurality of temperature sensors arranged in a plurality of radial regions, the number of which is less than the number of heaters, and adjusting the output of the plurality of heaters in response to the output from the temperature sensors in order to bring the temperature of the sample stage close to a target value, the output of each of the plurality of heaters is adjusted to a predetermined value, thereby simultaneously achieving the effect of improving the yield of wafer processing and changing the temperature distribution in a short time." [Prior Art Documents] [Patent Documents].

[0006] [Patent Document 1] Japanese Patent Application Publication No. 2006-228816 [Patent Document 2] Japanese Patent Publication No. 2013-513967 [Patent Document 3] Japanese Patent Publication No. 2021-530109 [Patent Document 4] International Publication No. 2021 / 214854 [Summary of the Invention]

[0007] [Problem to be Solved by the Invention] In the prior art described above, new problems arise with the advancement of semiconductor technology in the following situations. That is, when a method is used to "calculate the target in-plane temperature distribution of the circuit pattern of the desired semiconductor element to be formed in the wafer plane based on a pre-obtained relationship between the wafer temperature and the pattern size value (e.g., CD (Critical Dimension) value), and adjust the output of the heater power in a manner that achieves the target in-plane temperature distribution," it becomes necessary to be able to make finer divisions in the in-plane and perform more precise temperature control. However, as the number of heater regions increases, the number of temperature sensors also increases, resulting in increased costs and difficulty in ensuring space for arranging temperature sensors. As a countermeasure, Patent Document 3 discloses a method that uses the heater resistance value of each region instead of temperature sensors. While this method is effective for uniform wafer temperature control, it clearly leads to a decrease in temperature control accuracy when actively applying a temperature gradient within the wafer surface. This is because, due to heat diffusion within the wafer surface, the temperature gradient at the heater section and within the wafer surface differs. Therefore, although the heater temperature can be inferred from the resistance value, the temperature of the wafer section corresponding to the heater location is still affected by the surrounding temperature. On the other hand, Patent Document 4 discloses a method of "controlling the in-plane temperature distribution using a thermal interference matrix that takes into account thermal crosstalk between regions." This method is divided into two steps: "performing feedback control in a way that minimizes the error between the output from a smaller number of temperature sensors than heaters and the target temperature," and "controlling the heater output near the target temperature using a pre-defined thermal interference matrix representing the temperature correlation between regions." This method is effective when controlling a temperature distribution predetermined before the device is used. However, when it's necessary to modify the temperature distribution according to the type of wafer or to flexibly adjust it based on the physical properties of the wafer before etching, it clearly leads to a decrease in the accuracy of temperature control. The reason is the same: the correlation between different regions of the wafer temperature varies depending on the temperature distribution conditions. As a result, deviations from the target temperature occur, leading to problems such as the formed circuit pattern failing to achieve the desired performance, thus impairing processing yield.

[0008] Thus, while prior art has considered reducing the temperature difference of wafers during processing, it has not adequately addressed the wafer processing yield when precise temperature control is required under conditions of large temperature differences. The object of this invention is to provide a technique that improves processing yield. [Means for solving the problem]

[0009] To solve the above problems, a representative semiconductor device manufacturing system of the present invention includes a semiconductor manufacturing apparatus and a wafer temperature calculation system. The semiconductor manufacturing apparatus includes N heaters disposed in N regions within a platform in a processing chamber, and P temperature sensors disposed in specific measurement locations within the platform, wherein N is a positive integer greater than or equal to 1, and P is a positive integer less than or equal to N. The wafer temperature calculation system includes a memory device. The first and second sets of complex correlation data are stored. The first set of complex correlation data is a correlation function showing the relationship between the operating states of the aforementioned N heaters and the temperatures of L locations on the aforementioned wafer platform, for each of the previously obtained complex temperature distribution conditions, where L is a positive integer greater than or equal to 1. The second set of complex correlation data is a correlation function showing the relationship between the operating states of the aforementioned N heaters and the temperatures of P locations measured by the aforementioned P temperature sensors, for each of the aforementioned temperature distribution conditions. The function, and paired with the first relevant data of the aforementioned complex number, the aforementioned wafer temperature calculation system, in a state where the operation of the aforementioned N heaters is controlled by using the first relevant data of the aforementioned complex number in a manner that makes the temperature of the aforementioned L locations on the aforementioned wafer a target temperature distribution, and using the second relevant data of any one of the aforementioned second relevant data of the complex number, calculates the aforementioned P temperature sensors corresponding to the aforementioned temperature distribution conditions. The temperature of the wafer is adjusted by minimizing or reducing the difference between the predicted value of the temperature sensor and the predicted value calculated using the second relevant data, or by selecting a first relevant data pair corresponding to the second relevant data from the plurality of first relevant data in a manner that minimizes or reduces the difference between the measured values ​​of the P temperature sensors calculated at the specific measurement location and the predicted value calculated using the second relevant data, and then adjusting the temperature of the wafer accordingly. [Effects of the Invention]

[0010] According to the present invention, the yield of the process is improved. Problems, configurations and effects other than those described above will become clearer based on the following description of the form in which the invention is carried out.

Implementation Method

[0012] Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention is not limited to these embodiments. Furthermore, in the drawings, identical parts are indicated by the same element symbols. When there are multiple constituent elements having the same or similar functions, different additional characters may be added to the same element symbols for explanation. Also, when it is not necessary to distinguish these multiple constituent elements, additional characters may be omitted in the explanation. The positions, sizes, shapes, and extents of the constituent elements shown in the drawings are for ease of understanding of the invention and may not represent their actual positions, sizes, shapes, or extents. Therefore, the present invention is not absolutely limited to the positions, sizes, shapes, and extents shown in the drawings.

[0013] Furthermore, in this disclosure, the term "surface" may refer not only to the surface of a plate-like member but also to the interface of a layer contained within the plate-like member that is slightly parallel to the surface of the plate-like member. Also, "top" and "bottom" refer to the surfaces shown above or below the drawing when a plate-like member or a layer contained within a plate-like member is illustrated. Additionally, "top" and "bottom" may also be referred to as "first surface" and "second surface." Furthermore, "above" refers to the direction perpendicular to the top when the plate-like member or layer is horizontally placed. The direction opposite to "above" is referred to as "below." Furthermore, "in-plane distribution" refers to the distribution in the in-plane direction. It is also called "distribution in the in-plane direction." For example, when referring to the in-plane orientation (in-plane orientation) of a wafer (hereinafter also referred to as "wafer"), in the case of a wafer being arranged, it refers to the position in the direction parallel to the main plane of the wafer.

[0014] [Example 1] (Configuration of Manufacturing System) FIG1 is a schematic diagram showing the configuration of a semiconductor device manufacturing system according to Embodiment 1 of the present invention. FIG1 schematically shows the overall configuration of the semiconductor device manufacturing system and shows an apparatus, which is a semiconductor wafer processing apparatus such as an etching processing apparatus, used to process the semiconductor wafer to realize the distribution of specific physical quantities (e.g., the shape or size of the circuit pattern formed on the wafer surface) in the in-plane direction of the wafer.

[0015] The semiconductor device manufacturing system of this embodiment includes a semiconductor device manufacturing apparatus 101 (shown as 101a, 101b, ... in this figure) with a plurality of etching processing apparatuses, etc., and includes a plurality of wafer measuring devices 102 (102a~102z) capable of measuring the distribution of specific physical quantities related to the plane of the wafer, and a wafer temperature calculation system 100 that calculates the temperature distribution in the plane direction of the wafer processed by the semiconductor device manufacturing apparatus 101. The semiconductor device manufacturing apparatus 101 has a sample stage (wafer platform) in the processing chamber 1010 (1010a, 1010b, ...) inside the container, on which a wafer is disposed and which has the function of variably adjusting the temperature distribution in the plane direction of the wafer. In the following description, unless otherwise specified, the devices are referred to as semiconductor device manufacturing apparatus 101 and wafer measurement apparatus 102. Furthermore, the wafer temperature calculation system 100, the plurality of semiconductor device manufacturing apparatuses 101, and the wafer measurement apparatus 102 are communicatively connected via wired or wireless communication means to transmit and receive signals to each other. Ideally, for data transmission and reception, the wafer temperature calculation system 100, each semiconductor device manufacturing apparatus 101, and each wafer measurement apparatus 102 are connected to a network such as Ethernet and configured to communicate via that network; however, any configuration capable of transmitting and receiving data is acceptable. For example, they can also be configured to use flash memory such as floppy disks, USB flash drives, or SD memory cards, or recording media such as CDs, DVDs, or Blu-ray discs (registered trademarks) to exchange data.

[0016] Furthermore, the wafer temperature calculation system 100 includes a calculator 103 such as a microprocessor, a memory device 104 that stores and remembers data related to the wafer or software that drives the calculator 103, and an interface 105 that is communicatively connected to a network and sends and receives signals containing data. These components are configured to enable communication. The wafer temperature calculation system 100 can be configured to house the calculator 103, memory device 104, and interface 105 within a computer such as a PC or server. The memory device 104 can also be located at a remote location that is communicatively connected. The semiconductor device manufacturing apparatus 101 and the wafer measurement apparatus 102 do not need to be located in the same building, but can be communicatively located in different buildings or different locations.

[0017] The wafer 205 (described later) processed by each semiconductor device manufacturing apparatus 101 is transferred to one of the plurality of wafer measuring devices 102 (102a~102z), where the distribution of a specific physical quantity that is the object of detection or evaluation in the in-plane direction of the wafer 205 is detected. Furthermore, if necessary, the aforementioned distribution of the specific physical quantity before processing by each semiconductor device manufacturing apparatus 101 can also be detected at one of the wafer measuring devices 102. However, it is not absolutely limited to the case of "immediately detecting a specific physical quantity of the processed wafer 205 after it has been processed by each semiconductor device manufacturing apparatus 101". It can also be configured to transport the processed wafer 205 to the wafer measuring device 102 and detect the distribution of a specific physical quantity in the in-plane direction of the wafer 205.

[0018] Furthermore, the surface of a wafer 205 processed by a single semiconductor device manufacturing apparatus 101 can also be measured using a plurality of wafer measuring devices 102. That is, the wafer 205 processed by the semiconductor device manufacturing apparatus 101a can be first transported to the wafer measuring device 102a, and then transported to the wafer measuring device 102b, and the surface distribution of specific physical quantities of the wafer 205 can be detected at each wafer measuring device.

[0019] (Structure of Wafer Platform) Figure 2 is a schematic longitudinal cross-sectional view showing the structure of the wafer platform 200 provided in the semiconductor device manufacturing apparatus of Embodiment 1. The wafer platform (hereinafter, it is also simply referred to as "platform") 200, as described later, has a circular plate shape that passes through the central axis c1 when viewed in a plane. Since the internal structure of the wafer platform 200 is slightly symmetrical with respect to the central axis c1, the structure on one side from the central axis c1 is described in a simplified manner. The semiconductor device manufacturing apparatus (hereinafter also referred to as "semiconductor manufacturing apparatus") 101 includes N heaters 201 disposed in N (N is a positive integer greater than or equal to 1) regions inside the platform 200 within the processing chamber 1010, and P (P is a positive integer less than or equal to N) temperature sensors 206a and 206d disposed in specific measurement locations inside the wafer platform 200. Specifically, in Embodiment 1, the case of four heaters 201 and two temperature sensors 206a and 206d will be described.

[0020] Each of the semiconductor device manufacturing apparatus 101 in this embodiment has a wafer platform 200 as shown in FIG. 2 inside the processing chamber 1010 inside the container. The wafer platform 200 has a circular plate or cylindrical shape with its central axis communicating with the central axis 11 of the processing chamber 1010 which has a cylindrical shape, and has a plurality of heaters 201 (201a~201d) disposed inside along the metal substrate thereon, and a coolant flow path 204 disposed in a multiple concentric or spiral shape inside the substrate below the heaters 201 and through which coolant for cooling the wafer flows.

[0021] By adjusting the heat generated by the plurality of heaters 201 and adjusting the temperature of the refrigerant flowing inside the refrigerant flow path 204, the temperature distribution of the wafer 205 in the in-plane direction is adjusted when the wafer 205 is placed and held on the upper surface of the wafer platform 200. Furthermore, the upper surface of the wafer platform 200 may also be covered by, for example, a dielectric film. In this embodiment, on the wafer platform 200, each heater 201 is arranged radially in four heater regions (four regions formed between concentric circles and divided into annular shapes; also simply referred to as "regions") on the "upper surface of the wafer platform 200 on which the wafer 205 is placed." For example, concentric annular heaters can be used for the heaters 201. The system is not limited to this example and can also be configured with multiple regions distinguished for multiple radial directions and circumferential directions. The heater power supplies 202 (202a-202d), which are electrically connected to each heater 201, receive command signals from the heater control units 203 that are communicatively connected to these heaters, and adjust the output power (current, voltage) based on these command signals. This adjusts the heat output and temperature of each region 1-4, and even the temperature of the region corresponding to regions 1-4 on the wafer 205 mounted on the wafer platform 200. When there are N heaters 201, each heater power supply 202 is assigned a number from "1 to the number of heater power supplies N" as its name, and is configured to determine, based on this number, which region the heater power supply is connected to. In addition, the name of the heater power supply can be any name as long as it can distinguish each heater power supply. However, in this embodiment, it is set to be a positive integer of 1 to N (N=4).

[0022] In this embodiment, the wafer platform 200 is divided into regions 1 to 4. Region 1 is a circular region located at the center of the wafer platform 200, and is mainly heated by heater 201a. The heater power supply 202a that supplies power to heater 201a is designated as "1". Region 2 is an annular region located outside region 1, and is mainly heated by heater 201b. The heater power supply 202b that supplies power to heater 201b is designated as "2". Region 3 is an annular region located outside region 2, and is mainly heated by heater 201c. The heater power supply 202c that supplies power to heater 201c is designated as "3". Region 4 is an annular region located outside region 2, and is mainly heated by heater 201d. The name of the heater power supply 202d that supplies power to heater 201d is set to "4".

[0023] Furthermore, the specific measurement locations where the temperature sensors are configured are locations located at different positions in the radial direction of the wafer platform 200. Also, the specific measurement locations are at least two locations divided into a center side and an end side from a point at 1 / 2R in the radial direction relative to the radius R of the wafer platform 200. Also, the specific measurement locations are locations that overlap with the lower projection plane of the region of the wafer platform 200 where the heater 201 is configured. In this embodiment, temperature sensors 206a and 206d are configured inside the substrate 207 below the region to detect the temperature of the substrate 207 of the wafer platform 200. In this embodiment, two temperature sensors, 206a and 206d, are configured at the central portion (corresponding to the vicinity of region 1) and the end portion (corresponding to the vicinity of region 4), respectively. In the radial direction, the central portion is located closer to the center than 1 / 2R, and the end portion is located further outward than 1 / 2R. Furthermore, the measurement location of temperature sensor 206a overlaps with the lower projection plane of region 1, and the measurement location of temperature sensor 206d overlaps with the lower projection plane of region 4. The measured values ​​of temperature sensors 206a and 206d are then sent to the heater control unit 203 or the wafer temperature calculation system 100, and the measured temperature information is used in conjunction with data used to set the output of the heater power supply 202 (mutually dependent).

[0024] Furthermore, the refrigerant circulates between the refrigerant flow path 204 and the refrigerant temperature controller connected via a pipe not shown, and is regulated to a pre-defined temperature range at the refrigerant temperature controller. If necessary, refrigerant set to different temperatures can be supplied to each of the plurality of refrigerant flow paths 204. Also, the wafer platform 200 can be configured such that the refrigerant flow path 204 is omitted, provided that temperature control within the wafer plane is sufficient.

[0025] In Figure 2, although the refrigerant flow path 204 is positioned below the heater 201, it can also be positioned above the heater. Furthermore, although not shown in Figure 2, the wafer platform 200 may also be equipped with a holding mechanism such as a mechanical chuck, vacuum chuck, or electrostatic chuck capable of holding the wafer 205 mounted on the wafer platform 200 and suppressing its positional displacement.

[0026] Figure 3 shows an example of the area above the wafer platform 200 as viewed from above. Figure 3 is a plan view schematically showing an example of the arrangement of the area above the wafer platform. In Figure 3(a), an example of a pattern divided into four concentric circles in the radial direction, as in this embodiment, is shown. The wafer platform 200 is divided into areas 1 to 4 from the center in the radial direction. In Figure 3(b), an example of a pattern on concentric circles that are also divided in the circumferential direction is shown. In Figure 3(c), an example of a pattern that divides the area into a grid pattern is shown. In the example of Figure 3(b), in addition to the four concentric circles divided in the radial direction, the area is further divided into eight in the circumferential direction, resulting in 32 areas. Furthermore, in the example of Figure 3(c), the area is divided into rectangles.

[0027] In this embodiment, as long as the desired temperature distribution in the in-plane direction of the wafer 205 can be achieved by appropriately selecting the shape or position of the heater 201 or the output of the heater power supply 202, the size, configuration, and number of regions are not limited to the example shown in FIG3. Similarly, the temperature sensor is not limited to two, as long as it is configured to measure the temperature distribution in the in-plane direction.

[0028] (Wafer Temperature Control) At each semiconductor device manufacturing apparatus 101, a specific correlation exists between "the output (heat generation) of the plurality of heaters 201 provided at each semiconductor device manufacturing apparatus or the output from the heater power supply 202 and the temperature of the refrigerant" and "the temperature corresponding to each region of the wafer 205 placed on the wafer platform 200 (hereinafter also referred to as "wafer temperature")". While specific examples will be described later, this correlation between the heater 201 and the wafer temperature is designated as the first correlation. Similarly, a specific correlation exists between "the output from the heater power supply 202 and the temperature of the refrigerant" and "the measured values ​​(detected values) of the plurality of temperature sensors 206a and 206d placed in the wafer platform 200". This correlation is designated as the second correlation. Ideally, multiple correlations should be maintained based on the pre-obtained in-plane temperature distribution conditions of the wafer (hereinafter also referred to as "temperature distribution conditions" or simply "conditions"). For example, the first and second correlations are maintained as mutually dependent data that also include in-plane distribution conditions, similar to the "first and second correlation pairs" related to "in-plane distribution condition 1", the "first and second correlation pairs" related to "in-plane distribution condition 2", and the "first and second correlation pairs" related to "in-plane distribution condition 3".

[0029] In this embodiment, this correlation is taken as the first correlation, and the temperature distribution in the in-plane direction of the wafer 205 can be predicted by using "data representing the first correlation that has been calculated or obtained in advance" and "the set values ​​of the output of the heater power supply 202 and the temperature of the refrigerant". Alternatively, the temperature distribution in the in-plane direction of the wafer 205 can be set, and the output value of the heater power supply 202 can be inferred by using the first correlation.

[0030] Furthermore, a plurality of temperature sensors 206a and 206d can be configured to detect the temperature and obtain data on the temperature gradient related to the region being processed. Moreover, by comparing the "predicted values ​​of temperature sensors 206a and 206d predicted according to the second correlation" with the "measured values ​​of temperature sensors 206a and 206d during processing," the accuracy of the data on the temperature gradient related to the region can be evaluated. The evaluation of accuracy refers to "selecting the correlation that minimizes the prediction error of the temperature sensor output from among the second correlations maintained as in-plane distribution condition 1, in-plane distribution condition 2, and in-plane distribution condition 3."

[0031] (Acquisition of Prior Data) Regarding the prior data (related data) used in adjusting the temperature of wafer 205, in this invention, the acquisition of prior data is divided into two steps. As prior data, a plurality of first related data (W ak) and a plurality of second related data (W bk) corresponding to the temperature distribution conditions (hereinafter, also simply referred to as "conditions") are acquired. The plurality of first related data (W ak) and the plurality of second related data (W bk) are, for the aforementioned wafer temperature, at least include data corresponding to three temperature distributions: "temperature distribution that is higher at the center than at the ends", "temperature distribution that is higher at the ends than at the center", and "uniform temperature distribution within the wafer surface". First, the first step will be explained.

[0032] The operating state of heater 201 can be calculated using at least one of heater temperature, heater power, and heater current. In this embodiment, the resistance value of heater 201 (hereinafter also referred to as "heater resistance value") is used as a parameter for controlling the output of heater 201. The heater resistance value is calculated based on the heater current and heater voltage associated with heater power supply 202. However, any means that can measure or calculate the heater resistance value, such as heater current and heater voltage, can also be applied in this embodiment. Generally, the resistance of a material changes with temperature; for metallic conductors, the resistance usually increases with rising temperature. A conversion table between the resistance value and temperature of heater 201 is prepared in advance to utilize the correlation between the resistance value and temperature of heater 201. The temperature at which the conversion table is made is measured using a sensor wafer for temperature measurement. The sensor wafer, for example, is a machine that includes a substrate body with the same shape as wafer 205 and a temperature sensor that measures the temperature at multiple locations on the substrate body. The relationship (conversion table) between the resistance values ​​of each heater corresponding to the temperature of each heater of heater 201 is calculated under the condition that a uniform temperature distribution is achieved within the wafer surface. Specifically, the measurement condition is suitable when "there is no temperature distribution within the wafer surface at the wafer platform 200 (the temperature measured by the sensor wafer is included in a specific temperature range (e.g., ±1°C) regardless of any measurement location on the wafer platform 200)". In this embodiment, the heater power is controlled in a way that makes the temperature of the 30 locations output from the sensor wafer uniform, and the heater resistance value and the measured value of the sensor wafer at this time are obtained. Furthermore, the temperature measured by temperature sensors 206a and 206d, which are configured on wafer platform 200, is also obtained simultaneously.

[0033] The reason for setting the wafer platform 200 to a state where the temperature is uniform within the wafer plane (a state where there is no temperature distribution) is to reduce the influence of heat diffusion in the direction within the wafer plane. When the temperature is uniform within the wafer plane, the temperature of heaters 201a to 201d is approximately the same as the temperature of the sensor wafer. In this embodiment, the coordinates of heaters 201 are represented by the coordinates of the central portion of each heater. The coordinates of the central portion of the heater are the position corresponding to the "center of the length (width) of the heater in the radial direction". In addition, although it is ideal to make the measurement points of the sensor wafer and the central portions of each heater approximately the same, in the case of non-uniformity, the in-plane temperature distribution of the wafer sensor can be interpolated based on the measured values ​​of 30 points of the sensor wafer to approximate the temperature of the central portion of each heater.

[0034] The wafer temperature and the resistance value of heater 201 were measured using the above procedure. Figure 4 shows the relationship between the sensor wafer temperature and the heater resistance value. The horizontal axis "sensor wafer temperature" represents the temperature of the sensor wafer (measured value), and the vertical axis "heater resistance" represents the heater resistance value of heater 201. Figure 4(a) shows the relationship between the sensor wafer temperature in region 1 and the heater resistance value R1 of heater 201a calculated from heater power supply 202a. Figure 4(b) shows the relationship between the sensor wafer temperature in region 2 and the heater resistance value R2 of heater 201b calculated from heater power supply 202b. Figure 4(c) shows the relationship between the sensor wafer temperature in region 3 and the heater resistance value R3 of heater 201c calculated from heater power supply 202c. Figure 4(d) illustrates the relationship between the temperature of the sensor wafer in region 4 and the heater resistance value R4 of heater 201d calculated from heater power supply 202d. As shown in Figures 4(a) to (d), the resistance value of heater 201d was obtained under the condition that "the temperature of the sensor wafer is uniform at each measurement location, and the temperature is 10°C, 30°C, and 50°C respectively". In this embodiment, the resistance value of each heater and the corresponding sensor wafer temperature show a slightly linear relationship. Here, a linear approximation (Equation (1)) is made for the relationship between regions 1 to 4, and the conversion coefficients a and b shown in Figure 4(e) are calculated. Figure 4(e) is a conversion table corresponding to the heater resistance value and temperature. Rn represents the heater resistance value (heater resistance value) in region n (in this embodiment, n is an integer from 1 to 4). T_n represents the temperature of the heater at region n (heater temperature). bn represents the intercept of the relationship between the heater resistance Rn and the heater temperature T_n. Also, equation (2) represents the condition that "the temperature T_sw of the sensor wafer is uniform within the wafer plane, and the temperature T_sw of the sensor wafer is equal to the heater temperature T_n at region n".

[0035] The number of measurement sites on the sensor wafer is not limited to 3 points, but at least 2 points are sufficient. Furthermore, when data is obtained from 3 or more points, a polynomial of degree 2 or higher may be used instead of a linear one, and the choice can be made according to the material properties of the heater electrodes or the characteristics of the data obtained.

[0036] Next, the second step of acquiring prior data will be explained. Next, the acquisition of prior data under the condition of "temperature distribution in the direction within the wafer plane" will be explained. Figure 5 is a graph showing the relationship between the temperature of the prior acquired data. Similar to the creation of the "conversion table of resistance value and temperature of heater 201" shown in Figure 4(e), a combination of the sensor wafer temperature Tsw, heater resistance value Rn, and the temperatures (measured values) of temperature sensors 206a and 206d is acquired and a table is created as shown in Figure 5. In Figure 5, there are four zones corresponding to the number of heaters; however, the number of zones on the sensor wafer can be four zones corresponding to the heaters, or it can be more than four zones corresponding to the measurement location of the sensor wafer. Furthermore, the temperatures of temperature sensors 206a and 206d are entered into the corresponding zone column in the table. In this embodiment, temperature sensor readings are input at zones 1 and 4, while zones 2 and 3 are empty and contain no data. Furthermore, when inputting data to the table, it is ideal to input an average value over a certain time span to reduce the impact of noise.

[0037] At this time, data on the temperature distribution of both the central part of the wafer platform 200 and the opposite, the temperature distribution of the central part of the wafer platform 200 and the temperature distribution of the opposite, the temperature distribution of the central part of the wafer platform 200 and the temperature distribution of the opposite, the temperature distribution of the central part of the wafer platform 200 and the temperature distribution of the opposite, the temperature distribution of the central part of the wafer platform 200 and the temperature distribution of the opposite, the temperature distribution of the opposite, the temperature distribution of the opposite, the temperature distribution of the opposite, the temperature distribution of the opposite, the temperature distribution of the opposite, the temperature distribution of the opposite, the temperature distribution of the opposite, the temperature distribution of the central part of the wafer platform 200 and ... As one example, when the heater has a concentric circular structure, the temperature distribution of the sensor wafer at the corresponding location is generally higher on the inner side (50℃ (temperature of region 1), 40℃ (temperature of region 2), 30℃ (temperature of region 3), 20℃ (temperature of region 4)) and (45℃, 40℃, 35℃, 30℃) from the center, or as another example, higher on the outer side (10℃, 20℃, 35℃, 45℃) from the center). The resistance value of the heater, the temperature of the sensor wafer, and the measured values ​​of the temperature sensors 206a and 206d below the heater are recorded respectively.

[0038] In this embodiment, as shown in FIG. 5(a), three types of temperature distributions were generated and data was obtained under condition 1, which states that "the temperature of the center portion of the sensor wafer is 25°C or more higher than the temperature of the ends." These temperature distributions are designated as temperature distributions 1-1, 1-2, and 1-3, respectively. Specifically, they are (50°C, 40°C, 30°C, 20°C) (temperature distribution 1-1) and (50°C, 40°C, 25°C, 10°C) (temperature distribution 1-2). Furthermore, as shown in FIG. 5(b), three types of temperature distributions were generated and data was obtained under condition 2, which states that "the temperature of the center portion of the sensor wafer is 10°C to 25°C higher than the temperature of the ends." These temperature distributions are designated as temperature distributions 2-1, 2-2, and 2-3, respectively. Specifically, the temperature distributions are (45℃, 40℃, 35℃, 30℃) (temperature distribution 2-1) and (50℃, 50℃, 45℃, 40℃) (temperature distribution 2-2). Furthermore, as shown in Figure 5(c), the condition 5, which states that "the temperature in the center of the sensor wafer is reduced by more than 25°C compared to the temperature at the ends," was used to generate three types of temperature distributions (5-1, 5-2, 5-3) ((10°C, 20°C, 35°C, 45°C) (temperature distribution 5-1), (15°C, 30°C, 45°C, 60°C) (temperature distribution 5-2)). As shown in Figure 5(d), the condition 4, which states that "the temperature in the center is reduced by 10°C to 25°C compared to the temperature at the ends," was used to generate three types of temperature distributions (4-1, 4-2, 4-3) ((10°C, 15°C, 20°C, 25°C) (temperature distribution 4-1), (15°C, 18°C, 22°C, 24°C) (temperature distribution 4-2)), and data was obtained. Furthermore, as shown in Figure 5(e), under condition 3, which states that "there is no temperature distribution within the wafer surface and the temperature is uniform," three types of temperature distributions are generated: (3-1, 3-2, 3-3) (10℃, 10℃, 10℃, 10℃) (temperature distribution 3-1), (30℃, 30℃, 30℃, 30℃) (temperature distribution 3-2), and (50℃, 50℃, 50℃, 50℃) (temperature distribution 3-3). In this way, three types of temperature distributions are generated under five conditions, and data has been obtained in advance.

[0039] Furthermore, although not used in this embodiment, it is still possible to obtain data on discontinuous gradient conditions, such as the temperatures of regions 1 to 4 being (50°C, 50°C, 50°C, 30°C), and use this as a sixth or subsequent condition in addition to the aforementioned five conditions. This is so that thermal diffusion is considered not for the entire wafer, but for a portion of the wafer.

[0040] The above-mentioned prior data acquisition procedure was used to obtain data on the temperature of the sensor wafer, the heater resistance value, and the temperature sensors 206a and 206d under the following five conditions: "the temperature of the sensor wafer is uniform (condition 3, temperature distribution 3-1 to 3-3)", "the temperature of the central part is high and the temperature difference is large (condition 1, (temperature distribution 1-1 to 1-3) and the temperature difference is small (condition 2, temperature distribution 2-1 to 2-3)", and "the temperature of the central part is low and the temperature difference is large (condition 5, temperature distribution 5-1 to 5-3) and the temperature difference is small (condition 4, temperature distribution 4-1 to 4-3)".

[0041] Here, Equation (1) is used to convert the heater resistance value into the heater temperature, and temperature data of three elements—the sensor wafer temperature, the heater temperature, and the temperature sensor—are obtained. In addition, in order to consider the heat diffusion within the wafer surface, Equation (3) assumes that "the sensor wafer temperature Tsw at region n and the heater temperature Th_n at region n are different." Therefore, it is considered that "although the sensor wafer temperature in region 3 of temperature distribution 1-1 and region 3 of temperature distribution 3-2 is the same at 30°C, there may be a situation where the heater resistance value is different, and as a result, there is a possibility that the heater temperature Th_3 may also be different."

[0042] Next, the relationship between the temperature Tsw of the sensor wafer and the temperature Th of the heater (the first correlation relationship) was extracted. The matrix representing this relationship is denoted as Wa. Matrix Wa may be represented as "this is a thermal interference matrix representing the correlation between the temperature Tsw of the sensor wafer and the temperature Th of the heater". The number of rows of Wa is equal to the number of measurement sites on the sensor wafer or the number of sites inferred from the temperature of the wafer platform 200 interpolated by the sensor wafer, and the number of columns is equal to the number of heaters disposed on the wafer platform 200. In addition, in the following explanation, the prefix n representing the region is omitted when it is not necessary to specify the region.

[0043] The elements of matrix Wa are calculated by performing the following two stages of processing. As the first process, the elements of the first row of matrix Wa will be explained. The first related data (Wak) and the second related data (Wbk) are calculated as a linear combination of matrices. Specifically, element Wa_11 of the first row of matrix Wa corresponds to the temperature of the portion of wafer 205 corresponding to region 1 when only heater 201a is used for heating, and element Wa_12 corresponds to the temperature of the portion of wafer 205 corresponding to region 1 when only heater 201b is used for heating. The elements of Wa can be obtained by performing and obtaining all heaters using a procedure as described above, where "the temperature of the sensor wafer is measured one by one while operating each heater individually". Alternatively, it can also be calculated by thermal simulation. Alternatively, Wa of other devices with a similar configuration to heater 201 can be used as an estimate.

[0044] As a second process, the value obtained in the first process is combined with the correlation in the state where multiple heaters 201 are operated simultaneously at the semiconductor device manufacturing apparatus 101. The temperature data of temperature distributions 1-1, 1-2, and 1-3 under condition 1, which is "the temperature of the central part is 25°C or more higher than the temperature of the end part", and Wa obtained in the first process are used as initial values, and the elements of matrix Wa are fine-tuned in a way that makes the difference between the left and right sides of equation (5) smaller. As an example, as shown in equation (6), the gradient descent method is used to correct each element of matrix Wa. m is the number of forms of the data obtained in advance. When the optimization is performed with the three forms of the temperature distribution under condition 1, m=3. η is the learning rate. Equation (6) is repeated until Wa new converges. Let the converged and corrected matrix be Wa1, which is the matrix with respect to condition 1.

[0045] Similarly, the matrix after correcting Wa using the temperature distribution data 2-1, 2-2, and 2-3 of condition 2 is denoted as Wa2. By individually correcting for each of the five temperature distribution conditions, matrices Wa1 to Wa5, which infer the wafer temperature of wafer 205 based on the heater temperature Th, are calculated. In addition, in the following explanation, although conditions 1 to 5 of the first correlation are indicated by superscript, when there is no distinction between conditions, the superscript is omitted.

[0046] As shown in the tables of Figures 5(a) to 5(e), the measured values ​​of temperature sensors 206a and 206d are also maintained in the data acquisition used to determine the elements of the matrix Wa. Using the same procedure as that used to calculate the elements of Wa, a matrix Wb representing the relationship between the heater temperature Th and the measured values ​​Ts of temperature sensors 206a and 206d is obtained, as shown in Equations (7) and (8). Matrix Wb may be represented as "a thermal interference matrix representing the correlation between the measured values ​​Ts of temperature sensors 206a and 206d and the temperature Th". The number of rows in matrix Wb is the number of temperature sensors 206a and 206d, which is 2 in this embodiment. The number of columns is the number of heaters 201, which is 4 in this embodiment. The matrix Wb, which is derived from the heater temperature Th, representing the measured values ​​Ts of temperature sensors 206a and 206d, is calculated individually for each of the five conditions of the temperature distribution, resulting in Wb1 to Wb5.

[0047] The Wa1~Wa5 and Wb1~Wb5 calculated here are respectively associated with each other and maintained. As shown in Figure 5(f), when the thermal interference matrices Wak and Wbk are set for the condition k (k is an integer of any one of 1 to 5), a prior data acquisition DB (database) for storing the thermal interference matrices Wak and Wbk is constructed. The prior data acquisition DB may be included in the memory unit (not shown) of the semiconductor device manufacturing apparatus 101, or in the memory device 104 of the wafer temperature calculation system 100. For example, the system can also be configured as follows: the wafer temperature calculation system 100 includes a memory device 104, which stores a plurality of first correlation data (Wak, (k=1, 2, ...)) and a plurality of second correlation data (Wbk). The plurality of first correlation data (Wak, (k=1, 2, ...)) is a correlation function between the operating states of N heaters 201 and the temperatures of L (L is a positive integer greater than 1) locations on the wafer 205 on the wafer platform 200, for each of the aforementioned multiple temperature distribution conditions. The plurality of second correlation data (Wbk) is a correlation function between the operating states of N heaters 201 and the temperatures of P locations measured by P temperature sensors, for each of the aforementioned temperature distribution conditions, and is paired with the aforementioned plurality of first correlation data. Furthermore, the prior data acquisition database is not limited to hardware and can also be constructed via the cloud. This concludes the prior data acquisition process.

[0048] (Method for calculating wafer temperature) Next, the method for calculating the recipe setting value of the wafer temperature actually processed will be explained using Figure 6. Figure 6 is a flowchart for setting the temperature target value input into the recipe.

[0049] Hereinafter, the operation of "using the wafer temperature calculation system 100 to calculate the target temperature distribution in the in-plane direction of the wafer 205 at one of the semiconductor device manufacturing apparatuses 101" will be described. In addition, although the following description is given as an example of "using the semiconductor device manufacturing apparatus 101a as the object of calculating the target temperature distribution and using the wafer measuring device 102a as the device for detecting a specific physical quantity", the same operation can also be performed when other semiconductor device manufacturing apparatuses or wafer measuring devices are used in the embodiments of the present invention.

[0050] The wafer temperature calculation system 100 has the function of "storing the data in a readable and writable manner at each wafer platform 200 within each semiconductor device manufacturing apparatus 101 by means of the relationships represented by matrices Wa and Wb, and updating the data as needed". This data is data that is periodically transmitted and received between the wafer temperature calculation system 100 and the semiconductor device manufacturing apparatus 101 and is kept identical at both locations. When the structure of the wafer platform 200, including the heater 201 and the heater power supply 202, or the temperature of the refrigerant, is changed, the information related to the change is stored in the wafer temperature calculation system 100 and remembered during the periodic transmission and reception of the data, and is reflected in its operation. This enables the use of data shared for any wafer 205 to achieve the target temperature distribution and perform high-precision processing of the wafer 205.

[0051] First, in step 601, the wafer temperature calculation system 100 has the function of correlating the "processing recipe for processing the wafer 205 at the semiconductor device manufacturing apparatus 101a" with "data on the distribution of a specific physical quantity in the in-plane direction measured at the wafer measuring device 102a for the processed wafer 205". Here, the processing recipe also includes data on the in-plane temperature distribution of the target wafer 205 set at the wafer platform 200, or the output value or resistance value of each heater power supply 202. This allows for correlating the "temperature distribution of the wafer 205 at the semiconductor device manufacturing apparatus 101" with the "distribution of a specific physical quantity in the in-plane direction of the wafer 205 measured by the wafer measuring device 102".

[0052] Furthermore, the wafer temperature calculation system 100, when "the distribution of a specific physical quantity of the wafer 205 in the in-plane direction is detected before the wafer 205 is processed at the semiconductor device manufacturing apparatus 101a", has the function of also relating the data to the processing recipe of the semiconductor device manufacturing apparatus 101a. By setting it in this way, it is possible to relate the "distribution of a specific physical quantity of the wafer 205 in the in-plane direction before and after processing at the semiconductor device manufacturing apparatus 101a" to each other, and to relate the "temperature distribution in the in-plane direction of the wafer set at the semiconductor device manufacturing apparatus 101a" to the "distribution of the change in the specific physical quantity before and after processing" based on the difference in the distribution of the physical quantity before and after processing.

[0053] Furthermore, in step 602, the wafer temperature calculation system 100 also has the function of calculating the correlation between "the set value of the temperature distribution of the wafer 205 in the in-plane direction at the semiconductor device manufacturing apparatus 101a" and "the distribution of a specific physical quantity of the wafer 205 in the in-plane direction", and storing and memorizing this as data related to the semiconductor device manufacturing apparatus 101a. In this disclosure, this correlation is referred to as the third correlation. For example, the third correlation can be calculated by processing two or more wafers 205 at the semiconductor device manufacturing apparatus 101a using different temperature distribution settings before processing the wafer 205 used to manufacture semiconductor devices, and then using data from the wafer measurement device 102a where each wafer 205 is transported and a specific physical quantity is detected.

[0054] That is, the third correlation is calculated by using the result of mutually corresponding additions of "conditions for different temperature distributions set for two or more wafers 205" and "data of detection results of the distribution of specific physical quantities in the in-plane direction for each wafer 205". Figure 7 is a diagram of the prior data used to calculate the temperature target value input to the formula. Figure 7 shows the measurement results used to calculate the third correlation with CD value as a physical quantity. As a method for calculating the third correlation, the least squares method with linear or polynomial approximation can be used, but other methods can also be used.

[0055] Figure 7(a) illustrates the CD value (CD 1) and wafer temperature T W_1 at region 1. Wafer temperature T W_1 is the temperature set for region 1 as specified in the "processing recipe used in the semiconductor device manufacturing apparatus 101a," and CD 1 is the CD value detected when "the wafer 205, after undergoing the processing specified in the processing recipe, is measured in the wafer measuring apparatus 102a." Here, in the three processing recipes, different wafer temperatures T W_1 are set, resulting in wafers that have undergone three different processing methods. The CD value is measured for each wafer. Furthermore, linear interpolation is applied between the wafer temperature T W_1 and the CD value, and the result is presented as a straight line. Furthermore, the points indicated by the dashed lines correspond to the CD values ​​that should be formed in region 1, and the dashed lines are drawn in a vertical direction in a way that shows the wafer temperature corresponding to the linearly interpolated straight line and the desired CD value. Also, dashed lines parallel to the horizontal axis are marked at the upper and lower limits of the range that serves as the control target for the CD value.

[0056] Similarly, Figure 7(b) shows the CD value (CD 2) and wafer set temperature T W_2 at region 2; Figure 7(c) shows the CD value (CD 3) and wafer temperature T W_3 at region 3; and Figure 7(d) shows the CD value (CD 4) and wafer temperature T W_4 at region 4. In all cases, the CD values ​​for the set temperatures of the three wafers are measured.

[0057] Figure 7(e) shows the relationship between the slope an and the intercept bn when linear interpolation is performed for the CD value and the wafer temperature T W_1. The relationship shown in Figure 7(e) is equivalent to "the third correlation when a specific physical quantity is the CD value".

[0058] Next, at step 603, the wafer temperature calculation system 100 has the function of "using the memorized third correlation to calculate the target temperature distribution at the wafer platform 200 of the semiconductor device manufacturing apparatus 101a, which uses a target function with a specific physical quantity as the minimum". As the target function in this embodiment, for example, it can be listed as "setting a target value of a specific physical quantity on a plurality of coordinates in the in-plane direction of the wafer 205, calculating the squared value of the difference between "the target value at a specified coordinate on the surface of the wafer 205" and "the predicted value at that specified coordinate calculated according to the third correlation", and adding the squared value at a plurality of specified coordinates".

[0059] The target value of the specific physical quantity used in calculating this objective function does not necessarily need to be set to the same value in the in-plane direction of wafer 205. It can also be set to a target value that is different at each coordinate, generally meaning "the result of processing (e.g., the processed shape) can be obtained in the in-plane direction of wafer 205." Furthermore, even for the same coordinates on wafer 205, the target value in the processing process can differ depending on the type, content, or conditions of the preceding and following processing. Thus, in this embodiment, an appropriate objective function is set, and the temperature distribution in the in-plane direction of wafer 205 that minimizes the set objective function is calculated. The target temperature distribution during the processing of wafer 205 is calculated in a way that achieves the desired distribution of physical quantities after processing.

[0060] (Processing at the Wafer Temperature Calculation System) Referring to FIG8, the process of performing processing at the semiconductor device manufacturing apparatus 101a based on the conditions calculated at step 603 of FIG6 will be described. FIG8 is a flowchart showing the operation of wafer temperature control related to Embodiment 1. The wafer temperature calculation system 100 controls the operation state of the N heaters 201 by using the aforementioned plurality of first relevant data (Wa) in a state in which the temperature of the aforementioned L locations of the aforementioned wafer 205 becomes the target temperature distribution. The difference between the measured values ​​of the aforementioned P temperature sensors 206a and 206d corresponding to the aforementioned temperature distribution conditions and the predicted values ​​of the aforementioned P temperature sensors calculated using any of the aforementioned plurality of second relevant data (Wb) is minimized or does not reach a specific value. The following is an example of the case where the wafer temperature Tw is set to (50°C, 42°C, 35°C, 30°C) in step 603.

[0061] Step 801 involves inputting the target value of the wafer temperature Tw. For example, the wafer temperature Tw calculated at step 603 in Figure 6 is input into the wafer temperature calculation system 100. When a wafer temperature is individually set for each region, the individual wafer temperature Tw_n for each region is input.

[0062] Next, at step 802, the target values ​​of the heater temperature Th and the heater resistance value Rn are calculated. Specifically, the wafer temperature calculation system 100 has the function of "using a matrix Wa representing the first correlation at the semiconductor device manufacturing apparatus 101a to calculate the temperature of the heater power supply 202 connected to each region and the corresponding resistance value for implementing the calculated target temperature distribution". Equation (9) is an example of calculating the heater temperature Th based on the wafer temperature distribution. The heater temperature Th is calculated based on the wafer temperature Tw in step 801 and the inverse matrix of the matrix Wa representing the first correlation. Here, the temperature of the central part (50°C in region 1) is higher than the temperature of the end (30°C in region 4), and the difference is 20°C. Based on this, the heater temperature Th was calculated by using Wa 2, which satisfies condition 2, from the matrix Wa representing the relationship between the sensor wafer temperature T sw and the heater temperature Th (first correlation relationship) at the time the prior data was obtained, as Wa = Wa 2. In addition, in the following explanation, since the sensor wafer temperature T sw in equation (4) is closest to the temperature of wafer 205 itself, the temperature distribution in equation (9) is calculated by treating the sensor wafer temperature T sw as the wafer temperature TW.

[0063] Next, in steps 802 to 809, the operating state of the heater 201 is set by the heater resistance value Rn. The heater resistance value Rn of the heater 201 in the process is detected and set by feedback control using the heater resistance value Rn calculated based on any one of the first relevant data (W ak) as the control target R0 n.

[0064] First, at step 802, the system then uses equation (1) to calculate the corresponding heater resistance value Rn from the heater temperature T h, and sets this value as the control target value.

[0065] Next, at step 803, the predicted value of the temperature sensor is calculated. As shown in equation (8), the predicted value Tsp of the temperature detected by the temperature sensors 206a and 206d located below is calculated using matrix Wb2. Here, the predicted value of temperature sensors 206a and 206d is set as Tsp, and the measured value of temperature sensors 206a and 206d is set as Tsm to distinguish them. In addition, the measured value Tsm of temperature sensors 206a and 206d refers to the time average of the measured value. For example, in equation (7), although it is set as the measured value Ts, the measured value is affected by the response speed of temperature change, so in the following description, a time average is used. The matrix Wb used here is in conjunction with Wa2 used in step 802, and Wb2 is used. In this embodiment, two temperature sensors are used. The predicted values ​​from temperature sensors 206a and 206d, which have a matrix Wb 2, are represented as (Tsp 2,1, Tsp 2,2). Furthermore, regarding the time average, for example, when the temperature is measured every 0.1 seconds, the average of the temperatures measured at 10 points within 1 second can be used. The method for calculating the time average can be appropriately set.

[0066] At step 804, when the device begins processing, the heaters 201 in each region are controlled. For example, the wafer temperature calculation system 100 notifies the heater control unit 203 of the target value of the heater resistance, and the heater control unit 203 controls the heater power supply 202 based on the heater resistance value. If the heater 201 is heated, the heater resistance value Rn of each heater is calculated at the heater control unit 203. In this embodiment, the power Pn and voltage Vn of the heater 201 in region n are constantly obtained, and the heater resistance value Rn of each heater 201 is calculated according to equation (10). However, since the resistance value Rn cannot be calculated using equation (10) before the heater is heated, the resistance value Rn is calculated using the measured value Tsm of the temperature sensors 206a and 206d and equation (1).

[0067] Next, at step 805, it is determined whether the heater resistance value Rn falls within the target range. When it does not fall within the target range (No), the heater resistance value Rn is fed back to the wafer temperature calculation system 100. The calculator 103 receiving this information calculates the magnitude of each power supply based on the software algorithm read from the memory device 104, taking into account the difference between the heater resistance value Rn and the target value. The calculator 103 adjusts the heating of the heater electrodes and the amount of heating for the heater power supply 202. For example, if the calculated value of the heater resistance value Rn in region n at time t is set as Rn(t), and the target value is set as R0n, then the current I(t) supplied to the heater electrodes that are the electrodes of each heater 201 is calculated, as shown in equation (11). Although Equation (11) is an example of PI (Proportional-Integral) control, it can also be used with PID (Proportional-Integral-Differential) control, depending on the application. In addition, Kp and Ki are specific constants.

[0068] The calculated value Rn(t) of the heater resistance value Rn of each heater 201 includes two elements: "the change in the heater's own temperature and resistance caused by the change in heater current I(t)" and "the change in heater resistance caused by the influence of wafer temperature." These two elements result in a difference in response speed. The change in resistance caused by the influence of wafer temperature is a relatively slow change due to thermal conduction. When using feedback control, since it is ideal to include the influence of wafer temperature, a delay time can also be set at the calculated value Rn(t) of the heater resistance value Rn. In other words, the heater resistance value Rn being processed has a delay time. At time t, the heater resistance value Rn at time (tu) before its delay time u is used to calculate the error between it and the control target, and feedback control is performed. For example, the error ΔR(t) between the heater resistance value Rn(t) at the current time t seconds and the target value R0n can be delayed by 10 seconds, just like ΔR(t) = R0nRn(t-10). Furthermore, to reduce the noise in the calculated value Rn(t) of the heater resistance value Rn, for example, the moving average of complex data between (t-10) seconds and (t-8) seconds can be used as the calculated value Rn(t) of the heater resistance value Rn.

[0069] In addition, during the temperature control process in steps 804 and 805, the user interface of the wafer temperature calculation system 100 and the semiconductor device manufacturing apparatus 101 can also display the transition of the wafer temperature predicted by equations (1) and (4) based on the heater resistance value Rn. Furthermore, the heater temperature Th can also be calculated using equation (1) based on the calculated value Rn(t) of the heater resistance value Rn, and the output of the temperature sensors 206a and 206d can be predicted. When the heater resistance value Rn reaches the target value R0n, or at step 803, the system uses matrices Wb1~Wb5 to calculate the predicted values ​​of the temperature sensors for each sensor: (Tsp1,1, Tsp1,2), (Tsp2,1, Tsp2,2), (Tsp3,1, Tsp3,2), (Tsp4,1, Tsp4,2), and (Tsp5,1, Tsp5,2). These predicted values ​​can also be displayed on the user interface.

[0070] When the heater resistance value Rn falls within the target range (step 805, Yes), the process moves to step 806. The measured and predicted values ​​of the temperature sensors are obtained by selecting any two locations from a specific measurement site, and these are the measured and predicted values ​​corresponding to the aforementioned two locations. Specifically, in step 806, the measured values ​​Tsm (Tsm,1, Tsm,2) of the temperature sensors 206a and 206d at the two locations are obtained. Using the data from these temperature sensors 206a and 206d, the in-plane slope of the wafer temperature is inferred.

[0071] Next, at step 807, it is determined whether the temperature distribution falls within an appropriate range based on the predicted value Tsp and the detected value Tsm of these temperature sensors 206a and 206d. As an example, a value is selected that minimizes the difference ΔTslk between the predicted value Tslpk (=Tspk,1-Tspk,2, where k is an integer from 1 to 5 representing the type of matrix Wbk) of the temperature measured by temperature sensors 206a and 206d shown in equations (7) and (8) and the difference measured value Tsl,m (=Tsm,1-Tsm,2) which is the difference between the measured values ​​of temperature sensors 206a and 206d, and it is determined whether it is consistent with the current (Wb2). When the conditions are consistent (step 807, Yes), the system moves to the next processing step (step 810). Alternatively, it can replace "selecting the k that will minimize the difference ΔT sl k" with selecting the k that will not reach a specific value.

[0072] When there is no consistency (step 807, No), at step 808, the k of the matrix Wbk that minimizes the difference ΔTslk is displayed as the recommended value for matrix change. If, at step 807, the difference ΔTslk falls outside the appropriate range, an alarm may be issued at step 808 notifying that the temperature distribution has deviated from the setting, and the policy of "what procedure should be used to improve control" may be presented as described later. Alternatively, using the first wafer, one set of first and second relevant data is selected from the first and second relevant data corresponding to the conditions, and the selected first and second relevant data are used to heat and process the second wafer. Specifically, at step 808, only an alarm can be displayed, and the wafer can be moved to the next step 810 as a dummy wafer. Alternatively, at step 809, the target value of temperature control can be updated (step 802) by the method described later, and temperature control in step 804 can be performed again.

[0073] Next, at step 809, the target value for temperature control is updated according to the recommended value shown in step 808. The temperature adjustment of wafer 205 includes updating the first relevant data (Wak) of the aforementioned complex number of wafer 205 in the process. Specifically, assuming that at step 808 it is determined that ΔTslk is smaller than when k=1 compared to k=2, the applicable matrix is ​​updated to Waa1 and Wab1. Then, returning to step 802, the target value R0n(t) of the heater resistance value Rn is updated using equation (9), and the processing after step 803 is performed. In addition, Wa is represented in matrix form, but at step 809 in FIG8, it is shown in dot plot form for easy understanding.

[0074] (Function, Effect) According to the above embodiment, in the semiconductor device manufacturing apparatus 101 and the wafer temperature calculation system 100 that use a plurality of heaters 201 inside the wafer platform 200 to adjust the temperature and distribution of the wafer 205 placed on the wafer platform 200, a smaller number of temperature sensors 206a and 206d than a plurality of heaters 201a to 201d are used to determine whether an in-plane distribution of the target wafer temperature has been achieved, and the appropriate temperature distribution for achieving the target is selected from the thermal interference matrix maintained by the semiconductor device manufacturing apparatus 101 and the wafer temperature calculation system 100, thereby improving the processing yield.

[0075] Furthermore, after calculating the target temperature distribution for forming the desired shape in the in-plane direction of the wafer using the pre-obtained relationship between the wafer temperature and a specific physical quantity, the amount of power supplied to the plurality of heaters to achieve the target temperature distribution is calculated. In temperature control, this enables the detection of a wafer temperature distribution deviating from the target by using a smaller number of temperature sensors relative to the number of regions, providing a means to reduce the error between the temperature distribution and the target while also addressing the issues of cost and space constraints associated with the increase in the number of sensors. Furthermore, this allows for the suppression of temperature deviations from the desired temperature during wafer processing.

[0076] [Example 2] Example 2 differs from Example 1 in that a determination threshold value is used in the process of determining whether the temperature distribution falls within an appropriate range based on the predicted value Tsp and the detected value Tsm of temperature sensors 206a and 206d. In other words, the wafer temperature calculation system 100 selects a pair of first correlation data (Wak) from a plurality of first correlation data in such a way that the difference between the measured values ​​of P temperature sensors 206a and 206d calculated at a specific measurement location and the predicted value calculated using the second correlation data (Wbk) is minimized or does not reach a specific value. In the following description, the same or equivalent components as those in Embodiment 1 above are given the same element symbols, and their descriptions are simplified or omitted.

[0077] Figure 9 is a flowchart illustrating the operation of wafer temperature control related to Embodiment 2. Steps 801-806 and 810 of Embodiment 2 are the same as steps 801-806 and 810 of Embodiment 1. Furthermore, steps 807a-809a of Embodiment 2 correspond to steps 807-809 of Embodiment 1. In Embodiment 2, as shown in Figure 9, the method of "using the temperature distribution determination threshold (step 811) to make a judgment at step 807a" is described. When the temperature distribution falls within the allowable value, the processing yield can be improved by omitting excessive parameter adjustments.

[0078] Figure 10 is a flowchart illustrating the operation of determining the temperature distribution in connection with Embodiment 2. Figure 10(a) is a diagram explaining the details of step 807a, showing the process of "determining the temperature distribution in step 807a and moving to a more appropriate temperature control in steps 808a and 809a". Figures 10(b) to 10(d) illustrate the relationship between the predicted and measured values ​​of temperature sensors 206a and 206d.

[0079] First, as step 901, a threshold value related to temperature accuracy is set. Step 901 corresponds to step 811 in Figure 9. This can also be set as a process recipe; in this embodiment, as one example, it is set to 3°C.

[0080] Next, at step 902, the temperature gradient between the two temperature sensors 206a and 206d is calculated. Specifically, the difference between Tslp2 (=Tsp2,1-Tsp2,2) and Tsl,m (=Tsm,1-Tsm,2) is calculated, and it is determined whether its absolute value is greater than the decision threshold value assigned at step 901. When it is smaller than the decision threshold value (step 902, Yes), it is highly likely that "the in-plane temperature distribution at temperature sensors 206a and 206d has been correctly predicted". At this time, for example as shown in Figure 10(b), the slope of the in-plane direction of the temperature (temperature of each region) is slightly the same between the predicted value and the decision value, and the state is that "the difference between the predicted value and the decision value is below the decision threshold value". Since this represents "the prediction using matrix Wb2 is accurate", it is inferred that "matrix Wa2, which is kept in pair with matrix Wb2, is also capable of accurately representing the in-plane temperature gradient". The above content is equivalent to the determination in step 807a of Figure 9.

[0081] When the value at step 902 is larger than the threshold value, (step 902, No), the process moves to step 903 and determines the relationship between the predicted value and the measured value. Specifically, the predicted value Tslp2 (=Tsp2,1-Tsp2,2) and the differential measured value Tsl,m (=Tsm,1-Tsm,2) are calculated. When the differential measured value is larger than the threshold value, that is, when Tslp2-Tsl,m<-3, it means that the temperature measured by the temperature sensor in the central part is relatively higher than the predicted value. That is, it means that "the actual in-plane distribution under the setting that the temperature in the central part is high is higher than the predicted temperature, and the gradient is large" (Fig. 10(c)). Alternatively, it could mean that "the actual in-plane distribution under the setting of a low temperature in the central part is higher than the predicted temperature in the central part, and the gradient is smaller" (Fig. 10(d)). The deviation between the predicted temperature gradient in this in-plane distribution and the sensor detection value depends on the matrix Wb and represents the possibility of improvement.

[0082] In this embodiment, assuming that Wb2 is used with the temperature of the central portion being high, and the temperature of the central portion is higher than predicted, the determination in step 903 is Yes. This situation represents an underestimation of the effect of heat diffusion from the central portion toward the ends, and the central portion is overheated. Therefore, as shown in step 903y, it is determined that it is appropriate to change the thermal interference matrix Wb to the inner high condition. That is, this means that matrix Wb, with matrix Wb1 where the heat diffusion from the central portion toward the ends is greater (i.e., the temperature of the central portion is relatively higher), is more likely to make the predicted in-plane distribution consistent with the actual measurement.

[0083] Conversely, when the determination in step 903 is No, and it is because the temperature gradient calculated based on the temperature sensor output is a smaller relationship of Tslp2-Tsl,m>3, it indicates that the effect of heat diffusion from the center to the ends has been overestimated. Therefore, as shown in step 903n, it is determined that it is appropriate to change the thermal interference matrix to an external height condition. That is, this means that matrix Wb is more likely to reduce the error between the predicted and measured in-plane distribution if the heat diffusion from the center to the ends is smaller than Wb3. The process of selecting (Wak, Wbk) (k is one of 1, 3, 4, 5) for the current thermal interference matrix pair (Wa2, Wb2) (steps 903, 903y, 903n) is equivalent to step 808a in Figure 9.

[0084] Based on the above processing, a suitable thermal interference matrix (Wak, Wbk) is selected in step 904. In step 905, the temperature gradient error TslpkTsl,m obtained from the selected thermal interference matrix is ​​maintained and set as an index when the matrix selection process is repeatedly performed.

[0085] Furthermore, although step 906 is not a necessary element in this invention, it is described in relation to an additional temperature adjustment process. Assuming that, based on steps 902 and 903, it is known that although the magnitude of the temperature distribution slope within the wafer plane is roughly the same at the predicted and measured values ​​of temperature sensors 206a and 206d, the predicted value is generally shifted towards the high-temperature side. In this case, to ensure consistency between the measured and predicted temperature values, a process is implemented to correct the heater resistance value of the control target. Specifically, when the measured values ​​of temperature sensors 206a and 206d at region 1 are lower than the predicted values, the output of heater 201 is increased. The temperature difference detected by temperature sensors 206a and 206d is ΔTsk,1 = Tspk,1 - Tsm,1 (k is the same as Wak and Wbk, which represent the type of thermal interference matrix, and in this embodiment, it is one of 1 to 5). The temperature difference ΔTh of heater 201 corresponding to the temperature difference ΔTsk,1 between temperature sensors 206a and 206d is calculated according to the following formula. In addition, in formula (13), k, which represents the type of thermal interference matrix, is omitted. Steps 904 to 906 are equivalent to step 809a in Figure 9.

[0086] Using the correlation shown in Figure 4, the difference ΔR of the heater resistance value corresponding to this ΔT h is calculated, and the target value of the heater resistance value in step 802 is updated from R to R+ΔR, and then proceeds to step 803.

[0087] [Example 3] In Example 3, an example of temperature distribution determination when there are three or more temperature sensors will be described. In Example 1, a temperature sensor 206a is arranged in region 1 and a temperature sensor 206d is arranged in region 4. In Example 3, a state in which temperature sensors 206a, 206c, and 206d are arranged in regions 1, 3, and 4 will be described.

[0088] In the flowchart of the wafer temperature control operation in Figure 8 of Embodiment 1, regarding steps 801 to 806, the number of temperature sensor prediction values ​​Tp in step 803 and temperature sensor outputs Ts in step 806 are increased due to the number of temperature sensors. Otherwise, this is also common to Embodiment 3.

[0089] When there are three temperature sensors in Embodiment 3, in step 803, the predicted values ​​of each temperature sensor are calculated as follows: (Tsp1,1, Tsp1,2, Tsp1,3), (Tsp2,1, Tsp2,2, Tsp2,3), (Tsp3,1, Tsp3,2, Tsp3,3), (Tsp4,1, Tsp4,2, Tsp4,3), and (Tsp5,1, Tsp5,2, Tsp5,3). Furthermore, in step 806, (Tsm,1, Tsm,2, Tsm,3) are obtained as the measured values ​​Tsm of the temperature sensors.

[0090] Even with three sensors, the method is the same as in Embodiment 1, capable of selecting the thermal interference matrix that minimizes the difference between the predicted and measured values ​​based on the in-plane temperature gradient. Figure 11 illustrates one example of the method for selecting the thermal interference matrix related to Embodiment 3. Figure 11(a) shows a comparison of each pair of matrix pairs Wak and Wbk, and Figure 11(b) shows a comparison of the differences between the matrix pairs.

[0091] As shown in Figure 11(a), the predicted and measured values ​​are plotted with the wafer center as the origin, relative to the radius of the temperature sensor. A linear approximation is performed using the least squares method, and the thermal interference matrix pair with the closest slope between the predicted and measured values ​​is selected. In Figure 11(a), the predicted values ​​are marked with white circles, and the measured values ​​with black circles. Solid lines represent the approximate curves of the predicted values, and dashed lines represent the approximate curves of the measured values. While Figure 11(a) shows a comparison for conditions 1 and 2, the matrix pairs for other conditions are also compared in the same way. Alternatively, as shown in Figure 11(b), the error for each region can be calculated separately for each matrix, and the standard deviation σ of the errors at the three points can be calculated, with σ being the smallest condition selected.

[0092] [Example 4] In this example, a method for controlling wafer temperature using heater power will be described. Figure 12 is a graph showing the correlation between temperature and prior data obtained in Example 4. In this example, since the heater resistance value Rn is not used, the correlation between three parameters—the sensor wafer temperature Tsw, the heater power Ph, and the measured values ​​Ts of temperature sensors 206a and 206d—is obtained in the prior data acquisition process, as shown in Figure 12. Furthermore, equations (4) and (7) are replaced as in equations (15) and (16).

[0093] Although the matrices (Wa, Wb) are labeled with the same symbols as in Embodiment 1, the values ​​of the matrix elements differ from those in Embodiment 1 because they represent the relationship between the heater power Ph and the measured values ​​Ts of the temperature sensors 206a and 206d. Figure 13 is a flowchart illustrating the operation of wafer temperature control related to Embodiment 4. Although it is slightly the same as Figure 8, the target value set at step 8024 is the heater power Ph, and there is no feedback from step 805 to step 804. These are the differences from Embodiment 1. The acquisition of the measured values ​​Ts of the temperature sensors 206a and 206d at step 806, and the determination of the temperature distribution at steps 807 and 808, are the same as in Embodiment 1.

[0094] In this embodiment, since there is no feedback control, temperature control at the heater control unit 203 is simplified. Furthermore, by using the predicted and measured values ​​of temperature sensors 206a and 206d, and further using the slope information between multiple temperature sensors, compared to simply monitoring the temperature using the measured values ​​of temperature sensors 206a and 206d, more information can be obtained by relating to the in-plane distribution. When there is a significant deviation from the desired conditions, information can be obtained that can be used as a basis for updating the thermal interference matrix.

[0095] (Example) Figure 14 shows a comparison between the present disclosure using multiple temperature sensors and the prior art, such as Patent Document 3, which uses a single temperature sensor (with the aim of controlling the in-plane distribution of wafer temperature to be uniform) (in the case of offset correction between the temperature sensor and the temperature sensor). Figure 14 is a diagram comparing the effects of the present invention and the prior art, and shows an example where Wa1 and Wb1 are applied as initial values ​​of the thermal interference matrix. Step 1001 is an overlay depiction of the predicted and measured values ​​of the temperature sensor in steps 803 and 806 of Figure 8. In addition, the triangular dots represent the predicted values, and the round dots represent the measured values ​​(detected values, actual values). In regions 2 and 3, the measured values ​​are also recorded when it is assumed that a temperature sensor is present. In the prior art, a temperature sensor was only configured in region 4, and the target value of the overall heater resistance was updated based on the temperature error in region 4. The error between the predicted and measured values ​​of the corrected temperature sensor, as in step 1002, is minimized in region 4 but increased in region 1. At this point, although it is impossible in actual processing, if the wafer temperature is measured, as in step 1003, although it is slightly consistent with the target value T sw_4 using equation (4) in region 4, the measured value in region 1 is about 4°C lower than the target value.

[0096] In contrast, in this disclosure, at step 1001, attention is paid to the temperature difference between region 1 and region 4, and the thermal interference matrix Wb, representing the correlation between the heater's operating state and the temperature sensor, is corrected. In this embodiment, after changing from Wb 1 to Wb 2, as in step 1004, the predicted value and the measured value become slightly consistent. At step 1005, the result of "updating matrix Wa from Wa 1 to Wa 2 based on the correction of this matrix Wb, and measuring the wafer temperature" is shown. As shown in the graph in step 1005, the target value and the measured value are slightly consistent.

[0097] Furthermore, the present invention is not limited to the embodiments described above, but also includes various modifications. For example, the embodiments described above are provided in detail for the purpose of making the present invention easier to understand, and the present invention is not limited to including all the configurations described. Also, a portion of the configuration of one embodiment may be replaced with the configuration of another embodiment, and the configuration of another embodiment may be added to the configuration of one embodiment. Furthermore, other configurations may be added, removed, or replaced for a portion of the configuration of each embodiment.

[0098] Hereinafter, embodiments that constitute the content of the present invention will be described; however, the present invention is not limited thereto. (Session 1) A semiconductor device manufacturing system includes a semiconductor manufacturing apparatus and a wafer temperature calculation system. The semiconductor manufacturing apparatus includes N heaters disposed in N regions disposed inside a platform within a processing chamber, and P temperature sensors disposed in specific measurement locations inside the platform, wherein N is a positive integer of 1 or more, and P is a positive integer less than or equal to N. The wafer temperature calculation system includes a memory device. The memory device stores a plurality of first related data and a plurality of second related data. The plurality of first related data is a correlation function showing the operating states of the aforementioned N heaters and the temperatures of L locations on the wafer on the aforementioned platform, for each of the aforementioned pre-obtained multiple temperature distribution conditions, where L is a positive integer greater than or equal to 1. The plurality of second related data is a correlation function showing the operating states of the aforementioned N heaters and the temperatures of P locations measured by the aforementioned P temperature sensors, for each of the aforementioned temperature distribution conditions, and is paired with the aforementioned plurality of first related data. The aforementioned wafer temperature calculation system controls the operating states of the aforementioned N heaters by using the aforementioned plurality of first related data in a manner that makes the temperatures of the aforementioned L locations on the aforementioned wafer the target temperature distribution. The temperature of the wafer is adjusted in such a way that the difference between the measured values ​​of the aforementioned P temperature sensors corresponding to the aforementioned temperature distribution conditions and the predicted values ​​of the aforementioned P temperature sensors calculated using any of the aforementioned plurality of second relevant data is minimized or does not reach a specific value. Alternatively, the temperature of the wafer is adjusted by selecting a first relevant data pair with the aforementioned second relevant data from the aforementioned plurality of first relevant data in such a way that the difference between the measured values ​​of the aforementioned P temperature sensors calculated at the aforementioned specific measurement location and the aforementioned predicted values ​​calculated using the aforementioned second relevant data is minimized or does not reach a specific value. (Sample 2) In the semiconductor device manufacturing system described in Sample 1, the temperature adjustment of the wafer includes updating the aforementioned plurality of first relevant data for the wafer being processed. (State 3) The semiconductor device manufacturing system described in State 1 or State 2, wherein a first wafer is used to select one first relevant data and one second relevant data corresponding to the aforementioned temperature distribution conditions, and the selected first relevant data and the selected second relevant data are used to heat and process the second wafer.(Sample 4) The semiconductor device manufacturing system described in any of Samples 1 to 3, wherein the measured values ​​and predicted values ​​of the aforementioned P temperature sensors are the measured values ​​and predicted values ​​corresponding to any two locations selected from the aforementioned specific measurement locations. (Sample 5) The semiconductor device manufacturing system described in any of Samples 1 to 4, wherein the aforementioned plurality of first relevant data and the aforementioned plurality of second relevant data corresponding to the aforementioned temperature distribution conditions include, for the aforementioned wafer temperature, at least data corresponding to the following three temperature distributions: a temperature distribution that is higher at the center than at the ends, a temperature distribution that is higher at the ends than at the center, and a uniform temperature distribution within the wafer surface. (Sample 6) In the semiconductor device manufacturing system described in any of Samples 1 to 5, the operating state of the aforementioned N heaters is set by the heater resistance value. The heater resistance values ​​of the aforementioned N heaters during processing are detected, and the setting is performed by feedback control using the heater resistance value calculated based on the first relevant data of any one of the aforementioned plurality of first relevant data as the control target. (Sample 7) In the semiconductor device manufacturing system described in any of Samples 1 to 6, the relationship between the heater resistance values ​​corresponding to the heater temperatures of the aforementioned N heaters is calculated under the condition that a uniform temperature distribution is achieved within the wafer surface. (Sample 8) In the semiconductor device manufacturing system described in any of Samples 1 to 7, the heater resistance value during processing has a delay time. At time t, the heater resistance value at time (tu) before its delay time u is used to calculate the error between the aforementioned control target, and the aforementioned feedback control is performed. (Sample 9) In the semiconductor device manufacturing system described in any of Samples 1 to 8, the operating state of the aforementioned heater is calculated using at least one of heater temperature, heater power, and heater current. (Sample 10) In the semiconductor device manufacturing system described in any of Samples 1 to 9, the aforementioned specific measurement location is a location disposed at different positions in the radial direction of the aforementioned platform. (Sample 11) In the semiconductor device manufacturing system described in any of Samples 1 to 10, the aforementioned specific measurement location is a location divided into at least two locations, a center side and an end side, at a point 1 / 2R in the radial direction relative to the radius R of the aforementioned platform. (Sample 12) In the semiconductor device manufacturing system described in any of Samples 1 to 11, the aforementioned specific measurement location is a location overlapping the lower projection surface of the area of ​​the aforementioned platform where the aforementioned N heaters are disposed.(Sample 13) A semiconductor device manufacturing system as described in any of Samples 1 to 12, wherein each of the aforementioned plurality of first related data and each of the aforementioned second related data is calculated as a linear combination using matrices. (Sample 14) A semiconductor device manufacturing method comprising a semiconductor manufacturing apparatus and a wafer temperature calculation system, wherein the semiconductor manufacturing apparatus comprises N heaters disposed in N regions disposed within a platform in a processing chamber, and P temperature sensors disposed in specific measurement locations within the platform, wherein N is a positive integer greater than or equal to 1, and P is a positive integer less than or equal to N; the wafer temperature calculation system comprises a memory device. The memory device stores a plurality of first-related data and a plurality of second-related data. The plurality of first-related data represents a correlation function between the operating states of the aforementioned N heaters and the temperatures of L locations on the wafer on the aforementioned platform, for each of the aforementioned pre-obtained multiple temperature distribution conditions, where L is a positive integer greater than or equal to 1. The plurality of second-related data represents a correlation function between the operating states of the aforementioned N heaters and the temperatures of P locations measured by the aforementioned P temperature sensors, for each of the aforementioned temperature distribution conditions. This second-related data is paired with the plurality of first-related data to control the operating states of the aforementioned N heaters in a manner that makes the temperatures of the aforementioned L locations on the wafer a target temperature distribution. The temperature of the wafer is adjusted in such a way that the difference between the measured values ​​of the aforementioned P temperature sensors corresponding to the aforementioned temperature distribution conditions and the predicted values ​​of the aforementioned P temperature sensors calculated using any of the aforementioned plurality of second relevant data is minimized or does not reach a specific value. Alternatively, the temperature of the wafer is adjusted by selecting a first relevant data pair with the aforementioned second relevant data from the aforementioned plurality of first relevant data in such a way that the difference between the measured values ​​of the aforementioned P temperature sensors calculated at the aforementioned specific measurement location and the aforementioned predicted values ​​calculated using the aforementioned second relevant data is minimized or does not reach a specific value. [Simplified Explanation of the Diagram]

[0011] [Figure 1] Figure 1 is a schematic diagram showing the configuration of the semiconductor device manufacturing system of Embodiment 1 of the present invention. [Figure 2] Figure 2 is a longitudinal sectional view showing the configuration of the wafer platform of the semiconductor device manufacturing apparatus of Embodiment 1. [Figure 3] Figure 3 is a plan view showing an example of the arrangement of the area on the wafer platform. [Figure 4] Figure 4 is a diagram showing the relationship between heater temperature and heater resistance. [Figure 5] Figure 5 is a diagram showing the relationship between temperature data obtained in advance. [Figure 6] Figure 6 is a flowchart showing the setting of the temperature target value input into the recipe. [Figure 7] Figure 7 is a diagram showing the data obtained in advance for calculating the temperature target value input into the recipe. [Figure 8] Figure 8 is a flowchart showing the operation related to wafer temperature control in Embodiment 1. [Figure 9] Figure 9 is a flowchart illustrating the operation of wafer temperature control related to Embodiment 2. [Figure 10] Figure 10 is a flowchart illustrating the operation of temperature distribution determination related to Embodiment 2. [Figure 11] Figure 11 is a diagram illustrating one example of the method for selecting the thermal interference matrix related to Embodiment 3. [Figure 12] Figure 12 is a diagram showing the correlation between temperature data obtained in advance related to Embodiment 4. [Figure 13] Figure 13 is a flowchart illustrating the operation of wafer temperature control related to Embodiment 4. [Figure 14] Figure 14 is a diagram comparing the effects of the present invention with the prior art.

Claims

1. A semiconductor device manufacturing system comprising a semiconductor manufacturing apparatus and a wafer temperature calculation system, wherein the semiconductor manufacturing apparatus includes N heaters disposed in N regions within a platform arranged in a processing chamber, and P temperature sensors disposed in specific measurement locations within the platform, wherein... N is a positive integer greater than or equal to 1, and P is a positive integer less than or equal to N. The aforementioned wafer temperature calculation system is equipped with a memory device that stores a complex set of first and second related data. The complex set of first related data is a correlation function showing the operating states of the aforementioned N heaters and the temperatures of L locations on the wafer on the aforementioned platform, for each of the aforementioned pre-obtained complex temperature distribution conditions, where L is a positive integer greater than or equal to 1. The complex set of second related data is a correlation function showing the operating states of the aforementioned N heaters and the temperatures of P locations measured by the aforementioned P temperature sensors, for each of the aforementioned temperature distribution conditions, and is paired with the complex set of first related data. The aforementioned wafer temperature calculation system controls the operating states of the aforementioned N heaters by using the complex set of first related data in a manner that makes the temperatures of the aforementioned L locations on the aforementioned wafer the target temperature distribution. The temperature of the wafer is adjusted in such a way that the difference between the measured values ​​of the aforementioned P temperature sensors corresponding to the aforementioned temperature distribution conditions and the predicted values ​​of the aforementioned P temperature sensors calculated using any of the aforementioned plurality of second relevant data is minimized or does not reach a specific value. Alternatively, the temperature of the wafer is adjusted by selecting a first relevant data pair with the aforementioned second relevant data from the aforementioned plurality of first relevant data in such a way that the difference between the measured values ​​of the aforementioned P temperature sensors calculated at the aforementioned specific measurement location and the aforementioned predicted values ​​calculated using the aforementioned second relevant data is minimized or does not reach a specific value.

2. A semiconductor device manufacturing system as described in claim 1, wherein, The aforementioned temperature adjustment of the wafer includes updating the first relevant data for the aforementioned multiple wafers being processed.

3. A semiconductor device manufacturing system as described in claim 1, wherein, The first wafer is used to select one set of first and second relevant data from the first and second relevant data corresponding to the aforementioned temperature distribution conditions, and the selected first and second relevant data are used to heat and process the second wafer.

4. A semiconductor device manufacturing system as described in claim 2 or 3, wherein, The measured and predicted values ​​of the aforementioned P temperature sensors are the measured and predicted values ​​corresponding to any two locations selected from the aforementioned specific measurement locations.

5. A semiconductor device manufacturing system as described in claim 2 or 3, wherein, The first and second related data of the aforementioned plurality, corresponding to the aforementioned temperature distribution conditions, are data corresponding to at least the following three temperature distributions for the aforementioned wafer temperature: a temperature distribution that is higher at the center than at the ends, a temperature distribution that is higher at the ends than at the center, and a uniform temperature distribution within the wafer surface.

6. A semiconductor device manufacturing system as described in claim 5, wherein, The operating state of the aforementioned N heaters is set by the heater resistance value. The heater resistance value of the aforementioned N heaters in the process is detected and set by feedback control using the heater resistance value calculated based on any one of the aforementioned first relevant data as the control target.

7. A semiconductor device manufacturing system as described in claim 6, wherein, The relationship between the resistance values ​​of each heater corresponding to the temperature of each of the aforementioned N heaters is calculated under the condition that a uniform temperature distribution is achieved within the wafer plane.

8. A semiconductor device manufacturing system as described in claim 7, wherein, The heater resistance value being processed has a delay time. At time t, the heater resistance value at time (tu) before its delay time u is used to calculate the error between the value and the aforementioned control target, and the aforementioned feedback control is performed.

9. A semiconductor device manufacturing system as described in claim 2 or 3, wherein, The aforementioned operating state of the heater is calculated using at least one of the heater temperature, heater power, and heater current.

10. A semiconductor device manufacturing system as described in claim 2 or 3, wherein, The aforementioned specific measurement locations are locations located at different positions in the radial direction of the aforementioned platform.

11. A semiconductor device manufacturing system as described in claim 2 or 3, wherein, The aforementioned specific measurement locations are divided into at least two locations, a central side and an end side, at a point that is 1 / 2R in the radial direction relative to the radius R of the aforementioned platform.

12. A semiconductor device manufacturing system as described in claim 2 or 3, wherein, The aforementioned specific measurement location is the location that overlaps with the area below the projection plane of the aforementioned platform where the aforementioned N heaters are arranged.

13. A semiconductor device manufacturing system as described in claim 5, wherein, The first and second relevant data of the aforementioned complex numbers were calculated as linear combinations using matrices.

14. A method for manufacturing a semiconductor device, comprising a semiconductor manufacturing apparatus and a wafer temperature calculation system, wherein the semiconductor manufacturing apparatus includes N heaters disposed in N regions disposed within a platform in a processing chamber, and P temperature sensors disposed in specific measurement locations within the platform, wherein... N is a positive integer greater than or equal to 1, and P is a positive integer less than or equal to N. The aforementioned wafer temperature calculation system is equipped with a memory device that stores a complex set of first and second related data. The first related data is a correlation function showing the operating states of the aforementioned N heaters and the temperatures of L locations on the wafer, given a pre-obtained complex temperature distribution condition, where L is a positive integer greater than or equal to 1. The second related data is a correlation function showing the operating states of the aforementioned N heaters and the temperatures of P locations measured by the aforementioned P temperature sensors, given the aforementioned temperature distribution condition. This second related data is paired with the first related data to control the operating states of the aforementioned N heaters in a manner that makes the temperatures of the aforementioned L locations on the wafer a target temperature distribution. The temperature of the wafer is adjusted in such a way that the difference between the measured values ​​of the aforementioned P temperature sensors corresponding to the aforementioned temperature distribution conditions and the predicted values ​​of the aforementioned P temperature sensors calculated using any of the aforementioned plurality of second relevant data is minimized or does not reach a specific value. Alternatively, the temperature of the wafer is adjusted by selecting a first relevant data pair with the aforementioned second relevant data from the aforementioned plurality of first relevant data in such a way that the difference between the measured values ​​of the aforementioned P temperature sensors calculated at the aforementioned specific measurement location and the aforementioned predicted values ​​calculated using the aforementioned second relevant data is minimized or does not reach a specific value.

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