Semiconductor device and method for fabricating the same

TWI940209BActive Publication Date: 2026-09-21UNITED MICROELECTRONICS CORP
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Patent Information

Application Number
TW114127480
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-07-21
Publication Date
2026-09-21
Estimated Expiration
2045-07-20

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    Figure TWG2TB001912326_003
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Abstract

This invention discloses a method for fabricating a semiconductor device. The method primarily involves first forming an intermetallic dielectric layer on a substrate, then forming a heat dissipation layer on the intermetallic dielectric layer, forming a first metal interconnect within the heat dissipation layer and the intermetallic dielectric layer, and finally forming a pixel unit on the first metal interconnect. The pixel unit includes a first heating layer disposed on the first metal interconnect, a first mirror layer disposed on the first heating layer, a first masking layer disposed on the first mirror layer, a first phase conversion layer disposed on the first masking layer, and a second masking layer disposed on the first phase conversion layer.
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Claims

1. A method for manufacturing a semiconductor device, characterized in that it comprises: forming an intermetallic dielectric layer on a substrate; forming a heat dissipation layer on the intermetallic dielectric layer; forming a first metal interconnect in the heat dissipation layer and the intermetallic dielectric layer; and forming a pixel unit on the first metal interconnect.

2. The method as described in claim 1 further comprises: forming a second metal interconnect next to the first metal interconnect; and forming the pixel unit on the first metal interconnect and the second metal interconnect.

3. The method as described in claim 2, wherein the pixel unit comprises: a heating layer disposed on the first metal interconnect and the second metal interconnect; a mirror layer disposed on the heating layer; a first masking layer disposed on the mirror layer; a phase conversion layer disposed on the first masking layer; and a second masking layer disposed on the phase conversion layer.

4. The method as described in claim 3, wherein the heating layer comprises metal.

5. The method as described in claim 3, wherein the mirror layer comprises metal.

6. The method as described in claim 3, wherein the first covering layer comprises a dielectric layer.

7. The method as described in claim 3, wherein the phase conversion layer comprises germanium antimony telluride (GST).

8. The method as described in claim 1, wherein the heat dissipation layer comprises a dielectric layer.

9. A semiconductor device, characterized in that it comprises: an intermetallic dielectric layer disposed on a substrate; a heat dissipation layer disposed on the intermetallic dielectric layer; a first metal interconnect disposed within the heat dissipation layer and the intermetallic dielectric layer; a second metal interconnect disposed beside the first metal interconnect; and a pixel unit disposed on the first metal interconnect and the second metal interconnect, wherein the pixel unit comprises: a heating layer disposed on the first metal interconnect and the second metal interconnect; a mirror layer disposed on the heating layer; a first masking layer disposed on the mirror layer; a phase conversion layer disposed on the first masking layer; and a second masking layer disposed on the phase conversion layer.

10. The semiconductor device as described in claim 9, wherein the heating layer comprises metal.

11. The semiconductor device as described in claim 9, wherein the mirror layer comprises metal.

12. The semiconductor device as described in claim 9, wherein the first shielding layer comprises a dielectric layer.

13. The semiconductor device as described in claim 9, wherein the phase conversion layer comprises germanium antimony tellurium (GST).

14. The semiconductor device as described in claim 9, wherein the heat dissipation layer comprises a dielectric layer.

Citation Information

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