Semiconductor structure and method for forming the same

Abstract

A semiconductor structure includes a substrate, an epitaxial layer, and structural units. The epitaxial layer is disposed on the substrate and has a first conductivity type. The structural units are disposed on the epitaxial layer and include a central contact, a bottom conductive structure, a pair of gate structures, a pair of sidewell regions, a pair of bottom well regions, and a bottom-doped region. The bottom conductive structures are disposed below the central contact and electrically connected to the central contact. The gate structures are disposed on both sides of the central contact. The sidewell regions are disposed on the side of the gate structures away from the central contact and have a second conductivity type different from the first conductivity type. The bottom well regions are disposed on both sides of the bottom conductive structure below the gate structures and have a second conductivity type. The bottom-doped regions are disposed below the bottom conductive structure and have a second conductivity type.

Claims

1. A semiconductor structure, comprising: One substrate; An epitaxial layer is disposed on the substrate and has a first conductivity type; and a structural unit disposed on the epitaxial layer and including: a central contact; A bottom conductive structure is disposed below the central contact and electrically connected to the central contact; a pair of gate structures are disposed on both sides of the central contact; a pair of side well regions are disposed on the side of the pair of gate structures away from the central contact and have a second conductive type different from the first conductive type; a pair of bottom well regions are disposed below the pair of gate structures on both sides of the bottom conductive structure and have the second conductive type; and a bottom doped region is disposed below the bottom conductive structure and has the second conductive type.

2. The semiconductor structure as described in claim 1, wherein the pair of side well regions and the pair of bottom well regions directly contact the pair of gate structures and directly contact the epitaxial layer.

3. The semiconductor structure as described in claim 2, wherein a portion of the gate structure directly contacts the epitaxial layer.

4. The semiconductor structure as described in claim 3, wherein the pair of side well regions and the pair of bottom well regions are spaced apart from each other via the pair of gate structures that directly contact the portion of the epitaxial layer.

5. The semiconductor structure as claimed in claim 1 further includes a top electrode disposed above the central contact, wherein the pair of side well regions and the pair of bottom well regions are electrically connected to the top electrode via the central contact.

6. The semiconductor structure as claimed in claim 5, wherein the pair of side well regions and the pair of bottom well regions each include a first doped region and a second doped region, the first doped region having the second conductivity type and the second doped region having the first conductivity type.

7. The semiconductor structure as claimed in claim 6, wherein the pair of side well regions and the pair of bottom well regions are electrically connected to the top electrode via their respective first doped region and second doped region.

8. The semiconductor structure as claimed in claim 5 further includes a pair of side contacts disposed on both sides of the central contact, wherein the opposite well regions are electrically connected to the top electrode via the opposite side contacts.

9. The semiconductor structure as claimed in claim 1, wherein the bottom conductive structure comprises: A bottom conductive component is disposed below the central contact and electrically connected to the central contact; and a bottom dielectric layer is disposed between the bottom conductive component and the epitaxial layer.

10. The semiconductor structure as claimed in claim 9, wherein the central contact has a protrusion on one side of the top surface of the bottom conductive member, the protrusion extending downward below the top surface of the bottom conductive member.

11. The semiconductor structure as claimed in claim 9, wherein the bottom surface of the central contact is lower than the top surface of the bottom conductive member.

12. The semiconductor structure as claimed in claim 1, wherein a portion of the bottom conductive structure directly contacts the pair of bottom well regions, and wherein another portion of the bottom conductive structure directly contacts the epitaxial layer.

13. A method for forming a semiconductor structure, comprising: Provide a substrate; An epitaxial layer is formed on the substrate, wherein the epitaxial layer has a first conductivity type; And forming a structural unit on the epitaxial layer, including: forming a trench and a pair of sidewell regions in the epitaxial layer, the trench having a first depth; A bottom well region is formed in the epitaxial layer, wherein the pair of side well regions and the bottom well region have a second conductivity type different from the first conductivity type; the trench is etched to a second depth, wherein the etching step divides the bottom well region into a pair of bottom well regions; a bottom doped region is formed below the trench, the bottom doped region having the second conductivity type; a bottom conductive structure is formed in the trench; a pair of gate structures are formed on the side of the pair of side well regions near the interior of the trench; and a central contact is formed above the bottom conductive structure and electrically connected to the bottom conductive structure, wherein the pair of gate structures are located on both sides of the central contact.

14. The method of forming a semiconductor structure as described in claim 13, wherein the pair of side well regions and the pair of bottom well regions directly contact the pair of gate structures and directly contact the epitaxial layer.

15. A method of forming a semiconductor structure as described in claim 14, wherein a portion of the gate structure is in direct contact with the epitaxial layer.

16. A method of forming a semiconductor structure as claimed in claim 15, wherein the pair of side well regions and the pair of bottom well regions are spaced apart from each other via the pair of gate structures that directly contact the portions of the epitaxial layer.

17. The method of forming a semiconductor structure as described in claim 13 further includes forming a top electrode above the central contact after forming the central contact, wherein the pair of side well regions and the pair of bottom well regions are electrically connected to the top electrode.

18. The method of forming a semiconductor structure as claimed in claim 13 further includes forming a first doped region and a second doped region in the pair of side well regions and the pair of bottom well regions, the first doped region having the second conductivity type and the second doped region having the first conductivity type.

19. A method of forming a semiconductor structure as described in claim 18, wherein forming the first doped region and the second doped region in the bottom well region comprises: After etching the trench to the second depth, the first doped region and the second doped region are formed in the bottom well region.

20. A method of forming a semiconductor structure as claimed in claim 13, wherein the step of etching the trench to the second depth forms a lower portion of the trench, the lower portion being connected to an upper portion of the trench and having a lateral width smaller than that of the upper portion.

21. A method for forming a semiconductor structure as described in claim 20, wherein the step of forming the bottom conductive structure includes: A dielectric layer is formed conformally in the trench and a predetermined space is reserved in the lower part of the trench; A conductive component is formed in the predetermined space; And etch back the dielectric layer so that the top surface of the dielectric layer is lower than the top surface of the bottom conductive component.

22. A method for forming a semiconductor structure as described in claim 21, wherein the step of forming the pair of gate structures includes: A gate structure material is formed above the bottom conductive structure; And perform an etching process to divide the gate structure material into the pair of gate structures.

23. A method for forming a semiconductor structure as described in claim 21, wherein the step of forming the central contact comprises: After etching back the dielectric layer, a central contact material is formed above the bottom conductive structure, wherein the central contact material has protrusions on both sides of the bottom conductive component, and these protrusions extend downward to below the top surface of the bottom conductive component.

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