Plasma treatment method and plasma treatment device

Abstract

The present invention relates to a plasma processing method, comprising: a step of placing a substrate on a substrate support portion; a step of supplying a processing gas for processing the substrate into a cavity; a step of supplying a high frequency to an upper electrode or the substrate support portion to generate plasma of the processing gas in the cavity; a first application step, wherein during the supply of the high frequency, a first bias voltage is periodically applied to the substrate support portion at a first cycle; and a second application step, wherein during the supply of the high frequency, a second bias voltage is periodically applied to the upper electrode at a second cycle, wherein the second cycle is an integer multiple of the first cycle.

Description

[Technical Field]

[0001] An exemplary embodiment of the present invention relates to a plasma treatment method and a plasma treatment apparatus. [Previous Technology]

[0002] As a technique for suppressing the decrease in the etching rate of a substrate, there is a processing method described in Patent Document 1. [Prior Art Documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2019-36658 [Summary of the Invention]

[0004] In one exemplary embodiment of the present invention, a plasma processing method for performing plasma processing on a substrate in a plasma processing apparatus is provided. The plasma processing apparatus includes: a chamber; a substrate support disposed in the chamber and configured to support the substrate; and an upper electrode disposed in the chamber facing the substrate support. The plasma processing method includes: a step of placing a substrate in the substrate support; a step of supplying a processing gas for processing the substrate into the chamber; a step of supplying a high frequency to the upper electrode or the substrate support to generate plasma of the processing gas in the chamber; a first application step in which a first pulse voltage is periodically applied to the upper electrode or the substrate support for a first period during the supply of the high frequency; and a second application step in which a second pulse voltage is periodically applied to the upper electrode or the substrate support for a second period during the supply of the high frequency, wherein the second period is an integer fraction of the first period.

[0005] In one exemplary embodiment of the present invention, a plasma processing apparatus is provided. The plasma processing apparatus includes: a chamber; a substrate support disposed in the chamber and configured to support the substrate; an upper electrode disposed in the chamber facing the substrate support; and a control unit; and the control unit performs the following control: placing the substrate in the substrate support; supplying a processing gas for processing the substrate into the chamber; supplying a high frequency to the upper electrode or the substrate support to generate plasma of the processing gas in the chamber; during the supply of the high frequency, periodically applying a first pulse voltage to the upper electrode or the substrate support in a first cycle; and during the supply of the high frequency, periodically applying a second pulse voltage to the upper electrode or the substrate support in a second cycle, wherein the second cycle is an integer fraction of the first cycle.

Implementation Method

[0007] Hereinafter, various embodiments of the present invention will be described.

[0008] In one exemplary embodiment, a plasma processing method for performing plasma processing on a substrate in a plasma processing apparatus is provided. The plasma processing apparatus includes: a chamber; a substrate support disposed in the chamber and configured to support the substrate; and an upper electrode disposed in the chamber facing the substrate support. The plasma processing method includes: a step of placing the substrate on the substrate support; a step of supplying a processing gas for processing the substrate into the chamber; a step of supplying a high frequency to the upper electrode or the substrate support to generate plasma of the processing gas in the chamber; a first application step in which a first pulse voltage is periodically applied to the substrate support at a first cycle during the supply of the high frequency; and a second application step in which a second pulse voltage is periodically applied to the upper electrode at a second cycle synchronously with the application of the first pulse voltage during the supply of the high frequency, wherein the second cycle is an integer fraction of the first cycle.

[0009] In an exemplary embodiment, the second application step is to apply the second pulse voltage to the upper electrode or the substrate support in a synchronous manner with the application of the first pulse voltage.

[0010] In one exemplary embodiment, the integer is 1.

[0011] In one exemplary embodiment, the integer is 2 or more.

[0012] In an exemplary embodiment, the first application step includes: a step of starting to apply the first pulse voltage at a first time point; and a step of stopping the application of the first pulse voltage at a second time point later than the first time point; and the second application step includes: a step of starting to apply the second pulse voltage at a first time point; and a step of stopping the application of the second pulse voltage at a second time point.

[0013] In an exemplary embodiment, the first application step includes: a step of starting to apply a first pulse voltage at a first time point; and a step of stopping the application of the first pulse voltage at a second time point later than the first time point; and the second application step includes: a step of starting to apply a second pulse voltage between the first time point and the second time point; and a step of stopping the application of the second pulse voltage at a time point later than the second time point.

[0014] In an exemplary embodiment, the first application step includes: a step of starting to apply the first pulse voltage at a first time point; and a step of stopping the application of the first pulse voltage at a second time point later than the first time point; and the second application step includes: a step of starting to apply the second pulse voltage at a second time point; and a step of stopping the application of the second pulse voltage at a time point later than the second time point.

[0015] In an exemplary embodiment, the first application step includes: a step of starting to apply the first pulse voltage at a first time point; and a step of stopping the application of the first pulse voltage at a second time point later than the first time point; and the second application step includes: a step of starting to apply the second pulse voltage at a third time point later than the second time point; and a step of stopping the application of the second pulse voltage at a time point later than the third time point.

[0016] In one exemplary embodiment, the time interval from the start of applying the second pulse voltage to the stop of application is equal to the time interval from the start of applying the first pulse voltage to the stop of application.

[0017] In one exemplary embodiment, the time interval from the start of applying the second pulse voltage to the stop of application is longer than the time interval from the start of applying the first pulse voltage to the stop of application.

[0018] In one exemplary embodiment, the time interval from the start of applying the second pulse voltage to the stop of applying it is shorter than the time interval from the start of applying the first pulse voltage to the stop of applying it.

[0019] In one exemplary embodiment, the step of generating plasma is to supply a high frequency to the substrate support.

[0020] In an exemplary embodiment, the first application step is to apply a negative voltage as a first pulse voltage to the substrate support portion.

[0021] In an exemplary embodiment, the second application step is to apply a negative voltage as a second pulse voltage to the upper electrode.

[0022] In one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes: a chamber; a substrate support disposed in the chamber and configured to support a substrate; an upper electrode disposed in the chamber facing the substrate support; and a control unit; and the control unit performs the following control: placing a substrate on the substrate support; supplying processing gas for processing the substrate into the chamber; supplying a high frequency to the upper electrode or the substrate support to generate plasma of the processing gas in the chamber; during the supply of the high frequency, periodically applying a first pulse voltage to the substrate support in a first cycle; and during the supply of the high frequency, periodically applying a second pulse voltage to the upper electrode in a second cycle, wherein the second cycle is an integer fraction of the first cycle.

[0023] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Furthermore, the same or identical elements in each drawing will be labeled with the same symbol, and repeated descriptions will be omitted. Unless otherwise specified, positional relationships such as up, down, left, and right will be described based on the positional relationships shown in the drawings. The scale ratios in the drawings do not represent actual ratios, and actual ratios are not limited to those shown in the drawings.

[0024] FIG1 is a schematic diagram illustrating a substrate processing apparatus 1 according to an exemplary embodiment. The substrate processing apparatus 1 is a capacitively coupled plasma processing apparatus. The substrate processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, an exhaust system 40, and a control unit 50. Furthermore, the substrate processing apparatus 1 includes a substrate support unit 11 and a gas introduction unit. The gas introduction unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas introduction unit includes a cluster nozzle 13. The substrate support unit 11 is disposed within the plasma processing chamber 10. The cluster nozzle 13 is disposed above the substrate support unit 11. In an exemplary embodiment, the cluster nozzle 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the cluster nozzle 13, the sidewall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 has at least one gas supply port for supplying at least one type of processing gas to the plasma processing space 10s, and at least one gas outlet for discharging gas from the plasma processing space. The sidewall 10a is grounded. The cluster nozzle 13 and the substrate support portion 11 are electrically insulated from the housing of the plasma processing chamber 10.

[0025] FIG2 is a partially enlarged view showing an example of a substrate support portion 11 included in the substrate processing apparatus 1. The substrate support portion 11 includes a body portion 111 and a ring assembly 112. The body portion 111 includes a base 113, an electrostatic chuck 114, and an electrode plate 117. Furthermore, the body portion 111 has a central region (substrate support surface) 111a for supporting a substrate (wafer) W, and an annular region (ring support surface) 111b for supporting the ring assembly 112. The annular region 111b of the body portion 111 surrounds the central region 111a of the body portion 111 when viewed from above. The substrate W is disposed on the central region 111a of the body portion 111, and the ring assembly 112 is disposed on the annular region 111b of the body portion 111 in such a way that it surrounds the substrate W on the central region 111a of the body portion 111. The base 113 may include conductive members. The conductive component of the base 113 can function as a lower electrode. An electrostatic chuck 114 is disposed on the base. The upper surface of the electrostatic chuck 114 has a substrate support surface 111a. The ring assembly 112 includes one or more ring-shaped components. At least one of the one or more ring-shaped components is an edge ring.

[0026] The electrostatic chuck 114 internally includes a chuck electrode 115 and a bias electrode 116. The chuck electrode 115 has an electrode 115a disposed between the substrate support surface 111a and the base 113. The electrode 115a may be a planar electrode corresponding to the shape of the substrate support surface 111a. Furthermore, the chuck electrode 115 may have electrodes 115b and 115c disposed between the ring assembly 112 and the base 113. Electrodes 115b and 115c may be annular electrodes corresponding to the shape of the ring assembly 112. Also, electrode 115c is disposed outside electrode 115b. The bias electrode 116 has an electrode 116a disposed between electrode 115a (or substrate support surface 111a) and the base 113. Electrode 116a may be a planar electrode corresponding to the shape of the substrate support surface 111a and / or electrode 115a. Furthermore, the bias electrode 116 may have an electrode 116b disposed between the ring assembly and the base 113.

[0027] Furthermore, when the conductive component included in the base 113 functions as a lower electrode, the electrostatic chuck 114 may not include the bias electrode 116. Also, the chuck electrode 115 may also function as a lower electrode. When the chuck electrode 115 functions as a lower electrode, the electrostatic chuck 114 may not include the bias electrode 116. Furthermore, the electrostatic chuck 114 may be composed of separate parts, including portions of electrodes 115a and 116a and portions including electrodes 115b, 115c, and 116b.

[0028] Furthermore, the substrate support portion 11 may include a temperature control module configured to adjust at least one of the electrostatic chuck 114, the ring assembly 112, and the substrate to a target temperature, but this is not shown in the figure. The temperature control module may include a heater, a heat transfer medium, a flow path, or a combination thereof. A heat transfer fluid such as brine or gas flows through the flow path. Furthermore, the substrate support portion 11 may include a heat transfer gas supply portion configured to supply heat transfer gas between the back surface of the substrate W and the substrate support surface 111a.

[0029] Referring back to Figure 1, the cluster nozzle 13 is configured to introduce at least one type of processing gas from the gas supply unit 20 into the plasma processing space 10s. The cluster nozzle 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas inlets 13c. The processing gas supplied to the gas supply port 13a is introduced into the plasma processing space 10s through the gas diffusion chamber 13b and the plurality of gas inlets 13c. Furthermore, the cluster nozzle 13 includes a conductive member. The conductive member of the cluster nozzle 13 functions as an upper electrode. Moreover, the gas inlet unit may include, in addition to the cluster nozzle 13, one or more side gas injectors (SGIs) installed in one or more openings formed in the sidewall 10a.

[0030] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In an exemplary embodiment, the gas supply unit 20 is configured to supply at least one type of processing gas from its respective corresponding gas source 21 to the cluster nozzle 13 via its respective corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may include one or more flow modulation devices for modulating or pulsedizing the flow rate of the at least one type of processing gas.

[0031] The power supply 30 includes an RF (Radio Frequency) power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power), such as a source RF signal and a bias RF signal, to the conductive members of the substrate support portion 11 and / or the conductive members of the cluster head 13. Thereby, plasma is formed by at least one type of processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least part of a plasma generation unit configured to generate plasma from one or more types of processing gases in the plasma processing chamber 10. Furthermore, by supplying a bias RF signal to the conductive members of the substrate support portion 11, a bias potential is generated in the substrate W, thereby feeding the ionic components in the formed plasma into the substrate W.

[0032] In one exemplary embodiment, the RF power supply 31 includes a first RF generating unit 31a and a second RF generating unit 31b. The first RF generating unit 31a is configured to be coupled to a conductive member of the substrate support 11 and / or a conductive member of the cluster head 13 via at least one impedance matching circuit, and generates a plasma generation source RF signal (source RF power). In one exemplary embodiment, the source RF signal is a continuous wave or pulse wave composed of a high frequency having a frequency in the range of 13 MHz to 150 MHz. In one exemplary embodiment, the first RF generating unit 31a may be configured to generate a plurality of source RF signals with different frequencies. One or more source RF signals generated are supplied to the conductive members of the substrate support 11 and / or the cluster head 13. The one or more source RF signals may be supplied in the substrate support 11 to the base 113, the chuck electrode 115, or the bias electrode 116. The second RF generation unit 31b is configured to be coupled to a conductive member of the substrate support unit 11 via at least one impedance matching circuit, and generates a bias RF signal (bias RF power). In one exemplary embodiment, the bias RF signal has a lower frequency than the source RF signal. In one exemplary embodiment, the bias RF signal is a continuous wave or pulse wave composed of a high frequency in the range of 400 kHz to 13.56 MHz. In one exemplary embodiment, the second RF generation unit 31b may be configured to generate a plurality of bias RF signals with different frequencies. One or more bias RF signals generated are supplied to the base 113, chuck electrode 115, or bias electrode 116 of the substrate support unit 11. Furthermore, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0033] Furthermore, the power supply 30 may include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generating unit 32a and a second DC generating unit 32b. In an exemplary embodiment, the first DC generating unit 32a is configured to be connected to a conductive member of the substrate support 11 and generates a first DC signal. The generated first bias DC signal is applied to the conductive member of the substrate support 11. In an exemplary embodiment, the first DC signal may be applied to the electrode 116a and / or electrode 116b included in the base 113, the chuck electrode 115, or the bias electrode 116 of the substrate support 11. In an exemplary embodiment, the second DC generating unit 32b is configured to be connected to a conductive member of the cluster head 13 and generates a second DC signal. The generated second DC signal is applied to the conductive member of the cluster head 13. In various embodiments, at least one of the first and second DC signals may be pulsed. Furthermore, in addition to the RF power supply 31, first and second DC generating units 32a and 32b may be provided, or the first DC generating unit 32a may be provided instead of the second RF generating unit 31b. Also, the first DC signal and the second DC signal may be generated in such a way that the frequency of one of them is an integer multiple of the frequency of the other. For example, the second DC generating unit 31b may generate the second DC signal synchronously with the period of the first DC signal. The first DC signal and the second DC signal may, for example, have a frequency of 400 kHz. Furthermore, the first DC signal and the second DC signal may be generated synchronously with the period of the source RF signal and / or the bias RF signal.

[0034] The DC power supply 32 generates a DC voltage applied to electrodes 115a, 115b, and 115c included in the chuck electrode 115 (see Figure 2). Electrodes 115b and 115c can form a bipolar electrostatic chuck. Alternatively, electrodes 115a, 115b, and 115c can be integrally formed. The DC power supply 32 can be configured to apply different DC voltages to electrodes 115a, 115b, and 115c respectively, or it can be configured to apply the same DC voltage to them. Furthermore, the power supply 30 can also have a power supply that generates the voltage applied to the chuck electrode 115 separately from the DC power supply 32.

[0035] The exhaust system 40 may be connected, for example, to a gas outlet 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure within the plasma processing space 10s is adjusted by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry vacuum pump, or a combination thereof.

[0036] The control unit 50 processes computer-executable commands that cause the substrate processing apparatus 1 to perform the various steps described herein. The control unit 50 may be configured to control various elements of the substrate processing apparatus 1 to perform the various steps described herein. In an exemplary embodiment, part or all of the control unit 50 may be configured as part of the structure of a device external to the substrate processing apparatus 1. The control unit 50 may include, for example, a computer 50a. The computer 50a may include, for example, a processing unit (CPU: Central Processing Unit) 50a1, a memory unit 50a2, and a communication interface 50a3. The processing unit 50a1 may be configured to perform various control actions based on a program stored in the memory unit 50a2. The memory unit 50a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 50a3 can communicate with other components of the substrate processing device 1 via communication lines such as LAN (Local Area Network).

[0037] Furthermore, the plasma formed in the plasma processing space can be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR), helicon wave plasma (HWP), or surface wave plasma (SWP). Additionally, various types of plasma generating units, including AC (Alternating Current) plasma generating units and DC (Direct Current) plasma generating units, can also be used. In one embodiment, the AC signal (AC power) used by the AC plasma generating unit has a frequency in the range of 100 kHz to 10 GHz. Therefore, the AC signal includes RF (Radio Frequency) signals and microwave signals. In one embodiment, the RF signal has a frequency in the range of 200 kHz to 150 MHz.

[0038] FIG3 is a flowchart illustrating a substrate processing method (hereinafter also referred to as "this processing method") according to an exemplary embodiment. FIG4 is a timing diagram illustrating an example of the periods during which a source RF signal, a first DC signal, and a second DC signal are supplied or applied and stopped in this processing method.

[0039] Figure 4 shows an example where pulse waves are used for both the source RF signal and the first and second DC signals. Specifically, the source RF signal is a pulse wave containing electrical pulses during period H. Similarly, the first and second DC signals are pulse waves containing electrical pulses during period H. In Figure 4, the horizontal axis represents time. In Figure 5, the vertical axis represents the power level of the source RF signal (for example, the effective value of the source RF signal power) and the voltage levels of the first and second DC signals (for example, the effective value of the absolute values ​​of the first and second DC signals voltages). "L1" for the source RF signal indicates that the source RF signal is not supplied, or is below the power level indicated by "H1". "L2" and "L3" for the first and second DC signals respectively indicate that the first and second DC signals are not supplied, or are below the voltage levels indicated by "H2" and "H3".

[0040] This processing method (refer to Figure 3) includes the following steps: placing the substrate W on the substrate support 11 (ST1); supplying processing gas to the plasma processing chamber 10 (ST2); supplying a source RF signal (an example of high frequency) to the lower electrode (ST3); applying a pulse voltage (ST4); stopping the supply of the source RF signal (ST5); determining the end of etching (ST6); and stopping the supply of processing gas (ST7).

[0041] In step ST1, the substrate W is disposed on the substrate support portion 11. The substrate W may be, for example, a substrate obtained by depositing a base film on a silicon wafer, an etched film etched by this processing method, or a mask film having a specific pattern. The etched film may be, for example, a dielectric film, a semiconductor film, or a metal film.

[0042] In step ST2, a processing gas is supplied to the plasma processing chamber 10. The processing gas system is a gas used to etch the film formed on the substrate W. The type of processing gas can be appropriately selected based on the material of the film to be etched, the material of the mask film, the material of the base film, the pattern of the mask film, the etching depth, etc.

[0043] In step ST3, a source RF signal is supplied to the substrate support 11. The source RF signal is a pulse wave with electrical pulses during period H (see Figure 4). Furthermore, the electrical pulses contained in the source RF signal are each composed of a high-frequency continuous wave. For example, the high frequency has a frequency in the range of 13 MHz to 150 MHz. When the source RF signal is supplied to the substrate support 11, plasma is formed by the processing gas supplied to the plasma processing chamber 10. In other embodiments, the source RF signal may be supplied to the upper electrode included in the cluster head 13.

[0044] In step ST4, an electrical pulse is applied to the upper electrode and the substrate support portion 11. Step ST4 includes: applying a first DC signal to the substrate support portion 11 (ST41); and applying a second DC signal to the upper electrode included in the cluster head 13 (ST42). Steps ST3, ST41, and ST42 may start simultaneously, or they may start at different times.

[0045] The first DC signal is a pulse wave with electrical pulses during period H. That is, in step ST41, the electrical pulses contained in the first DC signal are periodically applied to the substrate support portion 11.

[0046] The second DC signal is a pulse wave with electrical pulses during period H. That is, in step ST42, the electrical pulses contained in the second DC signal are periodically applied to the upper electrode.

[0047] In step ST5, the supply of the source RF signal to the substrate support 11 is stopped. This ends period H and begins period H1, during which the supply of the source RF signal is stopped (see Figure 4). Furthermore, the power of the source RF signal during period L is lower than the power of the source RF signal during period H. Also, during period L, the power of the source RF signal can be 0 W (watts). Furthermore, during period L, the supply of the first pulse voltage P1 and the second pulse voltage P2 can also be stopped.

[0048] In step ST6, a decision is made as to whether to terminate the etching process of the etched film. If the etching process continues, the process returns to step ST3 and restarts period H. On the other hand, if the etching process is terminated, the process gas supply is stopped in step ST7, and the etching process is terminated.

[0049] Figures 5 to 11 are timing diagrams showing an example of the timing of the periodic application of the first pulse voltage P1 and the second pulse voltage P2 during period H. Referring to Figures 5 to 11, the relationship between the source RF signal and the first DC signal and the second DC signal in step ST4 (refer to Figure 3) will be explained.

[0050] Furthermore, in Figures 5 to 11, the horizontal axis represents time. Also, the amplitude in the timing diagram represents the power of the source RF signal and the voltage of the first DC signal and the voltage of the second DC signal. Furthermore, during period H shown in Figures 5 to 11, the power of the source RF signal varies at a certain frequency (e.g., a frequency in the range of 13 MHz to 150 MHz).

[0051] Furthermore, in the examples shown in Figures 5 to 11, the first DC signal is a rectangular wave whose voltage is VH1 or VL1. The second DC signal is a rectangular wave whose voltage is VH2 or VL2. For ease of explanation, the case where the voltage of the first DC signal is VL1 is also referred to as "applying the first pulse voltage P1", and the pulse itself contained in the first DC signal is also referred to as "the first pulse voltage P1". Similarly, the case where the voltage of the second DC signal is VL2 is also referred to as "applying the second pulse voltage P2", and the pulse itself contained in the second DC signal is also referred to as "the second pulse voltage P2". Moreover, the waveforms represented by one or more pulse voltages P1 contained in the first DC signal and / or the waveforms represented by one or more pulse voltages P2 contained in the second DC signal, other than rectangular waves, can be signals such as triangular waves, trapezoidal waves, and pulses whose voltages change at a certain period and can apply a specific bias voltage to the upper electrode or the substrate support portion 11. Furthermore, voltages VH1 and VH2 can be 0 V, and voltages VL1 and VL2 can be negative voltages.

[0052] The example in Figure 5 will be explained. As shown in Figure 5, based on the period H, starting at time t1, the voltage of the first DC signal becomes VL1, and the first pulse voltage P1 is applied to the substrate support portion 11. Moreover, the first pulse voltage P1 is applied to the substrate support portion 11 from time t1 to time t2 (period Ta1). When the first pulse voltage P1 is applied to the substrate support portion 11, the active species present in the plasma are fed into the substrate W disposed on the substrate support portion 11. Thereby, the active species collide with the etchable film formed on the substrate W, thereby etching the etchable film.

[0053] At time t2, if the application of the first pulse voltage P1 is stopped, the application of the second pulse voltage P2 begins. The application of the second pulse voltage P2 may begin after the application of the first pulse voltage P1 ends. The second pulse voltage P2 is applied to the upper electrode Tb1 during the period from time t2 to time t3.

[0054] At time t4, after a period Ta2 from time t2, the period PDa, which is one cycle of the first DC signal, ends. That is, at time t4, the voltage of the first DC signal becomes VL1 again, and the next cycle of the first DC signal begins. Also, at time t5, after a period Tb2 from time t3, the period PDb, which is one cycle of the second DC signal, ends. Also, at time t5, the voltage of the second DC signal becomes VL2 again, and the next cycle of the second DC signal begins. Repeat the above actions to execute step ST4 in this example.

[0055] In this example, during period Ta1, if positive ions present in the plasma are fed into the substrate W and etch the etched film, the etched portion of the substrate W (e.g., the bottom of the holes in the etched film) may become positively charged by the positive ions. On the other hand, if the second pulse voltage P2 is applied to the upper electrode, the positive ions present in the plasma are fed into the upper electrode side and collide with the upper electrode. If the positive ions collide with the upper electrode, secondary electrons are released from the upper electrode. The released secondary electrons are accelerated by the upper electrode, which becomes negatively potential (voltage V2), and reach the substrate W. Subsequently, the secondary electrons reaching the substrate W eliminate or reduce the charge of the positively charged portion of the substrate W (e.g., the bottom of the holes in the etched film).

[0056] Furthermore, in this example, during period Ta1, the voltage VH2 of the second DC signal can be 0 V. Therefore, during period Ta1, the release of secondary electrons from the upper electrode is suppressed, and the acceleration of electrons towards the substrate W due to the potential of the upper electrode is also suppressed. As a result, during period Ta1, the surface of the substrate W is suppressed from becoming negatively charged due to electrons. Therefore, during period Tb1, secondary electrons released from the upper electrode can reach positively charged portions of the substrate W (e.g., the bottom of holes formed in the etched film) without decelerating near the surface of the substrate W.

[0057] Furthermore, in this example, around time t2, before and after the application of the first pulse voltage P1 to the substrate support 11 is stopped, the second pulse voltage P2 is applied to the upper electrode. This suppresses a significant increase in the potential of the substrate W and the plasma when the voltage of the first DC signal applied to the substrate support 11 changes from VL1 to VH1 (i.e., when the application of the first pulse voltage P1 ends). Therefore, in this example, the possibility of plasma sputtering onto the inner wall of the plasma processing chamber 10 (see Figure 1) due to increased potential can be reduced.

[0058] The example shown in Figure 6 will be explained. In the example shown in Figure 6, the second pulse voltage P2 is applied at time t3, which is later than time t2. That is, in the example shown in Figure 6, there is a period between period Ta1 and period Tb1 during which neither the first pulse voltage P1 nor the second pulse voltage P2 is applied. The application of the second pulse voltage P2 can begin based on the cessation of the application of the first pulse voltage P1 at time t2.

[0059] In the example shown in Figure 6, during the period PDa, which is one cycle of the first DC signal, the voltage is VL1 from time t1 to time t2, and VH1 from time t2 to time t5. That is, during the period Ta1 from time t1 to time t2, the first pulse voltage P1 is applied to the substrate support 11. During the period Ta2 from time t2 to time t5, the application of the first pulse voltage P1 to the substrate support 11 is stopped. Thus, the period PDa, which is one cycle of the first DC signal, ends. At the same time, at time t5, the voltage of the first DC signal becomes VL1 again, and the next cycle of the first DC signal begins.

[0060] Furthermore, in the example shown in Figure 6, the voltage of the second DC signal is VL2 from time t3 to time t4 during its one-cycle period PDb, and is 0 V from time t4 to time t6. That is, during the period from time t3 to time t4, i.e., period Tb1, the second pulse voltage P2 is applied to the upper electrode. And during the period from time t4 to time t6, i.e., period Tb2, the application of the second pulse voltage P2 to the upper electrode is stopped. Thus, the period PDb, which is one cycle of the second DC signal, ends. And simultaneously at time t6, the voltage of the second DC signal becomes VL2 again, and the next cycle of the second DC signal begins. The above actions are repeated to perform step ST4 of this example.

[0061] In this example, after the application of the first pulse voltage P1 ends and a certain period has elapsed, the second pulse voltage P2 is applied. This allows secondary electrons to be efficiently released at the upper electrode. Furthermore, the thickness of the sheath formed between the upper electrode and the plasma increases, thus reducing the annihilation rate of electrons in the plasma. Therefore, the plasma density can be efficiently increased within the plasma processing chamber 10.

[0062] The example shown in FIG7 will be explained. In the example shown in FIG7, the second pulse voltage P2 is applied at time t2, before time t3 when Ta1 ends during the application of the first pulse voltage P1. That is, in the example shown in FIG7, the first pulse voltage P1 and the second pulse voltage P2 are applied in time, partially overlapping, between time t2 and time t3. The application of the second pulse voltage P2 can be based on the application of the first pulse voltage P1 starting at time t1.

[0063] In the example shown in Figure 7, during the period PDa, which is one cycle of the first DC signal, the voltage is VL1 from time t1 to time t3, and VH1 from time t3 to time t5. That is, during the period Ta1 from time t1 to time t3, the first pulse voltage P1 is applied to the substrate support 11. During the period Ta2 from time t3 to time t5, the application of the first pulse voltage P1 to the substrate support 11 is stopped. Thus, the period PDa, which is one cycle of the first DC signal, ends. At the same time, at time t5, the voltage of the first DC signal becomes VL1 again, and the next cycle of the first DC signal begins.

[0064] Furthermore, in the example shown in Figure 7, during the period PDb, which is one cycle of the second DC signal, the voltage is VL2 from time t2 to time t4, and VH2 from time t4 to time t6. That is, during the period Tb1 from time t2 to time t4, the second pulse voltage P2 is applied to the upper electrode. During the period Tb2 from time t4 to time t6, the application of the second pulse voltage P2 to the upper electrode is stopped. Thus, the period PDb, which is one cycle of the second DC signal, ends. At the same time, at time t6, the voltage of the second DC signal becomes VL2 again, and the next cycle of the second DC signal begins. The above actions are repeated to perform step ST4 of this example.

[0065] In this example, the period Ta1 during which the first pulse voltage P1 is applied and the period Tb1 during which the second pulse voltage P2 is applied partially overlap in time. Therefore, at the end of the period Ta1 during which the first pulse voltage P1 is applied, the potential rise of the substrate W and the plasma can be further suppressed. Furthermore, the timing of suppressing the potential rise of the substrate W and the plasma can be controlled.

[0066] The example shown in FIG8 will be explained. In the example shown in FIG8, the second pulse voltage P2 is applied at time t1 when the first pulse voltage P1 is applied. Furthermore, the application of the second pulse voltage P2 also stops at time t2 when the application of the first pulse voltage P1 stops. That is, in the example shown in FIG8, the first pulse voltage P1 and the second pulse voltage P2 are applied in overlapping time. The application of the second pulse voltage P2 can begin based on the application of the first pulse voltage P1 starting at time t1.

[0067] In the example shown in Figure 8, during the period PDa, which is one cycle of the first DC signal, the voltage is VL1 from time t1 to time t2, and VH1 from time t2 to time t3. That is, during the period Ta1 from time t1 to time t2, the first pulse voltage P1 is applied to the substrate support 11. During the period Ta2 from time t2 to time t3, the application of the first pulse voltage P1 to the substrate support 11 is stopped. Thus, the period PDa, which is one cycle of the first DC signal, ends. At the same time, at time t3, the voltage of the first DC signal becomes VL1 again, and the next cycle of the first DC signal begins.

[0068] Furthermore, in the example shown in Figure 8, during the period PDb, which is one cycle of the second DC signal, the voltage is VL2 from time t1 to time t2, and VH2 from time t2 to time t3. That is, during the period Tb1 from time t1 to time t2, the second pulse voltage P2 is applied to the upper electrode. During the period Tb2 from time t2 to time t3, the application of the second pulse voltage P2 to the upper electrode is stopped. Thus, the period PDb, which is one cycle of the second DC signal, ends. At the same time, at time t3, the voltage of the second DC signal becomes VL2 again, and the next cycle of the second DC signal begins. The above actions are repeated to perform step ST4 of this example.

[0069] In this example, the second pulse voltage P2 is applied concurrently with the application of the first pulse voltage P1 at Ta1. This increases the density of the generated plasma. Furthermore, electrons released from the plasma or substrate are slowed down or shielded by a sheath formed between the plasma and the upper electrode. Therefore, for example, the entry of these electrons into the gas inlet 13c of the cluster head 13 (upper electrode) can be suppressed, thereby suppressing discharge in the gas inlet 13c.

[0070] The example shown in Figure 9 will be explained. In the example shown in Figure 9, the duty cycle of the second DC signal is different from that of the first DC signal. In the example shown in Figure 9, the period Ta1 during which the first pulse voltage P1 is applied coincides with the period Tb2 during which the second pulse voltage P2 is not applied. Also, the period Ta2 during which the first pulse voltage P1 is not applied coincides with the period Tb1 during which the second pulse voltage P2 is applied. The application of the second pulse voltage P2 can begin based on the application of the first pulse voltage P1 starting at time t1. Also, the application of the second pulse voltage P2 can begin based on the application of the first pulse voltage P1 ending at time t2.

[0071] In the example shown in Figure 9, during the period PDa, which is one cycle of the first DC signal, the voltage is VL1 from time t1 to time t2, and VH1 from time t2 to time t3. That is, during the period Ta1 from time t1 to time t2, the first pulse voltage P1 is applied to the substrate support 11. During the period Ta2 from time t2 to time t3, the application of the first pulse voltage P1 to the substrate support 11 is stopped. Thus, the period PDa, which is one cycle of the first DC signal, ends. At the same time, at time t3, the voltage of the first DC signal becomes VL1 again, and the next cycle of the first DC signal begins.

[0072] Furthermore, in the example shown in Figure 9, during the period PDb, which is one cycle of the second DC signal, the voltage is VL2 from time t2 to time t3, and VH2 from time t3 to time t4. That is, during the period Tb1 from time t2 to time t3, the second pulse voltage P2 is applied to the upper electrode. During the period Tb2 from time t3 to time t4, the application of the second pulse voltage P2 to the upper electrode is stopped. Thus, the period PDb, which is one cycle of the second DC signal, ends. At the same time, at time t4, the voltage of the second DC signal becomes VL2 again, and the next cycle of the second DC signal begins. The above actions are repeated to perform step ST4 of this example.

[0073] In this example, the application of the second pulse voltage P2 begins synchronously with the end of the period Ta1 during which the first pulse voltage P1 is applied, and the application of the second pulse voltage P2 ends synchronously with the start of the period Ta1 during which the first pulse voltage P1 is applied. This suppresses the potential rise of the substrate W and the plasma around the time t2 when the application of the first pulse voltage P1 ends, and increases the plasma density. Furthermore, the secondary electrons generated in the upper electrode eliminate or further reduce the charge on positively charged portions of the substrate W (e.g., the bottom of holes formed in the etched film).

[0074] The example shown in Figure 10 will be explained. In the example shown in Figure 10, the duty cycle of the second DC signal is different from that of the first DC signal. Furthermore, the second pulse voltage P2 is applied starting at time t2, before time t3, when the application of the first pulse voltage P1 ends. That is, in the example shown in Figure 10, there is a period between time t2 and time t3 during which the first pulse voltage P1 and the second pulse voltage P2 are applied in a partially overlapping manner. The application of the second pulse voltage P2 can begin based on the application of the first pulse voltage P1 starting at time t1.

[0075] In the example shown in Figure 10, during the period PDa, which is one cycle of the first DC signal, the voltage is VL1 from time t1 to time t3, and VH1 from time t3 to time t5. That is, during the period Ta1 from time t1 to time t3, the first pulse voltage P1 is applied to the substrate support portion 11. During the period Ta2 from time t3 to time t5, the application of the first pulse voltage P1 to the substrate support portion 11 is stopped. Thus, the period PDa, which is one cycle of the first DC signal, ends. At the same time, at time t5, the voltage of the first DC signal becomes VL1 again, and the next cycle of the first DC signal begins.

[0076] Furthermore, in the example shown in Figure 10, during the period PDb, which is one cycle of the second DC signal, the voltage is VL2 from time t2 to time t4, and VH2 from time t4 to time t6. That is, during the period Tb1 from time t2 to time t4, the second pulse voltage P2 is applied to the upper electrode. During the period Tb2 from time t4 to time t6, the application of the second pulse voltage P2 to the upper electrode is stopped. Thus, the period PDb, which is one cycle of the second DC signal, ends. At the same time, at time t6, the voltage of the second DC signal becomes VL2 again, and the next cycle of the second DC signal begins. The above actions are repeated to perform step ST4 of this example.

[0077] In this example, the period Ta1 during which the first pulse voltage P1 is applied and the period Tb1 during which the second pulse voltage P2 is applied partially overlap in time. Therefore, at the end of the period Ta1 during which the first pulse voltage P1 is applied, the potential rise of the substrate W and the plasma can be further suppressed. Furthermore, the timing of suppressing the potential rise of the substrate W and the plasma can be controlled. Also, the plasma density can be further increased by the second pulse voltage P2 applied during period Tb1.

[0078] The example shown in FIG11 will be explained. In the example shown in FIG11, the duty cycle of the second DC signal is different from that of the first DC signal. Furthermore, at time t1 when the first pulse voltage P1 is applied, the second pulse voltage P2 is applied. That is, in the example shown in FIG11, the first pulse voltage P1 and the second pulse voltage P2 are applied overlappingly in time. The application of the second pulse voltage P2 can be based on the application of the first pulse voltage P1 starting at time t1.

[0079] In the example shown in Figure 11, during the period PDa, which is one cycle of the first DC signal, the voltage is VL1 from time t1 to time t2, and VH1 from time t2 to time t4. That is, during the period Ta1 from time t1 to time t2, the first pulse voltage P1 is applied to the substrate support 11. During the period Ta2 from time t2 to time t4, the application of the first pulse voltage P1 to the substrate support 11 is stopped. Thus, the period PDa, which is one cycle of the first DC signal, ends. At the same time, at time t4, the voltage of the first DC signal becomes VL1 again, and the next cycle of the first DC signal begins.

[0080] Furthermore, in the example shown in Figure 11, during the period PDb, which is one cycle of the second DC signal, the voltage is VL2 from time t1 to time t3, and VH2 from time t3 to time t4. That is, during the period Tb1 from time t1 to time t3, the second pulse voltage P2 is applied to the upper electrode. During the period Tb2 from time t3 to time t4, the application of the second pulse voltage P2 to the upper electrode is stopped. Thus, the period PDb, which is one cycle of the second DC signal, ends. At the same time, at time t4, the voltage of the second DC signal becomes VL2 again, and the next cycle of the second DC signal begins. The above actions are repeated to perform step ST4 of this example.

[0081] In this example, the second pulse voltage P2 is applied concurrently with the application of the first pulse voltage P1 by Ta1. This increases the density of the generated plasma. Furthermore, it suppresses the charging of the cluster head 13 (upper electrode), thereby suppressing, for example, the discharge in the gas inlet 13c.

[0082] Furthermore, in the examples illustrated in Figures 5 to 11, voltages VH1 and VH2 can, for example, be 0 V. Also, voltage VL1 can, for example, be a voltage capable of making the potential of substrate W negative. Also, voltage VH1 can be a positive voltage or a negative voltage. Also, voltage VL2 can be a voltage capable of making the potential of the upper electrode negative. Also, voltage VH2 can be a positive voltage or a negative voltage.

[0083] Furthermore, in the examples illustrated in Figures 5 to 11, the period of the second DC signal is the same as the period of the first DC signal. That is, in the examples illustrated in Figures 5 to 11, there is a period Tb1 during each of the periods PDa that constitutes one cycle of the first DC signal when the second pulse voltage P2 is applied. In other examples, the period of one of the first DC signal and the second DC signal can be an integer multiple of more than twice the period of the other. That is, in other examples, the second pulse voltage P2 can also be applied at a rate of once in two or more cycles of the first DC signal. Furthermore, the second pulse voltage P2 can also be applied at a rate of more than twice in one cycle of the first DC signal.

[0084] Furthermore, in the examples shown in Figures 5 to 8, the first DC signal and the second DC signal have the same operating ratio. That is, the ratio of period Ta1 in the period PDa, which is one cycle of the first DC signal, is equal to the ratio of period Tb1 in the period PDb, which is one cycle of the second DC signal. Furthermore, in the examples shown in Figures 9 to 11, the first DC signal and the second DC signal have different operating ratios. That is, the ratio of period Ta1 in the period PDa, which is one cycle of the first DC signal, is different from the ratio of period Tb1 in the period PDb, which is one cycle of the second DC signal. Moreover, the operation of the first DC signal and the second DC signal is not limited to these. For example, the operating ratio of the first DC signal and the second DC signal may be an operating ratio in which period Ta1 and period Tb1 are longer than periods Ta2 and period Tb2, respectively. Furthermore, the duty cycle of the first DC signal and the second DC signal can be the duty cycle of period Ta1 being longer than period Tb1.

[0085] According to an exemplary embodiment, a technique for controlling the potential of plasma can be provided.

[0086] The above embodiments are described for illustrative purposes and are not intended to limit the scope of the present invention. Various changes can be made to the above embodiments without departing from the scope and spirit of the present invention. For example, in addition to being performed using the capacitively coupled substrate processing apparatus 1, it can also be performed using a substrate processing apparatus utilizing any plasma source such as inductively coupled plasma or microwave plasma. [Simplified Explanation of the Diagram]

[0006] FIG1 is a schematic diagram showing a substrate processing apparatus 1 according to an exemplary embodiment. FIG2 is a partial enlarged view of the substrate support portion 11 included in the substrate processing apparatus 1. FIG3 is a flowchart showing a substrate processing method according to an exemplary embodiment. FIG4 is a timing diagram showing the supply, application, and stopping of a source RF signal, a first DC signal, and a second DC signal. FIG5 is a timing diagram showing an example of the timing of periodically applying a first pulse voltage and a second pulse voltage. FIG6 is a timing diagram showing an example of the timing of periodically applying a first pulse voltage and a second pulse voltage. FIG7 is a timing diagram showing an example of the timing of periodically applying a first pulse voltage and a second pulse voltage. FIG8 is a timing diagram showing an example of the timing of periodically applying a first pulse voltage and a second pulse voltage. FIG9 is a timing diagram showing an example of the timing of periodically applying a first pulse voltage and a second pulse voltage. FIG10 is a timing diagram showing an example of the timing of periodically applying a first pulse voltage and a second pulse voltage. Figure 11 is a timing diagram showing an example of the timing of periodically applying the first pulse voltage and the second pulse voltage.

Claims

1. A plasma processing method comprising performing plasma processing on a substrate in a plasma processing apparatus, wherein the plasma processing apparatus comprises: a chamber; a substrate support disposed in the chamber and configured to support the substrate; and an upper electrode disposed in the chamber facing the substrate support; the plasma processing method comprising: The steps of placing the substrate in the substrate support portion; and supplying the processing gas for processing the substrate into the chamber. The steps are as follows: supplying a high frequency to the upper electrode or the substrate support to generate a plasma of the processing gas in the cavity; a first application step in which a first pulse voltage is periodically applied to the substrate support during the continuous supply of the high frequency; and a second application step in which a second pulse voltage is periodically applied to the upper electrode during the continuous supply of the high frequency. The first application step includes: starting to apply the first pulse voltage at a first time point; stopping the application of the first pulse voltage at a second time point later than the first time point; starting to apply the first pulse voltage again at a third time point later than the second time point; and stopping the application of the first pulse voltage again at a fourth time point later than the third time point. The second application step includes: starting to apply the second pulse voltage at the second time point; stopping the application of the second pulse voltage at a time point between the second and third time points; and starting to apply the second pulse voltage again at the fourth time point; and the time interval from the first time point to the second time point is less than or equal to the time interval from the second time point to the third time point.

2. The plasma processing method of claim 1, wherein the step of generating the plasma is to supply the high frequency to the substrate support portion.

3. The plasma processing method of claim 1 or 2, wherein the first application step is to apply a negative voltage as the first pulse voltage to the substrate support portion.

4. The plasma processing method of claim 1 or 2, wherein the second application step is to apply a negative voltage as the second pulse voltage to the upper electrode.

5. The plasma treatment method of claim 1 or 2, wherein the second application step is to stop applying the second pulse voltage at the third time point.

6. A plasma processing apparatus comprising: a chamber; a substrate support disposed within the chamber and configured to support a substrate; an upper electrode disposed within the chamber facing the substrate support; and a control unit; wherein the control unit performs: control of placing a substrate in the substrate support; control of supplying a processing gas for processing the substrate into the chamber; control of supplying a high frequency to the upper electrode or the substrate support to generate plasma of the processing gas in the chamber; a first application control of periodically applying a first pulse voltage to the substrate support during continuous supply of the high frequency; and a second application control of periodically applying a second pulse voltage to the upper electrode during continuous supply of the high frequency, wherein the first application control includes: The control of applying the first pulse voltage is initiated at a first time point; the application of the first pulse voltage is stopped at a second time point later than the first time point; the application of the first pulse voltage is initiated again at a third time point later than the second time point; and the application of the first pulse voltage is stopped again at a fourth time point later than the third time point. The second control application mentioned above includes: starting to apply the second pulse voltage at the second time point; stopping the application of the second pulse voltage at a time point between the second time point and the third time point; starting to apply the second pulse voltage again at the fourth time point; and the time interval from the first time point to the second time point is less than the time interval from the second time point to the third time point.

7. The plasma processing apparatus of claim 6, wherein the control of generating the plasma is to supply the high frequency to the substrate support portion.

8. The plasma processing apparatus of claim 6 or 7, wherein the first application control system applies a negative voltage as the first pulse voltage to the substrate support portion.

9. The plasma processing apparatus of claim 6 or 7, wherein the second application control system applies a negative voltage as the second pulse voltage to the upper electrode.

10. The plasma processing apparatus of claim 6 or 7, wherein the second application control stops applying the second pulse voltage at the third time point.

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